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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_ll_usart.c |
3 | * @file stm32f1xx_ll_usart.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief USART LL module driver. |
5 | * @brief USART LL module driver. |
| 6 | ****************************************************************************** |
6 | ****************************************************************************** |
| 7 | * @attention |
7 | * @attention |
| 8 | * |
8 | * |
| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
9 | * Copyright (c) 2016 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
| 11 | * |
11 | * |
| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
| 13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
| 14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
| 16 | * |
16 | ****************************************************************************** |
| 17 | ****************************************************************************** |
17 | */ |
| 18 | */ |
18 | |
| 19 | 19 | #if defined(USE_FULL_LL_DRIVER) |
|
| 20 | #if defined(USE_FULL_LL_DRIVER) |
20 | |
| 21 | 21 | /* Includes ------------------------------------------------------------------*/ |
|
| 22 | /* Includes ------------------------------------------------------------------*/ |
22 | #include "stm32f1xx_ll_usart.h" |
| 23 | #include "stm32f1xx_ll_usart.h" |
23 | #include "stm32f1xx_ll_rcc.h" |
| 24 | #include "stm32f1xx_ll_rcc.h" |
24 | #include "stm32f1xx_ll_bus.h" |
| 25 | #include "stm32f1xx_ll_bus.h" |
25 | #ifdef USE_FULL_ASSERT |
| 26 | #ifdef USE_FULL_ASSERT |
26 | #include "stm32_assert.h" |
| 27 | #include "stm32_assert.h" |
27 | #else |
| 28 | #else |
28 | #define assert_param(expr) ((void)0U) |
| 29 | #define assert_param(expr) ((void)0U) |
29 | #endif |
| 30 | #endif |
30 | |
| 31 | 31 | /** @addtogroup STM32F1xx_LL_Driver |
|
| 32 | /** @addtogroup STM32F1xx_LL_Driver |
32 | * @{ |
| 33 | * @{ |
33 | */ |
| 34 | */ |
34 | |
| 35 | 35 | #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5) |
|
| 36 | #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5) |
36 | |
| 37 | 37 | /** @addtogroup USART_LL |
|
| 38 | /** @addtogroup USART_LL |
38 | * @{ |
| 39 | * @{ |
39 | */ |
| 40 | */ |
40 | |
| 41 | 41 | /* Private types -------------------------------------------------------------*/ |
|
| 42 | /* Private types -------------------------------------------------------------*/ |
42 | /* Private variables ---------------------------------------------------------*/ |
| 43 | /* Private variables ---------------------------------------------------------*/ |
43 | /* Private constants ---------------------------------------------------------*/ |
| 44 | /* Private constants ---------------------------------------------------------*/ |
44 | /** @addtogroup USART_LL_Private_Constants |
| 45 | /** @addtogroup USART_LL_Private_Constants |
45 | * @{ |
| 46 | * @{ |
46 | */ |
| 47 | */ |
47 | |
| 48 | 48 | /** |
|
| 49 | /** |
49 | * @} |
| 50 | * @} |
50 | */ |
| 51 | */ |
51 | |
| 52 | 52 | ||
| 53 | 53 | /* Private macros ------------------------------------------------------------*/ |
|
| 54 | /* Private macros ------------------------------------------------------------*/ |
54 | /** @addtogroup USART_LL_Private_Macros |
| 55 | /** @addtogroup USART_LL_Private_Macros |
55 | * @{ |
| 56 | * @{ |
56 | */ |
| 57 | */ |
57 | |
| 58 | 58 | /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available |
|
| 59 | /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available |
59 | * divided by the smallest oversampling used on the USART (i.e. 8) */ |
| 60 | * divided by the smallest oversampling used on the USART (i.e. 8) */ |
60 | #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4500000U) |
| 61 | #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 4500000U) |
61 | |
| 62 | 62 | /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ |
|
| 63 | /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ |
63 | #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) |
| 64 | #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) |
64 | |
| 65 | 65 | #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ |
|
| 66 | #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ |
66 | || ((__VALUE__) == LL_USART_DIRECTION_RX) \ |
| 67 | || ((__VALUE__) == LL_USART_DIRECTION_RX) \ |
67 | || ((__VALUE__) == LL_USART_DIRECTION_TX) \ |
| 68 | || ((__VALUE__) == LL_USART_DIRECTION_TX) \ |
68 | || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) |
| 69 | || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) |
69 | |
| 70 | 70 | #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ |
|
| 71 | #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ |
71 | || ((__VALUE__) == LL_USART_PARITY_EVEN) \ |
| 72 | || ((__VALUE__) == LL_USART_PARITY_EVEN) \ |
72 | || ((__VALUE__) == LL_USART_PARITY_ODD)) |
| 73 | || ((__VALUE__) == LL_USART_PARITY_ODD)) |
73 | |
| 74 | 74 | #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ |
|
| 75 | #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \ |
75 | || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) |
| 76 | || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) |
76 | |
| 77 | 77 | #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ |
|
| 78 | #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ |
78 | || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) |
| 79 | || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) |
79 | |
| 80 | 80 | #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ |
|
| 81 | #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ |
81 | || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) |
| 82 | || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) |
82 | |
| 83 | 83 | #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ |
|
| 84 | #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ |
84 | || ((__VALUE__) == LL_USART_PHASE_2EDGE)) |
| 85 | || ((__VALUE__) == LL_USART_PHASE_2EDGE)) |
85 | |
| 86 | 86 | #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ |
|
| 87 | #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ |
87 | || ((__VALUE__) == LL_USART_POLARITY_HIGH)) |
| 88 | || ((__VALUE__) == LL_USART_POLARITY_HIGH)) |
88 | |
| 89 | 89 | #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ |
|
| 90 | #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ |
90 | || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) |
| 91 | || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) |
91 | |
| 92 | 92 | #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ |
|
| 93 | #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ |
93 | || ((__VALUE__) == LL_USART_STOPBITS_1) \ |
| 94 | || ((__VALUE__) == LL_USART_STOPBITS_1) \ |
94 | || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ |
| 95 | || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ |
95 | || ((__VALUE__) == LL_USART_STOPBITS_2)) |
| 96 | || ((__VALUE__) == LL_USART_STOPBITS_2)) |
96 | |
| 97 | 97 | #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ |
|
| 98 | #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ |
98 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ |
| 99 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ |
99 | || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ |
| 100 | || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ |
100 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) |
| 101 | || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) |
101 | |
| 102 | 102 | /** |
|
| 103 | /** |
103 | * @} |
| 104 | * @} |
104 | */ |
| 105 | */ |
105 | |
| 106 | 106 | /* Private function prototypes -----------------------------------------------*/ |
|
| 107 | /* Private function prototypes -----------------------------------------------*/ |
107 | |
| 108 | 108 | /* Exported functions --------------------------------------------------------*/ |
|
| 109 | /* Exported functions --------------------------------------------------------*/ |
109 | /** @addtogroup USART_LL_Exported_Functions |
| 110 | /** @addtogroup USART_LL_Exported_Functions |
110 | * @{ |
| 111 | * @{ |
111 | */ |
| 112 | */ |
112 | |
| 113 | 113 | /** @addtogroup USART_LL_EF_Init |
|
| 114 | /** @addtogroup USART_LL_EF_Init |
114 | * @{ |
| 115 | * @{ |
115 | */ |
| 116 | */ |
116 | |
| 117 | 117 | /** |
|
| 118 | /** |
118 | * @brief De-initialize USART registers (Registers restored to their default values). |
| 119 | * @brief De-initialize USART registers (Registers restored to their default values). |
119 | * @param USARTx USART Instance |
| 120 | * @param USARTx USART Instance |
120 | * @retval An ErrorStatus enumeration value: |
| 121 | * @retval An ErrorStatus enumeration value: |
121 | * - SUCCESS: USART registers are de-initialized |
| 122 | * - SUCCESS: USART registers are de-initialized |
122 | * - ERROR: USART registers are not de-initialized |
| 123 | * - ERROR: USART registers are not de-initialized |
123 | */ |
| 124 | */ |
124 | ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx) |
| 125 | ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx) |
125 | { |
| 126 | { |
126 | ErrorStatus status = SUCCESS; |
| 127 | ErrorStatus status = SUCCESS; |
127 | |
| 128 | 128 | /* Check the parameters */ |
|
| 129 | /* Check the parameters */ |
129 | assert_param(IS_UART_INSTANCE(USARTx)); |
| 130 | assert_param(IS_UART_INSTANCE(USARTx)); |
130 | |
| 131 | 131 | if (USARTx == USART1) |
|
| 132 | if (USARTx == USART1) |
132 | { |
| 133 | { |
133 | /* Force reset of USART clock */ |
| 134 | /* Force reset of USART clock */ |
134 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1); |
| 135 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1); |
135 | |
| 136 | 136 | /* Release reset of USART clock */ |
|
| 137 | /* Release reset of USART clock */ |
137 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1); |
| 138 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1); |
138 | } |
| 139 | } |
139 | else if (USARTx == USART2) |
| 140 | else if (USARTx == USART2) |
140 | { |
| 141 | { |
141 | /* Force reset of USART clock */ |
| 142 | /* Force reset of USART clock */ |
142 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); |
| 143 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); |
143 | |
| 144 | 144 | /* Release reset of USART clock */ |
|
| 145 | /* Release reset of USART clock */ |
145 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); |
| 146 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); |
146 | } |
| 147 | } |
147 | #if defined(USART3) |
| 148 | #if defined(USART3) |
148 | else if (USARTx == USART3) |
| 149 | else if (USARTx == USART3) |
149 | { |
| 150 | { |
150 | /* Force reset of USART clock */ |
| 151 | /* Force reset of USART clock */ |
151 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3); |
| 152 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3); |
152 | |
| 153 | 153 | /* Release reset of USART clock */ |
|
| 154 | /* Release reset of USART clock */ |
154 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3); |
| 155 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3); |
155 | } |
| 156 | } |
156 | #endif /* USART3 */ |
| 157 | #endif /* USART3 */ |
157 | #if defined(UART4) |
| 158 | #if defined(UART4) |
158 | else if (USARTx == UART4) |
| 159 | else if (USARTx == UART4) |
159 | { |
| 160 | { |
160 | /* Force reset of UART clock */ |
| 161 | /* Force reset of UART clock */ |
161 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4); |
| 162 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4); |
162 | |
| 163 | 163 | /* Release reset of UART clock */ |
|
| 164 | /* Release reset of UART clock */ |
164 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4); |
| 165 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4); |
165 | } |
| 166 | } |
166 | #endif /* UART4 */ |
| 167 | #endif /* UART4 */ |
167 | #if defined(UART5) |
| 168 | #if defined(UART5) |
168 | else if (USARTx == UART5) |
| 169 | else if (USARTx == UART5) |
169 | { |
| 170 | { |
170 | /* Force reset of UART clock */ |
| 171 | /* Force reset of UART clock */ |
171 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5); |
| 172 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5); |
172 | |
| 173 | 173 | /* Release reset of UART clock */ |
|
| 174 | /* Release reset of UART clock */ |
174 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5); |
| 175 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5); |
175 | } |
| 176 | } |
176 | #endif /* UART5 */ |
| 177 | #endif /* UART5 */ |
177 | else |
| 178 | else |
178 | { |
| 179 | { |
179 | status = ERROR; |
| 180 | status = ERROR; |
180 | } |
| 181 | } |
181 | |
| 182 | 182 | return (status); |
|
| 183 | return (status); |
183 | } |
| 184 | } |
184 | |
| 185 | 185 | /** |
|
| 186 | /** |
186 | * @brief Initialize USART registers according to the specified |
| 187 | * @brief Initialize USART registers according to the specified |
187 | * parameters in USART_InitStruct. |
| 188 | * parameters in USART_InitStruct. |
188 | * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), |
| 189 | * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), |
189 | * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
| 190 | * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
190 | * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). |
| 191 | * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). |
191 | * @param USARTx USART Instance |
| 192 | * @param USARTx USART Instance |
192 | * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure |
| 193 | * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure |
193 | * that contains the configuration information for the specified USART peripheral. |
| 194 | * that contains the configuration information for the specified USART peripheral. |
194 | * @retval An ErrorStatus enumeration value: |
| 195 | * @retval An ErrorStatus enumeration value: |
195 | * - SUCCESS: USART registers are initialized according to USART_InitStruct content |
| 196 | * - SUCCESS: USART registers are initialized according to USART_InitStruct content |
196 | * - ERROR: Problem occurred during USART Registers initialization |
| 197 | * - ERROR: Problem occurred during USART Registers initialization |
197 | */ |
| 198 | */ |
198 | ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, const LL_USART_InitTypeDef *USART_InitStruct) |
| 199 | ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct) |
199 | { |
| 200 | { |
200 | ErrorStatus status = ERROR; |
| 201 | ErrorStatus status = ERROR; |
201 | uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; |
| 202 | uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; |
202 | LL_RCC_ClocksTypeDef rcc_clocks; |
| 203 | LL_RCC_ClocksTypeDef rcc_clocks; |
203 | |
| 204 | 204 | /* Check the parameters */ |
|
| 205 | /* Check the parameters */ |
205 | assert_param(IS_UART_INSTANCE(USARTx)); |
| 206 | assert_param(IS_UART_INSTANCE(USARTx)); |
206 | assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); |
| 207 | assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); |
207 | assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); |
| 208 | assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); |
208 | assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); |
| 209 | assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); |
209 | assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); |
| 210 | assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); |
210 | assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); |
| 211 | assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); |
211 | assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); |
| 212 | assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); |
212 | #if defined(USART_CR1_OVER8) |
| 213 | #if defined(USART_CR1_OVER8) |
213 | assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); |
| 214 | assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); |
214 | #endif /* USART_OverSampling_Feature */ |
| 215 | #endif /* USART_OverSampling_Feature */ |
215 | |
| 216 | 216 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
|
| 217 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
217 | CRx registers */ |
| 218 | CRx registers */ |
218 | if (LL_USART_IsEnabled(USARTx) == 0U) |
| 219 | if (LL_USART_IsEnabled(USARTx) == 0U) |
219 | { |
| 220 | { |
220 | /*---------------------------- USART CR1 Configuration ----------------------- |
| 221 | /*---------------------------- USART CR1 Configuration ----------------------- |
221 | * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: |
| 222 | * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: |
222 | * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value |
| 223 | * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value |
223 | * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value |
| 224 | * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value |
224 | * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value |
| 225 | * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value |
225 | * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. |
| 226 | * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. |
226 | */ |
| 227 | */ |
227 | #if defined(USART_CR1_OVER8) |
| 228 | #if defined(USART_CR1_OVER8) |
228 | MODIFY_REG(USARTx->CR1, |
| 229 | MODIFY_REG(USARTx->CR1, |
229 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
| 230 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
230 | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), |
| 231 | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), |
231 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
| 232 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
232 | USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); |
| 233 | USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); |
233 | #else |
| 234 | #else |
234 | MODIFY_REG(USARTx->CR1, |
| 235 | MODIFY_REG(USARTx->CR1, |
235 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
| 236 | (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | |
236 | USART_CR1_TE | USART_CR1_RE), |
| 237 | USART_CR1_TE | USART_CR1_RE), |
237 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
| 238 | (USART_InitStruct->DataWidth | USART_InitStruct->Parity | |
238 | USART_InitStruct->TransferDirection)); |
| 239 | USART_InitStruct->TransferDirection)); |
239 | #endif /* USART_OverSampling_Feature */ |
| 240 | #endif /* USART_OverSampling_Feature */ |
240 | |
| 241 | 241 | /*---------------------------- USART CR2 Configuration ----------------------- |
|
| 242 | /*---------------------------- USART CR2 Configuration ----------------------- |
242 | * Configure USARTx CR2 (Stop bits) with parameters: |
| 243 | * Configure USARTx CR2 (Stop bits) with parameters: |
243 | * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. |
| 244 | * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. |
244 | * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). |
| 245 | * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). |
245 | */ |
| 246 | */ |
246 | LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); |
| 247 | LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); |
247 | |
| 248 | 248 | /*---------------------------- USART CR3 Configuration ----------------------- |
|
| 249 | /*---------------------------- USART CR3 Configuration ----------------------- |
249 | * Configure USARTx CR3 (Hardware Flow Control) with parameters: |
| 250 | * Configure USARTx CR3 (Hardware Flow Control) with parameters: |
250 | * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value. |
| 251 | * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value. |
251 | */ |
| 252 | */ |
252 | LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); |
| 253 | LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); |
253 | |
| 254 | 254 | /*---------------------------- USART BRR Configuration ----------------------- |
|
| 255 | /*---------------------------- USART BRR Configuration ----------------------- |
255 | * Retrieve Clock frequency used for USART Peripheral |
| 256 | * Retrieve Clock frequency used for USART Peripheral |
256 | */ |
| 257 | */ |
257 | LL_RCC_GetSystemClocksFreq(&rcc_clocks); |
| 258 | LL_RCC_GetSystemClocksFreq(&rcc_clocks); |
258 | if (USARTx == USART1) |
| 259 | if (USARTx == USART1) |
259 | { |
| 260 | { |
260 | periphclk = rcc_clocks.PCLK2_Frequency; |
| 261 | periphclk = rcc_clocks.PCLK2_Frequency; |
261 | } |
| 262 | } |
262 | else if (USARTx == USART2) |
| 263 | else if (USARTx == USART2) |
263 | { |
| 264 | { |
264 | periphclk = rcc_clocks.PCLK1_Frequency; |
| 265 | periphclk = rcc_clocks.PCLK1_Frequency; |
265 | } |
| 266 | } |
266 | #if defined(USART3) |
| 267 | #if defined(USART3) |
267 | else if (USARTx == USART3) |
| 268 | else if (USARTx == USART3) |
268 | { |
| 269 | { |
269 | periphclk = rcc_clocks.PCLK1_Frequency; |
| 270 | periphclk = rcc_clocks.PCLK1_Frequency; |
270 | } |
| 271 | } |
271 | #endif /* USART3 */ |
| 272 | #endif /* USART3 */ |
272 | #if defined(UART4) |
| 273 | #if defined(UART4) |
273 | else if (USARTx == UART4) |
| 274 | else if (USARTx == UART4) |
274 | { |
| 275 | { |
275 | periphclk = rcc_clocks.PCLK1_Frequency; |
| 276 | periphclk = rcc_clocks.PCLK1_Frequency; |
276 | } |
| 277 | } |
277 | #endif /* UART4 */ |
| 278 | #endif /* UART4 */ |
278 | #if defined(UART5) |
| 279 | #if defined(UART5) |
279 | else if (USARTx == UART5) |
| 280 | else if (USARTx == UART5) |
280 | { |
| 281 | { |
281 | periphclk = rcc_clocks.PCLK1_Frequency; |
| 282 | periphclk = rcc_clocks.PCLK1_Frequency; |
282 | } |
| 283 | } |
283 | #endif /* UART5 */ |
| 284 | #endif /* UART5 */ |
284 | else |
| 285 | else |
285 | { |
| 286 | { |
286 | /* Nothing to do, as error code is already assigned to ERROR value */ |
| 287 | /* Nothing to do, as error code is already assigned to ERROR value */ |
287 | } |
| 288 | } |
288 | |
| 289 | 289 | /* Configure the USART Baud Rate : |
|
| 290 | /* Configure the USART Baud Rate : |
290 | - valid baud rate value (different from 0) is required |
| 291 | - valid baud rate value (different from 0) is required |
291 | - Peripheral clock as returned by RCC service, should be valid (different from 0). |
| 292 | - Peripheral clock as returned by RCC service, should be valid (different from 0). |
292 | */ |
| 293 | */ |
293 | if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) |
| 294 | if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) |
294 | && (USART_InitStruct->BaudRate != 0U)) |
| 295 | && (USART_InitStruct->BaudRate != 0U)) |
295 | { |
| 296 | { |
296 | status = SUCCESS; |
| 297 | status = SUCCESS; |
297 | #if defined(USART_CR1_OVER8) |
| 298 | #if defined(USART_CR1_OVER8) |
298 | LL_USART_SetBaudRate(USARTx, |
| 299 | LL_USART_SetBaudRate(USARTx, |
299 | periphclk, |
| 300 | periphclk, |
300 | USART_InitStruct->OverSampling, |
| 301 | USART_InitStruct->OverSampling, |
301 | USART_InitStruct->BaudRate); |
| 302 | USART_InitStruct->BaudRate); |
302 | #else |
| 303 | #else |
303 | LL_USART_SetBaudRate(USARTx, |
| 304 | LL_USART_SetBaudRate(USARTx, |
304 | periphclk, |
| 305 | periphclk, |
305 | USART_InitStruct->BaudRate); |
| 306 | USART_InitStruct->BaudRate); |
306 | #endif /* USART_OverSampling_Feature */ |
| 307 | #endif /* USART_OverSampling_Feature */ |
307 | |
| 308 | 308 | /* Check BRR is greater than or equal to 16d */ |
|
| 309 | /* Check BRR is greater than or equal to 16d */ |
309 | assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); |
| 310 | assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); |
310 | } |
| 311 | } |
311 | } |
| 312 | } |
312 | /* Endif (=> USART not in Disabled state => return ERROR) */ |
| 313 | /* Endif (=> USART not in Disabled state => return ERROR) */ |
313 | |
| 314 | 314 | return (status); |
|
| 315 | return (status); |
315 | } |
| 316 | } |
316 | |
| 317 | 317 | /** |
|
| 318 | /** |
318 | * @brief Set each @ref LL_USART_InitTypeDef field to default value. |
| 319 | * @brief Set each @ref LL_USART_InitTypeDef field to default value. |
319 | * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure |
| 320 | * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure |
320 | * whose fields will be set to default values. |
| 321 | * whose fields will be set to default values. |
321 | * @retval None |
| 322 | * @retval None |
322 | */ |
| 323 | */ |
323 | |
| 324 | 324 | void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) |
|
| 325 | void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) |
325 | { |
| 326 | { |
326 | /* Set USART_InitStruct fields to default values */ |
| 327 | /* Set USART_InitStruct fields to default values */ |
327 | USART_InitStruct->BaudRate = 9600U; |
| 328 | USART_InitStruct->BaudRate = 9600U; |
328 | USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; |
| 329 | USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; |
329 | USART_InitStruct->StopBits = LL_USART_STOPBITS_1; |
| 330 | USART_InitStruct->StopBits = LL_USART_STOPBITS_1; |
330 | USART_InitStruct->Parity = LL_USART_PARITY_NONE ; |
| 331 | USART_InitStruct->Parity = LL_USART_PARITY_NONE ; |
331 | USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; |
| 332 | USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; |
332 | USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; |
| 333 | USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; |
333 | #if defined(USART_CR1_OVER8) |
| 334 | #if defined(USART_CR1_OVER8) |
334 | USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; |
| 335 | USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; |
335 | #endif /* USART_OverSampling_Feature */ |
| 336 | #endif /* USART_OverSampling_Feature */ |
336 | } |
| 337 | } |
337 | |
| 338 | 338 | /** |
|
| 339 | /** |
339 | * @brief Initialize USART Clock related settings according to the |
| 340 | * @brief Initialize USART Clock related settings according to the |
340 | * specified parameters in the USART_ClockInitStruct. |
| 341 | * specified parameters in the USART_ClockInitStruct. |
341 | * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), |
| 342 | * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0), |
342 | * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
| 343 | * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
343 | * @param USARTx USART Instance |
| 344 | * @param USARTx USART Instance |
344 | * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure |
| 345 | * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure |
345 | * that contains the Clock configuration information for the specified USART peripheral. |
| 346 | * that contains the Clock configuration information for the specified USART peripheral. |
346 | * @retval An ErrorStatus enumeration value: |
| 347 | * @retval An ErrorStatus enumeration value: |
347 | * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content |
| 348 | * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content |
348 | * - ERROR: Problem occurred during USART Registers initialization |
| 349 | * - ERROR: Problem occurred during USART Registers initialization |
349 | */ |
| 350 | */ |
350 | ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, const LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
| 351 | ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
351 | { |
| 352 | { |
352 | ErrorStatus status = SUCCESS; |
| 353 | ErrorStatus status = SUCCESS; |
353 | |
| 354 | 354 | /* Check USART Instance and Clock signal output parameters */ |
|
| 355 | /* Check USART Instance and Clock signal output parameters */ |
355 | assert_param(IS_UART_INSTANCE(USARTx)); |
| 356 | assert_param(IS_UART_INSTANCE(USARTx)); |
356 | assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); |
| 357 | assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); |
357 | |
| 358 | 358 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
|
| 359 | /* USART needs to be in disabled state, in order to be able to configure some bits in |
359 | CRx registers */ |
| 360 | CRx registers */ |
360 | if (LL_USART_IsEnabled(USARTx) == 0U) |
| 361 | if (LL_USART_IsEnabled(USARTx) == 0U) |
361 | { |
| 362 | { |
362 | /*---------------------------- USART CR2 Configuration -----------------------*/ |
| 363 | /*---------------------------- USART CR2 Configuration -----------------------*/ |
363 | /* If Clock signal has to be output */ |
| 364 | /* If Clock signal has to be output */ |
364 | if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE) |
| 365 | if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE) |
365 | { |
| 366 | { |
366 | /* Deactivate Clock signal delivery : |
| 367 | /* Deactivate Clock signal delivery : |
367 | * - Disable Clock Output: USART_CR2_CLKEN cleared |
| 368 | * - Disable Clock Output: USART_CR2_CLKEN cleared |
368 | */ |
| 369 | */ |
369 | LL_USART_DisableSCLKOutput(USARTx); |
| 370 | LL_USART_DisableSCLKOutput(USARTx); |
370 | } |
| 371 | } |
371 | else |
| 372 | else |
372 | { |
| 373 | { |
373 | /* Ensure USART instance is USART capable */ |
| 374 | /* Ensure USART instance is USART capable */ |
374 | assert_param(IS_USART_INSTANCE(USARTx)); |
| 375 | assert_param(IS_USART_INSTANCE(USARTx)); |
375 | |
| 376 | 376 | /* Check clock related parameters */ |
|
| 377 | /* Check clock related parameters */ |
377 | assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); |
| 378 | assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); |
378 | assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); |
| 379 | assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); |
379 | assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); |
| 380 | assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); |
380 | |
| 381 | 381 | /*---------------------------- USART CR2 Configuration ----------------------- |
|
| 382 | /*---------------------------- USART CR2 Configuration ----------------------- |
382 | * Configure USARTx CR2 (Clock signal related bits) with parameters: |
| 383 | * Configure USARTx CR2 (Clock signal related bits) with parameters: |
383 | * - Enable Clock Output: USART_CR2_CLKEN set |
| 384 | * - Enable Clock Output: USART_CR2_CLKEN set |
384 | * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value |
| 385 | * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value |
385 | * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value |
| 386 | * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value |
386 | * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. |
| 387 | * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. |
387 | */ |
| 388 | */ |
388 | MODIFY_REG(USARTx->CR2, |
| 389 | MODIFY_REG(USARTx->CR2, |
389 | USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, |
| 390 | USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, |
390 | USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | |
| 391 | USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | |
391 | USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); |
| 392 | USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); |
392 | } |
| 393 | } |
393 | } |
| 394 | } |
394 | /* Else (USART not in Disabled state => return ERROR */ |
| 395 | /* Else (USART not in Disabled state => return ERROR */ |
395 | else |
| 396 | else |
396 | { |
| 397 | { |
397 | status = ERROR; |
| 398 | status = ERROR; |
398 | } |
| 399 | } |
399 | |
| 400 | 400 | return (status); |
|
| 401 | return (status); |
401 | } |
| 402 | } |
402 | |
| 403 | 403 | /** |
|
| 404 | /** |
404 | * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. |
| 405 | * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. |
405 | * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure |
| 406 | * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure |
406 | * whose fields will be set to default values. |
| 407 | * whose fields will be set to default values. |
407 | * @retval None |
| 408 | * @retval None |
408 | */ |
| 409 | */ |
409 | void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
| 410 | void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) |
410 | { |
| 411 | { |
411 | /* Set LL_USART_ClockInitStruct fields with default values */ |
| 412 | /* Set LL_USART_ClockInitStruct fields with default values */ |
412 | USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; |
| 413 | USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; |
413 | USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
| 414 | USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
414 | USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
| 415 | USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
415 | USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
| 416 | USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */ |
416 | } |
| 417 | } |
417 | |
| 418 | 418 | /** |
|
| 419 | /** |
419 | * @} |
| 420 | * @} |
420 | */ |
| 421 | */ |
421 | |
| 422 | 422 | /** |
|
| 423 | /** |
423 | * @} |
| 424 | * @} |
424 | */ |
| 425 | */ |
425 | |
| 426 | 426 | /** |
|
| 427 | /** |
427 | * @} |
| 428 | * @} |
428 | */ |
| 429 | */ |
429 | |
| 430 | 430 | #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */ |
|
| 431 | #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */ |
431 | |
| 432 | 432 | /** |
|
| 433 | /** |
433 | * @} |
| 434 | * @} |
434 | */ |
| 435 | */ |
435 | |
| 436 | 436 | #endif /* USE_FULL_LL_DRIVER */ |
|
| 437 | #endif /* USE_FULL_LL_DRIVER */ |
437 | |
| 438 | 438 | ||
| 439 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
- | |
| 440 | - | ||