WebSVN – LedShow – Diff – /trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c

   * @author  MCD Application Team
   * @brief   TIM LL module driver.
   ******************************************************************************
   * @attention
+  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
+  * License. You may obtain a copy of the License at:
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
+  *                        opensource.org/licenses/BSD-3-Clause
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
   ******************************************************************************
   */
 #if defined(USE_FULL_LL_DRIVER)
 #ifdef  USE_FULL_ASSERT
 #include "stm32_assert.h"
 #else
 #define assert_param(expr) ((void)0U)
-#endif
+#endif /* USE_FULL_ASSERT */
 /** @addtogroup STM32F1xx_LL_Driver
   * @{
   */
 #if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defined (TIM5) || defined (TIM6) || defined (TIM7) || defined (TIM8) || defined (TIM9) || defined (TIM10) || defined (TIM11) || defined (TIM12) || defined (TIM13) || defined (TIM14) || defined (TIM15) || defined (TIM16) || defined (TIM17)
 /** @addtogroup TIM_LL
   * @{
   */
 /* Private macros ------------------------------------------------------------*/
 /** @addtogroup TIM_LL_Private_Macros
   * @{
   */
 #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
+                                          || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
+                                          || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
+                                          || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \
-                                       || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
+                                          || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN))
 #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \
-                                         || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
+                                            || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \
-                                         || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
+                                            || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4))
 #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
+                                     || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
+                                     || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
+                                     || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
+                                     || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
+                                     || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
+                                     || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \
-                                  || ((__VALUE__) == LL_TIM_OCMODE_PWM2))
+                                     || ((__VALUE__) == LL_TIM_OCMODE_PWM2))
 #define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \
-                                   || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
+                                      || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE))
 #define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \
-                                      || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
+                                         || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW))
 #define IS_LL_TIM_OCIDLESTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCIDLESTATE_LOW) \
-                                       || ((__VALUE__) == LL_TIM_OCIDLESTATE_HIGH))
+                                          || ((__VALUE__) == LL_TIM_OCIDLESTATE_HIGH))
 #define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \
-                                       || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
+                                          || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \
-                                       || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
+                                          || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC))
 #define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
+                                    || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
+                                    || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
-                                 || ((__VALUE__) == LL_TIM_ICPSC_DIV8))
+                                    || ((__VALUE__) == LL_TIM_ICPSC_DIV8))
 #define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \
-                                     || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
+                                        || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8))
 #define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
-                                       || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
+                                          || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
 #define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \
-                                       || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
+                                          || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \
-                                       || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
+                                          || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12))
 #define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \
-                                               || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
+                                                  || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING))
 #define IS_LL_TIM_OSSR_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSR_DISABLE) \
-                                     || ((__VALUE__) == LL_TIM_OSSR_ENABLE))
+                                         || ((__VALUE__) == LL_TIM_OSSR_ENABLE))
 #define IS_LL_TIM_OSSI_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSI_DISABLE) \
-                                      || ((__VALUE__) == LL_TIM_OSSI_ENABLE))
+                                         || ((__VALUE__) == LL_TIM_OSSI_ENABLE))
 #define IS_LL_TIM_LOCK_LEVEL(__VALUE__) (((__VALUE__) == LL_TIM_LOCKLEVEL_OFF) \
-                                      || ((__VALUE__) == LL_TIM_LOCKLEVEL_1)   \
+                                         || ((__VALUE__) == LL_TIM_LOCKLEVEL_1)   \
-                                      || ((__VALUE__) == LL_TIM_LOCKLEVEL_2)   \
+                                         || ((__VALUE__) == LL_TIM_LOCKLEVEL_2)   \
-                                      || ((__VALUE__) == LL_TIM_LOCKLEVEL_3))
+                                         || ((__VALUE__) == LL_TIM_LOCKLEVEL_3))
 #define IS_LL_TIM_BREAK_STATE(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_DISABLE) \
-                                       || ((__VALUE__) == LL_TIM_BREAK_ENABLE))
+                                          || ((__VALUE__) == LL_TIM_BREAK_ENABLE))
 #define IS_LL_TIM_BREAK_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_POLARITY_LOW) \
-                                          || ((__VALUE__) == LL_TIM_BREAK_POLARITY_HIGH))
+                                             || ((__VALUE__) == LL_TIM_BREAK_POLARITY_HIGH))
 #define IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(__VALUE__) (((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_DISABLE) \
-                                                  || ((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_ENABLE))
+                                                     || ((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_ENABLE))
 /**
   * @}
   */
   /* Set the default configuration */
   TIM_InitStruct->Prescaler         = (uint16_t)0x0000;
   TIM_InitStruct->CounterMode       = LL_TIM_COUNTERMODE_UP;
   TIM_InitStruct->Autoreload        = 0xFFFFFFFFU;
   TIM_InitStruct->ClockDivision     = LL_TIM_CLOCKDIVISION_DIV1;
-  TIM_InitStruct->RepetitionCounter = (uint8_t)0x00;
+  TIM_InitStruct->RepetitionCounter = 0x00000000U;
+}
 /**
   * @brief  Configure the TIMx time base unit.
   * @param  TIMx Timer Instance
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)
+{
-  uint32_t tmpcr1 = 0U;
+  uint32_t tmpcr1;
   /* Check the parameters */
   assert_param(IS_TIM_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode));
   assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision));
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
+{
-  uint32_t tmpccmr1 = 0U;
+  uint32_t tmpccmr1;
-  uint32_t tmpccer = 0U;
+  uint32_t tmpccer;
   /* Check the parameters */
   assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode));
   assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity));
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
+{
-  uint32_t tmpcr2 = 0U;
+  uint32_t tmpcr2;
-  uint32_t tmpccmr1 = 0U;
+  uint32_t tmpccmr1;
-  uint32_t tmpccer = 0U;
+  uint32_t tmpccer;
-  uint32_t tmpsmcr = 0U;
+  uint32_t tmpsmcr;
   /* Check the parameters */
   assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_HallSensorInitStruct->IC1Polarity));
   assert_param(IS_LL_TIM_ICPSC(TIM_HallSensorInitStruct->IC1Prescaler));
 /**
   * @brief  Configure the Break and Dead Time feature of the timer instance.
   * @note As the bits AOE, BKP, BKE, OSSR, OSSI and DTG[7:0] can be write-locked
   *  depending on the LOCK configuration, it can be necessary to configure all of
   *  them during the first write access to the TIMx_BDTR register.
-  * @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
   *       a timer instance provides a break input.
   * @param  TIMx Timer Instance
-  * @param  TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure(Break and Dead Time configuration data structure)
+  * @param  TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)
   * @retval An ErrorStatus enumeration value:
   *          - SUCCESS: Break and Dead Time is initialized
   *          - ERROR: not applicable
   */
 ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
 /**
   * @}
   */
 /** @addtogroup TIM_LL_Private_Functions TIM Private Functions
- *  @brief   Private functions
+  *  @brief   Private functions
   * @{
   */
 /**
   * @brief  Configure the TIMx output channel 1.
   * @param  TIMx Timer Instance
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 static ErrorStatus OC1Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+{
-  uint32_t tmpccmr1 = 0U;
+  uint32_t tmpccmr1;
-  uint32_t tmpccer = 0U;
+  uint32_t tmpccer;
-  uint32_t tmpcr2 = 0U;
+  uint32_t tmpcr2;
   /* Check the parameters */
   assert_param(IS_TIM_CC1_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
   assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 static ErrorStatus OC2Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+{
-  uint32_t tmpccmr1 = 0U;
+  uint32_t tmpccmr1;
-  uint32_t tmpccer = 0U;
+  uint32_t tmpccer;
-  uint32_t tmpcr2 = 0U;
+  uint32_t tmpcr2;
   /* Check the parameters */
   assert_param(IS_TIM_CC2_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
   assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 static ErrorStatus OC3Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+{
-  uint32_t tmpccmr2 = 0U;
+  uint32_t tmpccmr2;
-  uint32_t tmpccer = 0U;
+  uint32_t tmpccer;
-  uint32_t tmpcr2 = 0U;
+  uint32_t tmpcr2;
   /* Check the parameters */
   assert_param(IS_TIM_CC3_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
   assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));
   *          - SUCCESS: TIMx registers are de-initialized
   *          - ERROR: not applicable
   */
 static ErrorStatus OC4Config(TIM_TypeDef *TIMx, LL_TIM_OC_InitTypeDef *TIM_OCInitStruct)
+{
-  uint32_t tmpccmr2 = 0U;
+  uint32_t tmpccmr2;
-  uint32_t tmpccer = 0U;
+  uint32_t tmpccer;
-  uint32_t tmpcr2 = 0U;
+  uint32_t tmpcr2;
   /* Check the parameters */
   assert_param(IS_TIM_CC4_INSTANCE(TIMx));
   assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode));
   assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState));

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