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/**
 1 
/**
2 
  ******************************************************************************
 2 
  ******************************************************************************
3 
  * @file    stm32f1xx_ll_spi.c
 3 
  * @file    stm32f1xx_ll_spi.c
4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @brief   SPI LL module driver.
 5 
  * @brief   SPI LL module driver.
6 
  ******************************************************************************
 6 
  ******************************************************************************
7 
  * @attention
 7 
  * @attention
8 
  *
 8 
  *
9 
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
 9 
  * Copyright (c) 2016 STMicroelectronics.
10 
  * All rights reserved.</center></h2>
 10 
  * All rights reserved.
11 
  *
 11 
  *
12 
  * This software component is licensed by ST under BSD 3-Clause license,
 12 
  * This software is licensed under terms that can be found in the LICENSE file
13 
  * the "License"; You may not use this file except in compliance with the
 13 
  * in the root directory of this software component.
14 
  * License. You may obtain a copy of the License at:
 14 
  * If no LICENSE file comes with this software, it is provided AS-IS.
15 
  *                        opensource.org/licenses/BSD-3-Clause
 15 
  *
16 
  *
 16 
  ******************************************************************************
17 
  ******************************************************************************
 17 
  */
18 
  */
 18 
#if defined(USE_FULL_LL_DRIVER)
19 
#if defined(USE_FULL_LL_DRIVER)
 19 
 
20 
 
 20 
/* Includes ------------------------------------------------------------------*/
21 
/* Includes ------------------------------------------------------------------*/
 21 
#include "stm32f1xx_ll_spi.h"
22 
#include "stm32f1xx_ll_spi.h"
 22 
#include "stm32f1xx_ll_bus.h"
23 
#include "stm32f1xx_ll_bus.h"
 23 
#include "stm32f1xx_ll_rcc.h"
24 
#include "stm32f1xx_ll_rcc.h"
 24 
 
25 
 
 25 
#ifdef  USE_FULL_ASSERT
26 
#ifdef  USE_FULL_ASSERT
 26 
#include "stm32_assert.h"
27 
#include "stm32_assert.h"
 27 
#else
28 
#else
 28 
#define assert_param(expr) ((void)0U)
29 
#define assert_param(expr) ((void)0U)
 29 
#endif /* USE_FULL_ASSERT */
30 
#endif
 30 
 
31 
 
 31 
/** @addtogroup STM32F1xx_LL_Driver
32 
/** @addtogroup STM32F1xx_LL_Driver
 32 
  * @{
33 
  * @{
 33 
  */
34 
  */
 34 
 
35 
 
 35 
#if defined (SPI1) || defined (SPI2) || defined (SPI3)
36 
#if defined (SPI1) || defined (SPI2) || defined (SPI3)
 36 
 
37 
 
 37 
/** @addtogroup SPI_LL
38 
/** @addtogroup SPI_LL
 38 
  * @{
39 
  * @{
 39 
  */
40 
  */
 40 
 
41 
 
 41 
/* Private types -------------------------------------------------------------*/
42 
/* Private types -------------------------------------------------------------*/
 42 
/* Private variables ---------------------------------------------------------*/
43 
/* Private variables ---------------------------------------------------------*/
 43 
 
44 
 
 44 
/* Private constants ---------------------------------------------------------*/
45 
/* Private constants ---------------------------------------------------------*/
 45 
/** @defgroup SPI_LL_Private_Constants SPI Private Constants
46 
/** @defgroup SPI_LL_Private_Constants SPI Private Constants
 46 
  * @{
47 
  * @{
 47 
  */
48 
  */
 48 
/* SPI registers Masks */
49 
/* SPI registers Masks */
 49 
#define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \
50 
#define SPI_CR1_CLEAR_MASK                 (SPI_CR1_CPHA    | SPI_CR1_CPOL     | SPI_CR1_MSTR   | \
 50 
                                            SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \
51 
                                            SPI_CR1_BR      | SPI_CR1_LSBFIRST | SPI_CR1_SSI    | \
 51 
                                            SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_DFF    | \
52 
                                            SPI_CR1_SSM     | SPI_CR1_RXONLY   | SPI_CR1_DFF    | \
 52 
                                            SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \
53 
                                            SPI_CR1_CRCNEXT | SPI_CR1_CRCEN    | SPI_CR1_BIDIOE | \
 53 
                                            SPI_CR1_BIDIMODE)
54 
                                            SPI_CR1_BIDIMODE)
 54 
/**
55 
/**
 55 
  * @}
56 
  * @}
 56 
  */
57 
  */
 57 
 
58 
 
 58 
/* Private macros ------------------------------------------------------------*/
59 
/* Private macros ------------------------------------------------------------*/
 59 
/** @defgroup SPI_LL_Private_Macros SPI Private Macros
60 
/** @defgroup SPI_LL_Private_Macros SPI Private Macros
 60 
  * @{
61 
  * @{
 61 
  */
62 
  */
 62 
#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)       \
63 
#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)       \
 63 
                                                 || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
64 
                                                 || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
 64 
                                                 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
65 
                                                 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
 65 
                                                 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
66 
                                                 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
 66 
 
67 
 
 67 
#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
68 
#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
 68 
                                   || ((__VALUE__) == LL_SPI_MODE_SLAVE))
69 
                                   || ((__VALUE__) == LL_SPI_MODE_SLAVE))
 69 
 
70 
 
 70 
#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
71 
#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
 71 
                                        || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
72 
                                        || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
 72 
 
73 
 
 73 
#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
74 
#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
 74 
                                       || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
75 
                                       || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
 75 
 
76 
 
 76 
#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
77 
#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
 77 
                                    || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
78 
                                    || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
 78 
 
79 
 
 79 
#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT)          \
80 
#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT)          \
 80 
                                  || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
81 
                                  || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
 81 
                                  || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
82 
                                  || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
 82 
 
83 
 
 83 
#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)      \
84 
#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)      \
 84 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
85 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
 85 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
86 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
 86 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
87 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
 87 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
88 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
 88 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
89 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
 89 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
90 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
 90 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
91 
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
 91 
 
92 
 
 92 
#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
93 
#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
 93 
                                       || ((__VALUE__) == LL_SPI_MSB_FIRST))
94 
                                       || ((__VALUE__) == LL_SPI_MSB_FIRST))
 94 
 
95 
 
 95 
#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
96 
#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
 96 
                                             || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
97 
                                             || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
 97 
 
98 
 
 98 
#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
99 
#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
 99 
 
100 
 
 100 
/**
101 
/**
 101 
  * @}
102 
  * @}
 102 
  */
103 
  */
 103 
 
104 
 
 104 
/* Private function prototypes -----------------------------------------------*/
105 
/* Private function prototypes -----------------------------------------------*/
 105 
 
106 
 
 106 
/* Exported functions --------------------------------------------------------*/
107 
/* Exported functions --------------------------------------------------------*/
 107 
/** @addtogroup SPI_LL_Exported_Functions
108 
/** @addtogroup SPI_LL_Exported_Functions
 108 
  * @{
109 
  * @{
 109 
  */
110 
  */
 110 
 
111 
 
 111 
/** @addtogroup SPI_LL_EF_Init
112 
/** @addtogroup SPI_LL_EF_Init
 112 
  * @{
113 
  * @{
 113 
  */
114 
  */
 114 
 
115 
 
 115 
/**
116 
/**
 116 
  * @brief  De-initialize the SPI registers to their default reset values.
117 
  * @brief  De-initialize the SPI registers to their default reset values.
 117 
  * @param  SPIx SPI Instance
118 
  * @param  SPIx SPI Instance
 118 
  * @retval An ErrorStatus enumeration value:
119 
  * @retval An ErrorStatus enumeration value:
 119 
  *          - SUCCESS: SPI registers are de-initialized
120 
  *          - SUCCESS: SPI registers are de-initialized
 120 
  *          - ERROR: SPI registers are not de-initialized
121 
  *          - ERROR: SPI registers are not de-initialized
 121 
  */
122 
  */
 122 
ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
123 
ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
 123 
{
124 
{
 124 
  ErrorStatus status = ERROR;
125 
  ErrorStatus status = ERROR;
 125 
 
126 
 
 126 
  /* Check the parameters */
127 
  /* Check the parameters */
 127 
  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
128 
  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
 128 
 
129 
 
 129 
#if defined(SPI1)
130 
#if defined(SPI1)
 130 
  if (SPIx == SPI1)
131 
  if (SPIx == SPI1)
 131 
  {
132 
  {
 132 
    /* Force reset of SPI clock */
133 
    /* Force reset of SPI clock */
 133 
    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
134 
    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
 134 
 
135 
 
 135 
    /* Release reset of SPI clock */
136 
    /* Release reset of SPI clock */
 136 
    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
137 
    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
 137 
 
138 
 
 138 
    status = SUCCESS;
139 
    status = SUCCESS;
 139 
  }
140 
  }
 140 
#endif /* SPI1 */
141 
#endif /* SPI1 */
 141 
#if defined(SPI2)
142 
#if defined(SPI2)
 142 
  if (SPIx == SPI2)
143 
  if (SPIx == SPI2)
 143 
  {
144 
  {
 144 
    /* Force reset of SPI clock */
145 
    /* Force reset of SPI clock */
 145 
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
146 
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
 146 
 
147 
 
 147 
    /* Release reset of SPI clock */
148 
    /* Release reset of SPI clock */
 148 
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
149 
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
 149 
 
150 
 
 150 
    status = SUCCESS;
151 
    status = SUCCESS;
 151 
  }
152 
  }
 152 
#endif /* SPI2 */
153 
#endif /* SPI2 */
 153 
#if defined(SPI3)
154 
#if defined(SPI3)
 154 
  if (SPIx == SPI3)
155 
  if (SPIx == SPI3)
 155 
  {
156 
  {
 156 
    /* Force reset of SPI clock */
157 
    /* Force reset of SPI clock */
 157 
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
158 
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
 158 
 
159 
 
 159 
    /* Release reset of SPI clock */
160 
    /* Release reset of SPI clock */
 160 
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
161 
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
 161 
 
162 
 
 162 
    status = SUCCESS;
163 
    status = SUCCESS;
 163 
  }
164 
  }
 164 
#endif /* SPI3 */
165 
#endif /* SPI3 */
 165 
 
166 
 
 166 
  return status;
167 
  return status;
 167 
}
168 
}
 168 
 
169 
 
 169 
/**
170 
/**
 170 
  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
171 
  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
 171 
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
172 
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
 172 
  *         SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
173 
  *         SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 173 
  * @param  SPIx SPI Instance
174 
  * @param  SPIx SPI Instance
 174 
  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
175 
  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
 175 
  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
176 
  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
 176 
  */
177 
  */
 177 
ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
178 
ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
 178 
{
179 
{
 179 
  ErrorStatus status = ERROR;
180 
  ErrorStatus status = ERROR;
 180 
 
181 
 
 181 
  /* Check the SPI Instance SPIx*/
182 
  /* Check the SPI Instance SPIx*/
 182 
  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
183 
  assert_param(IS_SPI_ALL_INSTANCE(SPIx));
 183 
 
184 
 
 184 
  /* Check the SPI parameters from SPI_InitStruct*/
185 
  /* Check the SPI parameters from SPI_InitStruct*/
 185 
  assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
186 
  assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
 186 
  assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
187 
  assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
 187 
  assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
188 
  assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
 188 
  assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
189 
  assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
 189 
  assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
190 
  assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
 190 
  assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
191 
  assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
 191 
  assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
192 
  assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
 192 
  assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
193 
  assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
 193 
  assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
194 
  assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
 194 
 
195 
 
 195 
  if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
196 
  if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
 196 
  {
197 
  {
 197 
    /*---------------------------- SPIx CR1 Configuration ------------------------
198 
    /*---------------------------- SPIx CR1 Configuration ------------------------
 198 
     * Configure SPIx CR1 with parameters:
199 
     * Configure SPIx CR1 with parameters:
 199 
     * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
200 
     * - TransferDirection:  SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
 200 
     * - Master/Slave Mode:  SPI_CR1_MSTR bit
201 
     * - Master/Slave Mode:  SPI_CR1_MSTR bit
 201 
     * - DataWidth:          SPI_CR1_DFF bit
202 
     * - DataWidth:          SPI_CR1_DFF bit
 202 
     * - ClockPolarity:      SPI_CR1_CPOL bit
203 
     * - ClockPolarity:      SPI_CR1_CPOL bit
 203 
     * - ClockPhase:         SPI_CR1_CPHA bit
204 
     * - ClockPhase:         SPI_CR1_CPHA bit
 204 
     * - NSS management:     SPI_CR1_SSM bit
205 
     * - NSS management:     SPI_CR1_SSM bit
 205 
     * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
206 
     * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
 206 
     * - BitOrder:           SPI_CR1_LSBFIRST bit
207 
     * - BitOrder:           SPI_CR1_LSBFIRST bit
 207 
     * - CRCCalculation:     SPI_CR1_CRCEN bit
208 
     * - CRCCalculation:     SPI_CR1_CRCEN bit
 208 
     */
209 
     */
 209 
    MODIFY_REG(SPIx->CR1,
210 
    MODIFY_REG(SPIx->CR1,
 210 
               SPI_CR1_CLEAR_MASK,
211 
               SPI_CR1_CLEAR_MASK,
 211 
               SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode | SPI_InitStruct->DataWidth |
212 
               SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode | SPI_InitStruct->DataWidth |
 212 
               SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
213 
               SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
 213 
               SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
214 
               SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
 214 
               SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
215 
               SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
 215 
 
216 
 
 216 
    /*---------------------------- SPIx CR2 Configuration ------------------------
217 
    /*---------------------------- SPIx CR2 Configuration ------------------------
 217 
     * Configure SPIx CR2 with parameters:
218 
     * Configure SPIx CR2 with parameters:
 218 
     * - NSS management:     SSOE bit
219 
     * - NSS management:     SSOE bit
 219 
     */
220 
     */
 220 
    MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, (SPI_InitStruct->NSS >> 16U));
221 
    MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, (SPI_InitStruct->NSS >> 16U));
 221 
 
222 
 
 222 
    /*---------------------------- SPIx CRCPR Configuration ----------------------
223 
    /*---------------------------- SPIx CRCPR Configuration ----------------------
 223 
     * Configure SPIx CRCPR with parameters:
224 
     * Configure SPIx CRCPR with parameters:
 224 
     * - CRCPoly:            CRCPOLY[15:0] bits
225 
     * - CRCPoly:            CRCPOLY[15:0] bits
 225 
     */
226 
     */
 226 
    if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
227 
    if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
 227 
    {
228 
    {
 228 
      assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
229 
      assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
 229 
      LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
230 
      LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
 230 
    }
231 
    }
 231 
    status = SUCCESS;
232 
    status = SUCCESS;
 232 
  }
233 
  }
 233 
 
234 
 
 234 
#if defined (SPI_I2S_SUPPORT)
235 
#if defined (SPI_I2S_SUPPORT)
 235 
  /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
236 
  /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
 236 
  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);
237 
  CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD);
 237 
#endif /* SPI_I2S_SUPPORT */
238 
#endif /* SPI_I2S_SUPPORT */
 238 
  return status;
239 
  return status;
 239 
}
240 
}
 240 
 
241 
 
 241 
/**
242 
/**
 242 
  * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.
243 
  * @brief  Set each @ref LL_SPI_InitTypeDef field to default value.
 243 
  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
244 
  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
 244 
  * whose fields will be set to default values.
245 
  * whose fields will be set to default values.
 245 
  * @retval None
246 
  * @retval None
 246 
  */
247 
  */
 247 
void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
248 
void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
 248 
{
249 
{
 249 
  /* Set SPI_InitStruct fields to default values */
250 
  /* Set SPI_InitStruct fields to default values */
 250 
  SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
251 
  SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
 251 
  SPI_InitStruct->Mode              = LL_SPI_MODE_SLAVE;
252 
  SPI_InitStruct->Mode              = LL_SPI_MODE_SLAVE;
 252 
  SPI_InitStruct->DataWidth         = LL_SPI_DATAWIDTH_8BIT;
253 
  SPI_InitStruct->DataWidth         = LL_SPI_DATAWIDTH_8BIT;
 253 
  SPI_InitStruct->ClockPolarity     = LL_SPI_POLARITY_LOW;
254 
  SPI_InitStruct->ClockPolarity     = LL_SPI_POLARITY_LOW;
 254 
  SPI_InitStruct->ClockPhase        = LL_SPI_PHASE_1EDGE;
255 
  SPI_InitStruct->ClockPhase        = LL_SPI_PHASE_1EDGE;
 255 
  SPI_InitStruct->NSS               = LL_SPI_NSS_HARD_INPUT;
256 
  SPI_InitStruct->NSS               = LL_SPI_NSS_HARD_INPUT;
 256 
  SPI_InitStruct->BaudRate          = LL_SPI_BAUDRATEPRESCALER_DIV2;
257 
  SPI_InitStruct->BaudRate          = LL_SPI_BAUDRATEPRESCALER_DIV2;
 257 
  SPI_InitStruct->BitOrder          = LL_SPI_MSB_FIRST;
258 
  SPI_InitStruct->BitOrder          = LL_SPI_MSB_FIRST;
 258 
  SPI_InitStruct->CRCCalculation    = LL_SPI_CRCCALCULATION_DISABLE;
259 
  SPI_InitStruct->CRCCalculation    = LL_SPI_CRCCALCULATION_DISABLE;
 259 
  SPI_InitStruct->CRCPoly           = 7U;
260 
  SPI_InitStruct->CRCPoly           = 7U;
 260 
}
261 
}
 261 
 
262 
 
 262 
/**
263 
/**
 263 
  * @}
264 
  * @}
 264 
  */
265 
  */
 265 
 
266 
 
 266 
/**
267 
/**
 267 
  * @}
268 
  * @}
 268 
  */
269 
  */
 269 
 
270 
 
 270 
/**
271 
/**
 271 
  * @}
272 
  * @}
 272 
  */
273 
  */
 273 
 
274 
 
 274 
#if defined(SPI_I2S_SUPPORT)
275 
#if defined(SPI_I2S_SUPPORT)
 275 
/** @addtogroup I2S_LL
276 
/** @addtogroup I2S_LL
 276 
  * @{
277 
  * @{
 277 
  */
278 
  */
 278 
 
279 
 
 279 
/* Private types -------------------------------------------------------------*/
280 
/* Private types -------------------------------------------------------------*/
 280 
/* Private variables ---------------------------------------------------------*/
281 
/* Private variables ---------------------------------------------------------*/
 281 
/* Private constants ---------------------------------------------------------*/
282 
/* Private constants ---------------------------------------------------------*/
 282 
/** @defgroup I2S_LL_Private_Constants I2S Private Constants
283 
/** @defgroup I2S_LL_Private_Constants I2S Private Constants
 283 
  * @{
284 
  * @{
 284 
  */
285 
  */
 285 
/* I2S registers Masks */
286 
/* I2S registers Masks */
 286 
#define I2S_I2SCFGR_CLEAR_MASK             (SPI_I2SCFGR_CHLEN   | SPI_I2SCFGR_DATLEN | \
287 
#define I2S_I2SCFGR_CLEAR_MASK             (SPI_I2SCFGR_CHLEN   | SPI_I2SCFGR_DATLEN | \
 287 
                                            SPI_I2SCFGR_CKPOL   | SPI_I2SCFGR_I2SSTD | \
288 
                                            SPI_I2SCFGR_CKPOL   | SPI_I2SCFGR_I2SSTD | \
 288 
                                            SPI_I2SCFGR_I2SCFG  | SPI_I2SCFGR_I2SMOD )
289 
                                            SPI_I2SCFGR_I2SCFG  | SPI_I2SCFGR_I2SMOD )
 289 
 
290 
 
 290 
#define I2S_I2SPR_CLEAR_MASK               0x0002U
291 
#define I2S_I2SPR_CLEAR_MASK               0x0002U
 291 
/**
292 
/**
 292 
  * @}
293 
  * @}
 293 
  */
294 
  */
 294 
/* Private macros ------------------------------------------------------------*/
295 
/* Private macros ------------------------------------------------------------*/
 295 
/** @defgroup I2S_LL_Private_Macros I2S Private Macros
296 
/** @defgroup I2S_LL_Private_Macros I2S Private Macros
 296 
  * @{
297 
  * @{
 297 
  */
298 
  */
 298 
 
299 
 
 299 
#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)             \
300 
#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)             \
 300 
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
301 
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
 301 
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \
302 
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \
 302 
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
303 
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
 303 
 
304 
 
 304 
#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \
305 
#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \
 305 
                                          || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
306 
                                          || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
 306 
 
307 
 
 307 
#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)      \
308 
#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)      \
 308 
                                          || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \
309 
                                          || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \
 309 
                                          || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \
310 
                                          || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \
 310 
                                          || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
311 
                                          || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
 311 
                                          || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
312 
                                          || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
 312 
 
313 
 
 313 
#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)     \
314 
#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)     \
 314 
                                          || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \
315 
                                          || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \
 315 
                                          || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
316 
                                          || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
 316 
                                          || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
317 
                                          || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
 317 
 
318 
 
 318 
#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
319 
#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
 319 
                                          || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
320 
                                          || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
 320 
 
321 
 
 321 
#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)       \
322 
#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)       \
 322 
                                          && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
323 
                                          && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
 323 
                                         || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
324 
                                         || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
 324 
 
325 
 
 325 
#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)
326 
#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)
 326 
 
327 
 
 327 
#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
328 
#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
 328 
                                               || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
329 
                                               || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
 329 
/**
330 
/**
 330 
  * @}
331 
  * @}
 331 
  */
332 
  */
 332 
 
333 
 
 333 
/* Private function prototypes -----------------------------------------------*/
334 
/* Private function prototypes -----------------------------------------------*/
 334 
 
335 
 
 335 
/* Exported functions --------------------------------------------------------*/
336 
/* Exported functions --------------------------------------------------------*/
 336 
/** @addtogroup I2S_LL_Exported_Functions
337 
/** @addtogroup I2S_LL_Exported_Functions
 337 
  * @{
338 
  * @{
 338 
  */
339 
  */
 339 
 
340 
 
 340 
/** @addtogroup I2S_LL_EF_Init
341 
/** @addtogroup I2S_LL_EF_Init
 341 
  * @{
342 
  * @{
 342 
  */
343 
  */
 343 
 
344 
 
 344 
/**
345 
/**
 345 
  * @brief  De-initialize the SPI/I2S registers to their default reset values.
346 
  * @brief  De-initialize the SPI/I2S registers to their default reset values.
 346 
  * @param  SPIx SPI Instance
347 
  * @param  SPIx SPI Instance
 347 
  * @retval An ErrorStatus enumeration value:
348 
  * @retval An ErrorStatus enumeration value:
 348 
  *          - SUCCESS: SPI registers are de-initialized
349 
  *          - SUCCESS: SPI registers are de-initialized
 349 
  *          - ERROR: SPI registers are not de-initialized
350 
  *          - ERROR: SPI registers are not de-initialized
 350 
  */
351 
  */
 351 
ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
352 
ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx)
 352 
{
353 
{
 353 
  return LL_SPI_DeInit(SPIx);
354 
  return LL_SPI_DeInit(SPIx);
 354 
}
355 
}
 355 
 
356 
 
 356 
/**
357 
/**
 357 
  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
358 
  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
 358 
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
359 
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
 359 
  *         SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
360 
  *         SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 360 
  * @param  SPIx SPI Instance
361 
  * @param  SPIx SPI Instance
 361 
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
362 
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
 362 
  * @retval An ErrorStatus enumeration value:
363 
  * @retval An ErrorStatus enumeration value:
 363 
  *          - SUCCESS: SPI registers are Initialized
364 
  *          - SUCCESS: SPI registers are Initialized
 364 
  *          - ERROR: SPI registers are not Initialized
365 
  *          - ERROR: SPI registers are not Initialized
 365 
  */
366 
  */
 366 
ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
367 
ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
 367 
{
368 
{
 368 
  uint32_t i2sdiv = 2U;
369 
  uint32_t i2sdiv = 2U;
 369 
  uint32_t i2sodd = 0U;
370 
  uint32_t i2sodd = 0U;
 370 
  uint32_t packetlength = 1U;
371 
  uint32_t packetlength = 1U;
 371 
  uint32_t tmp;
372 
  uint32_t tmp;
 372 
  LL_RCC_ClocksTypeDef rcc_clocks;
373 
  LL_RCC_ClocksTypeDef rcc_clocks;
 373 
  uint32_t sourceclock;
374 
  uint32_t sourceclock;
 374 
  ErrorStatus status = ERROR;
375 
  ErrorStatus status = ERROR;
 375 
 
376 
 
 376 
  /* Check the I2S parameters */
377 
  /* Check the I2S parameters */
 377 
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
378 
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
 378 
  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
379 
  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
 379 
  assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));
380 
  assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard));
 380 
  assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));
381 
  assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat));
 381 
  assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));
382 
  assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput));
 382 
  assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));
383 
  assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq));
 383 
  assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));
384 
  assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity));
 384 
 
385 
 
 385 
  if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)
386 
  if (LL_I2S_IsEnabled(SPIx) == 0x00000000U)
 386 
  {
387 
  {
 387 
    /*---------------------------- SPIx I2SCFGR Configuration --------------------
388 
    /*---------------------------- SPIx I2SCFGR Configuration --------------------
 388 
     * Configure SPIx I2SCFGR with parameters:
389 
     * Configure SPIx I2SCFGR with parameters:
 389 
     * - Mode:          SPI_I2SCFGR_I2SCFG[1:0] bit
390 
     * - Mode:          SPI_I2SCFGR_I2SCFG[1:0] bit
 390 
     * - Standard:      SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits
391 
     * - Standard:      SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits
 391 
     * - DataFormat:    SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits
392 
     * - DataFormat:    SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits
 392 
     * - ClockPolarity: SPI_I2SCFGR_CKPOL bit
393 
     * - ClockPolarity: SPI_I2SCFGR_CKPOL bit
 393 
     */
394 
     */
 394 
 
395 
 
 395 
    /* Write to SPIx I2SCFGR */
396 
    /* Write to SPIx I2SCFGR */
 396 
    MODIFY_REG(SPIx->I2SCFGR,
397 
    MODIFY_REG(SPIx->I2SCFGR,
 397 
               I2S_I2SCFGR_CLEAR_MASK,
398 
               I2S_I2SCFGR_CLEAR_MASK,
 398 
               I2S_InitStruct->Mode | I2S_InitStruct->Standard |
399 
               I2S_InitStruct->Mode | I2S_InitStruct->Standard |
 399 
               I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |
400 
               I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity |
 400 
               SPI_I2SCFGR_I2SMOD);
401 
               SPI_I2SCFGR_I2SMOD);
 401 
 
402 
 
 402 
    /*---------------------------- SPIx I2SPR Configuration ----------------------
403 
    /*---------------------------- SPIx I2SPR Configuration ----------------------
 403 
     * Configure SPIx I2SPR with parameters:
404 
     * Configure SPIx I2SPR with parameters:
 404 
     * - MCLKOutput:    SPI_I2SPR_MCKOE bit
405 
     * - MCLKOutput:    SPI_I2SPR_MCKOE bit
 405 
     * - AudioFreq:     SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits
406 
     * - AudioFreq:     SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits
 406 
     */
407 
     */
 407 
 
408 
 
 408 
    /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)
409 
    /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv)
 409 
     * else, default values are used:  i2sodd = 0U, i2sdiv = 2U.
410 
     * else, default values are used:  i2sodd = 0U, i2sdiv = 2U.
 410 
     */
411 
     */
 411 
    if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)
412 
    if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT)
 412 
    {
413 
    {
 413 
      /* Check the frame length (For the Prescaler computing)
414 
      /* Check the frame length (For the Prescaler computing)
 414 
       * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).
415 
       * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U).
 415 
       */
416 
       */
 416 
      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
417 
      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
 417 
      {
418 
      {
 418 
        /* Packet length is 32 bits */
419 
        /* Packet length is 32 bits */
 419 
        packetlength = 2U;
420 
        packetlength = 2U;
 420 
      }
421 
      }
 421 
 
422 
 
 422 
      /* I2S Clock source is System clock: Get System Clock frequency */
423 
      /* I2S Clock source is System clock: Get System Clock frequency */
 423 
      LL_RCC_GetSystemClocksFreq(&rcc_clocks);
424 
      LL_RCC_GetSystemClocksFreq(&rcc_clocks);
 424 
 
425 
 
 425 
      /* Get the source clock value: based on System Clock value */
426 
      /* Get the source clock value: based on System Clock value */
 426 
      sourceclock = rcc_clocks.SYSCLK_Frequency;
427 
      sourceclock = rcc_clocks.SYSCLK_Frequency;
 427 
 
428 
 
 428 
      /* Compute the Real divider depending on the MCLK output state with a floating point */
429 
      /* Compute the Real divider depending on the MCLK output state with a floating point */
 429 
      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
430 
      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
 430 
      {
431 
      {
 431 
        /* MCLK output is enabled */
432 
        /* MCLK output is enabled */
 432 
        tmp = (((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
433 
        tmp = (((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
 433 
      }
434 
      }
 434 
      else
435 
      else
 435 
      {
436 
      {
 436 
        /* MCLK output is disabled */
437 
        /* MCLK output is disabled */
 437 
        tmp = (((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
438 
        tmp = (((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
 438 
      }
439 
      }
 439 
 
440 
 
 440 
      /* Remove the floating point */
441 
      /* Remove the floating point */
 441 
      tmp = tmp / 10U;
442 
      tmp = tmp / 10U;
 442 
 
443 
 
 443 
      /* Check the parity of the divider */
444 
      /* Check the parity of the divider */
 444 
      i2sodd = (tmp & (uint16_t)0x0001U);
445 
      i2sodd = (tmp & (uint16_t)0x0001U);
 445 
 
446 
 
 446 
      /* Compute the i2sdiv prescaler */
447 
      /* Compute the i2sdiv prescaler */
 447 
      i2sdiv = ((tmp - i2sodd) / 2U);
448 
      i2sdiv = ((tmp - i2sodd) / 2U);
 448 
 
449 
 
 449 
      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
450 
      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
 450 
      i2sodd = (i2sodd << 8U);
451 
      i2sodd = (i2sodd << 8U);
 451 
    }
452 
    }
 452 
 
453 
 
 453 
    /* Test if the divider is 1 or 0 or greater than 0xFF */
454 
    /* Test if the divider is 1 or 0 or greater than 0xFF */
 454 
    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
455 
    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
 455 
    {
456 
    {
 456 
      /* Set the default values */
457 
      /* Set the default values */
 457 
      i2sdiv = 2U;
458 
      i2sdiv = 2U;
 458 
      i2sodd = 0U;
459 
      i2sodd = 0U;
 459 
    }
460 
    }
 460 
 
461 
 
 461 
    /* Write to SPIx I2SPR register the computed value */
462 
    /* Write to SPIx I2SPR register the computed value */
 462 
    WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);
463 
    WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput);
 463 
 
464 
 
 464 
    status = SUCCESS;
465 
    status = SUCCESS;
 465 
  }
466 
  }
 466 
  return status;
467 
  return status;
 467 
}
468 
}
 468 
 
469 
 
 469 
/**
470 
/**
 470 
  * @brief  Set each @ref LL_I2S_InitTypeDef field to default value.
471 
  * @brief  Set each @ref LL_I2S_InitTypeDef field to default value.
 471 
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
472 
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
 472 
  *         whose fields will be set to default values.
473 
  *         whose fields will be set to default values.
 473 
  * @retval None
474 
  * @retval None
 474 
  */
475 
  */
 475 
void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)
476 
void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct)
 476 
{
477 
{
 477 
  /*--------------- Reset I2S init structure parameters values -----------------*/
478 
  /*--------------- Reset I2S init structure parameters values -----------------*/
 478 
  I2S_InitStruct->Mode              = LL_I2S_MODE_SLAVE_TX;
479 
  I2S_InitStruct->Mode              = LL_I2S_MODE_SLAVE_TX;
 479 
  I2S_InitStruct->Standard          = LL_I2S_STANDARD_PHILIPS;
480 
  I2S_InitStruct->Standard          = LL_I2S_STANDARD_PHILIPS;
 480 
  I2S_InitStruct->DataFormat        = LL_I2S_DATAFORMAT_16B;
481 
  I2S_InitStruct->DataFormat        = LL_I2S_DATAFORMAT_16B;
 481 
  I2S_InitStruct->MCLKOutput        = LL_I2S_MCLK_OUTPUT_DISABLE;
482 
  I2S_InitStruct->MCLKOutput        = LL_I2S_MCLK_OUTPUT_DISABLE;
 482 
  I2S_InitStruct->AudioFreq         = LL_I2S_AUDIOFREQ_DEFAULT;
483 
  I2S_InitStruct->AudioFreq         = LL_I2S_AUDIOFREQ_DEFAULT;
 483 
  I2S_InitStruct->ClockPolarity     = LL_I2S_POLARITY_LOW;
484 
  I2S_InitStruct->ClockPolarity     = LL_I2S_POLARITY_LOW;
 484 
}
485 
}
 485 
 
486 
 
 486 
/**
487 
/**
 487 
  * @brief  Set linear and parity prescaler.
488 
  * @brief  Set linear and parity prescaler.
 488 
  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
489 
  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
 489 
  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
490 
  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
 490 
  * @param  SPIx SPI Instance
491 
  * @param  SPIx SPI Instance
 491 
  * @param  PrescalerLinear value Min_Data=0x02 and Max_Data=0xFF.
492 
  * @param  PrescalerLinear value Min_Data=0x02 and Max_Data=0xFF.
 492 
  * @param  PrescalerParity This parameter can be one of the following values:
493 
  * @param  PrescalerParity This parameter can be one of the following values:
 493 
  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
494 
  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
 494 
  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
495 
  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
 495 
  * @retval None
496 
  * @retval None
 496 
  */
497 
  */
 497 
void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)
498 
void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity)
 498 
{
499 
{
 499 
  /* Check the I2S parameters */
500 
  /* Check the I2S parameters */
 500 
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
501 
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
 501 
  assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));
502 
  assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear));
 502 
  assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));
503 
  assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity));
 503 
 
504 
 
 504 
  /* Write to SPIx I2SPR */
505 
  /* Write to SPIx I2SPR */
 505 
  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));
506 
  MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U));
 506 
}
507 
}
 507 
 
508 
 
 508 
/**
509 
/**
 509 
  * @}
510 
  * @}
 510 
  */
511 
  */
 511 
 
512 
 
 512 
/**
513 
/**
 513 
  * @}
514 
  * @}
 514 
  */
515 
  */
 515 
 
516 
 
 516 
/**
517 
/**
 517 
  * @}
518 
  * @}
 518 
  */
519 
  */
 519 
#endif /* SPI_I2S_SUPPORT */
520 
#endif /* SPI_I2S_SUPPORT */
 520 
 
521 
 
 521 
#endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
522 
#endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
 522 
 
523 
 
 523 
/**
524 
/**
 524 
  * @}
525 
  * @}
 525 
  */
526 
  */
 526 
 
527 
 
 527 
#endif /* USE_FULL_LL_DRIVER */
528 
#endif /* USE_FULL_LL_DRIVER */
 528 
 
529 
 
 - 
 
530 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 -