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  * @author  MCD Application Team
4
  * @author  MCD Application Team
5
  * @brief   SPI LL module driver.
5
  * @brief   SPI LL module driver.
6
  ******************************************************************************
6
  ******************************************************************************
7
  * @attention
7
  * @attention
8
  *
8
  *
9
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
9
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
-
 
10
  * All rights reserved.</center></h2>
10
  *
11
  *
11
  * Redistribution and use in source and binary forms, with or without modification,
12
  * This software component is licensed by ST under BSD 3-Clause license,
12
  * are permitted provided that the following conditions are met:
13
  * the "License"; You may not use this file except in compliance with the
13
  *   1. Redistributions of source code must retain the above copyright notice,
-
 
14
  *      this list of conditions and the following disclaimer.
-
 
15
  *   2. Redistributions in binary form must reproduce the above copyright notice,
-
 
16
  *      this list of conditions and the following disclaimer in the documentation
-
 
17
  *      and/or other materials provided with the distribution.
14
  * License. You may obtain a copy of the License at:
18
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-
 
19
  *      may be used to endorse or promote products derived from this software
15
  *                        opensource.org/licenses/BSD-3-Clause
20
  *      without specific prior written permission.
-
 
21
  *
-
 
22
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-
 
23
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-
 
24
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-
 
25
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-
 
26
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-
 
27
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-
 
28
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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29
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-
 
30
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-
 
31
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
 
32
  *
16
  *
33
  ******************************************************************************
17
  ******************************************************************************
34
  */
18
  */
35
#if defined(USE_FULL_LL_DRIVER)
19
#if defined(USE_FULL_LL_DRIVER)
36
 
20
 
Line 74... Line 58...
74
 
58
 
75
/* Private macros ------------------------------------------------------------*/
59
/* Private macros ------------------------------------------------------------*/
76
/** @defgroup SPI_LL_Private_Macros SPI Private Macros
60
/** @defgroup SPI_LL_Private_Macros SPI Private Macros
77
  * @{
61
  * @{
78
  */
62
  */
79
#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)    \
63
#define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX)       \
80
                                              || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
64
                                                 || ((__VALUE__) == LL_SPI_SIMPLEX_RX)     \
81
                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
65
                                                 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
82
                                              || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
66
                                                 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
83
 
67
 
84
#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
68
#define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
85
                                || ((__VALUE__) == LL_SPI_MODE_SLAVE))
69
                                   || ((__VALUE__) == LL_SPI_MODE_SLAVE))
86
 
70
 
87
#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
71
#define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT)  \
88
                                     || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
72
                                        || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
89
 
73
 
90
#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
74
#define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
91
                                    || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
75
                                       || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
92
 
76
 
93
#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
77
#define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
94
                                 || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
78
                                    || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
95
 
79
 
96
#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
80
#define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT)          \
97
                               || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
81
                                  || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
98
                               || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
82
                                  || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
99
 
83
 
100
#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)   \
84
#define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2)      \
101
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
85
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4)   \
102
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
86
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8)   \
103
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
87
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16)  \
104
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
88
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32)  \
105
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
89
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64)  \
106
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
90
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
107
                                    || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
91
                                       || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
108
 
92
 
109
#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
93
#define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
110
                                    || ((__VALUE__) == LL_SPI_MSB_FIRST))
94
                                       || ((__VALUE__) == LL_SPI_MSB_FIRST))
111
 
95
 
112
#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
96
#define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
113
                                          || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
97
                                             || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
114
 
98
 
115
#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
99
#define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
116
 
100
 
117
/**
101
/**
118
  * @}
102
  * @}
Line 184... Line 168...
184
}
168
}
185
 
169
 
186
/**
170
/**
187
  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
171
  * @brief  Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
188
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
172
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
189
  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
173
  *         SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
190
  * @param  SPIx SPI Instance
174
  * @param  SPIx SPI Instance
191
  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
175
  * @param  SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
192
  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
176
  * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
193
  */
177
  */
194
ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
178
ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
Line 311... Line 295...
311
/* Private macros ------------------------------------------------------------*/
295
/* Private macros ------------------------------------------------------------*/
312
/** @defgroup I2S_LL_Private_Macros I2S Private Macros
296
/** @defgroup I2S_LL_Private_Macros I2S Private Macros
313
  * @{
297
  * @{
314
  */
298
  */
315
 
299
 
316
#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)          \
300
#define IS_LL_I2S_DATAFORMAT(__VALUE__)  (((__VALUE__) == LL_I2S_DATAFORMAT_16B)             \
317
                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
301
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \
318
                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \
302
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_24B)          \
319
                                       || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
303
                                          || ((__VALUE__) == LL_I2S_DATAFORMAT_32B))
320
 
304
 
321
#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \
305
#define IS_LL_I2S_CPOL(__VALUE__)        (((__VALUE__) == LL_I2S_POLARITY_LOW)  \
322
                                       || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
306
                                          || ((__VALUE__) == LL_I2S_POLARITY_HIGH))
323
 
307
 
324
#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)   \
308
#define IS_LL_I2S_STANDARD(__VALUE__)    (((__VALUE__) == LL_I2S_STANDARD_PHILIPS)      \
325
                                       || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \
309
                                          || ((__VALUE__) == LL_I2S_STANDARD_MSB)       \
326
                                       || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \
310
                                          || ((__VALUE__) == LL_I2S_STANDARD_LSB)       \
327
                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
311
                                          || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \
328
                                       || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
312
                                          || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG))
329
 
313
 
330
#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)  \
314
#define IS_LL_I2S_MODE(__VALUE__)        (((__VALUE__) == LL_I2S_MODE_SLAVE_TX)     \
331
                                       || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \
315
                                          || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX)  \
332
                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
316
                                          || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \
333
                                       || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
317
                                          || ((__VALUE__) == LL_I2S_MODE_MASTER_RX))
334
 
318
 
335
#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
319
#define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \
336
                                       || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
320
                                          || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE))
337
 
321
 
338
#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)    \
322
#define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K)       \
339
                                       && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
323
                                          && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \
340
                                       || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
324
                                         || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT))
341
 
325
 
342
#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)
326
#define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__)  ((__VALUE__) >= 0x2U)
343
 
327
 
344
#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
328
#define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \
345
                                           || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
329
                                               || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD))
346
/**
330
/**
347
  * @}
331
  * @}
348
  */
332
  */
349
 
333
 
350
/* Private function prototypes -----------------------------------------------*/
334
/* Private function prototypes -----------------------------------------------*/
Line 371... Line 355...
371
}
355
}
372
 
356
 
373
/**
357
/**
374
  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
358
  * @brief  Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct.
375
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
359
  * @note   As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
376
  *         SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
360
  *         SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
377
  * @param  SPIx SPI Instance
361
  * @param  SPIx SPI Instance
378
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
362
  * @param  I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure
379
  * @retval An ErrorStatus enumeration value:
363
  * @retval An ErrorStatus enumeration value:
380
  *          - SUCCESS: SPI registers are Initialized
364
  *          - SUCCESS: SPI registers are Initialized
381
  *          - ERROR: SPI registers are not Initialized
365
  *          - ERROR: SPI registers are not Initialized
382
  */
366
  */
383
ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
367
ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct)
384
{
368
{
385
  uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U;
369
  uint32_t i2sdiv = 2U;
386
  uint32_t tmp = 0U;
370
  uint32_t i2sodd = 0U;
387
  uint32_t sourceclock = 0U;
371
  uint32_t packetlength = 1U;
388
#if defined(I2S2_I2S3_CLOCK_FEATURE)
372
  uint32_t tmp;
389
#else
-
 
390
  LL_RCC_ClocksTypeDef rcc_clocks;
373
  LL_RCC_ClocksTypeDef rcc_clocks;
391
#endif /* I2S2_I2S3_CLOCK_FEATURE */
374
  uint32_t sourceclock;
392
  ErrorStatus status = ERROR;
375
  ErrorStatus status = ERROR;
393
 
376
 
394
  /* Check the I2S parameters */
377
  /* Check the I2S parameters */
395
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
378
  assert_param(IS_I2S_ALL_INSTANCE(SPIx));
396
  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
379
  assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode));
Line 434... Line 417...
434
      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
417
      if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B)
435
      {
418
      {
436
        /* Packet length is 32 bits */
419
        /* Packet length is 32 bits */
437
        packetlength = 2U;
420
        packetlength = 2U;
438
      }
421
      }
439
#if defined(I2S2_I2S3_CLOCK_FEATURE)
-
 
440
      /* If an external I2S clock has to be used, the specific define should be set
-
 
441
      in the project configuration or in the stm32f1xx_ll_rcc.h file */
-
 
442
      if(SPIx == SPI2)
-
 
443
      {
-
 
444
        /* Get the I2S source clock value */
-
 
445
        sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S2_CLKSOURCE);
-
 
446
      }
-
 
447
      else /* SPI3 */
-
 
448
      {
-
 
449
        /* Get the I2S source clock value */
-
 
450
        sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S3_CLKSOURCE);        
-
 
451
      }
-
 
452
#else
422
 
453
        /* I2S Clock source is System clock: Get System Clock frequency */
423
      /* I2S Clock source is System clock: Get System Clock frequency */
454
      LL_RCC_GetSystemClocksFreq(&rcc_clocks);
424
      LL_RCC_GetSystemClocksFreq(&rcc_clocks);
455
 
425
 
456
      /* Get the source clock value: based on System Clock value */
426
      /* Get the source clock value: based on System Clock value */
457
      sourceclock = rcc_clocks.SYSCLK_Frequency;    
427
      sourceclock = rcc_clocks.SYSCLK_Frequency;
458
#endif /* I2S2_I2S3_CLOCK_FEATURE */
-
 
-
 
428
 
459
      /* Compute the Real divider depending on the MCLK output state with a floating point */
429
      /* Compute the Real divider depending on the MCLK output state with a floating point */
460
      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
430
      if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE)
461
      {
431
      {
462
        /* MCLK output is enabled */
432
        /* MCLK output is enabled */
463
        tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
433
        tmp = (((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
464
      }
434
      }
465
      else
435
      else
466
      {
436
      {
467
        /* MCLK output is disabled */
437
        /* MCLK output is disabled */
468
        tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
438
        tmp = (((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
469
      }
439
      }
470
 
440
 
471
      /* Remove the floating point */
441
      /* Remove the floating point */
472
      tmp = tmp / 10U;
442
      tmp = tmp / 10U;
473
 
443
 
474
      /* Check the parity of the divider */
444
      /* Check the parity of the divider */
475
      i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U);
445
      i2sodd = (tmp & (uint16_t)0x0001U);
476
 
446
 
477
      /* Compute the i2sdiv prescaler */
447
      /* Compute the i2sdiv prescaler */
478
      i2sdiv = (uint16_t)((tmp - i2sodd) / 2U);
448
      i2sdiv = ((tmp - i2sodd) / 2U);
479
 
449
 
480
      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
450
      /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
481
      i2sodd = (uint16_t)(i2sodd << 8U);
451
      i2sodd = (i2sodd << 8U);
482
    }
452
    }
483
 
453
 
484
    /* Test if the divider is 1 or 0 or greater than 0xFF */
454
    /* Test if the divider is 1 or 0 or greater than 0xFF */
485
    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
455
    if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
486
    {
456
    {
Line 517... Line 487...
517
/**
487
/**
518
  * @brief  Set linear and parity prescaler.
488
  * @brief  Set linear and parity prescaler.
519
  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
489
  * @note   To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
520
  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
490
  *         Check Audio frequency table and formulas inside Reference Manual (SPI/I2S).
521
  * @param  SPIx SPI Instance
491
  * @param  SPIx SPI Instance
522
  * @param  PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF.
492
  * @param  PrescalerLinear value Min_Data=0x02 and Max_Data=0xFF.
523
  * @param  PrescalerParity This parameter can be one of the following values:
493
  * @param  PrescalerParity This parameter can be one of the following values:
524
  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
494
  *         @arg @ref LL_I2S_PRESCALER_PARITY_EVEN
525
  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
495
  *         @arg @ref LL_I2S_PRESCALER_PARITY_ODD
526
  * @retval None
496
  * @retval None
527
  */
497
  */