Rev 2 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 2 | Rev 9 | ||
|---|---|---|---|
| Line 1... | Line 1... | ||
| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_ll_sdmmc.c |
3 | * @file stm32f1xx_ll_sdmmc.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief SDIO Low Layer HAL module driver. |
5 | * @brief SDMMC Low Layer HAL module driver. |
| 6 | * |
6 | * |
| 7 | * This file provides firmware functions to manage the following |
7 | * This file provides firmware functions to manage the following |
| 8 | * functionalities of the SDIO peripheral: |
8 | * functionalities of the SDMMC peripheral: |
| 9 | * + Initialization/de-initialization functions |
9 | * + Initialization/de-initialization functions |
| 10 | * + I/O operation functions |
10 | * + I/O operation functions |
| 11 | * + Peripheral Control functions |
11 | * + Peripheral Control functions |
| 12 | * + Peripheral State functions |
12 | * + Peripheral State functions |
| 13 | * |
13 | * |
| 14 | @verbatim |
14 | @verbatim |
| 15 | ============================================================================== |
15 | ============================================================================== |
| 16 | ##### SDMMC peripheral features ##### |
16 | ##### SDMMC peripheral features ##### |
| 17 | ============================================================================== |
17 | ============================================================================== |
| 18 | [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2 |
18 | [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB |
| 19 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA |
19 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA |
| 20 | devices. |
20 | devices. |
| 21 | |
21 | |
| 22 | [..] The SDMMC features include the following: |
22 | [..] The SDMMC features include the following: |
| 23 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support |
23 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support |
| Line 27... | Line 27... | ||
| 27 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two |
27 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two |
| 28 | different data bus modes: 1-bit (default) and 4-bit |
28 | different data bus modes: 1-bit (default) and 4-bit |
| 29 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol |
29 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol |
| 30 | Rev1.1) |
30 | Rev1.1) |
| 31 | (+) Data transfer up to 48 MHz for the 8 bit mode |
31 | (+) Data transfer up to 48 MHz for the 8 bit mode |
| 32 | (+) Data and command output enable signals to control external bidirectional drivers. |
32 | (+) Data and command output enable signals to control external bidirectional drivers |
| 33 | |
- | |
| 34 | |
33 | |
| 35 | ##### How to use this driver ##### |
34 | ##### How to use this driver ##### |
| 36 | ============================================================================== |
35 | ============================================================================== |
| 37 | [..] |
36 | [..] |
| 38 | This driver is a considered as a driver of service for external devices drivers |
37 | This driver is a considered as a driver of service for external devices drivers |
| Line 42... | Line 41... | ||
| 42 | |
41 | |
| 43 | This driver is almost transparent for the final user, it is only used to implement other |
42 | This driver is almost transparent for the final user, it is only used to implement other |
| 44 | functionalities of the external device. |
43 | functionalities of the external device. |
| 45 | |
44 | |
| 46 | [..] |
45 | [..] |
| - | 46 | (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output (MSI, PLLUSB1CLK, |
|
| - | 47 | PLLUSB2CLK). Before start working with SDMMC peripheral make sure that the |
|
| - | 48 | PLL is well configured. |
|
| 47 | (+) The SDIO peripheral uses two clock signals: |
49 | The SDMMC peripheral uses two clock signals: |
| 48 | (++) SDIO adapter clock (SDIOCLK = HCLK) |
50 | (++) SDMMC adapter clock (SDMMCCLK = 48 MHz) |
| 49 | (++) AHB bus clock (HCLK/2) |
51 | (++) APB2 bus clock (PCLK2) |
| 50 | |
52 | |
| 51 | -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition: |
53 | -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition: |
| 52 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK)) |
54 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK)) |
| 53 | |
55 | |
| 54 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC |
56 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC |
| 55 | peripheral. |
57 | peripheral. |
| 56 | 58 | ||
| 57 | (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx) |
59 | (+) Enable the Power ON State using the SDIO_PowerState_ON() |
| 58 | function and disable it using the function SDIO_PowerState_OFF(SDIOx). |
60 | function and disable it using the function SDIO_PowerState_OFF(). |
| 59 | |
61 | |
| 60 | (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros. |
62 | (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros. |
| 61 | |
63 | |
| 62 | (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT) |
64 | (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT() |
| 63 | and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode. |
65 | and __SDIO_DISABLE_IT() if you need to use interrupt mode. |
| 64 | |
66 | |
| 65 | (+) When using the DMA mode |
67 | (+) When using the DMA mode |
| 66 | (++) Configure the DMA in the MSP layer of the external device |
68 | (++) Configure the DMA in the MSP layer of the external device |
| 67 | (++) Active the needed channel Request |
69 | (++) Active the needed channel Request |
| 68 | (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro |
70 | (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro |
| Line 84... | Line 86... | ||
| 84 | register using the SDIO_GetCommandResponse(). |
86 | register using the SDIO_GetCommandResponse(). |
| 85 | The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the |
87 | The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the |
| 86 | SDIO_GetResponse() function. |
88 | SDIO_GetResponse() function. |
| 87 | |
89 | |
| 88 | (+) To control the DPSM (Data Path State Machine) and send/receive |
90 | (+) To control the DPSM (Data Path State Machine) and send/receive |
| 89 | data to/from the card use the SDIO_ConfigData(), SDIO_GetDataCounter(), |
91 | data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(), |
| 90 | SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions. |
92 | SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions. |
| 91 | |
93 | |
| 92 | *** Read Operations *** |
94 | *** Read Operations *** |
| 93 | ======================= |
95 | ======================= |
| 94 | [..] |
96 | [..] |
| Line 130... | Line 132... | ||
| 130 | (#) Use the SDIO flags/interrupts to check the transfer status. |
132 | (#) Use the SDIO flags/interrupts to check the transfer status. |
| 131 | |
133 | |
| 132 | *** Command management operations *** |
134 | *** Command management operations *** |
| 133 | ===================================== |
135 | ===================================== |
| 134 | [..] |
136 | [..] |
| 135 | (#) The commands used for Read/Write//Erase operations are managed in |
137 | (#) The commands used for Read/Write/Erase operations are managed in |
| 136 | separate functions. |
138 | separate functions. |
| 137 | Each function allows to send the needed command with the related argument, |
139 | Each function allows to send the needed command with the related argument, |
| 138 | then check the response. |
140 | then check the response. |
| 139 | By the same approach, you could implement a command and check the response. |
141 | By the same approach, you could implement a command and check the response. |
| 140 | |
142 | |
| 141 | @endverbatim |
143 | @endverbatim |
| 142 | ****************************************************************************** |
144 | ****************************************************************************** |
| 143 | * @attention |
145 | * @attention |
| 144 | * |
146 | * |
| 145 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
147 | * <h2><center>© Copyright (c) 2018 STMicroelectronics. |
| - | 148 | * All rights reserved.</center></h2> |
|
| 146 | * |
149 | * |
| 147 | * Redistribution and use in source and binary forms, with or without modification, |
150 | * This software component is licensed by ST under BSD 3-Clause license, |
| 148 | * are permitted provided that the following conditions are met: |
151 | * the "License"; You may not use this file except in compliance with the |
| 149 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
| 150 | * this list of conditions and the following disclaimer. |
152 | * License. You may obtain a copy of the License at: |
| 151 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
| 152 | * this list of conditions and the following disclaimer in the documentation |
- | |
| 153 | * and/or other materials provided with the distribution. |
153 | * opensource.org/licenses/BSD-3-Clause |
| 154 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
| 155 | * may be used to endorse or promote products derived from this software |
- | |
| 156 | * without specific prior written permission. |
- | |
| 157 | * |
- | |
| 158 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
| 159 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
| 160 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
| 161 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
| 162 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
| 163 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
| 164 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
| 165 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
| 166 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
| 167 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
| 168 | * |
154 | * |
| 169 | ****************************************************************************** |
155 | ****************************************************************************** |
| 170 | */ |
156 | */ |
| 171 | 157 | ||
| 172 | /* Includes ------------------------------------------------------------------*/ |
158 | /* Includes ------------------------------------------------------------------*/ |
| 173 | #include "stm32f1xx_hal.h" |
159 | #include "stm32f1xx_hal.h" |
| 174 | 160 | ||
| 175 | - | ||
| 176 | #if defined(STM32F103xE) || defined(STM32F103xG) |
161 | #if defined(SDIO) |
| 177 | 162 | ||
| 178 | /** @addtogroup STM32F1xx_HAL_Driver |
163 | /** @addtogroup STM32F1xx_HAL_Driver |
| 179 | * @{ |
164 | * @{ |
| 180 | */ |
165 | */ |
| 181 | 166 | ||
| 182 | /** @defgroup SDMMC_LL SDMMC Low Layer |
167 | /** @defgroup SDMMC_LL SDMMC Low Layer |
| 183 | * @brief Low layer module for SD |
168 | * @brief Low layer module for SD |
| 184 | * @{ |
169 | * @{ |
| 185 | */ |
170 | */ |
| - | 171 | ||
| 186 | #if defined (HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED) |
172 | #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED) |
| 187 | 173 | ||
| 188 | /* Private typedef -----------------------------------------------------------*/ |
174 | /* Private typedef -----------------------------------------------------------*/ |
| 189 | /* Private define ------------------------------------------------------------*/ |
175 | /* Private define ------------------------------------------------------------*/ |
| 190 | /* Private macro -------------------------------------------------------------*/ |
176 | /* Private macro -------------------------------------------------------------*/ |
| 191 | /* Private variables ---------------------------------------------------------*/ |
177 | /* Private variables ---------------------------------------------------------*/ |
| Line 223... | Line 209... | ||
| 223 | * @param Init: SDMMC initialization structure |
209 | * @param Init: SDMMC initialization structure |
| 224 | * @retval HAL status |
210 | * @retval HAL status |
| 225 | */ |
211 | */ |
| 226 | HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init) |
212 | HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init) |
| 227 | { |
213 | { |
| 228 | uint32_t tmpreg = 0U; |
214 | uint32_t tmpreg = 0; |
| 229 | 215 | ||
| 230 | /* Check the parameters */ |
216 | /* Check the parameters */ |
| 231 | assert_param(IS_SDIO_ALL_INSTANCE(SDIOx)); |
217 | assert_param(IS_SDIO_ALL_INSTANCE(SDIOx)); |
| 232 | assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge)); |
218 | assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge)); |
| 233 | assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass)); |
219 | assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass)); |
| Line 322... | Line 308... | ||
| 322 | */ |
308 | */ |
| 323 | HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx) |
309 | HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx) |
| 324 | { |
310 | { |
| 325 | /* Set power state to ON */ |
311 | /* Set power state to ON */ |
| 326 | SDIOx->POWER = SDIO_POWER_PWRCTRL; |
312 | SDIOx->POWER = SDIO_POWER_PWRCTRL; |
| - | 313 | ||
| - | 314 | /* 1ms: required power up waiting time before starting the SD initialization |
|
| - | 315 | sequence */ |
|
| - | 316 | HAL_Delay(2); |
|
| 327 | 317 | ||
| 328 | return HAL_OK; |
318 | return HAL_OK; |
| 329 | } |
319 | } |
| 330 | 320 | ||
| 331 | /** |
321 | /** |
| Line 334... | Line 324... | ||
| 334 | * @retval HAL status |
324 | * @retval HAL status |
| 335 | */ |
325 | */ |
| 336 | HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx) |
326 | HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx) |
| 337 | { |
327 | { |
| 338 | /* Set power state to OFF */ |
328 | /* Set power state to OFF */ |
| 339 | SDIOx->POWER = 0x00000000U; |
329 | SDIOx->POWER = (uint32_t)0x00000000; |
| 340 | 330 | ||
| 341 | return HAL_OK; |
331 | return HAL_OK; |
| 342 | } |
332 | } |
| 343 | 333 | ||
| 344 | /** |
334 | /** |
| Line 363... | Line 353... | ||
| 363 | * the configuration information for the SDMMC command |
353 | * the configuration information for the SDMMC command |
| 364 | * @retval HAL status |
354 | * @retval HAL status |
| 365 | */ |
355 | */ |
| 366 | HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command) |
356 | HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command) |
| 367 | { |
357 | { |
| 368 | uint32_t tmpreg = 0U; |
358 | uint32_t tmpreg = 0; |
| 369 | 359 | ||
| 370 | /* Check the parameters */ |
360 | /* Check the parameters */ |
| 371 | assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex)); |
361 | assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex)); |
| 372 | assert_param(IS_SDIO_RESPONSE(Command->Response)); |
362 | assert_param(IS_SDIO_RESPONSE(Command->Response)); |
| 373 | assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt)); |
363 | assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt)); |
| Line 410... | Line 400... | ||
| 410 | * @arg SDIO_RESP4: Response Register 4 |
400 | * @arg SDIO_RESP4: Response Register 4 |
| 411 | * @retval The Corresponding response register value |
401 | * @retval The Corresponding response register value |
| 412 | */ |
402 | */ |
| 413 | uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response) |
403 | uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response) |
| 414 | { |
404 | { |
| 415 | __IO uint32_t tmp = 0U; |
405 | uint32_t tmp; |
| 416 | 406 | ||
| 417 | /* Check the parameters */ |
407 | /* Check the parameters */ |
| 418 | assert_param(IS_SDIO_RESP(Response)); |
408 | assert_param(IS_SDIO_RESP(Response)); |
| 419 | 409 | ||
| 420 | /* Get the response */ |
410 | /* Get the response */ |
| 421 | tmp = (uint32_t)&(SDIOx->RESP1) + Response; |
411 | tmp = (uint32_t)(&(SDIOx->RESP1)) + Response; |
| 422 | 412 | ||
| 423 | return (*(__IO uint32_t *) tmp); |
413 | return (*(__IO uint32_t *) tmp); |
| 424 | } |
414 | } |
| 425 | 415 | ||
| 426 | /** |
416 | /** |
| 427 | * @brief Configure the SDMMC data path according to the specified |
417 | * @brief Configure the SDMMC data path according to the specified |
| 428 | * parameters in the SDIO_DataInitTypeDef. |
418 | * parameters in the SDIO_DataInitTypeDef. |
| 429 | * @param SDIOx: Pointer to SDMMC register base |
419 | * @param SDIOx: Pointer to SDIO register base |
| 430 | * @param Data : pointer to a SDIO_DataInitTypeDef structure |
420 | * @param Data : pointer to a SDIO_DataInitTypeDef structure |
| 431 | * that contains the configuration information for the SDMMC data. |
421 | * that contains the configuration information for the SDMMC data. |
| 432 | * @retval HAL status |
422 | * @retval HAL status |
| 433 | */ |
423 | */ |
| 434 | HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data) |
424 | HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data) |
| 435 | { |
425 | { |
| 436 | uint32_t tmpreg = 0U; |
426 | uint32_t tmpreg = 0; |
| 437 | 427 | ||
| 438 | /* Check the parameters */ |
428 | /* Check the parameters */ |
| 439 | assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength)); |
429 | assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength)); |
| 440 | assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize)); |
430 | assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize)); |
| 441 | assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir)); |
431 | assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir)); |
| Line 461... | Line 451... | ||
| 461 | 451 | ||
| 462 | } |
452 | } |
| 463 | 453 | ||
| 464 | /** |
454 | /** |
| 465 | * @brief Returns number of remaining data bytes to be transferred. |
455 | * @brief Returns number of remaining data bytes to be transferred. |
| 466 | * @param SDIOx: Pointer to SDMMC register base |
456 | * @param SDIOx: Pointer to SDIO register base |
| 467 | * @retval Number of remaining data bytes to be transferred |
457 | * @retval Number of remaining data bytes to be transferred |
| 468 | */ |
458 | */ |
| 469 | uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx) |
459 | uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx) |
| 470 | { |
460 | { |
| 471 | return (SDIOx->DCOUNT); |
461 | return (SDIOx->DCOUNT); |
| 472 | } |
462 | } |
| 473 | 463 | ||
| 474 | /** |
464 | /** |
| 475 | * @brief Get the FIFO data |
465 | * @brief Get the FIFO data |
| 476 | * @param SDIOx: Pointer to SDMMC register base |
466 | * @param SDIOx: Pointer to SDIO register base |
| 477 | * @retval Data received |
467 | * @retval Data received |
| 478 | */ |
468 | */ |
| 479 | uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx) |
469 | uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx) |
| 480 | { |
470 | { |
| 481 | return (SDIOx->FIFO); |
471 | return (SDIOx->FIFO); |
| 482 | } |
472 | } |
| 483 | 473 | ||
| 484 | /** |
474 | /** |
| 485 | * @brief Sets one of the two options of inserting read wait interval. |
475 | * @brief Sets one of the two options of inserting read wait interval. |
| 486 | * @param SDIOx: Pointer to SDMMC register base |
476 | * @param SDIOx: Pointer to SDIO register base |
| 487 | * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode. |
477 | * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode. |
| 488 | * This parameter can be: |
478 | * This parameter can be: |
| 489 | * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK |
479 | * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK |
| 490 | * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2 |
480 | * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2 |
| 491 | * @retval None |
481 | * @retval None |
| Line 520... | Line 510... | ||
| 520 | * @{ |
510 | * @{ |
| 521 | */ |
511 | */ |
| 522 | 512 | ||
| 523 | /** |
513 | /** |
| 524 | * @brief Send the Data Block Lenght command and check the response |
514 | * @brief Send the Data Block Lenght command and check the response |
| 525 | * @param SDIOx: Pointer to SDMMC register base |
515 | * @param SDIOx: Pointer to SDIO register base |
| 526 | * @retval HAL status |
516 | * @retval HAL status |
| 527 | */ |
517 | */ |
| 528 | uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize) |
518 | uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize) |
| 529 | { |
519 | { |
| 530 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
520 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 531 | uint32_t errorstate = SDMMC_ERROR_NONE; |
521 | uint32_t errorstate; |
| 532 | 522 | ||
| 533 | /* Set Block Size for Card */ |
523 | /* Set Block Size for Card */ |
| 534 | sdmmc_cmdinit.Argument = (uint32_t)BlockSize; |
524 | sdmmc_cmdinit.Argument = (uint32_t)BlockSize; |
| 535 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN; |
525 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN; |
| 536 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
526 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 537 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
527 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 538 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
528 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 539 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
529 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 540 | 530 | ||
| 541 | /* Check for error conditions */ |
531 | /* Check for error conditions */ |
| 542 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT); |
532 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT); |
| 543 | 533 | ||
| 544 | return errorstate; |
534 | return errorstate; |
| 545 | } |
535 | } |
| 546 | 536 | ||
| 547 | /** |
537 | /** |
| 548 | * @brief Send the Read Single Block command and check the response |
538 | * @brief Send the Read Single Block command and check the response |
| 549 | * @param SDIOx: Pointer to SDMMC register base |
539 | * @param SDIOx: Pointer to SDIO register base |
| 550 | * @retval HAL status |
540 | * @retval HAL status |
| 551 | */ |
541 | */ |
| 552 | uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd) |
542 | uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd) |
| 553 | { |
543 | { |
| 554 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
544 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 555 | uint32_t errorstate = SDMMC_ERROR_NONE; |
545 | uint32_t errorstate; |
| 556 | 546 | ||
| 557 | /* Set Block Size for Card */ |
547 | /* Set Block Size for Card */ |
| 558 | sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; |
548 | sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; |
| 559 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK; |
549 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK; |
| 560 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
550 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 561 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
551 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 562 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
552 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 563 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
553 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 564 | 554 | ||
| 565 | /* Check for error conditions */ |
555 | /* Check for error conditions */ |
| 566 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT); |
556 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT); |
| 567 | 557 | ||
| 568 | return errorstate; |
558 | return errorstate; |
| Line 574... | Line 564... | ||
| 574 | * @retval HAL status |
564 | * @retval HAL status |
| 575 | */ |
565 | */ |
| 576 | uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd) |
566 | uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd) |
| 577 | { |
567 | { |
| 578 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
568 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 579 | uint32_t errorstate = SDMMC_ERROR_NONE; |
569 | uint32_t errorstate; |
| 580 | 570 | ||
| 581 | /* Set Block Size for Card */ |
571 | /* Set Block Size for Card */ |
| 582 | sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; |
572 | sdmmc_cmdinit.Argument = (uint32_t)ReadAdd; |
| 583 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK; |
573 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK; |
| 584 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
574 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 585 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
575 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 586 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
576 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 587 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
577 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 588 | 578 | ||
| 589 | /* Check for error conditions */ |
579 | /* Check for error conditions */ |
| 590 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT); |
580 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT); |
| 591 | 581 | ||
| 592 | return errorstate; |
582 | return errorstate; |
| Line 598... | Line 588... | ||
| 598 | * @retval HAL status |
588 | * @retval HAL status |
| 599 | */ |
589 | */ |
| 600 | uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd) |
590 | uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd) |
| 601 | { |
591 | { |
| 602 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
592 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 603 | uint32_t errorstate = SDMMC_ERROR_NONE; |
593 | uint32_t errorstate; |
| 604 | 594 | ||
| 605 | /* Set Block Size for Card */ |
595 | /* Set Block Size for Card */ |
| 606 | sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; |
596 | sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; |
| 607 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK; |
597 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK; |
| 608 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
598 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 609 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
599 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 610 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
600 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 611 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
601 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 612 | 602 | ||
| 613 | /* Check for error conditions */ |
603 | /* Check for error conditions */ |
| 614 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT); |
604 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT); |
| 615 | 605 | ||
| 616 | return errorstate; |
606 | return errorstate; |
| Line 622... | Line 612... | ||
| 622 | * @retval HAL status |
612 | * @retval HAL status |
| 623 | */ |
613 | */ |
| 624 | uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd) |
614 | uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd) |
| 625 | { |
615 | { |
| 626 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
616 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 627 | uint32_t errorstate = SDMMC_ERROR_NONE; |
617 | uint32_t errorstate; |
| 628 | 618 | ||
| 629 | /* Set Block Size for Card */ |
619 | /* Set Block Size for Card */ |
| 630 | sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; |
620 | sdmmc_cmdinit.Argument = (uint32_t)WriteAdd; |
| 631 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK; |
621 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK; |
| 632 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
622 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 633 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
623 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 634 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
624 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 635 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
625 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 636 | 626 | ||
| 637 | /* Check for error conditions */ |
627 | /* Check for error conditions */ |
| 638 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT); |
628 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT); |
| 639 | 629 | ||
| 640 | return errorstate; |
630 | return errorstate; |
| Line 646... | Line 636... | ||
| 646 | * @retval HAL status |
636 | * @retval HAL status |
| 647 | */ |
637 | */ |
| 648 | uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd) |
638 | uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd) |
| 649 | { |
639 | { |
| 650 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
640 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 651 | uint32_t errorstate = SDMMC_ERROR_NONE; |
641 | uint32_t errorstate; |
| 652 | 642 | ||
| 653 | /* Set Block Size for Card */ |
643 | /* Set Block Size for Card */ |
| 654 | sdmmc_cmdinit.Argument = (uint32_t)StartAdd; |
644 | sdmmc_cmdinit.Argument = (uint32_t)StartAdd; |
| 655 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START; |
645 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START; |
| 656 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
646 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 657 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
647 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 658 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
648 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 659 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
649 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 660 | 650 | ||
| 661 | /* Check for error conditions */ |
651 | /* Check for error conditions */ |
| 662 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT); |
652 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT); |
| 663 | 653 | ||
| 664 | return errorstate; |
654 | return errorstate; |
| Line 670... | Line 660... | ||
| 670 | * @retval HAL status |
660 | * @retval HAL status |
| 671 | */ |
661 | */ |
| 672 | uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd) |
662 | uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd) |
| 673 | { |
663 | { |
| 674 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
664 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 675 | uint32_t errorstate = SDMMC_ERROR_NONE; |
665 | uint32_t errorstate; |
| 676 | 666 | ||
| 677 | /* Set Block Size for Card */ |
667 | /* Set Block Size for Card */ |
| 678 | sdmmc_cmdinit.Argument = (uint32_t)EndAdd; |
668 | sdmmc_cmdinit.Argument = (uint32_t)EndAdd; |
| 679 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END; |
669 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END; |
| 680 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
670 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 681 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
671 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 682 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
672 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 683 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
673 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 684 | 674 | ||
| 685 | /* Check for error conditions */ |
675 | /* Check for error conditions */ |
| 686 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT); |
676 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT); |
| 687 | 677 | ||
| 688 | return errorstate; |
678 | return errorstate; |
| Line 694... | Line 684... | ||
| 694 | * @retval HAL status |
684 | * @retval HAL status |
| 695 | */ |
685 | */ |
| 696 | uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd) |
686 | uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd) |
| 697 | { |
687 | { |
| 698 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
688 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 699 | uint32_t errorstate = SDMMC_ERROR_NONE; |
689 | uint32_t errorstate; |
| 700 | 690 | ||
| 701 | /* Set Block Size for Card */ |
691 | /* Set Block Size for Card */ |
| 702 | sdmmc_cmdinit.Argument = (uint32_t)StartAdd; |
692 | sdmmc_cmdinit.Argument = (uint32_t)StartAdd; |
| 703 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START; |
693 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START; |
| 704 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
694 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 705 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
695 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 706 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
696 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 707 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
697 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 708 | 698 | ||
| 709 | /* Check for error conditions */ |
699 | /* Check for error conditions */ |
| 710 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT); |
700 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT); |
| 711 | 701 | ||
| 712 | return errorstate; |
702 | return errorstate; |
| Line 718... | Line 708... | ||
| 718 | * @retval HAL status |
708 | * @retval HAL status |
| 719 | */ |
709 | */ |
| 720 | uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd) |
710 | uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd) |
| 721 | { |
711 | { |
| 722 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
712 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 723 | uint32_t errorstate = SDMMC_ERROR_NONE; |
713 | uint32_t errorstate; |
| 724 | 714 | ||
| 725 | /* Set Block Size for Card */ |
715 | /* Set Block Size for Card */ |
| 726 | sdmmc_cmdinit.Argument = (uint32_t)EndAdd; |
716 | sdmmc_cmdinit.Argument = (uint32_t)EndAdd; |
| 727 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END; |
717 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END; |
| 728 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
718 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 729 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
719 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 730 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
720 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 731 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
721 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 732 | 722 | ||
| 733 | /* Check for error conditions */ |
723 | /* Check for error conditions */ |
| 734 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT); |
724 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT); |
| 735 | 725 | ||
| 736 | return errorstate; |
726 | return errorstate; |
| Line 742... | Line 732... | ||
| 742 | * @retval HAL status |
732 | * @retval HAL status |
| 743 | */ |
733 | */ |
| 744 | uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx) |
734 | uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx) |
| 745 | { |
735 | { |
| 746 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
736 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 747 | uint32_t errorstate = SDMMC_ERROR_NONE; |
737 | uint32_t errorstate; |
| 748 | 738 | ||
| 749 | /* Set Block Size for Card */ |
739 | /* Set Block Size for Card */ |
| 750 | sdmmc_cmdinit.Argument = 0U; |
740 | sdmmc_cmdinit.Argument = 0U; |
| 751 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE; |
741 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE; |
| 752 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
742 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 753 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
743 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 754 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
744 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 755 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
745 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 756 | 746 | ||
| 757 | /* Check for error conditions */ |
747 | /* Check for error conditions */ |
| 758 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT); |
748 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT); |
| 759 | 749 | ||
| 760 | return errorstate; |
750 | return errorstate; |
| Line 766... | Line 756... | ||
| 766 | * @retval HAL status |
756 | * @retval HAL status |
| 767 | */ |
757 | */ |
| 768 | uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx) |
758 | uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx) |
| 769 | { |
759 | { |
| 770 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
760 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 771 | uint32_t errorstate = SDMMC_ERROR_NONE; |
761 | uint32_t errorstate; |
| 772 | 762 | ||
| 773 | /* Send CMD12 STOP_TRANSMISSION */ |
763 | /* Send CMD12 STOP_TRANSMISSION */ |
| 774 | sdmmc_cmdinit.Argument = 0U; |
764 | sdmmc_cmdinit.Argument = 0U; |
| 775 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION; |
765 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION; |
| 776 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
766 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 777 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
767 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 778 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
768 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 779 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
769 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 780 | 770 | ||
| 781 | /* Check for error conditions */ |
771 | /* Check for error conditions */ |
| 782 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, 100000000U); |
772 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT); |
| 783 | 773 | ||
| 784 | return errorstate; |
774 | return errorstate; |
| 785 | } |
775 | } |
| 786 | 776 | ||
| 787 | /** |
777 | /** |
| Line 791... | Line 781... | ||
| 791 | * @retval HAL status |
781 | * @retval HAL status |
| 792 | */ |
782 | */ |
| 793 | uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr) |
783 | uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr) |
| 794 | { |
784 | { |
| 795 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
785 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 796 | uint32_t errorstate = SDMMC_ERROR_NONE; |
786 | uint32_t errorstate; |
| 797 | 787 | ||
| 798 | /* Send CMD7 SDMMC_SEL_DESEL_CARD */ |
788 | /* Send CMD7 SDMMC_SEL_DESEL_CARD */ |
| 799 | sdmmc_cmdinit.Argument = (uint32_t)Addr; |
789 | sdmmc_cmdinit.Argument = (uint32_t)Addr; |
| 800 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD; |
790 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD; |
| 801 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
791 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 802 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
792 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 803 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
793 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 804 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
794 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 805 | 795 | ||
| 806 | /* Check for error conditions */ |
796 | /* Check for error conditions */ |
| 807 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT); |
797 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT); |
| 808 | 798 | ||
| 809 | return errorstate; |
799 | return errorstate; |
| Line 815... | Line 805... | ||
| 815 | * @retval HAL status |
805 | * @retval HAL status |
| 816 | */ |
806 | */ |
| 817 | uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx) |
807 | uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx) |
| 818 | { |
808 | { |
| 819 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
809 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 820 | uint32_t errorstate = SDMMC_ERROR_NONE; |
810 | uint32_t errorstate; |
| 821 | 811 | ||
| 822 | sdmmc_cmdinit.Argument = 0U; |
812 | sdmmc_cmdinit.Argument = 0U; |
| 823 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE; |
813 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE; |
| 824 | sdmmc_cmdinit.Response = SDIO_RESPONSE_NO; |
814 | sdmmc_cmdinit.Response = SDIO_RESPONSE_NO; |
| 825 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
815 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 826 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
816 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 827 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
817 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 828 | 818 | ||
| 829 | /* Check for error conditions */ |
819 | /* Check for error conditions */ |
| 830 | errorstate = SDMMC_GetCmdError(SDIOx); |
820 | errorstate = SDMMC_GetCmdError(SDIOx); |
| 831 | 821 | ||
| 832 | return errorstate; |
822 | return errorstate; |
| Line 838... | Line 828... | ||
| 838 | * @retval HAL status |
828 | * @retval HAL status |
| 839 | */ |
829 | */ |
| 840 | uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx) |
830 | uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx) |
| 841 | { |
831 | { |
| 842 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
832 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 843 | uint32_t errorstate = SDMMC_ERROR_NONE; |
833 | uint32_t errorstate; |
| 844 | 834 | ||
| 845 | /* Send CMD8 to verify SD card interface operating condition */ |
835 | /* Send CMD8 to verify SD card interface operating condition */ |
| 846 | /* Argument: - [31:12]: Reserved (shall be set to '0') |
836 | /* Argument: - [31:12]: Reserved (shall be set to '0') |
| 847 | - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) |
837 | - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) |
| 848 | - [7:0]: Check Pattern (recommended 0xAA) */ |
838 | - [7:0]: Check Pattern (recommended 0xAA) */ |
| Line 850... | Line 840... | ||
| 850 | sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN; |
840 | sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN; |
| 851 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD; |
841 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD; |
| 852 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
842 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 853 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
843 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 854 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
844 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 855 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
845 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 856 | 846 | ||
| 857 | /* Check for error conditions */ |
847 | /* Check for error conditions */ |
| 858 | errorstate = SDMMC_GetCmdResp7(SDIOx); |
848 | errorstate = SDMMC_GetCmdResp7(SDIOx); |
| 859 | 849 | ||
| 860 | return errorstate; |
850 | return errorstate; |
| Line 863... | Line 853... | ||
| 863 | /** |
853 | /** |
| 864 | * @brief Send the Application command to verify that that the next command |
854 | * @brief Send the Application command to verify that that the next command |
| 865 | * is an application specific com-mand rather than a standard command |
855 | * is an application specific com-mand rather than a standard command |
| 866 | * and check the response. |
856 | * and check the response. |
| 867 | * @param SDIOx: Pointer to SDIO register base |
857 | * @param SDIOx: Pointer to SDIO register base |
| - | 858 | * @param Argument: Command Argument |
|
| 868 | * @retval HAL status |
859 | * @retval HAL status |
| 869 | */ |
860 | */ |
| 870 | uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument) |
861 | uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument) |
| 871 | { |
862 | { |
| 872 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
863 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 873 | uint32_t errorstate = SDMMC_ERROR_NONE; |
864 | uint32_t errorstate; |
| 874 | 865 | ||
| 875 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
866 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
| 876 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD; |
867 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD; |
| 877 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
868 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 878 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
869 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 879 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
870 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 880 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
871 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 881 | 872 | ||
| 882 | /* Check for error conditions */ |
873 | /* Check for error conditions */ |
| 883 | /* If there is a HAL_ERROR, it is a MMC card, else |
874 | /* If there is a HAL_ERROR, it is a MMC card, else |
| 884 | it is a SD card: SD card 2.0 (voltage range mismatch) |
875 | it is a SD card: SD card 2.0 (voltage range mismatch) |
| 885 | or SD card 1.x */ |
876 | or SD card 1.x */ |
| Line 890... | Line 881... | ||
| 890 | 881 | ||
| 891 | /** |
882 | /** |
| 892 | * @brief Send the command asking the accessed card to send its operating |
883 | * @brief Send the command asking the accessed card to send its operating |
| 893 | * condition register (OCR) |
884 | * condition register (OCR) |
| 894 | * @param SDIOx: Pointer to SDIO register base |
885 | * @param SDIOx: Pointer to SDIO register base |
| - | 886 | * @param Argument: Command Argument |
|
| 895 | * @retval HAL status |
887 | * @retval HAL status |
| 896 | */ |
888 | */ |
| 897 | uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType) |
889 | uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t Argument) |
| 898 | { |
890 | { |
| 899 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
891 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 900 | uint32_t errorstate = SDMMC_ERROR_NONE; |
892 | uint32_t errorstate; |
| 901 | 893 | ||
| 902 | sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | SdType; |
894 | sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument; |
| 903 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND; |
895 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND; |
| 904 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
896 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 905 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
897 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 906 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
898 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 907 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
899 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 908 | 900 | ||
| 909 | /* Check for error conditions */ |
901 | /* Check for error conditions */ |
| 910 | errorstate = SDMMC_GetCmdResp3(SDIOx); |
902 | errorstate = SDMMC_GetCmdResp3(SDIOx); |
| 911 | 903 | ||
| 912 | return errorstate; |
904 | return errorstate; |
| 913 | } |
905 | } |
| 914 | 906 | ||
| 915 | /** |
907 | /** |
| 916 | * @brief Send the Bus Width command and check the response. |
908 | * @brief Send the Bus Width command and check the response. |
| 917 | * @param SDIOx: Pointer to SDIO register base |
909 | * @param SDIOx: Pointer to SDIO register base |
| - | 910 | * @param BusWidth: BusWidth |
|
| 918 | * @retval HAL status |
911 | * @retval HAL status |
| 919 | */ |
912 | */ |
| 920 | uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth) |
913 | uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth) |
| 921 | { |
914 | { |
| 922 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
915 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 923 | uint32_t errorstate = SDMMC_ERROR_NONE; |
916 | uint32_t errorstate; |
| 924 | 917 | ||
| 925 | sdmmc_cmdinit.Argument = (uint32_t)BusWidth; |
918 | sdmmc_cmdinit.Argument = (uint32_t)BusWidth; |
| 926 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH; |
919 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH; |
| 927 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
920 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 928 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
921 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 929 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
922 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 930 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
923 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 931 | 924 | ||
| 932 | /* Check for error conditions */ |
925 | /* Check for error conditions */ |
| 933 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT); |
926 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT); |
| 934 | 927 | ||
| 935 | return errorstate; |
928 | return errorstate; |
| 936 | } |
929 | } |
| 937 | 930 | ||
| 938 | /** |
931 | /** |
| 939 | * @brief Send the Send SCR command and check the response. |
932 | * @brief Send the Send SCR command and check the response. |
| 940 | * @param SDIOx: Pointer to SDMMC register base |
933 | * @param SDIOx: Pointer to SDIO register base |
| 941 | * @retval HAL status |
934 | * @retval HAL status |
| 942 | */ |
935 | */ |
| 943 | uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx) |
936 | uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx) |
| 944 | { |
937 | { |
| 945 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
938 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 946 | uint32_t errorstate = SDMMC_ERROR_NONE; |
939 | uint32_t errorstate; |
| 947 | 940 | ||
| 948 | /* Send CMD51 SD_APP_SEND_SCR */ |
941 | /* Send CMD51 SD_APP_SEND_SCR */ |
| 949 | sdmmc_cmdinit.Argument = 0U; |
942 | sdmmc_cmdinit.Argument = 0U; |
| 950 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR; |
943 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR; |
| 951 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
944 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 952 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
945 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 953 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
946 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 954 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
947 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 955 | 948 | ||
| 956 | /* Check for error conditions */ |
949 | /* Check for error conditions */ |
| 957 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT); |
950 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT); |
| 958 | 951 | ||
| 959 | return errorstate; |
952 | return errorstate; |
| Line 965... | Line 958... | ||
| 965 | * @retval HAL status |
958 | * @retval HAL status |
| 966 | */ |
959 | */ |
| 967 | uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx) |
960 | uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx) |
| 968 | { |
961 | { |
| 969 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
962 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 970 | uint32_t errorstate = SDMMC_ERROR_NONE; |
963 | uint32_t errorstate; |
| 971 | 964 | ||
| 972 | /* Send CMD2 ALL_SEND_CID */ |
965 | /* Send CMD2 ALL_SEND_CID */ |
| 973 | sdmmc_cmdinit.Argument = 0U; |
966 | sdmmc_cmdinit.Argument = 0U; |
| 974 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID; |
967 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID; |
| 975 | sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG; |
968 | sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG; |
| 976 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
969 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 977 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
970 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 978 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
971 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 979 | 972 | ||
| 980 | /* Check for error conditions */ |
973 | /* Check for error conditions */ |
| 981 | errorstate = SDMMC_GetCmdResp2(SDIOx); |
974 | errorstate = SDMMC_GetCmdResp2(SDIOx); |
| 982 | 975 | ||
| 983 | return errorstate; |
976 | return errorstate; |
| 984 | } |
977 | } |
| 985 | 978 | ||
| 986 | /** |
979 | /** |
| 987 | * @brief Send the Send CSD command and check the response. |
980 | * @brief Send the Send CSD command and check the response. |
| 988 | * @param SDIOx: Pointer to SDIO register base |
981 | * @param SDIOx: Pointer to SDIO register base |
| - | 982 | * @param Argument: Command Argument |
|
| 989 | * @retval HAL status |
983 | * @retval HAL status |
| 990 | */ |
984 | */ |
| 991 | uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument) |
985 | uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument) |
| 992 | { |
986 | { |
| 993 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
987 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 994 | uint32_t errorstate = SDMMC_ERROR_NONE; |
988 | uint32_t errorstate; |
| 995 | 989 | ||
| 996 | /* Send CMD9 SEND_CSD */ |
990 | /* Send CMD9 SEND_CSD */ |
| 997 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
991 | sdmmc_cmdinit.Argument = Argument; |
| 998 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD; |
992 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD; |
| 999 | sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG; |
993 | sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG; |
| 1000 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
994 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 1001 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
995 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 1002 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
996 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 1003 | 997 | ||
| 1004 | /* Check for error conditions */ |
998 | /* Check for error conditions */ |
| 1005 | errorstate = SDMMC_GetCmdResp2(SDIOx); |
999 | errorstate = SDMMC_GetCmdResp2(SDIOx); |
| 1006 | 1000 | ||
| 1007 | return errorstate; |
1001 | return errorstate; |
| 1008 | } |
1002 | } |
| 1009 | 1003 | ||
| 1010 | /** |
1004 | /** |
| 1011 | * @brief Send the Send CSD command and check the response. |
1005 | * @brief Send the Send CSD command and check the response. |
| 1012 | * @param SDIOx: Pointer to SDIO register base |
1006 | * @param SDIOx: Pointer to SDIO register base |
| - | 1007 | * @param pRCA: Card RCA |
|
| 1013 | * @retval HAL status |
1008 | * @retval HAL status |
| 1014 | */ |
1009 | */ |
| 1015 | uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA) |
1010 | uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA) |
| 1016 | { |
1011 | { |
| 1017 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
1012 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 1018 | uint32_t errorstate = SDMMC_ERROR_NONE; |
1013 | uint32_t errorstate; |
| 1019 | 1014 | ||
| 1020 | /* Send CMD3 SD_CMD_SET_REL_ADDR */ |
1015 | /* Send CMD3 SD_CMD_SET_REL_ADDR */ |
| 1021 | sdmmc_cmdinit.Argument = 0U; |
1016 | sdmmc_cmdinit.Argument = 0U; |
| 1022 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR; |
1017 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR; |
| 1023 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
1018 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 1024 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
1019 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 1025 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
1020 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 1026 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
1021 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 1027 | 1022 | ||
| 1028 | /* Check for error conditions */ |
1023 | /* Check for error conditions */ |
| 1029 | errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA); |
1024 | errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA); |
| 1030 | 1025 | ||
| 1031 | return errorstate; |
1026 | return errorstate; |
| 1032 | } |
1027 | } |
| 1033 | 1028 | ||
| 1034 | /** |
1029 | /** |
| 1035 | * @brief Send the Status command and check the response. |
1030 | * @brief Send the Status command and check the response. |
| 1036 | * @param SDIOx: Pointer to SDIO register base |
1031 | * @param SDIOx: Pointer to SDIO register base |
| - | 1032 | * @param Argument: Command Argument |
|
| 1037 | * @retval HAL status |
1033 | * @retval HAL status |
| 1038 | */ |
1034 | */ |
| 1039 | uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument) |
1035 | uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument) |
| 1040 | { |
1036 | { |
| 1041 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
1037 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 1042 | uint32_t errorstate = SDMMC_ERROR_NONE; |
1038 | uint32_t errorstate; |
| 1043 | 1039 | ||
| 1044 | sdmmc_cmdinit.Argument = (uint32_t)Argument; |
1040 | sdmmc_cmdinit.Argument = Argument; |
| 1045 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS; |
1041 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS; |
| 1046 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
1042 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 1047 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
1043 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 1048 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
1044 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 1049 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
1045 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 1050 | 1046 | ||
| 1051 | /* Check for error conditions */ |
1047 | /* Check for error conditions */ |
| 1052 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT); |
1048 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT); |
| 1053 | 1049 | ||
| 1054 | return errorstate; |
1050 | return errorstate; |
| Line 1060... | Line 1056... | ||
| 1060 | * @retval HAL status |
1056 | * @retval HAL status |
| 1061 | */ |
1057 | */ |
| 1062 | uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx) |
1058 | uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx) |
| 1063 | { |
1059 | { |
| 1064 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
1060 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 1065 | uint32_t errorstate = SDMMC_ERROR_NONE; |
1061 | uint32_t errorstate; |
| 1066 | 1062 | ||
| 1067 | sdmmc_cmdinit.Argument = 0U; |
1063 | sdmmc_cmdinit.Argument = 0U; |
| 1068 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS; |
1064 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS; |
| 1069 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
1065 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 1070 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
1066 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 1071 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
1067 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 1072 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
1068 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 1073 | 1069 | ||
| 1074 | /* Check for error conditions */ |
1070 | /* Check for error conditions */ |
| 1075 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT); |
1071 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT); |
| 1076 | 1072 | ||
| 1077 | return errorstate; |
1073 | return errorstate; |
| Line 1085... | Line 1081... | ||
| 1085 | * @retval HAL status |
1081 | * @retval HAL status |
| 1086 | */ |
1082 | */ |
| 1087 | uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument) |
1083 | uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument) |
| 1088 | { |
1084 | { |
| 1089 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
1085 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 1090 | uint32_t errorstate = SDMMC_ERROR_NONE; |
1086 | uint32_t errorstate; |
| 1091 | 1087 | ||
| 1092 | sdmmc_cmdinit.Argument = Argument; |
1088 | sdmmc_cmdinit.Argument = Argument; |
| 1093 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND; |
1089 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND; |
| 1094 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
1090 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 1095 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
1091 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 1096 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
1092 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 1097 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
1093 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 1098 | 1094 | ||
| 1099 | /* Check for error conditions */ |
1095 | /* Check for error conditions */ |
| 1100 | errorstate = SDMMC_GetCmdResp3(SDIOx); |
1096 | errorstate = SDMMC_GetCmdResp3(SDIOx); |
| 1101 | 1097 | ||
| 1102 | return errorstate; |
1098 | return errorstate; |
| Line 1109... | Line 1105... | ||
| 1109 | * @retval HAL status |
1105 | * @retval HAL status |
| 1110 | */ |
1106 | */ |
| 1111 | uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument) |
1107 | uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument) |
| 1112 | { |
1108 | { |
| 1113 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
1109 | SDIO_CmdInitTypeDef sdmmc_cmdinit; |
| 1114 | uint32_t errorstate = SDMMC_ERROR_NONE; |
1110 | uint32_t errorstate; |
| 1115 | 1111 | ||
| - | 1112 | /* Send CMD6 to activate SDR50 Mode and Power Limit 1.44W */ |
|
| - | 1113 | /* CMD Response: R1 */ |
|
| 1116 | sdmmc_cmdinit.Argument = Argument; |
1114 | sdmmc_cmdinit.Argument = Argument; /* SDMMC_SDR25_SWITCH_PATTERN */ |
| 1117 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH; |
1115 | sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH; |
| 1118 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
1116 | sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT; |
| 1119 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
1117 | sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO; |
| 1120 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
1118 | sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE; |
| 1121 | SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
1119 | (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit); |
| 1122 | 1120 | ||
| 1123 | /* Check for error conditions */ |
1121 | /* Check for error conditions */ |
| 1124 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT); |
1122 | errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT); |
| 1125 | 1123 | ||
| 1126 | return errorstate; |
1124 | return errorstate; |
| Line 1141... | Line 1139... | ||
| 1141 | * @retval SD Card error state |
1139 | * @retval SD Card error state |
| 1142 | */ |
1140 | */ |
| 1143 | static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx) |
1141 | static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx) |
| 1144 | { |
1142 | { |
| 1145 | /* 8 is the number of required instructions cycles for the below loop statement. |
1143 | /* 8 is the number of required instructions cycles for the below loop statement. |
| 1146 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
1144 | The SDIO_CMDTIMEOUT is expressed in ms */ |
| 1147 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
1145 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
| 1148 | 1146 | ||
| 1149 | do |
1147 | do |
| 1150 | { |
1148 | { |
| 1151 | if (count-- == 0U) |
1149 | if (count-- == 0U) |
| Line 1154... | Line 1152... | ||
| 1154 | } |
1152 | } |
| 1155 | 1153 | ||
| 1156 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT)); |
1154 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT)); |
| 1157 | 1155 | ||
| 1158 | /* Clear all the static flags */ |
1156 | /* Clear all the static flags */ |
| 1159 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
1157 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS); |
| 1160 | 1158 | ||
| 1161 | return SDMMC_ERROR_NONE; |
1159 | return SDMMC_ERROR_NONE; |
| 1162 | } |
1160 | } |
| 1163 | 1161 | ||
| 1164 | /** |
1162 | /** |
| Line 1168... | Line 1166... | ||
| 1168 | * @retval SD Card error state |
1166 | * @retval SD Card error state |
| 1169 | */ |
1167 | */ |
| 1170 | static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout) |
1168 | static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout) |
| 1171 | { |
1169 | { |
| 1172 | uint32_t response_r1; |
1170 | uint32_t response_r1; |
| - | 1171 | uint32_t sta_reg; |
|
| 1173 | 1172 | ||
| 1174 | /* 8 is the number of required instructions cycles for the below loop statement. |
1173 | /* 8 is the number of required instructions cycles for the below loop statement. |
| 1175 | The Timeout is expressed in ms */ |
1174 | The Timeout is expressed in ms */ |
| 1176 | register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U); |
1175 | register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U); |
| 1177 | 1176 | ||
| Line 1179... | Line 1178... | ||
| 1179 | { |
1178 | { |
| 1180 | if (count-- == 0U) |
1179 | if (count-- == 0U) |
| 1181 | { |
1180 | { |
| 1182 | return SDMMC_ERROR_TIMEOUT; |
1181 | return SDMMC_ERROR_TIMEOUT; |
| 1183 | } |
1182 | } |
| - | 1183 | sta_reg = SDIOx->STA; |
|
| - | 1184 | }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) || |
|
| - | 1185 | ((sta_reg & SDIO_FLAG_CMDACT) != 0U )); |
|
| 1184 | 1186 | ||
| 1185 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
- | |
| 1186 | - | ||
| 1187 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
1187 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
| 1188 | { |
1188 | { |
| 1189 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
1189 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
| 1190 | 1190 | ||
| 1191 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
1191 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
| Line 1194... | Line 1194... | ||
| 1194 | { |
1194 | { |
| 1195 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
1195 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
| 1196 | 1196 | ||
| 1197 | return SDMMC_ERROR_CMD_CRC_FAIL; |
1197 | return SDMMC_ERROR_CMD_CRC_FAIL; |
| 1198 | } |
1198 | } |
| - | 1199 | else |
|
| - | 1200 | { |
|
| - | 1201 | /* Nothing to do */ |
|
| - | 1202 | } |
|
| - | 1203 | ||
| - | 1204 | /* Clear all the static flags */ |
|
| - | 1205 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS); |
|
| 1199 | 1206 | ||
| 1200 | /* Check response received is of desired command */ |
1207 | /* Check response received is of desired command */ |
| 1201 | if(SDIO_GetCommandResponse(SDIOx) != SD_CMD) |
1208 | if(SDIO_GetCommandResponse(SDIOx) != SD_CMD) |
| 1202 | { |
1209 | { |
| 1203 | return SDMMC_ERROR_CMD_CRC_FAIL; |
1210 | return SDMMC_ERROR_CMD_CRC_FAIL; |
| 1204 | } |
1211 | } |
| 1205 | 1212 | ||
| 1206 | /* Clear all the static flags */ |
- | |
| 1207 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
- | |
| 1208 | - | ||
| 1209 | /* We have received response, retrieve it for analysis */ |
1213 | /* We have received response, retrieve it for analysis */ |
| 1210 | response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1); |
1214 | response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1); |
| 1211 | 1215 | ||
| 1212 | if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO) |
1216 | if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO) |
| 1213 | { |
1217 | { |
| Line 1296... | Line 1300... | ||
| 1296 | * @param hsd: SD handle |
1300 | * @param hsd: SD handle |
| 1297 | * @retval SD Card error state |
1301 | * @retval SD Card error state |
| 1298 | */ |
1302 | */ |
| 1299 | static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx) |
1303 | static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx) |
| 1300 | { |
1304 | { |
| - | 1305 | uint32_t sta_reg; |
|
| 1301 | /* 8 is the number of required instructions cycles for the below loop statement. |
1306 | /* 8 is the number of required instructions cycles for the below loop statement. |
| 1302 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
1307 | The SDIO_CMDTIMEOUT is expressed in ms */ |
| 1303 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
1308 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
| 1304 | 1309 | ||
| 1305 | do |
1310 | do |
| 1306 | { |
1311 | { |
| 1307 | if (count-- == 0U) |
1312 | if (count-- == 0U) |
| 1308 | { |
1313 | { |
| 1309 | return SDMMC_ERROR_TIMEOUT; |
1314 | return SDMMC_ERROR_TIMEOUT; |
| 1310 | } |
1315 | } |
| 1311 | 1316 | sta_reg = SDIOx->STA; |
|
| 1312 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
1317 | }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) || |
| - | 1318 | ((sta_reg & SDIO_FLAG_CMDACT) != 0U )); |
|
| 1313 | 1319 | ||
| 1314 | if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
1320 | if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
| 1315 | { |
1321 | { |
| 1316 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
1322 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
| 1317 | 1323 | ||
| Line 1325... | Line 1331... | ||
| 1325 | } |
1331 | } |
| 1326 | else |
1332 | else |
| 1327 | { |
1333 | { |
| 1328 | /* No error flag set */ |
1334 | /* No error flag set */ |
| 1329 | /* Clear all the static flags */ |
1335 | /* Clear all the static flags */ |
| 1330 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
1336 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS); |
| 1331 | } |
1337 | } |
| 1332 | 1338 | ||
| 1333 | return SDMMC_ERROR_NONE; |
1339 | return SDMMC_ERROR_NONE; |
| 1334 | } |
1340 | } |
| 1335 | 1341 | ||
| Line 1338... | Line 1344... | ||
| 1338 | * @param hsd: SD handle |
1344 | * @param hsd: SD handle |
| 1339 | * @retval SD Card error state |
1345 | * @retval SD Card error state |
| 1340 | */ |
1346 | */ |
| 1341 | static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx) |
1347 | static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx) |
| 1342 | { |
1348 | { |
| - | 1349 | uint32_t sta_reg; |
|
| 1343 | /* 8 is the number of required instructions cycles for the below loop statement. |
1350 | /* 8 is the number of required instructions cycles for the below loop statement. |
| 1344 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
1351 | The SDIO_CMDTIMEOUT is expressed in ms */ |
| 1345 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
1352 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
| 1346 | 1353 | ||
| 1347 | do |
1354 | do |
| 1348 | { |
1355 | { |
| 1349 | if (count-- == 0U) |
1356 | if (count-- == 0U) |
| 1350 | { |
1357 | { |
| 1351 | return SDMMC_ERROR_TIMEOUT; |
1358 | return SDMMC_ERROR_TIMEOUT; |
| 1352 | } |
1359 | } |
| - | 1360 | sta_reg = SDIOx->STA; |
|
| - | 1361 | }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) || |
|
| - | 1362 | ((sta_reg & SDIO_FLAG_CMDACT) != 0U )); |
|
| 1353 | 1363 | ||
| 1354 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
- | |
| 1355 | - | ||
| 1356 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
1364 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
| 1357 | { |
1365 | { |
| 1358 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
1366 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
| 1359 | 1367 | ||
| 1360 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
1368 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
| 1361 | } |
1369 | } |
| 1362 | else |
1370 | else |
| 1363 | - | ||
| 1364 | { |
1371 | { |
| 1365 | /* Clear all the static flags */ |
1372 | /* Clear all the static flags */ |
| 1366 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
1373 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS); |
| 1367 | } |
1374 | } |
| 1368 | 1375 | ||
| 1369 | return SDMMC_ERROR_NONE; |
1376 | return SDMMC_ERROR_NONE; |
| 1370 | } |
1377 | } |
| 1371 | 1378 | ||
| Line 1378... | Line 1385... | ||
| 1378 | * @retval SD Card error state |
1385 | * @retval SD Card error state |
| 1379 | */ |
1386 | */ |
| 1380 | static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA) |
1387 | static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA) |
| 1381 | { |
1388 | { |
| 1382 | uint32_t response_r1; |
1389 | uint32_t response_r1; |
| - | 1390 | uint32_t sta_reg; |
|
| 1383 | 1391 | ||
| 1384 | /* 8 is the number of required instructions cycles for the below loop statement. |
1392 | /* 8 is the number of required instructions cycles for the below loop statement. |
| 1385 | The SDMMC_CMDTIMEOUT is expressed in ms */ |
1393 | The SDIO_CMDTIMEOUT is expressed in ms */ |
| 1386 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
1394 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
| 1387 | 1395 | ||
| 1388 | do |
1396 | do |
| 1389 | { |
1397 | { |
| 1390 | if (count-- == 0U) |
1398 | if (count-- == 0U) |
| 1391 | { |
1399 | { |
| 1392 | return SDMMC_ERROR_TIMEOUT; |
1400 | return SDMMC_ERROR_TIMEOUT; |
| 1393 | } |
1401 | } |
| - | 1402 | sta_reg = SDIOx->STA; |
|
| - | 1403 | }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) || |
|
| - | 1404 | ((sta_reg & SDIO_FLAG_CMDACT) != 0U )); |
|
| 1394 | 1405 | ||
| 1395 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
- | |
| 1396 | - | ||
| 1397 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
1406 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
| 1398 | { |
1407 | { |
| 1399 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
1408 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
| 1400 | 1409 | ||
| 1401 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
1410 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
| Line 1404... | Line 1413... | ||
| 1404 | { |
1413 | { |
| 1405 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
1414 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
| 1406 | 1415 | ||
| 1407 | return SDMMC_ERROR_CMD_CRC_FAIL; |
1416 | return SDMMC_ERROR_CMD_CRC_FAIL; |
| 1408 | } |
1417 | } |
| - | 1418 | else |
|
| - | 1419 | { |
|
| - | 1420 | /* Nothing to do */ |
|
| - | 1421 | } |
|
| 1409 | 1422 | ||
| 1410 | /* Check response received is of desired command */ |
1423 | /* Check response received is of desired command */ |
| 1411 | if(SDIO_GetCommandResponse(SDIOx) != SD_CMD) |
1424 | if(SDIO_GetCommandResponse(SDIOx) != SD_CMD) |
| 1412 | { |
1425 | { |
| 1413 | return SDMMC_ERROR_CMD_CRC_FAIL; |
1426 | return SDMMC_ERROR_CMD_CRC_FAIL; |
| 1414 | } |
1427 | } |
| 1415 | 1428 | ||
| 1416 | /* Clear all the static flags */ |
1429 | /* Clear all the static flags */ |
| 1417 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS); |
1430 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS); |
| 1418 | 1431 | ||
| 1419 | /* We have received response, retrieve it. */ |
1432 | /* We have received response, retrieve it. */ |
| 1420 | response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1); |
1433 | response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1); |
| 1421 | 1434 | ||
| 1422 | if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO) |
1435 | if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO) |
| Line 1444... | Line 1457... | ||
| 1444 | * @param hsd: SD handle |
1457 | * @param hsd: SD handle |
| 1445 | * @retval SD Card error state |
1458 | * @retval SD Card error state |
| 1446 | */ |
1459 | */ |
| 1447 | static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx) |
1460 | static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx) |
| 1448 | { |
1461 | { |
| - | 1462 | uint32_t sta_reg; |
|
| 1449 | /* 8 is the number of required instructions cycles for the below loop statement. |
1463 | /* 8 is the number of required instructions cycles for the below loop statement. |
| 1450 | The SDIO_CMDTIMEOUT is expressed in ms */ |
1464 | The SDIO_CMDTIMEOUT is expressed in ms */ |
| 1451 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
1465 | register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U); |
| 1452 | 1466 | ||
| 1453 | do |
1467 | do |
| 1454 | { |
1468 | { |
| 1455 | if (count-- == 0U) |
1469 | if (count-- == 0U) |
| 1456 | { |
1470 | { |
| 1457 | return SDMMC_ERROR_TIMEOUT; |
1471 | return SDMMC_ERROR_TIMEOUT; |
| 1458 | } |
1472 | } |
| - | 1473 | sta_reg = SDIOx->STA; |
|
| - | 1474 | }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) || |
|
| - | 1475 | ((sta_reg & SDIO_FLAG_CMDACT) != 0U )); |
|
| 1459 | 1476 | ||
| 1460 | }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)); |
- | |
| 1461 | - | ||
| 1462 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
1477 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT)) |
| 1463 | { |
1478 | { |
| 1464 | /* Card is SD V2.0 compliant */ |
1479 | /* Card is SD V2.0 compliant */ |
| 1465 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND); |
1480 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT); |
| 1466 | 1481 | ||
| 1467 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
1482 | return SDMMC_ERROR_CMD_RSP_TIMEOUT; |
| 1468 | } |
1483 | } |
| - | 1484 | else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL)) |
|
| - | 1485 | { |
|
| - | 1486 | /* Card is SD V2.0 compliant */ |
|
| - | 1487 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL); |
|
| - | 1488 | ||
| - | 1489 | return SDMMC_ERROR_CMD_CRC_FAIL; |
|
| - | 1490 | } |
|
| - | 1491 | else |
|
| - | 1492 | { |
|
| - | 1493 | /* Nothing to do */ |
|
| - | 1494 | } |
|
| 1469 | 1495 | ||
| 1470 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND)) |
1496 | if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND)) |
| 1471 | { |
1497 | { |
| 1472 | /* Card is SD V2.0 compliant */ |
1498 | /* Card is SD V2.0 compliant */ |
| 1473 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND); |
1499 | __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND); |
| Line 1479... | Line 1505... | ||
| 1479 | 1505 | ||
| 1480 | /** |
1506 | /** |
| 1481 | * @} |
1507 | * @} |
| 1482 | */ |
1508 | */ |
| 1483 | 1509 | ||
| - | 1510 | #endif /* HAL_SD_MODULE_ENABLED || HAL_MMC_MODULE_ENABLED */ |
|
| 1484 | /** |
1511 | /** |
| 1485 | * @} |
1512 | * @} |
| 1486 | */ |
1513 | */ |
| 1487 | 1514 | ||
| 1488 | #endif /* STM32F103xE || STM32F103xG */ |
- | |
| 1489 | - | ||
| 1490 | #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */ |
- | |
| 1491 | - | ||
| 1492 | /** |
1515 | /** |
| 1493 | * @} |
1516 | * @} |
| 1494 | */ |
1517 | */ |
| 1495 | 1518 | ||
| 1496 | /** |
- | |
| 1497 | * @} |
1519 | #endif /* SDIO */ |
| 1498 | */ |
- | |
| 1499 | 1520 | ||
| 1500 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1521 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |