WebSVN – LedShow – Diff – /trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c

   * @author  MCD Application Team
   * @brief   RCC LL module driver.
   ******************************************************************************
   * @attention
+  *
-  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
-  * Redistribution and use in source and binary forms, with or without modification,
+  * This software component is licensed by ST under BSD 3-Clause license,
-  * are permitted provided that the following conditions are met:
+  * the "License"; You may not use this file except in compliance with the
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
+  * License. You may obtain a copy of the License at:
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
+  *                        opensource.org/licenses/BSD-3-Clause
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
   ******************************************************************************
   */
 #if defined(USE_FULL_LL_DRIVER)
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f1xx_ll_rcc.h"
 #ifdef  USE_FULL_ASSERT
-  #include "stm32_assert.h"
+#include "stm32_assert.h"
 #else
-  #define assert_param(expr) ((void)0U)
+#define assert_param(expr) ((void)0U)
 #endif /* USE_FULL_ASSERT */
 /** @addtogroup STM32F1xx_LL_Driver
   * @{
   */
 /**
   * @brief  Reset the RCC clock configuration to the default reset state.
   * @note   The default reset state of the clock configuration is given below:
   *         - HSI ON and used as system clock source
   *         - HSE PLL, PLL2 & PLL3 are OFF
   *         - AHB, APB1 and APB2 prescaler set to 1.
   *         - CSS, MCO OFF
   *         - All interrupts disabled
   * @note   This function doesn't modify the configuration of the
   *         - Peripheral clocks
+{
   /* Set HSION bit */
   LL_RCC_HSI_Enable();
   /* Wait for HSI READY bit */
-  while(LL_RCC_HSI_IsReady() != 1U)
+  while (LL_RCC_HSI_IsReady() != 1U)
   {}
   /* Configure HSI as system clock source */
   LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
   /* Reset PLLON bit */
   CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
   /* Wait for PLL READY bit to be reset */
-  while(LL_RCC_PLL_IsReady() != 0U)
+  while (LL_RCC_PLL_IsReady() != 0U)
   {}
   /* Reset CFGR register */
   LL_RCC_WriteReg(CFGR, 0x00000000U);
 /** @addtogroup RCC_LL_EF_Get_Freq
   * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses clocks
   *         and different peripheral clocks available on the device.
   * @note   If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
   * @note   If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
   * @note   If SYSCLK source is PLL, function returns values based on
   *         HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
   * @note   (**) HSI_VALUE is a defined constant but the real value may vary
   *              depending on the variations in voltage and temperature.
   * @note   (***) HSE_VALUE is a defined constant, user has to ensure that
   *               HSE_VALUE is same as the real frequency of the crystal used.
   *               Otherwise, this function may have wrong result.
   * @note   The result of this function could be incorrect when using fractional
   assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource));
   /* USBCLK clock frequency */
   switch (LL_RCC_GetUSBClockSource(USBxSource))
+  {
 #if defined(RCC_CFGR_USBPRE)
     case LL_RCC_USB_CLKSOURCE_PLL:        /* PLL clock used as USB clock source */
       if (LL_RCC_PLL_IsReady())
+      {
         usb_frequency = RCC_PLL_GetFreqDomain_SYS();
+      }
         usb_frequency = (RCC_PLL_GetFreqDomain_SYS() * 3U) / 2U;
+      }
       break;
 #endif /* RCC_CFGR_USBPRE */
 #if defined(RCC_CFGR_OTGFSPRE)
     /* USBCLK = PLLVCO/2
               = (2 x PLLCLK) / 2
               = PLLCLK */
     case LL_RCC_USB_CLKSOURCE_PLL_DIV_2:        /* PLL clock used as USB clock source */
       if (LL_RCC_PLL_IsReady())
+      {
         usb_frequency = RCC_PLL_GetFreqDomain_SYS();
+      }
       break;
     /* USBCLK = PLLVCO/3
               = (2 x PLLCLK) / 3 */
     case LL_RCC_USB_CLKSOURCE_PLL_DIV_3:        /* PLL clock divided by 3 used as USB clock source */
     default:
       if (LL_RCC_PLL_IsReady())
+      {

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c – Rev 2 → 9