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1 | /** |
1 | /** |
2 | ****************************************************************************** |
2 | ****************************************************************************** |
3 | * @file stm32f1xx_hal_rcc_ex.c |
3 | * @file stm32f1xx_hal_rcc_ex.c |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @version V1.0.1 |
5 | * @version V1.0.4 |
6 | * @date 31-July-2015 |
6 | * @date 29-April-2016 |
7 | * @brief Extended RCC HAL module driver. |
7 | * @brief Extended RCC HAL module driver. |
8 | * This file provides firmware functions to manage the following |
8 | * This file provides firmware functions to manage the following |
9 | * functionalities RCC extension peripheral: |
9 | * functionalities RCC extension peripheral: |
10 | * + Extended Peripheral Control functions |
10 | * + Extended Peripheral Control functions |
11 | * |
11 | * |
12 | ****************************************************************************** |
12 | ****************************************************************************** |
13 | * @attention |
13 | * @attention |
14 | * |
14 | * |
15 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
15 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
16 | * |
16 | * |
17 | * Redistribution and use in source and binary forms, with or without modification, |
17 | * Redistribution and use in source and binary forms, with or without modification, |
18 | * are permitted provided that the following conditions are met: |
18 | * are permitted provided that the following conditions are met: |
19 | * 1. Redistributions of source code must retain the above copyright notice, |
19 | * 1. Redistributions of source code must retain the above copyright notice, |
20 | * this list of conditions and the following disclaimer. |
20 | * this list of conditions and the following disclaimer. |
Line 90... | Line 90... | ||
90 | frequencies. |
90 | frequencies. |
91 | [..] |
91 | [..] |
92 | (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to |
92 | (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to |
93 | select the RTC clock source; in this case the Backup domain will be reset in |
93 | select the RTC clock source; in this case the Backup domain will be reset in |
94 | order to modify the RTC Clock source, as consequence RTC registers (including |
94 | order to modify the RTC Clock source, as consequence RTC registers (including |
95 | the backup registers) and RCC_BDCR register are set to their reset values. |
95 | the backup registers) are set to their reset values. |
96 | |
96 | |
97 | @endverbatim |
97 | @endverbatim |
98 | * @{ |
98 | * @{ |
99 | */ |
99 | */ |
100 | 100 | ||
Line 146... | Line 146... | ||
146 | { |
146 | { |
147 | return HAL_TIMEOUT; |
147 | return HAL_TIMEOUT; |
148 | } |
148 | } |
149 | } |
149 | } |
150 | 150 | ||
151 | /* Reset the Backup domain only if the RTC Clock source selection is modified */ |
151 | /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ |
- | 152 | temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); |
|
152 | if((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)) |
153 | if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) |
153 | { |
154 | { |
154 | /* Store the content of BDCR register before the reset of Backup Domain */ |
155 | /* Store the content of BDCR register before the reset of Backup Domain */ |
155 | temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); |
156 | temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); |
156 | /* RTC Clock selection can be changed only if the Backup Domain is reset */ |
157 | /* RTC Clock selection can be changed only if the Backup Domain is reset */ |
157 | __HAL_RCC_BACKUPRESET_FORCE(); |
158 | __HAL_RCC_BACKUPRESET_FORCE(); |
158 | __HAL_RCC_BACKUPRESET_RELEASE(); |
159 | __HAL_RCC_BACKUPRESET_RELEASE(); |
159 | /* Restore the Content of BDCR register */ |
160 | /* Restore the Content of BDCR register */ |
160 | RCC->BDCR = temp_reg; |
161 | RCC->BDCR = temp_reg; |
161 | 162 | ||
162 | /* Wait for LSERDY if LSE was enabled */ |
163 | /* Wait for LSERDY if LSE was enabled */ |
163 | if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSERDY)) |
164 | if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) |
164 | { |
165 | { |
165 | /* Get timeout */ |
166 | /* Get timeout */ |
166 | tickstart = HAL_GetTick(); |
167 | tickstart = HAL_GetTick(); |
167 | 168 | ||
168 | /* Wait till LSE is ready */ |
169 | /* Wait till LSE is ready */ |
Line 172... | Line 173... | ||
172 | { |
173 | { |
173 | return HAL_TIMEOUT; |
174 | return HAL_TIMEOUT; |
174 | } |
175 | } |
175 | } |
176 | } |
176 | } |
177 | } |
177 | __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); |
- | |
178 | } |
178 | } |
- | 179 | __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); |
|
179 | } |
180 | } |
180 | 181 | ||
181 | /*------------------------------ ADC clock Configuration ------------------*/ |
182 | /*------------------------------ ADC clock Configuration ------------------*/ |
182 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) |
183 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) |
183 | { |
184 | { |
Line 341... | Line 342... | ||
341 | /** |
342 | /** |
342 | * @brief Returns the peripheral clock frequency |
343 | * @brief Returns the peripheral clock frequency |
343 | * @note Returns 0 if peripheral clock is unknown |
344 | * @note Returns 0 if peripheral clock is unknown |
344 | * @param PeriphClk Peripheral clock identifier |
345 | * @param PeriphClk Peripheral clock identifier |
345 | * This parameter can be one of the following values: |
346 | * This parameter can be one of the following values: |
346 | * @arg RCC_PERIPHCLK_RTC RTC peripheral clock |
347 | * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock |
347 | * @arg RCC_PERIPHCLK_ADC ADC peripheral clock |
348 | * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock |
- | 349 | @if STM32F103xE |
|
- | 350 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 351 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 352 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 353 | @endif |
|
- | 354 | @if STM32F103xG |
|
- | 355 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 356 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 357 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 358 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 359 | @endif |
|
- | 360 | @if STM32F105xC |
|
- | 361 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 362 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 363 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 364 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 365 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 366 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 367 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 368 | * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock |
|
- | 369 | @endif |
|
- | 370 | @if STM32F107xC |
|
- | 371 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 372 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
- | 373 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
348 | * @arg RCC_PERIPHCLK_I2S2 I2S2 peripheral clock (STM32F103xE, STM32F103xG, STM32F105xC & STM32F107xC) |
374 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
- | 375 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
|
349 | * @arg RCC_PERIPHCLK_I2S3 I2S3 peripheral clock (STM32F103xE, STM32F103xG, STM32F105xC & STM32F107xC) |
376 | * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock |
- | 377 | * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock |
|
- | 378 | * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock |
|
- | 379 | @endif |
|
- | 380 | @if STM32F102xx |
|
- | 381 | * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock |
|
- | 382 | @endif |
|
- | 383 | @if STM32F103xx |
|
350 | * @arg RCC_PERIPHCLK_USB USB peripheral clock (STM32F102xx, STM32F103xx, STM32F105xC & STM32F107xC) |
384 | * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock |
- | 385 | @endif |
|
351 | * @retval Frequency in Hz (0: means that no available frequency for the peripheral) |
386 | * @retval Frequency in Hz (0: means that no available frequency for the peripheral) |
352 | */ |
387 | */ |
353 | uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) |
388 | uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) |
354 | { |
389 | { |
355 | #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ |
390 | #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ |