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/**

/**

  ******************************************************************************

  ******************************************************************************

  * @file    stm32f1xx_hal_nor.c

  * @file    stm32f1xx_hal_nor.c

  * @author  MCD Application Team

  * @author  MCD Application Team

  * @brief   NOR HAL module driver.

  * @brief   NOR HAL module driver.

  *          This file provides a generic firmware to drive NOR memories mounted

  *          This file provides a generic firmware to drive NOR memories mounted

  *          as external device.

  *          as external device.

  *

  *

  @verbatim

  ******************************************************************************

  ==============================================================================

  * @attention

                     ##### How to use this driver #####

  *

  ==============================================================================

  * Copyright (c) 2016 STMicroelectronics.

    [..]

  * All rights reserved.

      This driver is a generic layered driver which contains a set of APIs used to

  *

      control NOR flash memories. It uses the FSMC layer functions to interface

  * This software is licensed under terms that can be found in the LICENSE file

      with NOR devices. This driver is used as follows:

  * in the root directory of this software component.

  * If no LICENSE file comes with this software, it is provided AS-IS.

      (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()

  *

          with control and timing parameters for both normal and extended mode.

  ******************************************************************************

  @verbatim

      (+) Read NOR flash memory manufacturer code and device IDs using the function

  ==============================================================================

          HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef

                     ##### How to use this driver #####

          structure declared by the function caller.

  ==============================================================================

    [..]

      (+) Access NOR flash memory by read/write data unit operations using the functions

      This driver is a generic layered driver which contains a set of APIs used to

          HAL_NOR_Read(), HAL_NOR_Program().

      control NOR flash memories. It uses the FSMC layer functions to interface

      with NOR devices. This driver is used as follows:

      (+) Perform NOR flash erase block/chip operations using the functions

          HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().

      (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()

          with control and timing parameters for both normal and extended mode.

      (+) Read the NOR flash CFI (common flash interface) IDs using the function

          HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef

      (+) Read NOR flash memory manufacturer code and device IDs using the function

          structure declared by the function caller.

          HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef

          structure declared by the function caller.

      (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/

          HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation

      (+) Access NOR flash memory by read/write data unit operations using the functions

          HAL_NOR_Read(), HAL_NOR_Program().

      (+) You can monitor the NOR device HAL state by calling the function

          HAL_NOR_GetState()

      (+) Perform NOR flash erase block/chip operations using the functions

    [..]

          HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().

     (@) This driver is a set of generic APIs which handle standard NOR flash operations.

         If a NOR flash device contains different operations and/or implementations,

      (+) Read the NOR flash CFI (common flash interface) IDs using the function

         it should be implemented separately.

          HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef

          structure declared by the function caller.

     *** NOR HAL driver macros list ***

     =============================================

      (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/

     [..]

          HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation

       Below the list of most used macros in NOR HAL driver.

      (+) You can monitor the NOR device HAL state by calling the function

      (+) NOR_WRITE : NOR memory write data to specified address

          HAL_NOR_GetState()

    [..]

    *** Callback registration ***

     (@) This driver is a set of generic APIs which handle standard NOR flash operations.

    =============================================

         If a NOR flash device contains different operations and/or implementations,

    [..]

         it should be implemented separately.

      The compilation define  USE_HAL_NOR_REGISTER_CALLBACKS when set to 1

      allows the user to configure dynamically the driver callbacks.

     *** NOR HAL driver macros list ***

     =============================================

      Use Functions @ref HAL_NOR_RegisterCallback() to register a user callback,

     [..]

      it allows to register following callbacks:

       Below the list of most used macros in NOR HAL driver.

        (+) MspInitCallback    : NOR MspInit.

        (+) MspDeInitCallback  : NOR MspDeInit.

      (+) NOR_WRITE : NOR memory write data to specified address

      This function takes as parameters the HAL peripheral handle, the Callback ID

      and a pointer to the user callback function.

    *** Callback registration ***

    =============================================

      Use function @ref HAL_NOR_UnRegisterCallback() to reset a callback to the default

    [..]

      weak (surcharged) function. It allows to reset following callbacks:

      The compilation define  USE_HAL_NOR_REGISTER_CALLBACKS when set to 1

        (+) MspInitCallback    : NOR MspInit.

      allows the user to configure dynamically the driver callbacks.

        (+) MspDeInitCallback  : NOR MspDeInit.

      This function) takes as parameters the HAL peripheral handle and the Callback ID.

      Use Functions HAL_NOR_RegisterCallback() to register a user callback,

      it allows to register following callbacks:

      By default, after the @ref HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET

        (+) MspInitCallback    : NOR MspInit.

      all callbacks are reset to the corresponding legacy weak (surcharged) functions.

        (+) MspDeInitCallback  : NOR MspDeInit.

      Exception done for MspInit and MspDeInit callbacks that are respectively

      This function takes as parameters the HAL peripheral handle, the Callback ID

      reset to the legacy weak (surcharged) functions in the @ref HAL_NOR_Init

      and a pointer to the user callback function.

      and @ref  HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).

      If not, MspInit or MspDeInit are not null, the @ref HAL_NOR_Init and @ref HAL_NOR_DeInit

      Use function HAL_NOR_UnRegisterCallback() to reset a callback to the default

      keep and use the user MspInit/MspDeInit callbacks (registered beforehand)

      weak (overridden) function. It allows to reset following callbacks:

        (+) MspInitCallback    : NOR MspInit.

      Callbacks can be registered/unregistered in READY state only.

        (+) MspDeInitCallback  : NOR MspDeInit.

      Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered

      This function) takes as parameters the HAL peripheral handle and the Callback ID.

      in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used

      during the Init/DeInit.

      By default, after the HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET

      In that case first register the MspInit/MspDeInit user callbacks

      all callbacks are reset to the corresponding legacy weak (overridden) functions.

      using @ref HAL_NOR_RegisterCallback before calling @ref HAL_NOR_DeInit

      Exception done for MspInit and MspDeInit callbacks that are respectively

      or @ref HAL_NOR_Init function.

      reset to the legacy weak (overridden) functions in the HAL_NOR_Init

      and  HAL_NOR_DeInit only when these callbacks are null (not registered beforehand).

      When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or

      If not, MspInit or MspDeInit are not null, the HAL_NOR_Init and HAL_NOR_DeInit

      not defined, the callback registering feature is not available

      keep and use the user MspInit/MspDeInit callbacks (registered beforehand)

      and weak (surcharged) callbacks are used.

      Callbacks can be registered/unregistered in READY state only.

  @endverbatim

      Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered

  ******************************************************************************

      in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used

  * @attention

      during the Init/DeInit.

  *

      In that case first register the MspInit/MspDeInit user callbacks

  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.

      using HAL_NOR_RegisterCallback before calling HAL_NOR_DeInit

  * All rights reserved.</center></h2>

      or HAL_NOR_Init function.

  *

  * This software component is licensed by ST under BSD 3-Clause license,

      When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or

  * the "License"; You may not use this file except in compliance with the

      not defined, the callback registering feature is not available

  * License. You may obtain a copy of the License at:

      and weak (overridden) callbacks are used.

  *                       opensource.org/licenses/BSD-3-Clause

  *

  @endverbatim

  ******************************************************************************

  ******************************************************************************

  */

  */

/* Includes ------------------------------------------------------------------*/

/* Includes ------------------------------------------------------------------*/

#include "stm32f1xx_hal.h"

#include "stm32f1xx_hal.h"

#if defined(FSMC_BANK1)

#if  defined(FSMC_BANK1)

/** @addtogroup STM32F1xx_HAL_Driver

/** @addtogroup STM32F1xx_HAL_Driver

  * @{

  * @{

  */

  */

#ifdef HAL_NOR_MODULE_ENABLED

#ifdef HAL_NOR_MODULE_ENABLED

/** @defgroup NOR NOR

/** @defgroup NOR NOR

  * @brief NOR driver modules

  * @brief NOR driver modules

  * @{

  * @{

  */

  */

/* Private typedef -----------------------------------------------------------*/

/* Private typedef -----------------------------------------------------------*/

/* Private define ------------------------------------------------------------*/

/* Private define ------------------------------------------------------------*/

/** @defgroup NOR_Private_Defines NOR Private Defines

/** @defgroup NOR_Private_Defines NOR Private Defines

  * @{

  * @{

  */

  */

/* Constants to define address to set to write a command */

/* Constants to define address to set to write a command */

#define NOR_CMD_ADDRESS_FIRST                 (uint16_t)0x0555

#define NOR_CMD_ADDRESS_FIRST_BYTE            (uint16_t)0x0AAA

#define NOR_CMD_ADDRESS_FIRST_CFI             (uint16_t)0x0055

#define NOR_CMD_ADDRESS_FIRST_CFI_BYTE        (uint16_t)0x00AA

#define NOR_CMD_ADDRESS_SECOND                (uint16_t)0x02AA

#define NOR_CMD_ADDRESS_SECOND_BYTE           (uint16_t)0x0555

#define NOR_CMD_ADDRESS_THIRD                 (uint16_t)0x0555

#define NOR_CMD_ADDRESS_THIRD_BYTE            (uint16_t)0x0AAA

#define NOR_CMD_ADDRESS_FOURTH                (uint16_t)0x0555

#define NOR_CMD_ADDRESS_FIFTH                 (uint16_t)0x02AA

#define NOR_CMD_ADDRESS_FIRST                 (uint16_t)0x0555

#define NOR_CMD_ADDRESS_SIXTH                 (uint16_t)0x0555

#define NOR_CMD_ADDRESS_FIRST_CFI             (uint16_t)0x0055

#define NOR_CMD_ADDRESS_SECOND                (uint16_t)0x02AA

/* Constants to define data to program a command */

#define NOR_CMD_ADDRESS_THIRD                 (uint16_t)0x0555

#define NOR_CMD_DATA_READ_RESET               (uint16_t)0x00F0

#define NOR_CMD_ADDRESS_FOURTH                (uint16_t)0x0555

#define NOR_CMD_DATA_FIRST                    (uint16_t)0x00AA

#define NOR_CMD_ADDRESS_FIFTH                 (uint16_t)0x02AA

#define NOR_CMD_DATA_SECOND                   (uint16_t)0x0055

#define NOR_CMD_ADDRESS_SIXTH                 (uint16_t)0x0555

#define NOR_CMD_DATA_AUTO_SELECT              (uint16_t)0x0090

#define NOR_CMD_DATA_PROGRAM                  (uint16_t)0x00A0

/* Constants to define data to program a command */

#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD   (uint16_t)0x0080

#define NOR_CMD_DATA_READ_RESET               (uint16_t)0x00F0

#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH  (uint16_t)0x00AA

#define NOR_CMD_DATA_FIRST                    (uint16_t)0x00AA

#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH   (uint16_t)0x0055

#define NOR_CMD_DATA_SECOND                   (uint16_t)0x0055

#define NOR_CMD_DATA_CHIP_ERASE               (uint16_t)0x0010

#define NOR_CMD_DATA_AUTO_SELECT              (uint16_t)0x0090

#define NOR_CMD_DATA_CFI                      (uint16_t)0x0098

#define NOR_CMD_DATA_PROGRAM                  (uint16_t)0x00A0

#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD   (uint16_t)0x0080

#define NOR_CMD_DATA_BUFFER_AND_PROG          (uint8_t)0x25

#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH  (uint16_t)0x00AA

#define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM  (uint8_t)0x29

#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH   (uint16_t)0x0055

#define NOR_CMD_DATA_BLOCK_ERASE              (uint8_t)0x30

#define NOR_CMD_DATA_CHIP_ERASE               (uint16_t)0x0010

#define NOR_CMD_DATA_CFI                      (uint16_t)0x0098

#define NOR_CMD_READ_ARRAY                    (uint16_t)0x00FF

#define NOR_CMD_WORD_PROGRAM                  (uint16_t)0x0040

#define NOR_CMD_DATA_BUFFER_AND_PROG          (uint8_t)0x25

#define NOR_CMD_BUFFERED_PROGRAM              (uint16_t)0x00E8

#define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM  (uint8_t)0x29

#define NOR_CMD_CONFIRM                       (uint16_t)0x00D0

#define NOR_CMD_DATA_BLOCK_ERASE              (uint8_t)0x30

#define NOR_CMD_BLOCK_ERASE                   (uint16_t)0x0020

#define NOR_CMD_BLOCK_UNLOCK                  (uint16_t)0x0060

#define NOR_CMD_READ_ARRAY                    (uint16_t)0x00FF

#define NOR_CMD_READ_STATUS_REG               (uint16_t)0x0070

#define NOR_CMD_WORD_PROGRAM                  (uint16_t)0x0040

#define NOR_CMD_CLEAR_STATUS_REG              (uint16_t)0x0050

#define NOR_CMD_BUFFERED_PROGRAM              (uint16_t)0x00E8

#define NOR_CMD_CONFIRM                       (uint16_t)0x00D0

/* Mask on NOR STATUS REGISTER */

#define NOR_CMD_BLOCK_ERASE                   (uint16_t)0x0020

#define NOR_MASK_STATUS_DQ4                   (uint16_t)0x0010

#define NOR_CMD_BLOCK_UNLOCK                  (uint16_t)0x0060

#define NOR_MASK_STATUS_DQ5                   (uint16_t)0x0020

#define NOR_CMD_READ_STATUS_REG               (uint16_t)0x0070

#define NOR_MASK_STATUS_DQ6                   (uint16_t)0x0040

#define NOR_CMD_CLEAR_STATUS_REG              (uint16_t)0x0050

#define NOR_MASK_STATUS_DQ7                   (uint16_t)0x0080

/* Mask on NOR STATUS REGISTER */

/* Address of the primary command set */

#define NOR_MASK_STATUS_DQ4                   (uint16_t)0x0010

#define NOR_ADDRESS_COMMAND_SET               (uint16_t)0x0013

#define NOR_MASK_STATUS_DQ5                   (uint16_t)0x0020

#define NOR_MASK_STATUS_DQ6                   (uint16_t)0x0040

/* Command set code assignment (defined in JEDEC JEP137B version may 2004) */

#define NOR_MASK_STATUS_DQ7                   (uint16_t)0x0080

#define NOR_INTEL_SHARP_EXT_COMMAND_SET       (uint16_t)0x0001 /* Supported in this driver */

#define NOR_AMD_FUJITSU_COMMAND_SET           (uint16_t)0x0002 /* Supported in this driver */

/* Address of the primary command set */

#define NOR_INTEL_STANDARD_COMMAND_SET        (uint16_t)0x0003 /* Not Supported in this driver */

#define NOR_ADDRESS_COMMAND_SET               (uint16_t)0x0013

#define NOR_AMD_FUJITSU_EXT_COMMAND_SET       (uint16_t)0x0004 /* Not Supported in this driver */

#define NOR_WINDBOND_STANDARD_COMMAND_SET     (uint16_t)0x0006 /* Not Supported in this driver */

/* Command set code assignment (defined in JEDEC JEP137B version may 2004) */

#define NOR_MITSUBISHI_STANDARD_COMMAND_SET   (uint16_t)0x0100 /* Not Supported in this driver */

#define NOR_INTEL_SHARP_EXT_COMMAND_SET       (uint16_t)0x0001 /* Supported in this driver */

#define NOR_MITSUBISHI_EXT_COMMAND_SET        (uint16_t)0x0101 /* Not Supported in this driver */

#define NOR_AMD_FUJITSU_COMMAND_SET           (uint16_t)0x0002 /* Supported in this driver */

#define NOR_PAGE_WRITE_COMMAND_SET            (uint16_t)0x0102 /* Not Supported in this driver */

#define NOR_INTEL_STANDARD_COMMAND_SET        (uint16_t)0x0003 /* Not Supported in this driver */

#define NOR_INTEL_PERFORMANCE_COMMAND_SET     (uint16_t)0x0200 /* Not Supported in this driver */

#define NOR_AMD_FUJITSU_EXT_COMMAND_SET       (uint16_t)0x0004 /* Not Supported in this driver */

#define NOR_INTEL_DATA_COMMAND_SET            (uint16_t)0x0210 /* Not Supported in this driver */

#define NOR_WINDBOND_STANDARD_COMMAND_SET     (uint16_t)0x0006 /* Not Supported in this driver */

#define NOR_MITSUBISHI_STANDARD_COMMAND_SET   (uint16_t)0x0100 /* Not Supported in this driver */

/**

#define NOR_MITSUBISHI_EXT_COMMAND_SET        (uint16_t)0x0101 /* Not Supported in this driver */

  * @}

#define NOR_PAGE_WRITE_COMMAND_SET            (uint16_t)0x0102 /* Not Supported in this driver */

  */

#define NOR_INTEL_PERFORMANCE_COMMAND_SET     (uint16_t)0x0200 /* Not Supported in this driver */

#define NOR_INTEL_DATA_COMMAND_SET            (uint16_t)0x0210 /* Not Supported in this driver */

/* Private macro -------------------------------------------------------------*/

/* Private variables ---------------------------------------------------------*/

/**

/** @defgroup NOR_Private_Variables NOR Private Variables

  * @}

  * @{

  */

  */

/* Private macro -------------------------------------------------------------*/

static uint32_t uwNORMemoryDataWidth  = NOR_MEMORY_8B;

/* Private variables ---------------------------------------------------------*/

/** @defgroup NOR_Private_Variables NOR Private Variables

/**

  * @{

  * @}

  */

  */

static uint32_t uwNORMemoryDataWidth  = NOR_MEMORY_8B;

/* Private functions ---------------------------------------------------------*/

/* Exported functions --------------------------------------------------------*/

/**

/** @defgroup NOR_Exported_Functions NOR Exported Functions

  * @}

  * @{

  */

  */

/* Private functions ---------------------------------------------------------*/

/** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions

/* Exported functions --------------------------------------------------------*/

  * @brief    Initialization and Configuration functions

/** @defgroup NOR_Exported_Functions NOR Exported Functions

  *

  * @{

  @verbatim

  */

  ==============================================================================

           ##### NOR Initialization and de_initialization functions #####

/** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions

  ==============================================================================

  * @brief    Initialization and Configuration functions

  [..]

  *

    This section provides functions allowing to initialize/de-initialize

  @verbatim

    the NOR memory

  ==============================================================================

           ##### NOR Initialization and de_initialization functions #####

@endverbatim

  ==============================================================================

  * @{

  [..]

  */

    This section provides functions allowing to initialize/de-initialize

    the NOR memory

/**

  * @brief  Perform the NOR memory Initialization sequence

@endverbatim

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  * @{

  *                the configuration information for NOR module.

  */

  * @param  Timing pointer to NOR control timing structure

  * @param  ExtTiming pointer to NOR extended mode timing structure

/**

  * @retval HAL status

  * @brief  Perform the NOR memory Initialization sequence

  */

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing,

  *                the configuration information for NOR module.

                               FSMC_NORSRAM_TimingTypeDef *ExtTiming)

  * @param  Timing pointer to NOR control timing structure

{

  * @param  ExtTiming pointer to NOR extended mode timing structure

  uint32_t deviceaddress;

  * @retval HAL status

  */

  /* Check the NOR handle parameter */

HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing,

  if (hnor == NULL)

                               FSMC_NORSRAM_TimingTypeDef *ExtTiming)

  {

{

    return HAL_ERROR;

  uint32_t deviceaddress;

  }

  HAL_StatusTypeDef status = HAL_OK;

  if (hnor->State == HAL_NOR_STATE_RESET)

  /* Check the NOR handle parameter */

  {

  if (hnor == NULL)

    /* Allocate lock resource and initialize it */

  {

    hnor->Lock = HAL_UNLOCKED;

    return HAL_ERROR;

  }

#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)

    if (hnor->MspInitCallback == NULL)

  if (hnor->State == HAL_NOR_STATE_RESET)

    {

  {

      hnor->MspInitCallback = HAL_NOR_MspInit;

    /* Allocate lock resource and initialize it */

    }

    hnor->Lock = HAL_UNLOCKED;

    /* Init the low level hardware */

#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)

    hnor->MspInitCallback(hnor);

    if (hnor->MspInitCallback == NULL)

#else

    {

    /* Initialize the low level hardware (MSP) */

      hnor->MspInitCallback = HAL_NOR_MspInit;

    HAL_NOR_MspInit(hnor);

    }

#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */

  }

    /* Init the low level hardware */

    hnor->MspInitCallback(hnor);

  /* Initialize NOR control Interface */

#else

  (void)FSMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));

    /* Initialize the low level hardware (MSP) */

    HAL_NOR_MspInit(hnor);

  /* Initialize NOR timing Interface */

#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */

  (void)FSMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);

  }

  /* Initialize NOR extended mode timing Interface */

  /* Initialize NOR control Interface */

  (void)FSMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);

  (void)FSMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));

  /* Enable the NORSRAM device */

  /* Initialize NOR timing Interface */

  __FSMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);

  (void)FSMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);

  /* Initialize NOR Memory Data Width*/

  /* Initialize NOR extended mode timing Interface */

  if (hnor->Init.MemoryDataWidth == FSMC_NORSRAM_MEM_BUS_WIDTH_8)

  (void)FSMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming,

  {

                                          hnor->Init.NSBank, hnor->Init.ExtendedMode);

    uwNORMemoryDataWidth = NOR_MEMORY_8B;

  }

  /* Enable the NORSRAM device */

  else

  __FSMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);

  {

    uwNORMemoryDataWidth = NOR_MEMORY_16B;

  /* Initialize NOR Memory Data Width*/

  }

  if (hnor->Init.MemoryDataWidth == FSMC_NORSRAM_MEM_BUS_WIDTH_8)

  {

  /* Initialize the NOR controller state */

    uwNORMemoryDataWidth = NOR_MEMORY_8B;

  hnor->State = HAL_NOR_STATE_READY;

  }

  else

  /* Select the NOR device address */

  {

  if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

    uwNORMemoryDataWidth = NOR_MEMORY_16B;

  {

  }

    deviceaddress = NOR_MEMORY_ADRESS1;

  }

  /* Initialize the NOR controller state */

  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

  hnor->State = HAL_NOR_STATE_READY;

  {

    deviceaddress = NOR_MEMORY_ADRESS2;

  /* Select the NOR device address */

  }

  if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

  {

  {

    deviceaddress = NOR_MEMORY_ADRESS1;

    deviceaddress = NOR_MEMORY_ADRESS3;

  }

  }

  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

  else /* FSMC_NORSRAM_BANK4 */

  {

  {

    deviceaddress = NOR_MEMORY_ADRESS2;

    deviceaddress = NOR_MEMORY_ADRESS4;

  }

  }

  else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

  {

  /* Get the value of the command set */

    deviceaddress = NOR_MEMORY_ADRESS3;

  NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);

  }

  hnor->CommandSet = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_ADDRESS_COMMAND_SET);

  else /* FSMC_NORSRAM_BANK4 */

  {

  return HAL_NOR_ReturnToReadMode(hnor);

    deviceaddress = NOR_MEMORY_ADRESS4;

}

  }

/**

  if (hnor->Init.WriteOperation == FSMC_WRITE_OPERATION_DISABLE)

  * @brief  Perform NOR memory De-Initialization sequence

  {

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

    (void)FSMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);

  *                the configuration information for NOR module.

  * @retval HAL status

    /* Update the NOR controller state */

  */

    hnor->State = HAL_NOR_STATE_PROTECTED;

HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)

  }

{

  else

#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)

  {

  if (hnor->MspDeInitCallback == NULL)

    /* Get the value of the command set */

  {

    if (uwNORMemoryDataWidth == NOR_MEMORY_8B)

    hnor->MspDeInitCallback = HAL_NOR_MspDeInit;

    {

  }

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI_BYTE),

                NOR_CMD_DATA_CFI);

  /* DeInit the low level hardware */

    }

  hnor->MspDeInitCallback(hnor);

    else

#else

    {

  /* De-Initialize the low level hardware (MSP) */

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);

  HAL_NOR_MspDeInit(hnor);

    }

#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */

    hnor->CommandSet = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_ADDRESS_COMMAND_SET);

  /* Configure the NOR registers with their reset values */

  (void)FSMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);

    status = HAL_NOR_ReturnToReadMode(hnor);

  }

  /* Reset the NOR controller state */

  hnor->State = HAL_NOR_STATE_RESET;

  return status;

}

  /* Release Lock */

  __HAL_UNLOCK(hnor);

/**

  * @brief  Perform NOR memory De-Initialization sequence

  return HAL_OK;

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

}

  *                the configuration information for NOR module.

  * @retval HAL status

/**

  */

  * @brief  NOR MSP Init

HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

{

  *                the configuration information for NOR module.

#if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)

  * @retval None

  if (hnor->MspDeInitCallback == NULL)

  */

  {

__weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)

    hnor->MspDeInitCallback = HAL_NOR_MspDeInit;

{

  }

  /* Prevent unused argument(s) compilation warning */

  UNUSED(hnor);

  /* DeInit the low level hardware */

  hnor->MspDeInitCallback(hnor);

  /* NOTE : This function Should not be modified, when the callback is needed,

#else

            the HAL_NOR_MspInit could be implemented in the user file

  /* De-Initialize the low level hardware (MSP) */

   */

  HAL_NOR_MspDeInit(hnor);

}

#endif /* (USE_HAL_NOR_REGISTER_CALLBACKS) */

/**

  /* Configure the NOR registers with their reset values */

  * @brief  NOR MSP DeInit

  (void)FSMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  *                the configuration information for NOR module.

  /* Reset the NOR controller state */

  * @retval None

  hnor->State = HAL_NOR_STATE_RESET;

  */

__weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)

  /* Release Lock */

{

  __HAL_UNLOCK(hnor);

  /* Prevent unused argument(s) compilation warning */

  UNUSED(hnor);

  return HAL_OK;

}

  /* NOTE : This function Should not be modified, when the callback is needed,

            the HAL_NOR_MspDeInit could be implemented in the user file

/**

   */

  * @brief  NOR MSP Init

}

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  *                the configuration information for NOR module.

/**

  * @retval None

  * @brief  NOR MSP Wait for Ready/Busy signal

  */

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

__weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)

  *                the configuration information for NOR module.

{

  * @param  Timeout Maximum timeout value

  /* Prevent unused argument(s) compilation warning */

  * @retval None

  UNUSED(hnor);

  */

__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)

  /* NOTE : This function Should not be modified, when the callback is needed,

{

            the HAL_NOR_MspInit could be implemented in the user file

  /* Prevent unused argument(s) compilation warning */

   */

  UNUSED(hnor);

}

  UNUSED(Timeout);

/**

  /* NOTE : This function Should not be modified, when the callback is needed,

  * @brief  NOR MSP DeInit

            the HAL_NOR_MspWait could be implemented in the user file

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

   */

  *                the configuration information for NOR module.

}

  * @retval None

  */

/**

__weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)

  * @}

{

  */

  /* Prevent unused argument(s) compilation warning */

  UNUSED(hnor);

/** @defgroup NOR_Exported_Functions_Group2 Input and Output functions

  * @brief    Input Output and memory control functions

  /* NOTE : This function Should not be modified, when the callback is needed,

  *

            the HAL_NOR_MspDeInit could be implemented in the user file

  @verbatim

   */

  ==============================================================================

}

                ##### NOR Input and Output functions #####

  ==============================================================================

/**

  [..]

  * @brief  NOR MSP Wait for Ready/Busy signal

    This section provides functions allowing to use and control the NOR memory

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  *                the configuration information for NOR module.

@endverbatim

  * @param  Timeout Maximum timeout value

  * @{

  * @retval None

  */

  */

__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)

/**

{

  * @brief  Read NOR flash IDs

  /* Prevent unused argument(s) compilation warning */

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  UNUSED(hnor);

  *                the configuration information for NOR module.

  UNUSED(Timeout);

  * @param  pNOR_ID  pointer to NOR ID structure

  * @retval HAL status

  /* NOTE : This function Should not be modified, when the callback is needed,

  */

            the HAL_NOR_MspWait could be implemented in the user file

HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)

   */

{

}

  uint32_t deviceaddress;

  HAL_NOR_StateTypeDef state;

/**

  HAL_StatusTypeDef status = HAL_OK;

  * @}

  */

  /* Check the NOR controller state */

  state = hnor->State;

/** @defgroup NOR_Exported_Functions_Group2 Input and Output functions

  if (state == HAL_NOR_STATE_BUSY)

  * @brief    Input Output and memory control functions

  {

  *

    return HAL_BUSY;

  @verbatim

  }

  ==============================================================================

  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))

                ##### NOR Input and Output functions #####

  {

  ==============================================================================

    /* Process Locked */

  [..]

    __HAL_LOCK(hnor);

    This section provides functions allowing to use and control the NOR memory

    /* Update the NOR controller state */

@endverbatim

    hnor->State = HAL_NOR_STATE_BUSY;

  * @{

  */

    /* Select the NOR device address */

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

/**

    {

  * @brief  Read NOR flash IDs

      deviceaddress = NOR_MEMORY_ADRESS1;

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

    }

  *                the configuration information for NOR module.

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

  * @param  pNOR_ID  pointer to NOR ID structure

    {

  * @retval HAL status

      deviceaddress = NOR_MEMORY_ADRESS2;

  */

    }

HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

{

    {

  uint32_t deviceaddress;

      deviceaddress = NOR_MEMORY_ADRESS3;

  HAL_NOR_StateTypeDef state;

    }

  HAL_StatusTypeDef status = HAL_OK;

    else /* FSMC_NORSRAM_BANK4 */

    {

  /* Check the NOR controller state */

      deviceaddress = NOR_MEMORY_ADRESS4;

  state = hnor->State;

    }

  if (state == HAL_NOR_STATE_BUSY)

  {

    /* Send read ID command */

    return HAL_BUSY;

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

  }

    {

  else if (state == HAL_NOR_STATE_PROTECTED)

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);

  {

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);

    return HAL_ERROR;

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);

  }

    }

  else if (state == HAL_NOR_STATE_READY)

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

  {

    {

    /* Process Locked */

      NOR_WRITE(deviceaddress, NOR_CMD_DATA_AUTO_SELECT);

    __HAL_LOCK(hnor);

    }

    else

    /* Update the NOR controller state */

    {

    hnor->State = HAL_NOR_STATE_BUSY;

      /* Primary command set not supported by the driver */

      status = HAL_ERROR;

    /* Select the NOR device address */

    }

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

    {

    if (status != HAL_ERROR)

      deviceaddress = NOR_MEMORY_ADRESS1;

    {

    }

      /* Read the NOR IDs */

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

      pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);

    {

      pNOR_ID->Device_Code1      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,

      deviceaddress = NOR_MEMORY_ADRESS2;

                                                                     DEVICE_CODE1_ADDR);

    }

      pNOR_ID->Device_Code2      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

                                                                     DEVICE_CODE2_ADDR);

    {

      pNOR_ID->Device_Code3      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,

      deviceaddress = NOR_MEMORY_ADRESS3;

                                                                     DEVICE_CODE3_ADDR);

    }

    }

    else /* FSMC_NORSRAM_BANK4 */

    {

    /* Check the NOR controller state */

      deviceaddress = NOR_MEMORY_ADRESS4;

    hnor->State = state;

    }

    /* Process unlocked */

    /* Send read ID command */

    __HAL_UNLOCK(hnor);

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

  }

    {

  else

      if (uwNORMemoryDataWidth == NOR_MEMORY_8B)

  {

      {

    return HAL_ERROR;

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),

  }

                  NOR_CMD_DATA_FIRST);

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),

  return status;

                  NOR_CMD_DATA_SECOND);

}

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),

                  NOR_CMD_DATA_AUTO_SELECT);

/**

      }

  * @brief  Returns the NOR memory to Read mode.

      else

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

      {

  *                the configuration information for NOR module.

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);

  * @retval HAL status

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);

  */

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),

HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)

                  NOR_CMD_DATA_AUTO_SELECT);

{

      }

  uint32_t deviceaddress;

    }

  HAL_NOR_StateTypeDef state;

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

  HAL_StatusTypeDef status = HAL_OK;

    {

      NOR_WRITE(deviceaddress, NOR_CMD_DATA_AUTO_SELECT);

  /* Check the NOR controller state */

    }

  state = hnor->State;

    else

  if (state == HAL_NOR_STATE_BUSY)

    {

  {

      /* Primary command set not supported by the driver */

    return HAL_BUSY;

      status = HAL_ERROR;

  }

    }

  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))

  {

    if (status != HAL_ERROR)

    /* Process Locked */

    {

    __HAL_LOCK(hnor);

      /* Read the NOR IDs */

      pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);

    /* Update the NOR controller state */

      pNOR_ID->Device_Code1      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,

    hnor->State = HAL_NOR_STATE_BUSY;

                                                                     DEVICE_CODE1_ADDR);

      pNOR_ID->Device_Code2      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,

    /* Select the NOR device address */

                                                                     DEVICE_CODE2_ADDR);

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

      pNOR_ID->Device_Code3      = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth,

    {

                                                                     DEVICE_CODE3_ADDR);

      deviceaddress = NOR_MEMORY_ADRESS1;

    }

    }

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

    /* Check the NOR controller state */

    {

    hnor->State = state;

      deviceaddress = NOR_MEMORY_ADRESS2;

    }

    /* Process unlocked */

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

    __HAL_UNLOCK(hnor);

    {

  }

      deviceaddress = NOR_MEMORY_ADRESS3;

  else

    }

  {

    else /* FSMC_NORSRAM_BANK4 */

    return HAL_ERROR;

    {

  }

      deviceaddress = NOR_MEMORY_ADRESS4;

    }

  return status;

}

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

    {

/**

      NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);

  * @brief  Returns the NOR memory to Read mode.

    }

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

  *                the configuration information for NOR module.

    {

  * @retval HAL status

      NOR_WRITE(deviceaddress, NOR_CMD_READ_ARRAY);

  */

    }

HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)

    else

{

    {

  uint32_t deviceaddress;

      /* Primary command set not supported by the driver */

  HAL_NOR_StateTypeDef state;

      status = HAL_ERROR;

  HAL_StatusTypeDef status = HAL_OK;

    }

  /* Check the NOR controller state */

    /* Check the NOR controller state */

  state = hnor->State;

    hnor->State = state;

  if (state == HAL_NOR_STATE_BUSY)

  {

    /* Process unlocked */

    return HAL_BUSY;

    __HAL_UNLOCK(hnor);

  }

  }

  else if (state == HAL_NOR_STATE_PROTECTED)

  else

  {

  {

    return HAL_ERROR;

    return HAL_ERROR;

  }

  }

  else if (state == HAL_NOR_STATE_READY)

  {

  return status;

    /* Process Locked */

}

    __HAL_LOCK(hnor);

/**

    /* Update the NOR controller state */

  * @brief  Read data from NOR memory

    hnor->State = HAL_NOR_STATE_BUSY;

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  *                the configuration information for NOR module.

    /* Select the NOR device address */

  * @param  pAddress pointer to Device address

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

  * @param  pData  pointer to read data

    {

  * @retval HAL status

      deviceaddress = NOR_MEMORY_ADRESS1;

  */

    }

HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

{

    {

  uint32_t deviceaddress;

      deviceaddress = NOR_MEMORY_ADRESS2;

  HAL_NOR_StateTypeDef state;

    }

  HAL_StatusTypeDef status = HAL_OK;

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

    {

  /* Check the NOR controller state */

      deviceaddress = NOR_MEMORY_ADRESS3;

  state = hnor->State;

    }

  if (state == HAL_NOR_STATE_BUSY)

    else /* FSMC_NORSRAM_BANK4 */

  {

    {

    return HAL_BUSY;

      deviceaddress = NOR_MEMORY_ADRESS4;

  }

    }

  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))

  {

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

    /* Process Locked */

    {

    __HAL_LOCK(hnor);

      NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);

    }

    /* Update the NOR controller state */

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

    hnor->State = HAL_NOR_STATE_BUSY;

    {

      NOR_WRITE(deviceaddress, NOR_CMD_READ_ARRAY);

    /* Select the NOR device address */

    }

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

    else

    {

    {

      deviceaddress = NOR_MEMORY_ADRESS1;

      /* Primary command set not supported by the driver */

    }

      status = HAL_ERROR;

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

    }

    {

      deviceaddress = NOR_MEMORY_ADRESS2;

    /* Check the NOR controller state */

    }

    hnor->State = state;

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

    {

    /* Process unlocked */

      deviceaddress = NOR_MEMORY_ADRESS3;

    __HAL_UNLOCK(hnor);

    }

  }

    else /* FSMC_NORSRAM_BANK4 */

  else

    {

  {

      deviceaddress = NOR_MEMORY_ADRESS4;

    return HAL_ERROR;

    }

  }

    /* Send read data command */

  return status;

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

}

    {

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);

/**

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);

  * @brief  Read data from NOR memory

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

    }

  *                the configuration information for NOR module.

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

  * @param  pAddress pointer to Device address

    {

  * @param  pData  pointer to read data

      NOR_WRITE(pAddress, NOR_CMD_READ_ARRAY);

  * @retval HAL status

    }

  */

    else

HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)

    {

{

      /* Primary command set not supported by the driver */

  uint32_t deviceaddress;

      status = HAL_ERROR;

  HAL_NOR_StateTypeDef state;

    }

  HAL_StatusTypeDef status = HAL_OK;

    if (status != HAL_ERROR)

  /* Check the NOR controller state */

    {

  state = hnor->State;

      /* Read the data */

  if (state == HAL_NOR_STATE_BUSY)

      *pData = (uint16_t)(*(__IO uint32_t *)pAddress);

  {

    }

    return HAL_BUSY;

  }

    /* Check the NOR controller state */

  else if (state == HAL_NOR_STATE_PROTECTED)

    hnor->State = state;

  {

    return HAL_ERROR;

    /* Process unlocked */

  }

    __HAL_UNLOCK(hnor);

  else if (state == HAL_NOR_STATE_READY)

  }

  {

  else

    /* Process Locked */

  {

    __HAL_LOCK(hnor);

    return HAL_ERROR;

  }

    /* Update the NOR controller state */

    hnor->State = HAL_NOR_STATE_BUSY;

  return status;

}

    /* Select the NOR device address */

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

/**

    {

  * @brief  Program data to NOR memory

      deviceaddress = NOR_MEMORY_ADRESS1;

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

    }

  *                the configuration information for NOR module.

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

  * @param  pAddress Device address

    {

  * @param  pData  pointer to the data to write

      deviceaddress = NOR_MEMORY_ADRESS2;

  * @retval HAL status

    }

  */

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)

    {

{

      deviceaddress = NOR_MEMORY_ADRESS3;

  uint32_t deviceaddress;

    }

  HAL_StatusTypeDef status = HAL_OK;

    else /* FSMC_NORSRAM_BANK4 */

    {

  /* Check the NOR controller state */

      deviceaddress = NOR_MEMORY_ADRESS4;

  if (hnor->State == HAL_NOR_STATE_BUSY)

    }

  {

    return HAL_BUSY;

    /* Send read data command */

  }

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

  else if (hnor->State == HAL_NOR_STATE_READY)

    {

  {

      if (uwNORMemoryDataWidth == NOR_MEMORY_8B)

    /* Process Locked */

      {

    __HAL_LOCK(hnor);

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_BYTE),

                  NOR_CMD_DATA_FIRST);

    /* Update the NOR controller state */

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND_BYTE),

    hnor->State = HAL_NOR_STATE_BUSY;

                  NOR_CMD_DATA_SECOND);

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD_BYTE),

    /* Select the NOR device address */

                  NOR_CMD_DATA_READ_RESET);

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

      }

    {

      else

      deviceaddress = NOR_MEMORY_ADRESS1;

      {

    }

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);

    {

        NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD),

      deviceaddress = NOR_MEMORY_ADRESS2;

                  NOR_CMD_DATA_READ_RESET);

    }

      }

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

    }

    {

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

      deviceaddress = NOR_MEMORY_ADRESS3;

    {

    }

      NOR_WRITE(pAddress, NOR_CMD_READ_ARRAY);

    else /* FSMC_NORSRAM_BANK4 */

    }

    {

    else

      deviceaddress = NOR_MEMORY_ADRESS4;

    {

    }

      /* Primary command set not supported by the driver */

      status = HAL_ERROR;

    /* Send program data command */

    }

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

    {

    if (status != HAL_ERROR)

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);

    {

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);

      /* Read the data */

      NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);

      *pData = (uint16_t)(*(__IO uint32_t *)pAddress);

    }

    }

    else if (hnor->CommandSet == NOR_INTEL_SHARP_EXT_COMMAND_SET)

    {

    /* Check the NOR controller state */

      NOR_WRITE(pAddress, NOR_CMD_WORD_PROGRAM);

    hnor->State = state;

    }

    else

    /* Process unlocked */

    {

    __HAL_UNLOCK(hnor);

      /* Primary command set not supported by the driver */

  }

      status = HAL_ERROR;

  else

    }

  {

    return HAL_ERROR;

    if (status != HAL_ERROR)

  }

    {

      /* Write the data */

  return status;

      NOR_WRITE(pAddress, *pData);

}

    }

/**

    /* Check the NOR controller state */

  * @brief  Program data to NOR memory

    hnor->State = HAL_NOR_STATE_READY;

  * @param  hnor pointer to a NOR_HandleTypeDef structure that contains

  *                the configuration information for NOR module.

    /* Process unlocked */

  * @param  pAddress Device address

    __HAL_UNLOCK(hnor);

  * @param  pData  pointer to the data to write

  }

  * @retval HAL status

  else

  */

  {

HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)

    return HAL_ERROR;

{

  }

  uint32_t deviceaddress;

  HAL_StatusTypeDef status = HAL_OK;

  return status;

}

  /* Check the NOR controller state */

  if (hnor->State == HAL_NOR_STATE_BUSY)

/**

  {

  * @brief  Reads a half-word buffer from the NOR memory.

    return HAL_BUSY;

  * @param  hnor pointer to the NOR handle

  }

  * @param  uwAddress NOR memory internal address to read from.

  else if (hnor->State == HAL_NOR_STATE_READY)

  * @param  pData pointer to the buffer that receives the data read from the

  {

  *         NOR memory.

    /* Process Locked */

  * @param  uwBufferSize  number of Half word to read.

    __HAL_LOCK(hnor);

  * @retval HAL status

  */

    /* Update the NOR controller state */

HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData,

    hnor->State = HAL_NOR_STATE_BUSY;

                                     uint32_t uwBufferSize)

{

    /* Select the NOR device address */

  uint32_t deviceaddress;

    if (hnor->Init.NSBank == FSMC_NORSRAM_BANK1)

  uint32_t size = uwBufferSize;

    {

  uint32_t address = uwAddress;

      deviceaddress = NOR_MEMORY_ADRESS1;

  uint16_t *data = pData;

    }

  HAL_NOR_StateTypeDef state;

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK2)

  HAL_StatusTypeDef status = HAL_OK;

    {

      deviceaddress = NOR_MEMORY_ADRESS2;

  /* Check the NOR controller state */

    }

  state = hnor->State;

    else if (hnor->Init.NSBank == FSMC_NORSRAM_BANK3)

  if (state == HAL_NOR_STATE_BUSY)

    {

  {

      deviceaddress = NOR_MEMORY_ADRESS3;

    return HAL_BUSY;

    }

  }

    else /* FSMC_NORSRAM_BANK4 */

  else if ((state == HAL_NOR_STATE_READY) || (state == HAL_NOR_STATE_PROTECTED))

    {

  {

      deviceaddress = NOR_MEMORY_ADRESS4;

    /* Process Locked */

    }

    __HAL_LOCK(hnor);

    /* Send program data command */

    /* Update the NOR controller state */

    if (hnor->CommandSet == NOR_AMD_FUJITSU_COMMAND_SET)

    hnor->State = HAL_NOR_STATE_BUSY;

    {