Rev 2 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 2 | Rev 5 | ||
|---|---|---|---|
| Line 1... | Line 1... | ||
| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_hal_i2c.c |
3 | * @file stm32f1xx_hal_i2c.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @version V1.0.1 |
5 | * @version V1.0.4 |
| 6 | * @date 31-July-2015 |
6 | * @date 29-April-2016 |
| 7 | * @brief I2C HAL module driver. |
7 | * @brief I2C HAL module driver. |
| 8 | * This file provides firmware functions to manage the following |
8 | * This file provides firmware functions to manage the following |
| 9 | * functionalities of the Inter Integrated Circuit (I2C) peripheral: |
9 | * functionalities of the Inter Integrated Circuit (I2C) peripheral: |
| 10 | * + Initialization and de-initialization functions |
10 | * + Initialization and de-initialization functions |
| 11 | * + IO operation functions |
11 | * + IO operation functions |
| Line 20... | Line 20... | ||
| 20 | The I2C HAL driver can be used as follows: |
20 | The I2C HAL driver can be used as follows: |
| 21 | 21 | ||
| 22 | (#) Declare a I2C_HandleTypeDef handle structure, for example: |
22 | (#) Declare a I2C_HandleTypeDef handle structure, for example: |
| 23 | I2C_HandleTypeDef hi2c; |
23 | I2C_HandleTypeDef hi2c; |
| 24 | 24 | ||
| 25 | (#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API: |
25 | (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: |
| 26 | (##) Enable the I2Cx interface clock |
26 | (##) Enable the I2Cx interface clock |
| 27 | (##) I2C pins configuration |
27 | (##) I2C pins configuration |
| 28 | (+++) Enable the clock for the I2C GPIOs |
28 | (+++) Enable the clock for the I2C GPIOs |
| 29 | (+++) Configure I2C pins as alternate function open-drain |
29 | (+++) Configure I2C pins as alternate function open-drain |
| 30 | (##) NVIC configuration if you need to use interrupt process |
30 | (##) NVIC configuration if you need to use interrupt process |
| Line 33... | Line 33... | ||
| 33 | (##) DMA Configuration if you need to use DMA process |
33 | (##) DMA Configuration if you need to use DMA process |
| 34 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel |
34 | (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel |
| 35 | (+++) Enable the DMAx interface clock using |
35 | (+++) Enable the DMAx interface clock using |
| 36 | (+++) Configure the DMA handle parameters |
36 | (+++) Configure the DMA handle parameters |
| 37 | (+++) Configure the DMA Tx or Rx channel |
37 | (+++) Configure the DMA Tx or Rx channel |
| 38 | (+++) Associate the initilalized DMA handle to the hi2c DMA Tx or Rx handle |
38 | (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle |
| 39 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on |
39 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on |
| 40 | the DMA Tx or Rx channel |
40 | the DMA Tx or Rx channel |
| 41 | 41 | ||
| 42 | (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1, |
42 | (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1, |
| 43 | Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure. |
43 | Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure. |
| 44 | 44 | ||
| 45 | (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware |
45 | (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware |
| 46 | (GPIO, CLOCK, NVIC...etc) by calling the customed HAL_I2C_MspInit(&hi2c) API. |
46 | (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. |
| 47 | 47 | ||
| 48 | (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() |
48 | (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() |
| 49 | 49 | ||
| 50 | (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : |
50 | (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : |
| 51 | 51 | ||
| Line 67... | Line 67... | ||
| 67 | *** Interrupt mode IO operation *** |
67 | *** Interrupt mode IO operation *** |
| 68 | =================================== |
68 | =================================== |
| 69 | [..] |
69 | [..] |
| 70 | (+) The I2C interrupts should have the highest priority in the application in order |
70 | (+) The I2C interrupts should have the highest priority in the application in order |
| 71 | to make them uninterruptible. |
71 | to make them uninterruptible. |
| 72 | (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT() |
72 | (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT() |
| 73 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
73 | (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can |
| 74 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
74 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() |
| 75 | (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT() |
75 | (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT() |
| 76 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
76 | (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can |
| 77 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
77 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() |
| 78 | (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT() |
78 | (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT() |
| 79 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
79 | (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can |
| 80 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
80 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() |
| 81 | (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT() |
81 | (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT() |
| 82 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
82 | (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can |
| 83 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
83 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() |
| 84 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
84 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
| 85 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
85 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
| 86 | 86 | ||
| 87 | *** Interrupt mode IO MEM operation *** |
87 | *** Interrupt mode IO MEM operation *** |
| 88 | ======================================= |
88 | ======================================= |
| 89 | [..] |
89 | [..] |
| 90 | (+) The I2C interrupts should have the highest priority in the application in order |
90 | (+) The I2C interrupts should have the highest priority in the application in order |
| 91 | to make them uninterruptible. |
91 | to make them uninterruptible. |
| 92 | (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using |
92 | (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using |
| 93 | HAL_I2C_Mem_Write_IT() |
93 | HAL_I2C_Mem_Write_IT() |
| 94 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
94 | (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can |
| 95 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
95 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() |
| 96 | (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using |
96 | (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using |
| 97 | HAL_I2C_Mem_Read_IT() |
97 | HAL_I2C_Mem_Read_IT() |
| 98 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
98 | (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can |
| 99 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
99 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() |
| 100 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
100 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
| 101 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
101 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
| 102 | 102 | ||
| 103 | *** DMA mode IO operation *** |
103 | *** DMA mode IO operation *** |
| 104 | ============================== |
104 | ============================== |
| 105 | [..] |
105 | [..] |
| 106 | (+) Transmit in master mode an amount of data in non blocking mode (DMA) using |
106 | (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using |
| 107 | HAL_I2C_Master_Transmit_DMA() |
107 | HAL_I2C_Master_Transmit_DMA() |
| 108 | (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can |
108 | (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can |
| 109 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback |
109 | add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() |
| 110 | (+) Receive in master mode an amount of data in non blocking mode (DMA) using |
110 | (+) Receive in master mode an amount of data in non-blocking mode (DMA) using |
| 111 | HAL_I2C_Master_Receive_DMA() |
111 | HAL_I2C_Master_Receive_DMA() |
| 112 | (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can |
112 | (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can |
| 113 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback |
113 | add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() |
| 114 | (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using |
114 | (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using |
| 115 | HAL_I2C_Slave_Transmit_DMA() |
115 | HAL_I2C_Slave_Transmit_DMA() |
| 116 | (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can |
116 | (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can |
| 117 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback |
117 | add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() |
| 118 | (+) Receive in slave mode an amount of data in non blocking mode (DMA) using |
118 | (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using |
| 119 | HAL_I2C_Slave_Receive_DMA() |
119 | HAL_I2C_Slave_Receive_DMA() |
| 120 | (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can |
120 | (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can |
| 121 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback |
121 | add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() |
| 122 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
122 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
| 123 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
123 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
| 124 | 124 | ||
| 125 | *** DMA mode IO MEM operation *** |
125 | *** DMA mode IO MEM operation *** |
| 126 | ================================= |
126 | ================================= |
| 127 | [..] |
127 | [..] |
| 128 | (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using |
128 | (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using |
| 129 | HAL_I2C_Mem_Write_DMA() |
129 | HAL_I2C_Mem_Write_DMA() |
| 130 | (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can |
130 | (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can |
| 131 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback |
131 | add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback() |
| 132 | (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using |
132 | (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using |
| 133 | HAL_I2C_Mem_Read_DMA() |
133 | HAL_I2C_Mem_Read_DMA() |
| 134 | (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can |
134 | (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can |
| 135 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback |
135 | add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback() |
| 136 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
136 | (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can |
| 137 | add his own code by customization of function pointer HAL_I2C_ErrorCallback |
137 | add his own code by customization of function pointer HAL_I2C_ErrorCallback() |
| 138 | 138 | ||
| 139 | 139 | ||
| 140 | *** I2C HAL driver macros list *** |
140 | *** I2C HAL driver macros list *** |
| 141 | ================================== |
141 | ================================== |
| 142 | [..] |
142 | [..] |
| 143 | Below the list of most used macros in I2C HAL driver. |
143 | Below the list of most used macros in I2C HAL driver. |
| 144 | 144 | ||
| 145 | (+) __HAL_I2C_ENABLE: Enable the I2C peripheral |
145 | (+) __HAL_I2C_ENABLE: Enable the I2C peripheral |
| 146 | (+) __HAL_I2C_DISABLE: Disable the I2C peripheral |
146 | (+) __HAL_I2C_DISABLE: Disable the I2C peripheral |
| 147 | (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not |
147 | (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not |
| 148 | (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag |
148 | (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag |
| 149 | (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt |
149 | (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt |
| 150 | (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt |
150 | (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt |
| 151 | (@) You can refer to the I2C HAL driver header file for more useful macros |
151 | (@) You can refer to the I2C HAL driver header file for more useful macros |
| 152 | 152 | ||
| Line 172... | Line 172... | ||
| 172 | 172 | ||
| 173 | @endverbatim |
173 | @endverbatim |
| 174 | ****************************************************************************** |
174 | ****************************************************************************** |
| 175 | * @attention |
175 | * @attention |
| 176 | * |
176 | * |
| 177 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
177 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| 178 | * |
178 | * |
| 179 | * Redistribution and use in source and binary forms, with or without modification, |
179 | * Redistribution and use in source and binary forms, with or without modification, |
| 180 | * are permitted provided that the following conditions are met: |
180 | * are permitted provided that the following conditions are met: |
| 181 | * 1. Redistributions of source code must retain the above copyright notice, |
181 | * 1. Redistributions of source code must retain the above copyright notice, |
| 182 | * this list of conditions and the following disclaimer. |
182 | * this list of conditions and the following disclaimer. |
| Line 218... | Line 218... | ||
| 218 | /* Private typedef -----------------------------------------------------------*/ |
218 | /* Private typedef -----------------------------------------------------------*/ |
| 219 | /* Private constants ---------------------------------------------------------*/ |
219 | /* Private constants ---------------------------------------------------------*/ |
| 220 | /** @addtogroup I2C_Private_Constants I2C Private Constants |
220 | /** @addtogroup I2C_Private_Constants I2C Private Constants |
| 221 | * @{ |
221 | * @{ |
| 222 | */ |
222 | */ |
| 223 | #define I2C_TIMEOUT_FLAG ((uint32_t)35) /* 35 ms */ |
223 | #define I2C_TIMEOUT_FLAG ((uint32_t)35) /*!< Timeout 35 ms */ |
| 224 | #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /* 10 s */ |
224 | #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000) /*!< Timeout 10 s */ |
| 225 | #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)10000) /* 10 s */ |
225 | #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)10000) /*!< Timeout 10 s */ |
| 226 | /** |
226 | /** |
| 227 | * @} |
227 | * @} |
| 228 | */ |
228 | */ |
| 229 | 229 | ||
| 230 | /* Private macro -------------------------------------------------------------*/ |
230 | /* Private macro -------------------------------------------------------------*/ |
| Line 245... | Line 245... | ||
| 245 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout); |
245 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout); |
| 246 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
246 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
| 247 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
247 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout); |
| 248 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
248 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
| 249 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout); |
249 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout); |
| - | 250 | static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
|
| - | 251 | static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
|
| - | 252 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
|
| - | 253 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout); |
|
| - | 254 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c); |
|
| 250 | 255 | ||
| 251 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c); |
256 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c); |
| 252 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c); |
257 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c); |
| 253 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c); |
258 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c); |
| 254 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c); |
259 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c); |
| Line 303... | Line 308... | ||
| 303 | * @{ |
308 | * @{ |
| 304 | */ |
309 | */ |
| 305 | 310 | ||
| 306 | /** |
311 | /** |
| 307 | * @brief Initializes the I2C according to the specified parameters |
312 | * @brief Initializes the I2C according to the specified parameters |
| 308 | * in the I2C_InitTypeDef and create the associated handle. |
313 | * in the I2C_InitTypeDef and initialize the associated handle. |
| 309 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
314 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 310 | * the configuration information for the specified I2C. |
315 | * the configuration information for the specified I2C. |
| 311 | * @retval HAL status |
316 | * @retval HAL status |
| 312 | */ |
317 | */ |
| 313 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) |
318 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) |
| 314 | { |
319 | { |
| Line 379... | Line 384... | ||
| 379 | /* Enable the selected I2C peripheral */ |
384 | /* Enable the selected I2C peripheral */ |
| 380 | __HAL_I2C_ENABLE(hi2c); |
385 | __HAL_I2C_ENABLE(hi2c); |
| 381 | 386 | ||
| 382 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
387 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 383 | hi2c->State = HAL_I2C_STATE_READY; |
388 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 389 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 384 | 390 | ||
| 385 | return HAL_OK; |
391 | return HAL_OK; |
| 386 | } |
392 | } |
| 387 | 393 | ||
| 388 | /** |
394 | /** |
| 389 | * @brief DeInitializes the I2C peripheral. |
395 | * @brief DeInitialize the I2C peripheral. |
| 390 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
396 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 391 | * the configuration information for the specified I2C. |
397 | * the configuration information for the specified I2C. |
| 392 | * @retval HAL status |
398 | * @retval HAL status |
| 393 | */ |
399 | */ |
| 394 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) |
400 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) |
| 395 | { |
401 | { |
| Line 409... | Line 415... | ||
| 409 | 415 | ||
| 410 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
416 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
| 411 | HAL_I2C_MspDeInit(hi2c); |
417 | HAL_I2C_MspDeInit(hi2c); |
| 412 | 418 | ||
| 413 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
419 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 414 | - | ||
| 415 | hi2c->State = HAL_I2C_STATE_RESET; |
420 | hi2c->State = HAL_I2C_STATE_RESET; |
| - | 421 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 416 | 422 | ||
| 417 | /* Release Lock */ |
423 | /* Release Lock */ |
| 418 | __HAL_UNLOCK(hi2c); |
424 | __HAL_UNLOCK(hi2c); |
| 419 | 425 | ||
| 420 | return HAL_OK; |
426 | return HAL_OK; |
| 421 | } |
427 | } |
| 422 | 428 | ||
| 423 | /** |
429 | /** |
| 424 | * @brief I2C MSP Init. |
430 | * @brief Initialize the I2C MSP. |
| 425 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
431 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 426 | * the configuration information for the specified I2C. |
432 | * the configuration information for the specified I2C. |
| 427 | * @retval None |
433 | * @retval None |
| 428 | */ |
434 | */ |
| 429 | __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) |
435 | __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) |
| 430 | { |
436 | { |
| - | 437 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 438 | UNUSED(hi2c); |
|
| 431 | /* NOTE : This function Should not be modified, when the callback is needed, |
439 | /* NOTE : This function should not be modified, when the callback is needed, |
| 432 | the HAL_I2C_MspInit could be implemented in the user file |
440 | the HAL_I2C_MspInit could be implemented in the user file |
| 433 | */ |
441 | */ |
| 434 | } |
442 | } |
| 435 | 443 | ||
| 436 | /** |
444 | /** |
| 437 | * @brief I2C MSP DeInit |
445 | * @brief DeInitialize the I2C MSP. |
| 438 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
446 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 439 | * the configuration information for the specified I2C. |
447 | * the configuration information for the specified I2C. |
| 440 | * @retval None |
448 | * @retval None |
| 441 | */ |
449 | */ |
| 442 | __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) |
450 | __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) |
| 443 | { |
451 | { |
| - | 452 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 453 | UNUSED(hi2c); |
|
| 444 | /* NOTE : This function Should not be modified, when the callback is needed, |
454 | /* NOTE : This function should not be modified, when the callback is needed, |
| 445 | the HAL_I2C_MspDeInit could be implemented in the user file |
455 | the HAL_I2C_MspDeInit could be implemented in the user file |
| 446 | */ |
456 | */ |
| 447 | } |
457 | } |
| 448 | 458 | ||
| 449 | /** |
459 | /** |
| Line 463... | Line 473... | ||
| 463 | 473 | ||
| 464 | (#) There are two modes of transfer: |
474 | (#) There are two modes of transfer: |
| 465 | (++) Blocking mode : The communication is performed in the polling mode. |
475 | (++) Blocking mode : The communication is performed in the polling mode. |
| 466 | The status of all data processing is returned by the same function |
476 | The status of all data processing is returned by the same function |
| 467 | after finishing transfer. |
477 | after finishing transfer. |
| 468 | (++) No-Blocking mode : The communication is performed using Interrupts |
478 | (++) No-Blocking mode : The communication is performed using Interrupts |
| 469 | or DMA. These functions return the status of the transfer startup. |
479 | or DMA. These functions return the status of the transfer startup. |
| 470 | The end of the data processing will be indicated through the |
480 | The end of the data processing will be indicated through the |
| 471 | dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when |
481 | dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when |
| 472 | using DMA mode. |
482 | using DMA mode. |
| 473 | 483 | ||
| Line 509... | Line 519... | ||
| 509 | * @{ |
519 | * @{ |
| 510 | */ |
520 | */ |
| 511 | 521 | ||
| 512 | /** |
522 | /** |
| 513 | * @brief Transmits in master mode an amount of data in blocking mode. |
523 | * @brief Transmits in master mode an amount of data in blocking mode. |
| 514 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
524 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 515 | * the configuration information for the specified I2C. |
525 | * the configuration information for the specified I2C. |
| 516 | * @param DevAddress: Target device address |
526 | * @param DevAddress Target device address |
| 517 | * @param pData: Pointer to data buffer |
527 | * @param pData Pointer to data buffer |
| 518 | * @param Size: Amount of data to be sent |
528 | * @param Size Amount of data to be sent |
| 519 | * @param Timeout: Timeout duration |
529 | * @param Timeout Timeout duration |
| 520 | * @retval HAL status |
530 | * @retval HAL status |
| 521 | */ |
531 | */ |
| 522 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
532 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| 523 | { |
533 | { |
| 524 | if(hi2c->State == HAL_I2C_STATE_READY) |
534 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 539... | Line 549... | ||
| 539 | 549 | ||
| 540 | /* Disable Pos */ |
550 | /* Disable Pos */ |
| 541 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
551 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 542 | 552 | ||
| 543 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
553 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 554 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
|
| 544 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
555 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 545 | 556 | ||
| 546 | /* Send Slave Address */ |
557 | /* Send Slave Address */ |
| 547 | if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK) |
558 | if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout) != HAL_OK) |
| 548 | { |
559 | { |
| Line 564... | Line 575... | ||
| 564 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
575 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| 565 | 576 | ||
| 566 | while(Size > 0) |
577 | while(Size > 0) |
| 567 | { |
578 | { |
| 568 | /* Wait until TXE flag is set */ |
579 | /* Wait until TXE flag is set */ |
| 569 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
580 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 570 | { |
581 | { |
| - | 582 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 583 | { |
|
| - | 584 | /* Generate Stop */ |
|
| - | 585 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 586 | return HAL_ERROR; |
|
| - | 587 | } |
|
| - | 588 | else |
|
| - | 589 | { |
|
| 571 | return HAL_TIMEOUT; |
590 | return HAL_TIMEOUT; |
| - | 591 | } |
|
| 572 | } |
592 | } |
| 573 | 593 | ||
| 574 | /* Write data to DR */ |
594 | /* Write data to DR */ |
| 575 | hi2c->Instance->DR = (*pData++); |
595 | hi2c->Instance->DR = (*pData++); |
| 576 | Size--; |
596 | Size--; |
| Line 581... | Line 601... | ||
| 581 | hi2c->Instance->DR = (*pData++); |
601 | hi2c->Instance->DR = (*pData++); |
| 582 | Size--; |
602 | Size--; |
| 583 | } |
603 | } |
| 584 | } |
604 | } |
| 585 | 605 | ||
| 586 | /* Wait until TXE flag is set */ |
606 | /* Wait until BTF flag is set */ |
| 587 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
607 | if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 588 | { |
608 | { |
| - | 609 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 610 | { |
|
| - | 611 | /* Generate Stop */ |
|
| - | 612 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 613 | return HAL_ERROR; |
|
| - | 614 | } |
|
| - | 615 | else |
|
| - | 616 | { |
|
| 589 | return HAL_TIMEOUT; |
617 | return HAL_TIMEOUT; |
| - | 618 | } |
|
| 590 | } |
619 | } |
| 591 | 620 | ||
| 592 | /* Generate Stop */ |
621 | /* Generate Stop */ |
| 593 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
622 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| 594 | 623 | ||
| Line 605... | Line 634... | ||
| 605 | } |
634 | } |
| 606 | } |
635 | } |
| 607 | 636 | ||
| 608 | /** |
637 | /** |
| 609 | * @brief Receives in master mode an amount of data in blocking mode. |
638 | * @brief Receives in master mode an amount of data in blocking mode. |
| 610 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
639 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 611 | * the configuration information for the specified I2C. |
640 | * the configuration information for the specified I2C. |
| 612 | * @param DevAddress: Target device address |
641 | * @param DevAddress Target device address |
| 613 | * @param pData: Pointer to data buffer |
642 | * @param pData Pointer to data buffer |
| 614 | * @param Size: Amount of data to be sent |
643 | * @param Size Amount of data to be sent |
| 615 | * @param Timeout: Timeout duration |
644 | * @param Timeout Timeout duration |
| 616 | * @retval HAL status |
645 | * @retval HAL status |
| 617 | */ |
646 | */ |
| 618 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
647 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| 619 | { |
648 | { |
| 620 | if(hi2c->State == HAL_I2C_STATE_READY) |
649 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 635... | Line 664... | ||
| 635 | 664 | ||
| 636 | /* Disable Pos */ |
665 | /* Disable Pos */ |
| 637 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
666 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 638 | 667 | ||
| 639 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
668 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 669 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
|
| 640 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
670 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 641 | 671 | ||
| 642 | /* Send Slave Address */ |
672 | /* Send Slave Address */ |
| 643 | if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK) |
673 | if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout) != HAL_OK) |
| 644 | { |
674 | { |
| Line 707... | Line 737... | ||
| 707 | { |
737 | { |
| 708 | /* One byte */ |
738 | /* One byte */ |
| 709 | if(Size == 1) |
739 | if(Size == 1) |
| 710 | { |
740 | { |
| 711 | /* Wait until RXNE flag is set */ |
741 | /* Wait until RXNE flag is set */ |
| 712 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
742 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 713 | { |
743 | { |
| - | 744 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
|
| - | 745 | { |
|
| 714 | return HAL_TIMEOUT; |
746 | return HAL_TIMEOUT; |
| - | 747 | } |
|
| - | 748 | else |
|
| - | 749 | { |
|
| - | 750 | return HAL_ERROR; |
|
| - | 751 | } |
|
| 715 | } |
752 | } |
| 716 | 753 | ||
| 717 | /* Read data from DR */ |
754 | /* Read data from DR */ |
| 718 | (*pData++) = hi2c->Instance->DR; |
755 | (*pData++) = hi2c->Instance->DR; |
| 719 | Size--; |
756 | Size--; |
| Line 779... | Line 816... | ||
| 779 | Size--; |
816 | Size--; |
| 780 | 817 | ||
| 781 | /* Re-enable IRQs */ |
818 | /* Re-enable IRQs */ |
| 782 | __enable_irq(); |
819 | __enable_irq(); |
| 783 | 820 | ||
| 784 | /* Wait until RXNE flag is set */ |
- | |
| 785 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
- | |
| 786 | { |
- | |
| 787 | return HAL_TIMEOUT; |
- | |
| 788 | } |
- | |
| 789 | - | ||
| 790 | /* Read data from DR */ |
821 | /* Read data from DR */ |
| 791 | (*pData++) = hi2c->Instance->DR; |
822 | (*pData++) = hi2c->Instance->DR; |
| 792 | Size--; |
823 | Size--; |
| 793 | } |
824 | } |
| 794 | } |
825 | } |
| 795 | else |
826 | else |
| 796 | { |
827 | { |
| 797 | /* Wait until RXNE flag is set */ |
828 | /* Wait until RXNE flag is set */ |
| 798 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
829 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 799 | { |
830 | { |
| - | 831 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
|
| - | 832 | { |
|
| 800 | return HAL_TIMEOUT; |
833 | return HAL_TIMEOUT; |
| - | 834 | } |
|
| - | 835 | else |
|
| - | 836 | { |
|
| - | 837 | return HAL_ERROR; |
|
| - | 838 | } |
|
| 801 | } |
839 | } |
| 802 | 840 | ||
| 803 | /* Read data from DR */ |
841 | /* Read data from DR */ |
| 804 | (*pData++) = hi2c->Instance->DR; |
842 | (*pData++) = hi2c->Instance->DR; |
| 805 | Size--; |
843 | Size--; |
| Line 812... | Line 850... | ||
| 812 | } |
850 | } |
| 813 | } |
851 | } |
| 814 | } |
852 | } |
| 815 | 853 | ||
| 816 | hi2c->State = HAL_I2C_STATE_READY; |
854 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 855 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 817 | 856 | ||
| 818 | /* Process Unlocked */ |
857 | /* Process Unlocked */ |
| 819 | __HAL_UNLOCK(hi2c); |
858 | __HAL_UNLOCK(hi2c); |
| 820 | 859 | ||
| 821 | return HAL_OK; |
860 | return HAL_OK; |
| Line 826... | Line 865... | ||
| 826 | } |
865 | } |
| 827 | } |
866 | } |
| 828 | 867 | ||
| 829 | /** |
868 | /** |
| 830 | * @brief Transmits in slave mode an amount of data in blocking mode. |
869 | * @brief Transmits in slave mode an amount of data in blocking mode. |
| 831 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
870 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 832 | * the configuration information for the specified I2C. |
871 | * the configuration information for the specified I2C. |
| 833 | * @param pData: Pointer to data buffer |
872 | * @param pData Pointer to data buffer |
| 834 | * @param Size: Amount of data to be sent |
873 | * @param Size Amount of data to be sent |
| 835 | * @param Timeout: Timeout duration |
874 | * @param Timeout Timeout duration |
| 836 | * @retval HAL status |
875 | * @retval HAL status |
| 837 | */ |
876 | */ |
| 838 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
877 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| 839 | { |
878 | { |
| 840 | if(hi2c->State == HAL_I2C_STATE_READY) |
879 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 855... | Line 894... | ||
| 855 | 894 | ||
| 856 | /* Disable Pos */ |
895 | /* Disable Pos */ |
| 857 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
896 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 858 | 897 | ||
| 859 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
898 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 899 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
|
| 860 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
900 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 861 | 901 | ||
| 862 | /* Enable Address Acknowledge */ |
902 | /* Enable Address Acknowledge */ |
| 863 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
903 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 864 | 904 | ||
| Line 885... | Line 925... | ||
| 885 | } |
925 | } |
| 886 | 926 | ||
| 887 | while(Size > 0) |
927 | while(Size > 0) |
| 888 | { |
928 | { |
| 889 | /* Wait until TXE flag is set */ |
929 | /* Wait until TXE flag is set */ |
| 890 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
930 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 891 | { |
931 | { |
| - | 932 | /* Disable Address Acknowledge */ |
|
| - | 933 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
|
| - | 934 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 935 | { |
|
| - | 936 | return HAL_ERROR; |
|
| - | 937 | } |
|
| - | 938 | else |
|
| - | 939 | { |
|
| 892 | return HAL_TIMEOUT; |
940 | return HAL_TIMEOUT; |
| - | 941 | } |
|
| 893 | } |
942 | } |
| 894 | 943 | ||
| 895 | /* Write data to DR */ |
944 | /* Write data to DR */ |
| 896 | hi2c->Instance->DR = (*pData++); |
945 | hi2c->Instance->DR = (*pData++); |
| 897 | Size--; |
946 | Size--; |
| Line 915... | Line 964... | ||
| 915 | 964 | ||
| 916 | /* Disable Address Acknowledge */ |
965 | /* Disable Address Acknowledge */ |
| 917 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
966 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 918 | 967 | ||
| 919 | hi2c->State = HAL_I2C_STATE_READY; |
968 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 969 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 920 | 970 | ||
| 921 | /* Process Unlocked */ |
971 | /* Process Unlocked */ |
| 922 | __HAL_UNLOCK(hi2c); |
972 | __HAL_UNLOCK(hi2c); |
| 923 | 973 | ||
| 924 | return HAL_OK; |
974 | return HAL_OK; |
| Line 929... | Line 979... | ||
| 929 | } |
979 | } |
| 930 | } |
980 | } |
| 931 | 981 | ||
| 932 | /** |
982 | /** |
| 933 | * @brief Receive in slave mode an amount of data in blocking mode |
983 | * @brief Receive in slave mode an amount of data in blocking mode |
| 934 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
984 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 935 | * the configuration information for the specified I2C. |
985 | * the configuration information for the specified I2C. |
| 936 | * @param pData: Pointer to data buffer |
986 | * @param pData Pointer to data buffer |
| 937 | * @param Size: Amount of data to be sent |
987 | * @param Size Amount of data to be sent |
| 938 | * @param Timeout: Timeout duration |
988 | * @param Timeout Timeout duration |
| 939 | * @retval HAL status |
989 | * @retval HAL status |
| 940 | */ |
990 | */ |
| 941 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
991 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| 942 | { |
992 | { |
| 943 | if(hi2c->State == HAL_I2C_STATE_READY) |
993 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 958... | Line 1008... | ||
| 958 | 1008 | ||
| 959 | /* Disable Pos */ |
1009 | /* Disable Pos */ |
| 960 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1010 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 961 | 1011 | ||
| 962 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
1012 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 1013 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
|
| 963 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1014 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 964 | 1015 | ||
| 965 | /* Enable Address Acknowledge */ |
1016 | /* Enable Address Acknowledge */ |
| 966 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
1017 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 967 | 1018 | ||
| Line 975... | Line 1026... | ||
| 975 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
1026 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| 976 | 1027 | ||
| 977 | while(Size > 0) |
1028 | while(Size > 0) |
| 978 | { |
1029 | { |
| 979 | /* Wait until RXNE flag is set */ |
1030 | /* Wait until RXNE flag is set */ |
| 980 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
1031 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 981 | { |
1032 | { |
| - | 1033 | /* Disable Address Acknowledge */ |
|
| - | 1034 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
|
| - | 1035 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
|
| - | 1036 | { |
|
| 982 | return HAL_TIMEOUT; |
1037 | return HAL_TIMEOUT; |
| - | 1038 | } |
|
| - | 1039 | else |
|
| - | 1040 | { |
|
| - | 1041 | return HAL_ERROR; |
|
| - | 1042 | } |
|
| 983 | } |
1043 | } |
| 984 | 1044 | ||
| 985 | /* Read data from DR */ |
1045 | /* Read data from DR */ |
| 986 | (*pData++) = hi2c->Instance->DR; |
1046 | (*pData++) = hi2c->Instance->DR; |
| 987 | Size--; |
1047 | Size--; |
| Line 993... | Line 1053... | ||
| 993 | Size--; |
1053 | Size--; |
| 994 | } |
1054 | } |
| 995 | } |
1055 | } |
| 996 | 1056 | ||
| 997 | /* Wait until STOP flag is set */ |
1057 | /* Wait until STOP flag is set */ |
| 998 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout) != HAL_OK) |
1058 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_FLAG) != HAL_OK) |
| 999 | { |
1059 | { |
| - | 1060 | /* Disable Address Acknowledge */ |
|
| - | 1061 | hi2c->Instance->CR1 &= ~I2C_CR1_ACK; |
|
| - | 1062 | ||
| - | 1063 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 1064 | { |
|
| - | 1065 | return HAL_ERROR; |
|
| - | 1066 | } |
|
| - | 1067 | else |
|
| - | 1068 | { |
|
| 1000 | return HAL_TIMEOUT; |
1069 | return HAL_TIMEOUT; |
| - | 1070 | } |
|
| 1001 | } |
1071 | } |
| 1002 | 1072 | ||
| 1003 | /* Clear STOP flag */ |
1073 | /* Clear STOP flag */ |
| 1004 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
1074 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
| 1005 | 1075 | ||
| 1006 | /* Disable Address Acknowledge */ |
1076 | /* Disable Address Acknowledge */ |
| 1007 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
1077 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 1008 | 1078 | ||
| 1009 | hi2c->State = HAL_I2C_STATE_READY; |
1079 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 1080 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 1010 | 1081 | ||
| 1011 | /* Process Unlocked */ |
1082 | /* Process Unlocked */ |
| 1012 | __HAL_UNLOCK(hi2c); |
1083 | __HAL_UNLOCK(hi2c); |
| 1013 | 1084 | ||
| 1014 | return HAL_OK; |
1085 | return HAL_OK; |
| Line 1017... | Line 1088... | ||
| 1017 | { |
1088 | { |
| 1018 | return HAL_BUSY; |
1089 | return HAL_BUSY; |
| 1019 | } |
1090 | } |
| 1020 | } |
1091 | } |
| 1021 | 1092 | ||
| 1022 | - | ||
| 1023 | /** |
1093 | /** |
| 1024 | * @brief Transmit in master mode an amount of data in no-blocking mode with Interrupt |
1094 | * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt |
| 1025 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1095 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1026 | * the configuration information for the specified I2C. |
1096 | * the configuration information for the specified I2C. |
| 1027 | * @param DevAddress: Target device address |
1097 | * @param DevAddress Target device address |
| 1028 | * @param pData: Pointer to data buffer |
1098 | * @param pData Pointer to data buffer |
| 1029 | * @param Size: Amount of data to be sent |
1099 | * @param Size Amount of data to be sent |
| 1030 | * @retval HAL status |
1100 | * @retval HAL status |
| 1031 | */ |
1101 | */ |
| 1032 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
1102 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| 1033 | { |
1103 | { |
| 1034 | if(hi2c->State == HAL_I2C_STATE_READY) |
1104 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1049... | Line 1119... | ||
| 1049 | 1119 | ||
| 1050 | /* Disable Pos */ |
1120 | /* Disable Pos */ |
| 1051 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1121 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1052 | 1122 | ||
| 1053 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
1123 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 1124 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
|
| 1054 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1125 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1055 | 1126 | ||
| 1056 | hi2c->pBuffPtr = pData; |
1127 | hi2c->pBuffPtr = pData; |
| 1057 | hi2c->XferSize = Size; |
1128 | hi2c->XferSize = Size; |
| 1058 | hi2c->XferCount = Size; |
1129 | hi2c->XferCount = Size; |
| Line 1094... | Line 1165... | ||
| 1094 | return HAL_BUSY; |
1165 | return HAL_BUSY; |
| 1095 | } |
1166 | } |
| 1096 | } |
1167 | } |
| 1097 | 1168 | ||
| 1098 | /** |
1169 | /** |
| 1099 | * @brief Receive in master mode an amount of data in no-blocking mode with Interrupt |
1170 | * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt |
| 1100 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1171 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1101 | * the configuration information for the specified I2C. |
1172 | * the configuration information for the specified I2C. |
| 1102 | * @param DevAddress: Target device address |
1173 | * @param DevAddress Target device address |
| 1103 | * @param pData: Pointer to data buffer |
1174 | * @param pData Pointer to data buffer |
| 1104 | * @param Size: Amount of data to be sent |
1175 | * @param Size Amount of data to be sent |
| 1105 | * @retval HAL status |
1176 | * @retval HAL status |
| 1106 | */ |
1177 | */ |
| 1107 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
1178 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| 1108 | { |
1179 | { |
| 1109 | if(hi2c->State == HAL_I2C_STATE_READY) |
1180 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1124... | Line 1195... | ||
| 1124 | 1195 | ||
| 1125 | /* Disable Pos */ |
1196 | /* Disable Pos */ |
| 1126 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1197 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1127 | 1198 | ||
| 1128 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
1199 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 1200 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
|
| 1129 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1201 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1130 | 1202 | ||
| 1131 | hi2c->pBuffPtr = pData; |
1203 | hi2c->pBuffPtr = pData; |
| 1132 | hi2c->XferSize = Size; |
1204 | hi2c->XferSize = Size; |
| 1133 | hi2c->XferCount = Size; |
1205 | hi2c->XferCount = Size; |
| Line 1160... | Line 1232... | ||
| 1160 | /* Generate Stop */ |
1232 | /* Generate Stop */ |
| 1161 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
1233 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| 1162 | } |
1234 | } |
| 1163 | else if(hi2c->XferCount == 2) |
1235 | else if(hi2c->XferCount == 2) |
| 1164 | { |
1236 | { |
| 1165 | /* Disable Acknowledge */ |
- | |
| 1166 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
- | |
| 1167 | - | ||
| 1168 | /* Enable Pos */ |
1237 | /* Enable Pos */ |
| 1169 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1238 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1170 | 1239 | ||
| 1171 | /* Clear ADDR flag */ |
1240 | /* Clear ADDR flag */ |
| 1172 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
1241 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| - | 1242 | ||
| - | 1243 | /* Disable Acknowledge */ |
|
| - | 1244 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
|
| 1173 | } |
1245 | } |
| 1174 | else |
1246 | else |
| 1175 | { |
1247 | { |
| 1176 | /* Enable Acknowledge */ |
1248 | /* Enable Acknowledge */ |
| 1177 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
1249 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| Line 1197... | Line 1269... | ||
| 1197 | return HAL_BUSY; |
1269 | return HAL_BUSY; |
| 1198 | } |
1270 | } |
| 1199 | } |
1271 | } |
| 1200 | 1272 | ||
| 1201 | /** |
1273 | /** |
| 1202 | * @brief Transmit in slave mode an amount of data in no-blocking mode with Interrupt |
1274 | * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt |
| 1203 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1275 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1204 | * the configuration information for the specified I2C. |
1276 | * the configuration information for the specified I2C. |
| 1205 | * @param pData: Pointer to data buffer |
1277 | * @param pData Pointer to data buffer |
| 1206 | * @param Size: Amount of data to be sent |
1278 | * @param Size Amount of data to be sent |
| 1207 | * @retval HAL status |
1279 | * @retval HAL status |
| 1208 | */ |
1280 | */ |
| 1209 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
1281 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| 1210 | { |
1282 | { |
| 1211 | if(hi2c->State == HAL_I2C_STATE_READY) |
1283 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1226... | Line 1298... | ||
| 1226 | 1298 | ||
| 1227 | /* Disable Pos */ |
1299 | /* Disable Pos */ |
| 1228 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1300 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1229 | 1301 | ||
| 1230 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
1302 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 1303 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
|
| 1231 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1304 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1232 | 1305 | ||
| 1233 | hi2c->pBuffPtr = pData; |
1306 | hi2c->pBuffPtr = pData; |
| 1234 | hi2c->XferSize = Size; |
1307 | hi2c->XferSize = Size; |
| 1235 | hi2c->XferCount = Size; |
1308 | hi2c->XferCount = Size; |
| Line 1254... | Line 1327... | ||
| 1254 | return HAL_BUSY; |
1327 | return HAL_BUSY; |
| 1255 | } |
1328 | } |
| 1256 | } |
1329 | } |
| 1257 | 1330 | ||
| 1258 | /** |
1331 | /** |
| 1259 | * @brief Receive in slave mode an amount of data in no-blocking mode with Interrupt |
1332 | * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt |
| 1260 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1333 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1261 | * the configuration information for the specified I2C. |
1334 | * the configuration information for the specified I2C. |
| 1262 | * @param pData: Pointer to data buffer |
1335 | * @param pData Pointer to data buffer |
| 1263 | * @param Size: Amount of data to be sent |
1336 | * @param Size Amount of data to be sent |
| 1264 | * @retval HAL status |
1337 | * @retval HAL status |
| 1265 | */ |
1338 | */ |
| 1266 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
1339 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| 1267 | { |
1340 | { |
| 1268 | if(hi2c->State == HAL_I2C_STATE_READY) |
1341 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1270... | Line 1343... | ||
| 1270 | if((pData == NULL) || (Size == 0)) |
1343 | if((pData == NULL) || (Size == 0)) |
| 1271 | { |
1344 | { |
| 1272 | return HAL_ERROR; |
1345 | return HAL_ERROR; |
| 1273 | } |
1346 | } |
| 1274 | 1347 | ||
| 1275 | /* Wait until BUSY flag is reset */ |
- | |
| 1276 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
1348 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG) != HAL_OK) |
| 1277 | { |
1349 | { |
| 1278 | return HAL_BUSY; |
1350 | return HAL_BUSY; |
| 1279 | } |
1351 | } |
| 1280 | 1352 | ||
| Line 1283... | Line 1355... | ||
| 1283 | 1355 | ||
| 1284 | /* Disable Pos */ |
1356 | /* Disable Pos */ |
| 1285 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1357 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1286 | 1358 | ||
| 1287 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
1359 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 1360 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
|
| 1288 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1361 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1289 | 1362 | ||
| 1290 | hi2c->pBuffPtr = pData; |
1363 | hi2c->pBuffPtr = pData; |
| 1291 | hi2c->XferSize = Size; |
1364 | hi2c->XferSize = Size; |
| 1292 | hi2c->XferCount = Size; |
1365 | hi2c->XferCount = Size; |
| Line 1312... | Line 1385... | ||
| 1312 | } |
1385 | } |
| 1313 | } |
1386 | } |
| 1314 | 1387 | ||
| 1315 | 1388 | ||
| 1316 | /** |
1389 | /** |
| 1317 | * @brief Transmit in master mode an amount of data in no-blocking mode with DMA |
1390 | * @brief Transmit in master mode an amount of data in non-blocking mode with DMA |
| 1318 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1391 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1319 | * the configuration information for the specified I2C. |
1392 | * the configuration information for the specified I2C. |
| 1320 | * @param DevAddress: Target device address |
1393 | * @param DevAddress Target device address |
| 1321 | * @param pData: Pointer to data buffer |
1394 | * @param pData Pointer to data buffer |
| 1322 | * @param Size: Amount of data to be sent |
1395 | * @param Size Amount of data to be sent |
| 1323 | * @retval HAL status |
1396 | * @retval HAL status |
| 1324 | */ |
1397 | */ |
| 1325 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
1398 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| 1326 | { |
1399 | { |
| 1327 | if(hi2c->State == HAL_I2C_STATE_READY) |
1400 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1342... | Line 1415... | ||
| 1342 | 1415 | ||
| 1343 | /* Disable Pos */ |
1416 | /* Disable Pos */ |
| 1344 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1417 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1345 | 1418 | ||
| 1346 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
1419 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 1420 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
|
| 1347 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1421 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1348 | 1422 | ||
| 1349 | hi2c->pBuffPtr = pData; |
1423 | hi2c->pBuffPtr = pData; |
| 1350 | hi2c->XferSize = Size; |
1424 | hi2c->XferSize = Size; |
| 1351 | hi2c->XferCount = Size; |
1425 | hi2c->XferCount = Size; |
| Line 1392... | Line 1466... | ||
| 1392 | return HAL_BUSY; |
1466 | return HAL_BUSY; |
| 1393 | } |
1467 | } |
| 1394 | } |
1468 | } |
| 1395 | 1469 | ||
| 1396 | /** |
1470 | /** |
| 1397 | * @brief Receive in master mode an amount of data in no-blocking mode with DMA |
1471 | * @brief Receive in master mode an amount of data in non-blocking mode with DMA |
| 1398 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1472 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1399 | * the configuration information for the specified I2C. |
1473 | * the configuration information for the specified I2C. |
| 1400 | * @param DevAddress: Target device address |
1474 | * @param DevAddress Target device address |
| 1401 | * @param pData: Pointer to data buffer |
1475 | * @param pData Pointer to data buffer |
| 1402 | * @param Size: Amount of data to be sent |
1476 | * @param Size Amount of data to be sent |
| 1403 | * @retval HAL status |
1477 | * @retval HAL status |
| 1404 | */ |
1478 | */ |
| 1405 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
1479 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) |
| 1406 | { |
1480 | { |
| 1407 | if(hi2c->State == HAL_I2C_STATE_READY) |
1481 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1422... | Line 1496... | ||
| 1422 | 1496 | ||
| 1423 | /* Disable Pos */ |
1497 | /* Disable Pos */ |
| 1424 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1498 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1425 | 1499 | ||
| 1426 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
1500 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 1501 | hi2c->Mode = HAL_I2C_MODE_MASTER; |
|
| 1427 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1502 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1428 | 1503 | ||
| 1429 | hi2c->pBuffPtr = pData; |
1504 | hi2c->pBuffPtr = pData; |
| 1430 | hi2c->XferSize = Size; |
1505 | hi2c->XferSize = Size; |
| 1431 | hi2c->XferCount = Size; |
1506 | hi2c->XferCount = Size; |
| Line 1483... | Line 1558... | ||
| 1483 | return HAL_BUSY; |
1558 | return HAL_BUSY; |
| 1484 | } |
1559 | } |
| 1485 | } |
1560 | } |
| 1486 | 1561 | ||
| 1487 | /** |
1562 | /** |
| 1488 | * @brief Transmit in slave mode an amount of data in no-blocking mode with DMA |
1563 | * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA |
| 1489 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1564 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1490 | * the configuration information for the specified I2C. |
1565 | * the configuration information for the specified I2C. |
| 1491 | * @param pData: Pointer to data buffer |
1566 | * @param pData Pointer to data buffer |
| 1492 | * @param Size: Amount of data to be sent |
1567 | * @param Size Amount of data to be sent |
| 1493 | * @retval HAL status |
1568 | * @retval HAL status |
| 1494 | */ |
1569 | */ |
| 1495 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
1570 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| 1496 | { |
1571 | { |
| 1497 | if(hi2c->State == HAL_I2C_STATE_READY) |
1572 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1512... | Line 1587... | ||
| 1512 | 1587 | ||
| 1513 | /* Disable Pos */ |
1588 | /* Disable Pos */ |
| 1514 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1589 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1515 | 1590 | ||
| 1516 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
1591 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 1592 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
|
| 1517 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1593 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1518 | 1594 | ||
| 1519 | hi2c->pBuffPtr = pData; |
1595 | hi2c->pBuffPtr = pData; |
| 1520 | hi2c->XferSize = Size; |
1596 | hi2c->XferSize = Size; |
| 1521 | hi2c->XferCount = Size; |
1597 | hi2c->XferCount = Size; |
| Line 1572... | Line 1648... | ||
| 1572 | return HAL_BUSY; |
1648 | return HAL_BUSY; |
| 1573 | } |
1649 | } |
| 1574 | } |
1650 | } |
| 1575 | 1651 | ||
| 1576 | /** |
1652 | /** |
| 1577 | * @brief Receive in slave mode an amount of data in no-blocking mode with DMA |
1653 | * @brief Receive in slave mode an amount of data in non-blocking mode with DMA |
| 1578 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1654 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1579 | * the configuration information for the specified I2C. |
1655 | * the configuration information for the specified I2C. |
| 1580 | * @param pData: Pointer to data buffer |
1656 | * @param pData Pointer to data buffer |
| 1581 | * @param Size: Amount of data to be sent |
1657 | * @param Size Amount of data to be sent |
| 1582 | * @retval HAL status |
1658 | * @retval HAL status |
| 1583 | */ |
1659 | */ |
| 1584 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
1660 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) |
| 1585 | { |
1661 | { |
| 1586 | if(hi2c->State == HAL_I2C_STATE_READY) |
1662 | if(hi2c->State == HAL_I2C_STATE_READY) |
| Line 1601... | Line 1677... | ||
| 1601 | 1677 | ||
| 1602 | /* Disable Pos */ |
1678 | /* Disable Pos */ |
| 1603 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1679 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1604 | 1680 | ||
| 1605 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
1681 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 1682 | hi2c->Mode = HAL_I2C_MODE_SLAVE; |
|
| 1606 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1683 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1607 | 1684 | ||
| 1608 | hi2c->pBuffPtr = pData; |
1685 | hi2c->pBuffPtr = pData; |
| 1609 | hi2c->XferSize = Size; |
1686 | hi2c->XferSize = Size; |
| 1610 | hi2c->XferCount = Size; |
1687 | hi2c->XferCount = Size; |
| 1611 | 1688 | ||
| 1612 | /* Set the I2C DMA transfert complete callback */ |
1689 | /* Set the I2C DMA transfer complete callback */ |
| 1613 | hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; |
1690 | hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; |
| 1614 | 1691 | ||
| 1615 | /* Set the DMA error callback */ |
1692 | /* Set the DMA error callback */ |
| 1616 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
1693 | hi2c->hdmarx->XferErrorCallback = I2C_DMAError; |
| 1617 | 1694 | ||
| Line 1642... | Line 1719... | ||
| 1642 | { |
1719 | { |
| 1643 | return HAL_BUSY; |
1720 | return HAL_BUSY; |
| 1644 | } |
1721 | } |
| 1645 | } |
1722 | } |
| 1646 | 1723 | ||
| 1647 | - | ||
| 1648 | /** |
1724 | /** |
| 1649 | * @brief Write an amount of data in blocking mode to a specific memory address |
1725 | * @brief Write an amount of data in blocking mode to a specific memory address |
| 1650 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1726 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1651 | * the configuration information for the specified I2C. |
1727 | * the configuration information for the specified I2C. |
| 1652 | * @param DevAddress: Target device address |
1728 | * @param DevAddress Target device address |
| 1653 | * @param MemAddress: Internal memory address |
1729 | * @param MemAddress Internal memory address |
| 1654 | * @param MemAddSize: Size of internal memory address |
1730 | * @param MemAddSize Size of internal memory address |
| 1655 | * @param pData: Pointer to data buffer |
1731 | * @param pData Pointer to data buffer |
| 1656 | * @param Size: Amount of data to be sent |
1732 | * @param Size Amount of data to be sent |
| 1657 | * @param Timeout: Timeout duration |
1733 | * @param Timeout Timeout duration |
| 1658 | * @retval HAL status |
1734 | * @retval HAL status |
| 1659 | */ |
1735 | */ |
| 1660 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
1736 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| 1661 | { |
1737 | { |
| 1662 | /* Check the parameters */ |
1738 | /* Check the parameters */ |
| Line 1679... | Line 1755... | ||
| 1679 | __HAL_LOCK(hi2c); |
1755 | __HAL_LOCK(hi2c); |
| 1680 | 1756 | ||
| 1681 | /* Disable Pos */ |
1757 | /* Disable Pos */ |
| 1682 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1758 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1683 | 1759 | ||
| 1684 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
1760 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 1761 | hi2c->Mode = HAL_I2C_MODE_MEM; |
|
| 1685 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1762 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1686 | 1763 | ||
| 1687 | /* Send Slave Address and Memory Address */ |
1764 | /* Send Slave Address and Memory Address */ |
| 1688 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
1765 | if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
| 1689 | { |
1766 | { |
| Line 1702... | Line 1779... | ||
| 1702 | } |
1779 | } |
| 1703 | 1780 | ||
| 1704 | while(Size > 0) |
1781 | while(Size > 0) |
| 1705 | { |
1782 | { |
| 1706 | /* Wait until TXE flag is set */ |
1783 | /* Wait until TXE flag is set */ |
| 1707 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
1784 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 1708 | { |
1785 | { |
| - | 1786 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 1787 | { |
|
| - | 1788 | /* Generate Stop */ |
|
| - | 1789 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 1790 | return HAL_ERROR; |
|
| - | 1791 | } |
|
| - | 1792 | else |
|
| - | 1793 | { |
|
| 1709 | return HAL_TIMEOUT; |
1794 | return HAL_TIMEOUT; |
| - | 1795 | } |
|
| 1710 | } |
1796 | } |
| 1711 | 1797 | ||
| 1712 | /* Write data to DR */ |
1798 | /* Write data to DR */ |
| 1713 | hi2c->Instance->DR = (*pData++); |
1799 | hi2c->Instance->DR = (*pData++); |
| 1714 | Size--; |
1800 | Size--; |
| Line 1720... | Line 1806... | ||
| 1720 | Size--; |
1806 | Size--; |
| 1721 | } |
1807 | } |
| 1722 | } |
1808 | } |
| 1723 | 1809 | ||
| 1724 | /* Wait until TXE flag is set */ |
1810 | /* Wait until TXE flag is set */ |
| 1725 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
1811 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 1726 | { |
1812 | { |
| - | 1813 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 1814 | { |
|
| - | 1815 | /* Generate Stop */ |
|
| - | 1816 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 1817 | return HAL_ERROR; |
|
| - | 1818 | } |
|
| - | 1819 | else |
|
| - | 1820 | { |
|
| 1727 | return HAL_TIMEOUT; |
1821 | return HAL_TIMEOUT; |
| - | 1822 | } |
|
| 1728 | } |
1823 | } |
| 1729 | 1824 | ||
| 1730 | /* Generate Stop */ |
1825 | /* Generate Stop */ |
| 1731 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
1826 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| 1732 | 1827 | ||
| 1733 | hi2c->State = HAL_I2C_STATE_READY; |
1828 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 1829 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 1734 | 1830 | ||
| 1735 | /* Process Unlocked */ |
1831 | /* Process Unlocked */ |
| 1736 | __HAL_UNLOCK(hi2c); |
1832 | __HAL_UNLOCK(hi2c); |
| 1737 | 1833 | ||
| 1738 | return HAL_OK; |
1834 | return HAL_OK; |
| Line 1743... | Line 1839... | ||
| 1743 | } |
1839 | } |
| 1744 | } |
1840 | } |
| 1745 | 1841 | ||
| 1746 | /** |
1842 | /** |
| 1747 | * @brief Read an amount of data in blocking mode from a specific memory address |
1843 | * @brief Read an amount of data in blocking mode from a specific memory address |
| 1748 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
1844 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1749 | * the configuration information for the specified I2C. |
1845 | * the configuration information for the specified I2C. |
| 1750 | * @param DevAddress: Target device address |
1846 | * @param DevAddress Target device address |
| 1751 | * @param MemAddress: Internal memory address |
1847 | * @param MemAddress Internal memory address |
| 1752 | * @param MemAddSize: Size of internal memory address |
1848 | * @param MemAddSize Size of internal memory address |
| 1753 | * @param pData: Pointer to data buffer |
1849 | * @param pData Pointer to data buffer |
| 1754 | * @param Size: Amount of data to be sent |
1850 | * @param Size Amount of data to be sent |
| 1755 | * @param Timeout: Timeout duration |
1851 | * @param Timeout Timeout duration |
| 1756 | * @retval HAL status |
1852 | * @retval HAL status |
| 1757 | */ |
1853 | */ |
| 1758 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
1854 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) |
| 1759 | { |
1855 | { |
| 1760 | /* Check the parameters */ |
1856 | /* Check the parameters */ |
| Line 1777... | Line 1873... | ||
| 1777 | __HAL_LOCK(hi2c); |
1873 | __HAL_LOCK(hi2c); |
| 1778 | 1874 | ||
| 1779 | /* Disable Pos */ |
1875 | /* Disable Pos */ |
| 1780 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1876 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1781 | 1877 | ||
| 1782 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
1878 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 1879 | hi2c->Mode = HAL_I2C_MODE_MEM; |
|
| 1783 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
1880 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1784 | 1881 | ||
| 1785 | /* Send Slave Address and Memory Address */ |
1882 | /* Send Slave Address and Memory Address */ |
| 1786 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
1883 | if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout) != HAL_OK) |
| 1787 | { |
1884 | { |
| Line 1802... | Line 1899... | ||
| 1802 | if(Size == 1) |
1899 | if(Size == 1) |
| 1803 | { |
1900 | { |
| 1804 | /* Disable Acknowledge */ |
1901 | /* Disable Acknowledge */ |
| 1805 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
1902 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 1806 | 1903 | ||
| - | 1904 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
|
| - | 1905 | software sequence must complete before the current byte end of transfer */ |
|
| - | 1906 | __disable_irq(); |
|
| - | 1907 | ||
| 1807 | /* Clear ADDR flag */ |
1908 | /* Clear ADDR flag */ |
| 1808 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
1909 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| 1809 | 1910 | ||
| 1810 | /* Generate Stop */ |
1911 | /* Generate Stop */ |
| 1811 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
1912 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| - | 1913 | ||
| - | 1914 | /* Re-enable IRQs */ |
|
| - | 1915 | __enable_irq(); |
|
| 1812 | } |
1916 | } |
| 1813 | else if(Size == 2) |
1917 | else if(Size == 2) |
| 1814 | { |
1918 | { |
| 1815 | /* Disable Acknowledge */ |
- | |
| 1816 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
- | |
| 1817 | - | ||
| 1818 | /* Enable Pos */ |
1919 | /* Enable Pos */ |
| 1819 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
1920 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1820 | 1921 | ||
| - | 1922 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
|
| - | 1923 | software sequence must complete before the current byte end of transfer */ |
|
| - | 1924 | __disable_irq(); |
|
| - | 1925 | ||
| 1821 | /* Clear ADDR flag */ |
1926 | /* Clear ADDR flag */ |
| 1822 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
1927 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| - | 1928 | ||
| - | 1929 | /* Disable Acknowledge */ |
|
| - | 1930 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
|
| - | 1931 | ||
| - | 1932 | /* Re-enable IRQs */ |
|
| - | 1933 | __enable_irq(); |
|
| 1823 | } |
1934 | } |
| 1824 | else |
1935 | else |
| 1825 | { |
1936 | { |
| - | 1937 | /* Enable Acknowledge */ |
|
| - | 1938 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
|
| - | 1939 | ||
| 1826 | /* Clear ADDR flag */ |
1940 | /* Clear ADDR flag */ |
| 1827 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
1941 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| 1828 | } |
1942 | } |
| 1829 | 1943 | ||
| 1830 | while(Size > 0) |
1944 | while(Size > 0) |
| Line 1833... | Line 1947... | ||
| 1833 | { |
1947 | { |
| 1834 | /* One byte */ |
1948 | /* One byte */ |
| 1835 | if(Size== 1) |
1949 | if(Size== 1) |
| 1836 | { |
1950 | { |
| 1837 | /* Wait until RXNE flag is set */ |
1951 | /* Wait until RXNE flag is set */ |
| 1838 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
1952 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 1839 | { |
1953 | { |
| - | 1954 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
|
| - | 1955 | { |
|
| 1840 | return HAL_TIMEOUT; |
1956 | return HAL_TIMEOUT; |
| - | 1957 | } |
|
| - | 1958 | else |
|
| - | 1959 | { |
|
| - | 1960 | return HAL_ERROR; |
|
| - | 1961 | } |
|
| 1841 | } |
1962 | } |
| 1842 | 1963 | ||
| 1843 | /* Read data from DR */ |
1964 | /* Read data from DR */ |
| 1844 | (*pData++) = hi2c->Instance->DR; |
1965 | (*pData++) = hi2c->Instance->DR; |
| 1845 | Size--; |
1966 | Size--; |
| Line 1851... | Line 1972... | ||
| 1851 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
1972 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout) != HAL_OK) |
| 1852 | { |
1973 | { |
| 1853 | return HAL_TIMEOUT; |
1974 | return HAL_TIMEOUT; |
| 1854 | } |
1975 | } |
| 1855 | 1976 | ||
| - | 1977 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
|
| - | 1978 | software sequence must complete before the current byte end of transfer */ |
|
| - | 1979 | __disable_irq(); |
|
| - | 1980 | ||
| 1856 | /* Generate Stop */ |
1981 | /* Generate Stop */ |
| 1857 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
1982 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| 1858 | 1983 | ||
| 1859 | /* Read data from DR */ |
1984 | /* Read data from DR */ |
| 1860 | (*pData++) = hi2c->Instance->DR; |
1985 | (*pData++) = hi2c->Instance->DR; |
| 1861 | Size--; |
1986 | Size--; |
| 1862 | 1987 | ||
| - | 1988 | /* Re-enable IRQs */ |
|
| - | 1989 | __enable_irq(); |
|
| - | 1990 | ||
| 1863 | /* Read data from DR */ |
1991 | /* Read data from DR */ |
| 1864 | (*pData++) = hi2c->Instance->DR; |
1992 | (*pData++) = hi2c->Instance->DR; |
| 1865 | Size--; |
1993 | Size--; |
| 1866 | } |
1994 | } |
| 1867 | /* 3 Last bytes */ |
1995 | /* 3 Last bytes */ |
| Line 1874... | Line 2002... | ||
| 1874 | } |
2002 | } |
| 1875 | 2003 | ||
| 1876 | /* Disable Acknowledge */ |
2004 | /* Disable Acknowledge */ |
| 1877 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
2005 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 1878 | 2006 | ||
| - | 2007 | /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3 |
|
| - | 2008 | software sequence must complete before the current byte end of transfer */ |
|
| - | 2009 | __disable_irq(); |
|
| - | 2010 | ||
| 1879 | /* Read data from DR */ |
2011 | /* Read data from DR */ |
| 1880 | (*pData++) = hi2c->Instance->DR; |
2012 | (*pData++) = hi2c->Instance->DR; |
| 1881 | Size--; |
2013 | Size--; |
| 1882 | 2014 | ||
| 1883 | /* Wait until BTF flag is set */ |
2015 | /* Wait until BTF flag is set */ |
| Line 1891... | Line 2023... | ||
| 1891 | 2023 | ||
| 1892 | /* Read data from DR */ |
2024 | /* Read data from DR */ |
| 1893 | (*pData++) = hi2c->Instance->DR; |
2025 | (*pData++) = hi2c->Instance->DR; |
| 1894 | Size--; |
2026 | Size--; |
| 1895 | 2027 | ||
| - | 2028 | /* Re-enable IRQs */ |
|
| - | 2029 | __enable_irq(); |
|
| - | 2030 | ||
| 1896 | /* Read data from DR */ |
2031 | /* Read data from DR */ |
| 1897 | (*pData++) = hi2c->Instance->DR; |
2032 | (*pData++) = hi2c->Instance->DR; |
| 1898 | Size--; |
2033 | Size--; |
| 1899 | } |
2034 | } |
| 1900 | } |
2035 | } |
| 1901 | else |
2036 | else |
| 1902 | { |
2037 | { |
| 1903 | /* Wait until RXNE flag is set */ |
2038 | /* Wait until RXNE flag is set */ |
| 1904 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout) != HAL_OK) |
2039 | if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 1905 | { |
2040 | { |
| - | 2041 | if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT) |
|
| - | 2042 | { |
|
| 1906 | return HAL_TIMEOUT; |
2043 | return HAL_TIMEOUT; |
| - | 2044 | } |
|
| - | 2045 | else |
|
| - | 2046 | { |
|
| - | 2047 | return HAL_ERROR; |
|
| - | 2048 | } |
|
| 1907 | } |
2049 | } |
| 1908 | 2050 | ||
| 1909 | /* Read data from DR */ |
2051 | /* Read data from DR */ |
| 1910 | (*pData++) = hi2c->Instance->DR; |
2052 | (*pData++) = hi2c->Instance->DR; |
| 1911 | Size--; |
2053 | Size--; |
| Line 1918... | Line 2060... | ||
| 1918 | } |
2060 | } |
| 1919 | } |
2061 | } |
| 1920 | } |
2062 | } |
| 1921 | 2063 | ||
| 1922 | hi2c->State = HAL_I2C_STATE_READY; |
2064 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 2065 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 1923 | 2066 | ||
| 1924 | /* Process Unlocked */ |
2067 | /* Process Unlocked */ |
| 1925 | __HAL_UNLOCK(hi2c); |
2068 | __HAL_UNLOCK(hi2c); |
| 1926 | 2069 | ||
| 1927 | return HAL_OK; |
2070 | return HAL_OK; |
| Line 1930... | Line 2073... | ||
| 1930 | { |
2073 | { |
| 1931 | return HAL_BUSY; |
2074 | return HAL_BUSY; |
| 1932 | } |
2075 | } |
| 1933 | } |
2076 | } |
| 1934 | 2077 | ||
| 1935 | - | ||
| 1936 | /** |
2078 | /** |
| 1937 | * @brief Write an amount of data in no-blocking mode with Interrupt to a specific memory address |
2079 | * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address |
| 1938 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2080 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 1939 | * the configuration information for the specified I2C. |
2081 | * the configuration information for the specified I2C. |
| 1940 | * @param DevAddress: Target device address |
2082 | * @param DevAddress Target device address |
| 1941 | * @param MemAddress: Internal memory address |
2083 | * @param MemAddress Internal memory address |
| 1942 | * @param MemAddSize: Size of internal memory address |
2084 | * @param MemAddSize Size of internal memory address |
| 1943 | * @param pData: Pointer to data buffer |
2085 | * @param pData Pointer to data buffer |
| 1944 | * @param Size: Amount of data to be sent |
2086 | * @param Size Amount of data to be sent |
| 1945 | * @retval HAL status |
2087 | * @retval HAL status |
| 1946 | */ |
2088 | */ |
| 1947 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
2089 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| 1948 | { |
2090 | { |
| 1949 | /* Check the parameters */ |
2091 | /* Check the parameters */ |
| Line 1966... | Line 2108... | ||
| 1966 | __HAL_LOCK(hi2c); |
2108 | __HAL_LOCK(hi2c); |
| 1967 | 2109 | ||
| 1968 | /* Disable Pos */ |
2110 | /* Disable Pos */ |
| 1969 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
2111 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 1970 | 2112 | ||
| 1971 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
2113 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 2114 | hi2c->Mode = HAL_I2C_MODE_MEM; |
|
| 1972 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
2115 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 1973 | 2116 | ||
| 1974 | hi2c->pBuffPtr = pData; |
2117 | hi2c->pBuffPtr = pData; |
| 1975 | hi2c->XferSize = Size; |
2118 | hi2c->XferSize = Size; |
| 1976 | hi2c->XferCount = Size; |
2119 | hi2c->XferCount = Size; |
| Line 2009... | Line 2152... | ||
| 2009 | return HAL_BUSY; |
2152 | return HAL_BUSY; |
| 2010 | } |
2153 | } |
| 2011 | } |
2154 | } |
| 2012 | 2155 | ||
| 2013 | /** |
2156 | /** |
| 2014 | * @brief Read an amount of data in no-blocking mode with Interrupt from a specific memory address |
2157 | * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address |
| 2015 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2158 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2016 | * the configuration information for the specified I2C. |
2159 | * the configuration information for the specified I2C. |
| 2017 | * @param DevAddress: Target device address |
2160 | * @param DevAddress Target device address |
| 2018 | * @param MemAddress: Internal memory address |
2161 | * @param MemAddress Internal memory address |
| 2019 | * @param MemAddSize: Size of internal memory address |
2162 | * @param MemAddSize Size of internal memory address |
| 2020 | * @param pData: Pointer to data buffer |
2163 | * @param pData Pointer to data buffer |
| 2021 | * @param Size: Amount of data to be sent |
2164 | * @param Size Amount of data to be sent |
| 2022 | * @retval HAL status |
2165 | * @retval HAL status |
| 2023 | */ |
2166 | */ |
| 2024 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
2167 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| 2025 | { |
2168 | { |
| 2026 | /* Check the parameters */ |
2169 | /* Check the parameters */ |
| Line 2043... | Line 2186... | ||
| 2043 | __HAL_LOCK(hi2c); |
2186 | __HAL_LOCK(hi2c); |
| 2044 | 2187 | ||
| 2045 | /* Disable Pos */ |
2188 | /* Disable Pos */ |
| 2046 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
2189 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 2047 | 2190 | ||
| 2048 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
2191 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 2192 | hi2c->Mode = HAL_I2C_MODE_MEM; |
|
| 2049 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
2193 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 2050 | 2194 | ||
| 2051 | hi2c->pBuffPtr = pData; |
2195 | hi2c->pBuffPtr = pData; |
| 2052 | hi2c->XferSize = Size; |
2196 | hi2c->XferSize = Size; |
| 2053 | hi2c->XferCount = Size; |
2197 | hi2c->XferCount = Size; |
| Line 2080... | Line 2224... | ||
| 2080 | /* Generate Stop */ |
2224 | /* Generate Stop */ |
| 2081 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
2225 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| 2082 | } |
2226 | } |
| 2083 | else if(hi2c->XferCount == 2) |
2227 | else if(hi2c->XferCount == 2) |
| 2084 | { |
2228 | { |
| 2085 | /* Disable Acknowledge */ |
- | |
| 2086 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
- | |
| 2087 | - | ||
| 2088 | /* Enable Pos */ |
2229 | /* Enable Pos */ |
| 2089 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
2230 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 2090 | 2231 | ||
| 2091 | /* Clear ADDR flag */ |
2232 | /* Clear ADDR flag */ |
| 2092 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
2233 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| - | 2234 | ||
| - | 2235 | /* Disable Acknowledge */ |
|
| - | 2236 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
|
| 2093 | } |
2237 | } |
| 2094 | else |
2238 | else |
| 2095 | { |
2239 | { |
| 2096 | /* Enable Acknowledge */ |
2240 | /* Enable Acknowledge */ |
| 2097 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
2241 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| Line 2118... | Line 2262... | ||
| 2118 | } |
2262 | } |
| 2119 | } |
2263 | } |
| 2120 | 2264 | ||
| 2121 | 2265 | ||
| 2122 | /** |
2266 | /** |
| 2123 | * @brief Write an amount of data in no-blocking mode with DMA to a specific memory address |
2267 | * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address |
| 2124 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2268 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2125 | * the configuration information for the specified I2C. |
2269 | * the configuration information for the specified I2C. |
| 2126 | * @param DevAddress: Target device address |
2270 | * @param DevAddress Target device address |
| 2127 | * @param MemAddress: Internal memory address |
2271 | * @param MemAddress Internal memory address |
| 2128 | * @param MemAddSize: Size of internal memory address |
2272 | * @param MemAddSize Size of internal memory address |
| 2129 | * @param pData: Pointer to data buffer |
2273 | * @param pData Pointer to data buffer |
| 2130 | * @param Size: Amount of data to be sent |
2274 | * @param Size Amount of data to be sent |
| 2131 | * @retval HAL status |
2275 | * @retval HAL status |
| 2132 | */ |
2276 | */ |
| 2133 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
2277 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| 2134 | { |
2278 | { |
| 2135 | /* Check the parameters */ |
2279 | /* Check the parameters */ |
| Line 2152... | Line 2296... | ||
| 2152 | __HAL_LOCK(hi2c); |
2296 | __HAL_LOCK(hi2c); |
| 2153 | 2297 | ||
| 2154 | /* Disable Pos */ |
2298 | /* Disable Pos */ |
| 2155 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
2299 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 2156 | 2300 | ||
| 2157 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_TX; |
2301 | hi2c->State = HAL_I2C_STATE_BUSY_TX; |
| - | 2302 | hi2c->Mode = HAL_I2C_MODE_MEM; |
|
| 2158 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
2303 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 2159 | 2304 | ||
| 2160 | hi2c->pBuffPtr = pData; |
2305 | hi2c->pBuffPtr = pData; |
| 2161 | hi2c->XferSize = Size; |
2306 | hi2c->XferSize = Size; |
| 2162 | hi2c->XferCount = Size; |
2307 | hi2c->XferCount = Size; |
| Line 2200... | Line 2345... | ||
| 2200 | return HAL_BUSY; |
2345 | return HAL_BUSY; |
| 2201 | } |
2346 | } |
| 2202 | } |
2347 | } |
| 2203 | 2348 | ||
| 2204 | /** |
2349 | /** |
| 2205 | * @brief Reads an amount of data in no-blocking mode with DMA from a specific memory address. |
2350 | * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. |
| 2206 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2351 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2207 | * the configuration information for the specified I2C. |
2352 | * the configuration information for the specified I2C. |
| 2208 | * @param DevAddress: Target device address |
2353 | * @param DevAddress Target device address |
| 2209 | * @param MemAddress: Internal memory address |
2354 | * @param MemAddress Internal memory address |
| 2210 | * @param MemAddSize: Size of internal memory address |
2355 | * @param MemAddSize Size of internal memory address |
| 2211 | * @param pData: Pointer to data buffer |
2356 | * @param pData Pointer to data buffer |
| 2212 | * @param Size: Amount of data to be read |
2357 | * @param Size Amount of data to be read |
| 2213 | * @retval HAL status |
2358 | * @retval HAL status |
| 2214 | */ |
2359 | */ |
| 2215 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
2360 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size) |
| 2216 | { |
2361 | { |
| 2217 | /* Check the parameters */ |
2362 | /* Check the parameters */ |
| Line 2234... | Line 2379... | ||
| 2234 | __HAL_LOCK(hi2c); |
2379 | __HAL_LOCK(hi2c); |
| 2235 | 2380 | ||
| 2236 | /* Disable Pos */ |
2381 | /* Disable Pos */ |
| 2237 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
2382 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); |
| 2238 | 2383 | ||
| 2239 | hi2c->State = HAL_I2C_STATE_MEM_BUSY_RX; |
2384 | hi2c->State = HAL_I2C_STATE_BUSY_RX; |
| - | 2385 | hi2c->Mode = HAL_I2C_MODE_MEM; |
|
| 2240 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
2386 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
| 2241 | 2387 | ||
| 2242 | hi2c->pBuffPtr = pData; |
2388 | hi2c->pBuffPtr = pData; |
| 2243 | hi2c->XferSize = Size; |
2389 | hi2c->XferSize = Size; |
| 2244 | hi2c->XferCount = Size; |
2390 | hi2c->XferCount = Size; |
| Line 2299... | Line 2445... | ||
| 2299 | 2445 | ||
| 2300 | 2446 | ||
| 2301 | /** |
2447 | /** |
| 2302 | * @brief Checks if target device is ready for communication. |
2448 | * @brief Checks if target device is ready for communication. |
| 2303 | * @note This function is used with Memory devices |
2449 | * @note This function is used with Memory devices |
| 2304 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2450 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2305 | * the configuration information for the specified I2C. |
2451 | * the configuration information for the specified I2C. |
| 2306 | * @param DevAddress: Target device address |
2452 | * @param DevAddress Target device address |
| 2307 | * @param Trials: Number of trials |
2453 | * @param Trials Number of trials |
| 2308 | * @param Timeout: Timeout duration |
2454 | * @param Timeout Timeout duration |
| 2309 | * @retval HAL status |
2455 | * @retval HAL status |
| 2310 | */ |
2456 | */ |
| 2311 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
2457 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
| 2312 | { |
2458 | { |
| 2313 | uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1; |
2459 | uint32_t tickstart = 0, tmp1 = 0, tmp2 = 0, tmp3 = 0, I2C_Trials = 1; |
| Line 2421... | Line 2567... | ||
| 2421 | * @{ |
2567 | * @{ |
| 2422 | */ |
2568 | */ |
| 2423 | 2569 | ||
| 2424 | /** |
2570 | /** |
| 2425 | * @brief This function handles I2C event interrupt request. |
2571 | * @brief This function handles I2C event interrupt request. |
| 2426 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2572 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2427 | * the configuration information for the specified I2C. |
2573 | * the configuration information for the specified I2C. |
| 2428 | * @retval None |
2574 | * @retval None |
| 2429 | */ |
2575 | */ |
| 2430 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) |
2576 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) |
| 2431 | { |
2577 | { |
| 2432 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0; |
2578 | uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0, tmp4 = 0; |
| 2433 | /* Master mode selected */ |
2579 | /* Master or Memory mode selected */ |
| 2434 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL) == SET) |
2580 | if((hi2c->Mode == HAL_I2C_MODE_MASTER) || \ |
| - | 2581 | (hi2c->Mode == HAL_I2C_MODE_MEM)) |
|
| 2435 | { |
2582 | { |
| 2436 | /* I2C in mode Transmitter -----------------------------------------------*/ |
2583 | /* I2C in mode Transmitter -----------------------------------------------*/ |
| 2437 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET) |
2584 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == SET) |
| 2438 | { |
2585 | { |
| 2439 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE); |
2586 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE); |
| Line 2564... | Line 2711... | ||
| 2564 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
2711 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); |
| 2565 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
2712 | tmp2 = __HAL_I2C_GET_IT_SOURCE(hi2c, I2C_IT_ERR); |
| 2566 | /* I2C Acknowledge failure error interrupt occurred ------------------------*/ |
2713 | /* I2C Acknowledge failure error interrupt occurred ------------------------*/ |
| 2567 | if((tmp1 == SET) && (tmp2 == SET)) |
2714 | if((tmp1 == SET) && (tmp2 == SET)) |
| 2568 | { |
2715 | { |
| 2569 | tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_MSL); |
2716 | tmp1 = hi2c->Mode; |
| 2570 | tmp2 = hi2c->XferCount; |
2717 | tmp2 = hi2c->XferCount; |
| 2571 | tmp3 = hi2c->State; |
2718 | tmp3 = hi2c->State; |
| - | 2719 | if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0) && \ |
|
| 2572 | if((tmp1 == RESET) && (tmp2 == 0) && (tmp3 == HAL_I2C_STATE_BUSY_TX)) |
2720 | (tmp3 == HAL_I2C_STATE_BUSY_TX)) |
| 2573 | { |
2721 | { |
| 2574 | I2C_Slave_AF(hi2c); |
2722 | I2C_Slave_AF(hi2c); |
| 2575 | } |
2723 | } |
| 2576 | else |
2724 | else |
| 2577 | { |
2725 | { |
| 2578 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
2726 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
| - | 2727 | ||
| - | 2728 | /* Generate Stop */ |
|
| - | 2729 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 2730 | ||
| 2579 | /* Clear AF flag */ |
2731 | /* Clear AF flag */ |
| 2580 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
2732 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
| 2581 | } |
2733 | } |
| 2582 | } |
2734 | } |
| 2583 | 2735 | ||
| Line 2601... | Line 2753... | ||
| 2601 | HAL_I2C_ErrorCallback(hi2c); |
2753 | HAL_I2C_ErrorCallback(hi2c); |
| 2602 | } |
2754 | } |
| 2603 | } |
2755 | } |
| 2604 | 2756 | ||
| 2605 | /** |
2757 | /** |
| 2606 | * @brief Master Tx Transfer completed callbacks. |
2758 | * @brief Master Tx Transfer completed callback. |
| 2607 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2759 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2608 | * the configuration information for the specified I2C. |
2760 | * the configuration information for the specified I2C. |
| 2609 | * @retval None |
2761 | * @retval None |
| 2610 | */ |
2762 | */ |
| 2611 | __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) |
2763 | __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) |
| 2612 | { |
2764 | { |
| - | 2765 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2766 | UNUSED(hi2c); |
|
| 2613 | /* NOTE : This function Should not be modified, when the callback is needed, |
2767 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2614 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
2768 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
| 2615 | */ |
2769 | */ |
| 2616 | } |
2770 | } |
| 2617 | 2771 | ||
| 2618 | /** |
2772 | /** |
| 2619 | * @brief Master Rx Transfer completed callbacks. |
2773 | * @brief Master Rx Transfer completed callback. |
| 2620 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2774 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2621 | * the configuration information for the specified I2C. |
2775 | * the configuration information for the specified I2C. |
| 2622 | * @retval None |
2776 | * @retval None |
| 2623 | */ |
2777 | */ |
| 2624 | __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) |
2778 | __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) |
| 2625 | { |
2779 | { |
| - | 2780 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2781 | UNUSED(hi2c); |
|
| 2626 | /* NOTE : This function Should not be modified, when the callback is needed, |
2782 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2627 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
2783 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
| 2628 | */ |
2784 | */ |
| 2629 | } |
2785 | } |
| 2630 | 2786 | ||
| 2631 | /** @brief Slave Tx Transfer completed callbacks. |
2787 | /** @brief Slave Tx Transfer completed callback. |
| 2632 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2788 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2633 | * the configuration information for the specified I2C. |
2789 | * the configuration information for the specified I2C. |
| 2634 | * @retval None |
2790 | * @retval None |
| 2635 | */ |
2791 | */ |
| 2636 | __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) |
2792 | __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) |
| 2637 | { |
2793 | { |
| - | 2794 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2795 | UNUSED(hi2c); |
|
| 2638 | /* NOTE : This function Should not be modified, when the callback is needed, |
2796 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2639 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
2797 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
| 2640 | */ |
2798 | */ |
| 2641 | } |
2799 | } |
| 2642 | 2800 | ||
| 2643 | /** |
2801 | /** |
| 2644 | * @brief Slave Rx Transfer completed callbacks. |
2802 | * @brief Slave Rx Transfer completed callback. |
| 2645 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2803 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2646 | * the configuration information for the specified I2C. |
2804 | * the configuration information for the specified I2C. |
| 2647 | * @retval None |
2805 | * @retval None |
| 2648 | */ |
2806 | */ |
| 2649 | __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) |
2807 | __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) |
| 2650 | { |
2808 | { |
| - | 2809 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2810 | UNUSED(hi2c); |
|
| 2651 | /* NOTE : This function Should not be modified, when the callback is needed, |
2811 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2652 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
2812 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
| 2653 | */ |
2813 | */ |
| 2654 | } |
2814 | } |
| 2655 | 2815 | ||
| 2656 | /** |
2816 | /** |
| 2657 | * @brief Memory Tx Transfer completed callbacks. |
2817 | * @brief Memory Tx Transfer completed callback. |
| 2658 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2818 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2659 | * the configuration information for the specified I2C. |
2819 | * the configuration information for the specified I2C. |
| 2660 | * @retval None |
2820 | * @retval None |
| 2661 | */ |
2821 | */ |
| 2662 | __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) |
2822 | __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) |
| 2663 | { |
2823 | { |
| - | 2824 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2825 | UNUSED(hi2c); |
|
| 2664 | /* NOTE : This function Should not be modified, when the callback is needed, |
2826 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2665 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
2827 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
| 2666 | */ |
2828 | */ |
| 2667 | } |
2829 | } |
| 2668 | 2830 | ||
| 2669 | /** |
2831 | /** |
| 2670 | * @brief Memory Rx Transfer completed callbacks. |
2832 | * @brief Memory Rx Transfer completed callback. |
| 2671 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2833 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2672 | * the configuration information for the specified I2C. |
2834 | * the configuration information for the specified I2C. |
| 2673 | * @retval None |
2835 | * @retval None |
| 2674 | */ |
2836 | */ |
| 2675 | __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) |
2837 | __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) |
| 2676 | { |
2838 | { |
| - | 2839 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2840 | UNUSED(hi2c); |
|
| 2677 | /* NOTE : This function Should not be modified, when the callback is needed, |
2841 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2678 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
2842 | the HAL_I2C_TxCpltCallback could be implemented in the user file |
| 2679 | */ |
2843 | */ |
| 2680 | } |
2844 | } |
| 2681 | 2845 | ||
| 2682 | /** |
2846 | /** |
| 2683 | * @brief I2C error callbacks. |
2847 | * @brief I2C error callback. |
| 2684 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2848 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2685 | * the configuration information for the specified I2C. |
2849 | * the configuration information for the specified I2C. |
| 2686 | * @retval None |
2850 | * @retval None |
| 2687 | */ |
2851 | */ |
| 2688 | __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) |
2852 | __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) |
| 2689 | { |
2853 | { |
| - | 2854 | /* Prevent unused argument(s) compilation warning */ |
|
| - | 2855 | UNUSED(hi2c); |
|
| 2690 | /* NOTE : This function Should not be modified, when the callback is needed, |
2856 | /* NOTE : This function should not be modified, when the callback is needed, |
| 2691 | the HAL_I2C_ErrorCallback could be implemented in the user file |
2857 | the HAL_I2C_ErrorCallback could be implemented in the user file |
| 2692 | */ |
2858 | */ |
| 2693 | } |
2859 | } |
| 2694 | 2860 | ||
| 2695 | /** |
2861 | /** |
| Line 2711... | Line 2877... | ||
| 2711 | @endverbatim |
2877 | @endverbatim |
| 2712 | * @{ |
2878 | * @{ |
| 2713 | */ |
2879 | */ |
| 2714 | 2880 | ||
| 2715 | /** |
2881 | /** |
| 2716 | * @brief Returns the I2C state. |
2882 | * @brief Return the I2C handle state. |
| 2717 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2883 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2718 | * the configuration information for the specified I2C. |
2884 | * the configuration information for the specified I2C. |
| 2719 | * @retval HAL state |
2885 | * @retval HAL state |
| 2720 | */ |
2886 | */ |
| 2721 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) |
2887 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) |
| 2722 | { |
2888 | { |
| - | 2889 | /* Return I2C handle state */ |
|
| 2723 | return hi2c->State; |
2890 | return hi2c->State; |
| 2724 | } |
2891 | } |
| 2725 | 2892 | ||
| 2726 | /** |
2893 | /** |
| 2727 | * @brief Return the I2C error code |
2894 | * @brief Return the I2C error code. |
| 2728 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2895 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2729 | * the configuration information for the specified I2C. |
2896 | * the configuration information for the specified I2C. |
| 2730 | * @retval I2C Error Code |
2897 | * @retval I2C Error Code |
| 2731 | */ |
2898 | */ |
| 2732 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) |
2899 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) |
| 2733 | { |
2900 | { |
| Line 2746... | Line 2913... | ||
| 2746 | * @{ |
2913 | * @{ |
| 2747 | */ |
2914 | */ |
| 2748 | 2915 | ||
| 2749 | /** |
2916 | /** |
| 2750 | * @brief Handle TXE flag for Master Transmit Mode |
2917 | * @brief Handle TXE flag for Master Transmit Mode |
| 2751 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2918 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2752 | * the configuration information for the specified I2C. |
2919 | * the configuration information for the specified I2C. |
| 2753 | * @retval HAL status |
2920 | * @retval HAL status |
| 2754 | */ |
2921 | */ |
| 2755 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c) |
2922 | static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c) |
| 2756 | { |
2923 | { |
| 2757 | /* Write data to DR */ |
- | |
| 2758 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
- | |
| 2759 | hi2c->XferCount--; |
- | |
| 2760 | - | ||
| 2761 | if(hi2c->XferCount == 0) |
2924 | if(hi2c->XferCount == 0) |
| 2762 | { |
2925 | { |
| 2763 | /* Disable BUF interrupt */ |
2926 | /* Disable BUF interrupt */ |
| 2764 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); |
2927 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF); |
| 2765 | } |
2928 | } |
| - | 2929 | else |
|
| - | 2930 | { |
|
| - | 2931 | /* Write data to DR */ |
|
| - | 2932 | hi2c->Instance->DR = (*hi2c->pBuffPtr++); |
|
| - | 2933 | hi2c->XferCount--; |
|
| - | 2934 | } |
|
| 2766 | 2935 | ||
| 2767 | return HAL_OK; |
2936 | return HAL_OK; |
| 2768 | } |
2937 | } |
| 2769 | 2938 | ||
| 2770 | /** |
2939 | /** |
| 2771 | * @brief Handle BTF flag for Master Transmit Mode |
2940 | * @brief Handle BTF flag for Master Transmit Mode |
| 2772 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2941 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2773 | * the configuration information for the specified I2C. |
2942 | * the configuration information for the specified I2C. |
| 2774 | * @retval HAL status |
2943 | * @retval HAL status |
| 2775 | */ |
2944 | */ |
| 2776 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) |
2945 | static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c) |
| 2777 | { |
2946 | { |
| Line 2787... | Line 2956... | ||
| 2787 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
2956 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); |
| 2788 | 2957 | ||
| 2789 | /* Generate Stop */ |
2958 | /* Generate Stop */ |
| 2790 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
2959 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
| 2791 | 2960 | ||
| 2792 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_TX) |
2961 | if(hi2c->Mode == HAL_I2C_MODE_MEM) |
| 2793 | { |
2962 | { |
| 2794 | hi2c->State = HAL_I2C_STATE_READY; |
2963 | hi2c->State = HAL_I2C_STATE_READY; |
| 2795 | 2964 | ||
| 2796 | HAL_I2C_MemTxCpltCallback(hi2c); |
2965 | HAL_I2C_MemTxCpltCallback(hi2c); |
| 2797 | } |
2966 | } |
| Line 2805... | Line 2974... | ||
| 2805 | return HAL_OK; |
2974 | return HAL_OK; |
| 2806 | } |
2975 | } |
| 2807 | 2976 | ||
| 2808 | /** |
2977 | /** |
| 2809 | * @brief Handle RXNE flag for Master Receive Mode |
2978 | * @brief Handle RXNE flag for Master Receive Mode |
| 2810 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
2979 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2811 | * the configuration information for the specified I2C. |
2980 | * the configuration information for the specified I2C. |
| 2812 | * @retval HAL status |
2981 | * @retval HAL status |
| 2813 | */ |
2982 | */ |
| 2814 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) |
2983 | static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c) |
| 2815 | { |
2984 | { |
| Line 2834... | Line 3003... | ||
| 2834 | 3003 | ||
| 2835 | /* Read data from DR */ |
3004 | /* Read data from DR */ |
| 2836 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
3005 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
| 2837 | hi2c->XferCount--; |
3006 | hi2c->XferCount--; |
| 2838 | 3007 | ||
| 2839 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) |
3008 | if(hi2c->Mode == HAL_I2C_MODE_MEM) |
| 2840 | { |
3009 | { |
| 2841 | hi2c->State = HAL_I2C_STATE_READY; |
3010 | hi2c->State = HAL_I2C_STATE_READY; |
| 2842 | 3011 | ||
| 2843 | HAL_I2C_MemRxCpltCallback(hi2c); |
3012 | HAL_I2C_MemRxCpltCallback(hi2c); |
| 2844 | } |
3013 | } |
| Line 2852... | Line 3021... | ||
| 2852 | return HAL_OK; |
3021 | return HAL_OK; |
| 2853 | } |
3022 | } |
| 2854 | 3023 | ||
| 2855 | /** |
3024 | /** |
| 2856 | * @brief Handle BTF flag for Master Receive Mode |
3025 | * @brief Handle BTF flag for Master Receive Mode |
| 2857 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3026 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2858 | * the configuration information for the specified I2C. |
3027 | * the configuration information for the specified I2C. |
| 2859 | * @retval HAL status |
3028 | * @retval HAL status |
| 2860 | */ |
3029 | */ |
| 2861 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) |
3030 | static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c) |
| 2862 | { |
3031 | { |
| Line 2869... | Line 3038... | ||
| 2869 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
3038 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
| 2870 | hi2c->XferCount--; |
3039 | hi2c->XferCount--; |
| 2871 | } |
3040 | } |
| 2872 | else if(hi2c->XferCount == 2) |
3041 | else if(hi2c->XferCount == 2) |
| 2873 | { |
3042 | { |
| 2874 | /* Generate Stop */ |
- | |
| 2875 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
- | |
| 2876 | - | ||
| 2877 | /* Disable EVT and ERR interrupt */ |
3043 | /* Disable EVT and ERR interrupt */ |
| 2878 | /* Workaround - Wong data read into data register */ |
3044 | /* Workaround - Wong data read into data register */ |
| 2879 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); |
3045 | __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); |
| 2880 | 3046 | ||
| - | 3047 | /* Generate Stop */ |
|
| - | 3048 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); |
|
| - | 3049 | ||
| 2881 | /* Read data from DR */ |
3050 | /* Read data from DR */ |
| 2882 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
3051 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
| 2883 | hi2c->XferCount--; |
3052 | hi2c->XferCount--; |
| 2884 | 3053 | ||
| 2885 | /* Read data from DR */ |
3054 | /* Read data from DR */ |
| 2886 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
3055 | (*hi2c->pBuffPtr++) = hi2c->Instance->DR; |
| 2887 | hi2c->XferCount--; |
3056 | hi2c->XferCount--; |
| 2888 | 3057 | ||
| 2889 | if(hi2c->State == HAL_I2C_STATE_MEM_BUSY_RX) |
3058 | if(hi2c->Mode == HAL_I2C_MODE_MEM) |
| 2890 | { |
3059 | { |
| 2891 | hi2c->State = HAL_I2C_STATE_READY; |
3060 | hi2c->State = HAL_I2C_STATE_READY; |
| 2892 | 3061 | ||
| 2893 | HAL_I2C_MemRxCpltCallback(hi2c); |
3062 | HAL_I2C_MemRxCpltCallback(hi2c); |
| 2894 | } |
3063 | } |
| Line 2908... | Line 3077... | ||
| 2908 | return HAL_OK; |
3077 | return HAL_OK; |
| 2909 | } |
3078 | } |
| 2910 | 3079 | ||
| 2911 | /** |
3080 | /** |
| 2912 | * @brief Handle TXE flag for Slave Transmit Mode |
3081 | * @brief Handle TXE flag for Slave Transmit Mode |
| 2913 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3082 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2914 | * the configuration information for the specified I2C. |
3083 | * the configuration information for the specified I2C. |
| 2915 | * @retval HAL status |
3084 | * @retval HAL status |
| 2916 | */ |
3085 | */ |
| 2917 | static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) |
3086 | static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c) |
| 2918 | { |
3087 | { |
| Line 2925... | Line 3094... | ||
| 2925 | return HAL_OK; |
3094 | return HAL_OK; |
| 2926 | } |
3095 | } |
| 2927 | 3096 | ||
| 2928 | /** |
3097 | /** |
| 2929 | * @brief Handle BTF flag for Slave Transmit Mode |
3098 | * @brief Handle BTF flag for Slave Transmit Mode |
| 2930 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3099 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2931 | * the configuration information for the specified I2C. |
3100 | * the configuration information for the specified I2C. |
| 2932 | * @retval HAL status |
3101 | * @retval HAL status |
| 2933 | */ |
3102 | */ |
| 2934 | static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) |
3103 | static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c) |
| 2935 | { |
3104 | { |
| Line 2942... | Line 3111... | ||
| 2942 | return HAL_OK; |
3111 | return HAL_OK; |
| 2943 | } |
3112 | } |
| 2944 | 3113 | ||
| 2945 | /** |
3114 | /** |
| 2946 | * @brief Handle RXNE flag for Slave Receive Mode |
3115 | * @brief Handle RXNE flag for Slave Receive Mode |
| 2947 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3116 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2948 | * the configuration information for the specified I2C. |
3117 | * the configuration information for the specified I2C. |
| 2949 | * @retval HAL status |
3118 | * @retval HAL status |
| 2950 | */ |
3119 | */ |
| 2951 | static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) |
3120 | static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c) |
| 2952 | { |
3121 | { |
| Line 2959... | Line 3128... | ||
| 2959 | return HAL_OK; |
3128 | return HAL_OK; |
| 2960 | } |
3129 | } |
| 2961 | 3130 | ||
| 2962 | /** |
3131 | /** |
| 2963 | * @brief Handle BTF flag for Slave Receive Mode |
3132 | * @brief Handle BTF flag for Slave Receive Mode |
| 2964 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3133 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2965 | * the configuration information for the specified I2C. |
3134 | * the configuration information for the specified I2C. |
| 2966 | * @retval HAL status |
3135 | * @retval HAL status |
| 2967 | */ |
3136 | */ |
| 2968 | static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) |
3137 | static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c) |
| 2969 | { |
3138 | { |
| Line 2976... | Line 3145... | ||
| 2976 | return HAL_OK; |
3145 | return HAL_OK; |
| 2977 | } |
3146 | } |
| 2978 | 3147 | ||
| 2979 | /** |
3148 | /** |
| 2980 | * @brief Handle ADD flag for Slave |
3149 | * @brief Handle ADD flag for Slave |
| 2981 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3150 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2982 | * the configuration information for the specified I2C. |
3151 | * the configuration information for the specified I2C. |
| 2983 | * @retval HAL status |
3152 | * @retval HAL status |
| 2984 | */ |
3153 | */ |
| 2985 | static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c) |
3154 | static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c) |
| 2986 | { |
3155 | { |
| Line 2990... | Line 3159... | ||
| 2990 | return HAL_OK; |
3159 | return HAL_OK; |
| 2991 | } |
3160 | } |
| 2992 | 3161 | ||
| 2993 | /** |
3162 | /** |
| 2994 | * @brief Handle STOPF flag for Slave Mode |
3163 | * @brief Handle STOPF flag for Slave Mode |
| 2995 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3164 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 2996 | * the configuration information for the specified I2C. |
3165 | * the configuration information for the specified I2C. |
| 2997 | * @retval HAL status |
3166 | * @retval HAL status |
| 2998 | */ |
3167 | */ |
| 2999 | static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) |
3168 | static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c) |
| 3000 | { |
3169 | { |
| Line 3014... | Line 3183... | ||
| 3014 | return HAL_OK; |
3183 | return HAL_OK; |
| 3015 | } |
3184 | } |
| 3016 | 3185 | ||
| 3017 | /** |
3186 | /** |
| 3018 | * @brief Handle Acknowledge Failed for Slave Mode |
3187 | * @brief Handle Acknowledge Failed for Slave Mode |
| 3019 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3188 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3020 | * the configuration information for the specified I2C. |
3189 | * the configuration information for the specified I2C. |
| 3021 | * @retval HAL status |
3190 | * @retval HAL status |
| 3022 | */ |
3191 | */ |
| 3023 | static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) |
3192 | static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c) |
| 3024 | { |
3193 | { |
| Line 3038... | Line 3207... | ||
| 3038 | return HAL_OK; |
3207 | return HAL_OK; |
| 3039 | } |
3208 | } |
| 3040 | 3209 | ||
| 3041 | /** |
3210 | /** |
| 3042 | * @brief Master sends target device address followed by internal memory address for write request. |
3211 | * @brief Master sends target device address followed by internal memory address for write request. |
| 3043 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3212 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3044 | * the configuration information for the specified I2C. |
3213 | * the configuration information for the specified I2C. |
| 3045 | * @param DevAddress: Target device address |
3214 | * @param DevAddress Target device address |
| 3046 | * @param Timeout: Timeout duration |
3215 | * @param Timeout Timeout duration |
| 3047 | * @retval HAL status |
3216 | * @retval HAL status |
| 3048 | */ |
3217 | */ |
| 3049 | static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
3218 | static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
| 3050 | { |
3219 | { |
| 3051 | /* Generate Start */ |
3220 | /* Generate Start */ |
| Line 3100... | Line 3269... | ||
| 3100 | return HAL_OK; |
3269 | return HAL_OK; |
| 3101 | } |
3270 | } |
| 3102 | 3271 | ||
| 3103 | /** |
3272 | /** |
| 3104 | * @brief Master sends target device address followed by internal memory address for read request. |
3273 | * @brief Master sends target device address followed by internal memory address for read request. |
| 3105 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3274 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3106 | * the configuration information for the specified I2C. |
3275 | * the configuration information for the specified I2C. |
| 3107 | * @param DevAddress: Target device address |
3276 | * @param DevAddress Target device address |
| 3108 | * @param Timeout: Timeout duration |
3277 | * @param Timeout Timeout duration |
| 3109 | * @retval HAL status |
3278 | * @retval HAL status |
| 3110 | */ |
3279 | */ |
| 3111 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
3280 | static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout) |
| 3112 | { |
3281 | { |
| 3113 | /* Enable Acknowledge */ |
3282 | /* Enable Acknowledge */ |
| Line 3193... | Line 3362... | ||
| 3193 | return HAL_OK; |
3362 | return HAL_OK; |
| 3194 | } |
3363 | } |
| 3195 | 3364 | ||
| 3196 | /** |
3365 | /** |
| 3197 | * @brief Master sends target device address followed by internal memory address for write request. |
3366 | * @brief Master sends target device address followed by internal memory address for write request. |
| 3198 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3367 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3199 | * the configuration information for the specified I2C. |
3368 | * the configuration information for the specified I2C. |
| 3200 | * @param DevAddress: Target device address |
3369 | * @param DevAddress Target device address |
| 3201 | * @param MemAddress: Internal memory address |
3370 | * @param MemAddress Internal memory address |
| 3202 | * @param MemAddSize: Size of internal memory address |
3371 | * @param MemAddSize Size of internal memory address |
| 3203 | * @param Timeout: Timeout duration |
3372 | * @param Timeout Timeout duration |
| 3204 | * @retval HAL status |
3373 | * @retval HAL status |
| 3205 | */ |
3374 | */ |
| 3206 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
3375 | static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
| 3207 | { |
3376 | { |
| 3208 | /* Generate Start */ |
3377 | /* Generate Start */ |
| Line 3232... | Line 3401... | ||
| 3232 | 3401 | ||
| 3233 | /* Clear ADDR flag */ |
3402 | /* Clear ADDR flag */ |
| 3234 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
3403 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| 3235 | 3404 | ||
| 3236 | /* Wait until TXE flag is set */ |
3405 | /* Wait until TXE flag is set */ |
| 3237 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
3406 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 3238 | { |
3407 | { |
| - | 3408 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 3409 | { |
|
| - | 3410 | /* Generate Stop */ |
|
| - | 3411 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 3412 | return HAL_ERROR; |
|
| - | 3413 | } |
|
| - | 3414 | else |
|
| - | 3415 | { |
|
| 3239 | return HAL_TIMEOUT; |
3416 | return HAL_TIMEOUT; |
| - | 3417 | } |
|
| 3240 | } |
3418 | } |
| 3241 | 3419 | ||
| 3242 | /* If Memory address size is 8Bit */ |
3420 | /* If Memory address size is 8Bit */ |
| 3243 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
3421 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
| 3244 | { |
3422 | { |
| Line 3250... | Line 3428... | ||
| 3250 | { |
3428 | { |
| 3251 | /* Send MSB of Memory Address */ |
3429 | /* Send MSB of Memory Address */ |
| 3252 | hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); |
3430 | hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); |
| 3253 | 3431 | ||
| 3254 | /* Wait until TXE flag is set */ |
3432 | /* Wait until TXE flag is set */ |
| 3255 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
3433 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 3256 | { |
3434 | { |
| - | 3435 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 3436 | { |
|
| - | 3437 | /* Generate Stop */ |
|
| - | 3438 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 3439 | return HAL_ERROR; |
|
| - | 3440 | } |
|
| - | 3441 | else |
|
| - | 3442 | { |
|
| 3257 | return HAL_TIMEOUT; |
3443 | return HAL_TIMEOUT; |
| - | 3444 | } |
|
| 3258 | } |
3445 | } |
| 3259 | 3446 | ||
| 3260 | /* Send LSB of Memory Address */ |
3447 | /* Send LSB of Memory Address */ |
| 3261 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
3448 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
| 3262 | } |
3449 | } |
| Line 3264... | Line 3451... | ||
| 3264 | return HAL_OK; |
3451 | return HAL_OK; |
| 3265 | } |
3452 | } |
| 3266 | 3453 | ||
| 3267 | /** |
3454 | /** |
| 3268 | * @brief Master sends target device address followed by internal memory address for read request. |
3455 | * @brief Master sends target device address followed by internal memory address for read request. |
| 3269 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3456 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3270 | * the configuration information for the specified I2C. |
3457 | * the configuration information for the specified I2C. |
| 3271 | * @param DevAddress: Target device address |
3458 | * @param DevAddress Target device address |
| 3272 | * @param MemAddress: Internal memory address |
3459 | * @param MemAddress Internal memory address |
| 3273 | * @param MemAddSize: Size of internal memory address |
3460 | * @param MemAddSize Size of internal memory address |
| 3274 | * @param Timeout: Timeout duration |
3461 | * @param Timeout Timeout duration |
| 3275 | * @retval HAL status |
3462 | * @retval HAL status |
| 3276 | */ |
3463 | */ |
| 3277 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
3464 | static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout) |
| 3278 | { |
3465 | { |
| 3279 | /* Enable Acknowledge */ |
3466 | /* Enable Acknowledge */ |
| Line 3306... | Line 3493... | ||
| 3306 | 3493 | ||
| 3307 | /* Clear ADDR flag */ |
3494 | /* Clear ADDR flag */ |
| 3308 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
3495 | __HAL_I2C_CLEAR_ADDRFLAG(hi2c); |
| 3309 | 3496 | ||
| 3310 | /* Wait until TXE flag is set */ |
3497 | /* Wait until TXE flag is set */ |
| 3311 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
3498 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 3312 | { |
3499 | { |
| - | 3500 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 3501 | { |
|
| - | 3502 | /* Generate Stop */ |
|
| - | 3503 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 3504 | return HAL_ERROR; |
|
| - | 3505 | } |
|
| - | 3506 | else |
|
| - | 3507 | { |
|
| 3313 | return HAL_TIMEOUT; |
3508 | return HAL_TIMEOUT; |
| - | 3509 | } |
|
| 3314 | } |
3510 | } |
| 3315 | 3511 | ||
| 3316 | /* If Memory address size is 8Bit */ |
3512 | /* If Memory address size is 8Bit */ |
| 3317 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
3513 | if(MemAddSize == I2C_MEMADD_SIZE_8BIT) |
| 3318 | { |
3514 | { |
| Line 3324... | Line 3520... | ||
| 3324 | { |
3520 | { |
| 3325 | /* Send MSB of Memory Address */ |
3521 | /* Send MSB of Memory Address */ |
| 3326 | hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); |
3522 | hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress); |
| 3327 | 3523 | ||
| 3328 | /* Wait until TXE flag is set */ |
3524 | /* Wait until TXE flag is set */ |
| 3329 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
3525 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 3330 | { |
3526 | { |
| - | 3527 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 3528 | { |
|
| - | 3529 | /* Generate Stop */ |
|
| - | 3530 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 3531 | return HAL_ERROR; |
|
| - | 3532 | } |
|
| - | 3533 | else |
|
| - | 3534 | { |
|
| 3331 | return HAL_TIMEOUT; |
3535 | return HAL_TIMEOUT; |
| - | 3536 | } |
|
| 3332 | } |
3537 | } |
| 3333 | 3538 | ||
| 3334 | /* Send LSB of Memory Address */ |
3539 | /* Send LSB of Memory Address */ |
| 3335 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
3540 | hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress); |
| 3336 | } |
3541 | } |
| 3337 | 3542 | ||
| 3338 | /* Wait until TXE flag is set */ |
3543 | /* Wait until TXE flag is set */ |
| 3339 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TXE, RESET, Timeout) != HAL_OK) |
3544 | if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout) != HAL_OK) |
| 3340 | { |
3545 | { |
| - | 3546 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 3547 | { |
|
| - | 3548 | /* Generate Stop */ |
|
| - | 3549 | SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP); |
|
| - | 3550 | return HAL_ERROR; |
|
| - | 3551 | } |
|
| - | 3552 | else |
|
| - | 3553 | { |
|
| 3341 | return HAL_TIMEOUT; |
3554 | return HAL_TIMEOUT; |
| - | 3555 | } |
|
| 3342 | } |
3556 | } |
| 3343 | 3557 | ||
| 3344 | /* Generate Restart */ |
3558 | /* Generate Restart */ |
| 3345 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
3559 | SET_BIT(hi2c->Instance->CR1, I2C_CR1_START); |
| 3346 | 3560 | ||
| Line 3391... | Line 3605... | ||
| 3391 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
3605 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
| 3392 | 3606 | ||
| 3393 | hi2c->XferCount = 0; |
3607 | hi2c->XferCount = 0; |
| 3394 | 3608 | ||
| 3395 | hi2c->State = HAL_I2C_STATE_READY; |
3609 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3610 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3396 | 3611 | ||
| 3397 | /* Check if Errors has been detected during transfer */ |
3612 | /* Check if Errors has been detected during transfer */ |
| 3398 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
3613 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
| 3399 | { |
3614 | { |
| 3400 | HAL_I2C_ErrorCallback(hi2c); |
3615 | HAL_I2C_ErrorCallback(hi2c); |
| Line 3430... | Line 3645... | ||
| 3430 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
3645 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
| 3431 | 3646 | ||
| 3432 | hi2c->XferCount = 0; |
3647 | hi2c->XferCount = 0; |
| 3433 | 3648 | ||
| 3434 | hi2c->State = HAL_I2C_STATE_READY; |
3649 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3650 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3435 | 3651 | ||
| 3436 | /* Check if Errors has been detected during transfer */ |
3652 | /* Check if Errors has been detected during transfer */ |
| 3437 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
3653 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
| 3438 | { |
3654 | { |
| 3439 | HAL_I2C_ErrorCallback(hi2c); |
3655 | HAL_I2C_ErrorCallback(hi2c); |
| Line 3466... | Line 3682... | ||
| 3466 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
3682 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
| 3467 | 3683 | ||
| 3468 | hi2c->XferCount = 0; |
3684 | hi2c->XferCount = 0; |
| 3469 | 3685 | ||
| 3470 | hi2c->State = HAL_I2C_STATE_READY; |
3686 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3687 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3471 | 3688 | ||
| 3472 | /* Check if Errors has been detected during transfer */ |
3689 | /* Check if Errors has been detected during transfer */ |
| 3473 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
3690 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
| 3474 | { |
3691 | { |
| 3475 | HAL_I2C_ErrorCallback(hi2c); |
3692 | HAL_I2C_ErrorCallback(hi2c); |
| Line 3488... | Line 3705... | ||
| 3488 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) |
3705 | static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) |
| 3489 | { |
3706 | { |
| 3490 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
3707 | I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
| 3491 | 3708 | ||
| 3492 | /* Wait until STOPF flag is reset */ |
3709 | /* Wait until STOPF flag is reset */ |
| 3493 | if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, I2C_TIMEOUT_FLAG) != HAL_OK) |
3710 | if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, I2C_TIMEOUT_FLAG) != HAL_OK) |
| 3494 | { |
3711 | { |
| - | 3712 | if(hi2c->ErrorCode == HAL_I2C_ERROR_AF) |
|
| - | 3713 | { |
|
| - | 3714 | hi2c->ErrorCode |= HAL_I2C_ERROR_AF; |
|
| - | 3715 | } |
|
| - | 3716 | else |
|
| - | 3717 | { |
|
| 3495 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
3718 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
| - | 3719 | } |
|
| 3496 | } |
3720 | } |
| 3497 | 3721 | ||
| 3498 | /* Clear STOPF flag */ |
3722 | /* Clear STOPF flag */ |
| 3499 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
3723 | __HAL_I2C_CLEAR_STOPFLAG(hi2c); |
| 3500 | 3724 | ||
| Line 3505... | Line 3729... | ||
| 3505 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
3729 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
| 3506 | 3730 | ||
| 3507 | hi2c->XferCount = 0; |
3731 | hi2c->XferCount = 0; |
| 3508 | 3732 | ||
| 3509 | hi2c->State = HAL_I2C_STATE_READY; |
3733 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3734 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3510 | 3735 | ||
| 3511 | /* Check if Errors has been detected during transfer */ |
3736 | /* Check if Errors has been detected during transfer */ |
| 3512 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
3737 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
| 3513 | { |
3738 | { |
| 3514 | HAL_I2C_ErrorCallback(hi2c); |
3739 | HAL_I2C_ErrorCallback(hi2c); |
| Line 3541... | Line 3766... | ||
| 3541 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
3766 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
| 3542 | 3767 | ||
| 3543 | hi2c->XferCount = 0; |
3768 | hi2c->XferCount = 0; |
| 3544 | 3769 | ||
| 3545 | hi2c->State = HAL_I2C_STATE_READY; |
3770 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3771 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3546 | 3772 | ||
| 3547 | /* Check if Errors has been detected during transfer */ |
3773 | /* Check if Errors has been detected during transfer */ |
| 3548 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
3774 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
| 3549 | { |
3775 | { |
| 3550 | HAL_I2C_ErrorCallback(hi2c); |
3776 | HAL_I2C_ErrorCallback(hi2c); |
| Line 3577... | Line 3803... | ||
| 3577 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
3803 | CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); |
| 3578 | 3804 | ||
| 3579 | hi2c->XferCount = 0; |
3805 | hi2c->XferCount = 0; |
| 3580 | 3806 | ||
| 3581 | hi2c->State = HAL_I2C_STATE_READY; |
3807 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3808 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3582 | 3809 | ||
| 3583 | /* Check if Errors has been detected during transfer */ |
3810 | /* Check if Errors has been detected during transfer */ |
| 3584 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
3811 | if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE) |
| 3585 | { |
3812 | { |
| 3586 | HAL_I2C_ErrorCallback(hi2c); |
3813 | HAL_I2C_ErrorCallback(hi2c); |
| Line 3591... | Line 3818... | ||
| 3591 | } |
3818 | } |
| 3592 | } |
3819 | } |
| 3593 | 3820 | ||
| 3594 | /** |
3821 | /** |
| 3595 | * @brief I2C Configuration Speed function |
3822 | * @brief I2C Configuration Speed function |
| 3596 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3823 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3597 | * the configuration information for the specified I2C. |
3824 | * the configuration information for the specified I2C. |
| 3598 | * @param I2CClkSrcFreq: PCLK frequency from RCC. |
3825 | * @param I2CClkSrcFreq: PCLK frequency from RCC. |
| 3599 | * @retval CCR Speed: Speed to set in I2C CCR Register |
3826 | * @retval CCR Speed: Speed to set in I2C CCR Register |
| 3600 | */ |
3827 | */ |
| 3601 | static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq) |
3828 | static uint32_t I2C_Configure_Speed(I2C_HandleTypeDef *hi2c, uint32_t I2CClkSrcFreq) |
| Line 3658... | Line 3885... | ||
| 3658 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
3885 | CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); |
| 3659 | 3886 | ||
| 3660 | hi2c->XferCount = 0; |
3887 | hi2c->XferCount = 0; |
| 3661 | 3888 | ||
| 3662 | hi2c->State = HAL_I2C_STATE_READY; |
3889 | hi2c->State = HAL_I2C_STATE_READY; |
| - | 3890 | hi2c->Mode = HAL_I2C_MODE_NONE; |
|
| 3663 | 3891 | ||
| 3664 | hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; |
3892 | hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; |
| 3665 | 3893 | ||
| 3666 | HAL_I2C_ErrorCallback(hi2c); |
3894 | HAL_I2C_ErrorCallback(hi2c); |
| 3667 | } |
3895 | } |
| 3668 | 3896 | ||
| 3669 | /** |
3897 | /** |
| 3670 | * @brief This function handles I2C Communication Timeout. |
3898 | * @brief This function handles I2C Communication Timeout. |
| 3671 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3899 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3672 | * the configuration information for the specified I2C. |
3900 | * the configuration information for the specified I2C. |
| 3673 | * @param Flag: specifies the I2C flag to check. |
3901 | * @param Flag: specifies the I2C flag to check. |
| 3674 | * @param Status: The new Flag status (SET or RESET). |
3902 | * @param Status: The new Flag status (SET or RESET). |
| 3675 | * @param Timeout: Timeout duration |
3903 | * @param Timeout Timeout duration |
| 3676 | * @retval HAL status |
3904 | * @retval HAL status |
| 3677 | */ |
3905 | */ |
| 3678 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
3906 | static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
| 3679 | { |
3907 | { |
| 3680 | uint32_t tickstart = 0; |
3908 | uint32_t tickstart = 0; |
| Line 3724... | Line 3952... | ||
| 3724 | return HAL_OK; |
3952 | return HAL_OK; |
| 3725 | } |
3953 | } |
| 3726 | 3954 | ||
| 3727 | /** |
3955 | /** |
| 3728 | * @brief This function handles I2C Communication Timeout for Master addressing phase. |
3956 | * @brief This function handles I2C Communication Timeout for Master addressing phase. |
| 3729 | * @param hi2c : Pointer to a I2C_HandleTypeDef structure that contains |
3957 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
| 3730 | * the configuration information for the specified I2C. |
3958 | * the configuration information for the specified I2C. |
| 3731 | * @param Flag: specifies the I2C flag to check. |
3959 | * @param Flag: specifies the I2C flag to check. |
| 3732 | * @param Timeout: Timeout duration |
3960 | * @param Timeout Timeout duration |
| 3733 | * @retval HAL status |
3961 | * @retval HAL status |
| 3734 | */ |
3962 | */ |
| 3735 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout) |
3963 | static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout) |
| 3736 | { |
3964 | { |
| 3737 | uint32_t tickstart = 0; |
3965 | uint32_t tickstart = 0; |
| Line 3774... | Line 4002... | ||
| 3774 | } |
4002 | } |
| 3775 | return HAL_OK; |
4003 | return HAL_OK; |
| 3776 | } |
4004 | } |
| 3777 | 4005 | ||
| 3778 | /** |
4006 | /** |
| - | 4007 | * @brief This function handles I2C Communication Timeout for specific usage of TXE flag. |
|
| - | 4008 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|
| - | 4009 | * the configuration information for the specified I2C. |
|
| - | 4010 | * @param Timeout Timeout duration |
|
| - | 4011 | * @retval HAL status |
|
| - | 4012 | */ |
|
| - | 4013 | static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
|
| - | 4014 | { |
|
| - | 4015 | uint32_t tickstart = HAL_GetTick(); |
|
| - | 4016 | ||
| - | 4017 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) |
|
| - | 4018 | { |
|
| - | 4019 | /* Check if a NACK is detected */ |
|
| - | 4020 | if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) |
|
| - | 4021 | { |
|
| - | 4022 | return HAL_ERROR; |
|
| - | 4023 | } |
|
| - | 4024 | ||
| - | 4025 | /* Check for the Timeout */ |
|
| - | 4026 | if(Timeout != HAL_MAX_DELAY) |
|
| - | 4027 | { |
|
| - | 4028 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
|
| - | 4029 | { |
|
| - | 4030 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
|
| - | 4031 | hi2c->State= HAL_I2C_STATE_READY; |
|
| - | 4032 | ||
| - | 4033 | /* Process Unlocked */ |
|
| - | 4034 | __HAL_UNLOCK(hi2c); |
|
| - | 4035 | ||
| - | 4036 | return HAL_TIMEOUT; |
|
| - | 4037 | } |
|
| - | 4038 | } |
|
| - | 4039 | } |
|
| - | 4040 | return HAL_OK; |
|
| - | 4041 | } |
|
| - | 4042 | ||
| - | 4043 | /** |
|
| - | 4044 | * @brief This function handles I2C Communication Timeout for specific usage of BTF flag. |
|
| - | 4045 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|
| - | 4046 | * the configuration information for the specified I2C. |
|
| - | 4047 | * @param Timeout Timeout duration |
|
| - | 4048 | * @retval HAL status |
|
| - | 4049 | */ |
|
| - | 4050 | static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
|
| - | 4051 | { |
|
| - | 4052 | uint32_t tickstart = HAL_GetTick(); |
|
| - | 4053 | ||
| - | 4054 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET) |
|
| - | 4055 | { |
|
| - | 4056 | /* Check if a NACK is detected */ |
|
| - | 4057 | if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) |
|
| - | 4058 | { |
|
| - | 4059 | return HAL_ERROR; |
|
| - | 4060 | } |
|
| - | 4061 | ||
| - | 4062 | /* Check for the Timeout */ |
|
| - | 4063 | if(Timeout != HAL_MAX_DELAY) |
|
| - | 4064 | { |
|
| - | 4065 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
|
| - | 4066 | { |
|
| - | 4067 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
|
| - | 4068 | hi2c->State= HAL_I2C_STATE_READY; |
|
| - | 4069 | ||
| - | 4070 | /* Process Unlocked */ |
|
| - | 4071 | __HAL_UNLOCK(hi2c); |
|
| - | 4072 | ||
| - | 4073 | return HAL_TIMEOUT; |
|
| - | 4074 | } |
|
| - | 4075 | } |
|
| - | 4076 | } |
|
| - | 4077 | return HAL_OK; |
|
| - | 4078 | } |
|
| - | 4079 | ||
| - | 4080 | /** |
|
| - | 4081 | * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. |
|
| - | 4082 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|
| - | 4083 | * the configuration information for the specified I2C. |
|
| - | 4084 | * @param Timeout Timeout duration |
|
| - | 4085 | * @retval HAL status |
|
| - | 4086 | */ |
|
| - | 4087 | static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
|
| - | 4088 | { |
|
| - | 4089 | uint32_t tickstart = 0x00; |
|
| - | 4090 | tickstart = HAL_GetTick(); |
|
| - | 4091 | ||
| - | 4092 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) |
|
| - | 4093 | { |
|
| - | 4094 | /* Check if a NACK is detected */ |
|
| - | 4095 | if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK) |
|
| - | 4096 | { |
|
| - | 4097 | return HAL_ERROR; |
|
| - | 4098 | } |
|
| - | 4099 | ||
| - | 4100 | /* Check for the Timeout */ |
|
| - | 4101 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
|
| - | 4102 | { |
|
| - | 4103 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
|
| - | 4104 | hi2c->State= HAL_I2C_STATE_READY; |
|
| - | 4105 | ||
| - | 4106 | /* Process Unlocked */ |
|
| - | 4107 | __HAL_UNLOCK(hi2c); |
|
| - | 4108 | ||
| - | 4109 | return HAL_TIMEOUT; |
|
| - | 4110 | } |
|
| - | 4111 | } |
|
| - | 4112 | return HAL_OK; |
|
| - | 4113 | } |
|
| - | 4114 | ||
| - | 4115 | /** |
|
| - | 4116 | * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. |
|
| - | 4117 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|
| - | 4118 | * the configuration information for the specified I2C. |
|
| - | 4119 | * @param Timeout Timeout duration |
|
| - | 4120 | * @retval HAL status |
|
| - | 4121 | */ |
|
| - | 4122 | static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout) |
|
| - | 4123 | { |
|
| - | 4124 | uint32_t tickstart = 0x00; |
|
| - | 4125 | tickstart = HAL_GetTick(); |
|
| - | 4126 | ||
| - | 4127 | while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) |
|
| - | 4128 | { |
|
| - | 4129 | /* Check if a STOPF is detected */ |
|
| - | 4130 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) |
|
| - | 4131 | { |
|
| - | 4132 | /* Clear STOP Flag */ |
|
| - | 4133 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); |
|
| - | 4134 | ||
| - | 4135 | hi2c->ErrorCode = HAL_I2C_ERROR_NONE; |
|
| - | 4136 | hi2c->State= HAL_I2C_STATE_READY; |
|
| - | 4137 | ||
| - | 4138 | /* Process Unlocked */ |
|
| - | 4139 | __HAL_UNLOCK(hi2c); |
|
| - | 4140 | ||
| - | 4141 | return HAL_ERROR; |
|
| - | 4142 | } |
|
| - | 4143 | ||
| - | 4144 | /* Check for the Timeout */ |
|
| - | 4145 | if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) |
|
| - | 4146 | { |
|
| - | 4147 | hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; |
|
| - | 4148 | hi2c->State= HAL_I2C_STATE_READY; |
|
| - | 4149 | ||
| - | 4150 | /* Process Unlocked */ |
|
| - | 4151 | __HAL_UNLOCK(hi2c); |
|
| - | 4152 | ||
| - | 4153 | return HAL_TIMEOUT; |
|
| - | 4154 | } |
|
| - | 4155 | } |
|
| - | 4156 | return HAL_OK; |
|
| - | 4157 | } |
|
| - | 4158 | ||
| - | 4159 | /** |
|
| - | 4160 | * @brief This function handles Acknowledge failed detection during an I2C Communication. |
|
| - | 4161 | * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains |
|
| - | 4162 | * the configuration information for the specified I2C. |
|
| - | 4163 | * @retval HAL status |
|
| - | 4164 | */ |
|
| - | 4165 | static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c) |
|
| - | 4166 | { |
|
| - | 4167 | if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) |
|
| - | 4168 | { |
|
| - | 4169 | /* Clear NACKF Flag */ |
|
| - | 4170 | __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); |
|
| - | 4171 | ||
| - | 4172 | hi2c->ErrorCode = HAL_I2C_ERROR_AF; |
|
| - | 4173 | hi2c->State= HAL_I2C_STATE_READY; |
|
| - | 4174 | ||
| - | 4175 | /* Process Unlocked */ |
|
| - | 4176 | __HAL_UNLOCK(hi2c); |
|
| - | 4177 | ||
| - | 4178 | return HAL_ERROR; |
|
| - | 4179 | } |
|
| - | 4180 | return HAL_OK; |
|
| - | 4181 | } |
|
| - | 4182 | /** |
|
| 3779 | * @} |
4183 | * @} |
| 3780 | */ |
4184 | */ |
| 3781 | 4185 | ||
| 3782 | #endif /* HAL_I2C_MODULE_ENABLED */ |
4186 | #endif /* HAL_I2C_MODULE_ENABLED */ |
| 3783 | 4187 | ||