WebSVN – EDIS_Ignition – Diff – /trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c

 /**
   ******************************************************************************
   * @file    stm32f1xx_hal_gpio.c
   * @author  MCD Application Team
   * @brief   GPIO HAL module driver.
   *          This file provides firmware functions to manage the following
   *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
   *           + Initialization and de-initialization functions
   *           + IO operation functions
   *
-  @verbatim
+  ******************************************************************************
-  ==============================================================================
+  * @attention
-                    ##### GPIO Peripheral features #####
+  *
-  ==============================================================================
+  * Copyright (c) 2016 STMicroelectronics.
-  [..]
+  * All rights reserved.
-  Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
+  *
-  port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
+  * This software is licensed under terms that can be found in the LICENSE file
-  in several modes:
+  * in the root directory of this software component.
-  (+) Input mode
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  (+) Analog mode
+  *
-  (+) Output mode
+  ******************************************************************************
-  (+) Alternate function mode
+  @verbatim
-  (+) External interrupt/event lines
+  ==============================================================================
+                    ##### GPIO Peripheral features #####
-  [..]
+  ==============================================================================
-  During and just after reset, the alternate functions and external interrupt
+  [..]
-  lines are not active and the I/O ports are configured in input floating mode.
+  Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
+  port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
-  [..]
+  in several modes:
-  All GPIO pins have weak internal pull-up and pull-down resistors, which can be
+  (+) Input mode
-  activated or not.
+  (+) Analog mode
+  (+) Output mode
-  [..]
+  (+) Alternate function mode
-  In Output or Alternate mode, each IO can be configured on open-drain or push-pull
+  (+) External interrupt/event lines
-  type and the IO speed can be selected depending on the VDD value.
+  [..]
-  [..]
+  During and just after reset, the alternate functions and external interrupt
-  All ports have external interrupt/event capability. To use external interrupt
+  lines are not active and the I/O ports are configured in input floating mode.
-  lines, the port must be configured in input mode. All available GPIO pins are
-  connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
+  [..]
+  All GPIO pins have weak internal pull-up and pull-down resistors, which can be
-  [..]
+  activated or not.
-  The external interrupt/event controller consists of up to 20 edge detectors in connectivity
-  line devices, or 19 edge detectors in other devices for generating event/interrupt requests.
+  [..]
-  Each input line can be independently configured to select the type (event or interrupt) and
+  In Output or Alternate mode, each IO can be configured on open-drain or push-pull
-  the corresponding trigger event (rising or falling or both). Each line can also masked
+  type and the IO speed can be selected depending on the VDD value.
-  independently. A pending register maintains the status line of the interrupt requests
+  [..]
-                     ##### How to use this driver #####
+  All ports have external interrupt/event capability. To use external interrupt
-  ==============================================================================
+  lines, the port must be configured in input mode. All available GPIO pins are
- [..]
+  connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
-   (#) Enable the GPIO APB2 clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE().
+  [..]
-   (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
+  The external interrupt/event controller consists of up to 20 edge detectors in connectivity
-       (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
+  line devices, or 19 edge detectors in other devices for generating event/interrupt requests.
-       (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
+  Each input line can be independently configured to select the type (event or interrupt) and
-            structure.
+  the corresponding trigger event (rising or falling or both). Each line can also masked
-       (++) In case of Output or alternate function mode selection: the speed is
+  independently. A pending register maintains the status line of the interrupt requests
-            configured through "Speed" member from GPIO_InitTypeDef structure
-       (++) Analog mode is required when a pin is to be used as ADC channel
+                     ##### How to use this driver #####
-            or DAC output.
+  ==============================================================================
-       (++) In case of external interrupt/event selection the "Mode" member from
+ [..]
-            GPIO_InitTypeDef structure select the type (interrupt or event) and
+   (#) Enable the GPIO APB2 clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE().
-            the corresponding trigger event (rising or falling or both).
+   (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
-   (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
+       (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
-       mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
+       (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
-       HAL_NVIC_EnableIRQ().
+            structure.
+       (++) In case of Output or alternate function mode selection: the speed is
-   (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
+            configured through "Speed" member from GPIO_InitTypeDef structure
+       (++) Analog mode is required when a pin is to be used as ADC channel
-   (#) To set/reset the level of a pin configured in output mode use
+            or DAC output.
-       HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
+       (++) In case of external interrupt/event selection the "Mode" member from
+            GPIO_InitTypeDef structure select the type (interrupt or event) and
-   (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
+            the corresponding trigger event (rising or falling or both).
-   (#) During and just after reset, the alternate functions are not
+   (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
-       active and the GPIO pins are configured in input floating mode (except JTAG
+       mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
-       pins).
+       HAL_NVIC_EnableIRQ().
-   (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
+   (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
-       (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
-       priority over the GPIO function.
+   (#) To set/reset the level of a pin configured in output mode use
+       HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
-   (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
-       general purpose PD0 and PD1, respectively, when the HSE oscillator is off.
+   (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
-       The HSE has priority over the GPIO function.
+   (#) During and just after reset, the alternate functions are not
-  @endverbatim
+       active and the GPIO pins are configured in input floating mode (except JTAG
-  ******************************************************************************
+       pins).
-  * @attention
-  *
+   (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
-  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+       (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
-  * All rights reserved.</center></h2>
+       priority over the GPIO function.
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
+   (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
-  * the "License"; You may not use this file except in compliance with the
+       general purpose PD0 and PD1, respectively, when the HSE oscillator is off.
-  * License. You may obtain a copy of the License at:
+       The HSE has priority over the GPIO function.
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
+  @endverbatim
   ******************************************************************************
   */
 /* Includes ------------------------------------------------------------------*/
 #include "stm32f1xx_hal.h"
 /** @addtogroup STM32F1xx_HAL_Driver
   * @{
   */
 /** @defgroup GPIO GPIO
   * @brief GPIO HAL module driver
   * @{
   */
 #ifdef HAL_GPIO_MODULE_ENABLED
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /** @addtogroup GPIO_Private_Constants GPIO Private Constants
   * @{
   */
 #define GPIO_MODE             0x00000003u
 #define EXTI_MODE             0x10000000u
 #define GPIO_MODE_IT          0x00010000u
 #define GPIO_MODE_EVT         0x00020000u
 #define RISING_EDGE           0x00100000u
 #define FALLING_EDGE          0x00200000u
 #define GPIO_OUTPUT_TYPE      0x00000010u
 #define GPIO_NUMBER           16u
 /* Definitions for bit manipulation of CRL and CRH register */
 #define  GPIO_CR_MODE_INPUT         0x00000000u /*!< 00: Input mode (reset state)  */
 #define  GPIO_CR_CNF_ANALOG         0x00000000u /*!< 00: Analog mode  */
 #define  GPIO_CR_CNF_INPUT_FLOATING 0x00000004u /*!< 01: Floating input (reset state)  */
 #define  GPIO_CR_CNF_INPUT_PU_PD    0x00000008u /*!< 10: Input with pull-up / pull-down  */
 #define  GPIO_CR_CNF_GP_OUTPUT_PP   0x00000000u /*!< 00: General purpose output push-pull  */
 #define  GPIO_CR_CNF_GP_OUTPUT_OD   0x00000004u /*!< 01: General purpose output Open-drain  */
 #define  GPIO_CR_CNF_AF_OUTPUT_PP   0x00000008u /*!< 10: Alternate function output Push-pull  */
 #define  GPIO_CR_CNF_AF_OUTPUT_OD   0x0000000Cu /*!< 11: Alternate function output Open-drain  */
 /**
   * @}
   */
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
 /* Private function prototypes -----------------------------------------------*/
 /* Private functions ---------------------------------------------------------*/
 /* Exported functions --------------------------------------------------------*/
 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
   * @{
   */
 /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
  *  @brief    Initialization and Configuration functions
  *
 @verbatim
  ===============================================================================
               ##### Initialization and de-initialization functions #####
  ===============================================================================
   [..]
     This section provides functions allowing to initialize and de-initialize the GPIOs
     to be ready for use.
 @endverbatim
   * @{
   */
 /**
   * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
   * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
   * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
   *         the configuration information for the specified GPIO peripheral.
   * @retval None
   */
 void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
 {
   uint32_t position = 0x00u;
   uint32_t ioposition;
   uint32_t iocurrent;
   uint32_t temp;
   uint32_t config = 0x00u;
   __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
   uint32_t registeroffset;       /* offset used during computation of CNF and MODE bits placement inside CRL or CRH register */
   /* Check the parameters */
   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
   assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
   assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
   /* Configure the port pins */
   while (((GPIO_Init->Pin) >> position) != 0x00u)
   {
     /* Get the IO position */
     ioposition = (0x01uL << position);
     /* Get the current IO position */
     iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
     if (iocurrent == ioposition)
     {
       /* Check the Alternate function parameters */
       assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
       /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
       switch (GPIO_Init->Mode)
       {
         /* If we are configuring the pin in OUTPUT push-pull mode */
         case GPIO_MODE_OUTPUT_PP:
           /* Check the GPIO speed parameter */
           assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
           config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
           break;
         /* If we are configuring the pin in OUTPUT open-drain mode */
         case GPIO_MODE_OUTPUT_OD:
           /* Check the GPIO speed parameter */
           assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
           config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
           break;
         /* If we are configuring the pin in ALTERNATE FUNCTION push-pull mode */
         case GPIO_MODE_AF_PP:
           /* Check the GPIO speed parameter */
           assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
           config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
           break;
         /* If we are configuring the pin in ALTERNATE FUNCTION open-drain mode */
         case GPIO_MODE_AF_OD:
           /* Check the GPIO speed parameter */
           assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
           config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
           break;
         /* If we are configuring the pin in INPUT (also applicable to EVENT and IT mode) */
         case GPIO_MODE_INPUT:
         case GPIO_MODE_IT_RISING:
         case GPIO_MODE_IT_FALLING:
         case GPIO_MODE_IT_RISING_FALLING:
         case GPIO_MODE_EVT_RISING:
         case GPIO_MODE_EVT_FALLING:
         case GPIO_MODE_EVT_RISING_FALLING:
           /* Check the GPIO pull parameter */
           assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
           if (GPIO_Init->Pull == GPIO_NOPULL)
           {
             config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
           }
           else if (GPIO_Init->Pull == GPIO_PULLUP)
           {
             config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
             /* Set the corresponding ODR bit */
             GPIOx->BSRR = ioposition;
           }
           else /* GPIO_PULLDOWN */
           {
             config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
             /* Reset the corresponding ODR bit */
             GPIOx->BRR = ioposition;
           }
           break;
         /* If we are configuring the pin in INPUT analog mode */
         case GPIO_MODE_ANALOG:
           config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
           break;
         /* Parameters are checked with assert_param */
         default:
           break;
       }
       /* Check if the current bit belongs to first half or last half of the pin count number
        in order to address CRH or CRL register*/
       configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
       registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
       /* Apply the new configuration of the pin to the register */
       MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
       /*--------------------- EXTI Mode Configuration ------------------------*/
       /* Configure the External Interrupt or event for the current IO */
       if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
       {
         /* Enable AFIO Clock */
         __HAL_RCC_AFIO_CLK_ENABLE();
         temp = AFIO->EXTICR[position >> 2u];
         CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
         SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
         AFIO->EXTICR[position >> 2u] = temp;
-        /* Configure the interrupt mask */
+        /* Enable or disable the rising trigger */
-        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
+        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
         {
-          SET_BIT(EXTI->IMR, iocurrent);
+          SET_BIT(EXTI->RTSR, iocurrent);
         }
         else
         {
-          CLEAR_BIT(EXTI->IMR, iocurrent);
+          CLEAR_BIT(EXTI->RTSR, iocurrent);
         }
-        /* Configure the event mask */
+        /* Enable or disable the falling trigger */
-        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
+        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
         {
-          SET_BIT(EXTI->EMR, iocurrent);
+          SET_BIT(EXTI->FTSR, iocurrent);
         }
         else
         {
-          CLEAR_BIT(EXTI->EMR, iocurrent);
+          CLEAR_BIT(EXTI->FTSR, iocurrent);
         }
-        /* Enable or disable the rising trigger */
+        /* Configure the event mask */
-        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
+        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
         {
-          SET_BIT(EXTI->RTSR, iocurrent);
+          SET_BIT(EXTI->EMR, iocurrent);
         }
         else
         {
-          CLEAR_BIT(EXTI->RTSR, iocurrent);
+          CLEAR_BIT(EXTI->EMR, iocurrent);
         }
-        /* Enable or disable the falling trigger */
+        /* Configure the interrupt mask */
-        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
+        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
         {
-          SET_BIT(EXTI->FTSR, iocurrent);
+          SET_BIT(EXTI->IMR, iocurrent);
         }
         else
         {
-          CLEAR_BIT(EXTI->FTSR, iocurrent);
+          CLEAR_BIT(EXTI->IMR, iocurrent);
         }
       }
     }
         position++;
   }
 }
 /**
   * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
   * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
   * @param  GPIO_Pin: specifies the port bit to be written.
   *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
   * @retval None
   */
 void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
 {
   uint32_t position = 0x00u;
   uint32_t iocurrent;
   uint32_t tmp;
   __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
   uint32_t registeroffset;
   /* Check the parameters */
   assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
   assert_param(IS_GPIO_PIN(GPIO_Pin));
   /* Configure the port pins */
   while ((GPIO_Pin >> position) != 0u)
   {
     /* Get current io position */
     iocurrent = (GPIO_Pin) & (1uL << position);
     if (iocurrent)
     {
       /*------------------------- EXTI Mode Configuration --------------------*/
       /* Clear the External Interrupt or Event for the current IO */
       tmp = AFIO->EXTICR[position >> 2u];
       tmp &= 0x0FuL << (4u * (position & 0x03u));
       if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
       {
-        tmp = 0x0FuL << (4u * (position & 0x03u));
+        /* Clear EXTI line configuration */
-        CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
+        CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
+        CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
-        /* Clear EXTI line configuration */
-        CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
+        /* Clear Rising Falling edge configuration */
-        CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
+        CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
+        CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
-        /* Clear Rising Falling edge configuration */
-        CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
+        tmp = 0x0FuL << (4u * (position & 0x03u));
-        CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
+        CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
       }
       /*------------------------- GPIO Mode Configuration --------------------*/
       /* Check if the current bit belongs to first half or last half of the pin count number
        in order to address CRH or CRL register */
       configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL     : &GPIOx->CRH;
       registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
       /* CRL/CRH default value is floating input(0x04) shifted to correct position */
       MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CNF0_0 << registeroffset);
       /* ODR default value is 0 */
       CLEAR_BIT(GPIOx->ODR, iocurrent);
     }
     position++;
   }
 }
 /**
   * @}
   */
 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
  *  @brief   GPIO Read and Write
  *
 @verbatim
  ===============================================================================
                        ##### IO operation functions #####
  ===============================================================================
   [..]
     This subsection provides a set of functions allowing to manage the GPIOs.
 @endverbatim
   * @{
   */
 /**
   * @brief  Reads the specified input port pin.
   * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
   * @param  GPIO_Pin: specifies the port bit to read.
   *         This parameter can be GPIO_PIN_x where x can be (0..15).
   * @retval The input port pin value.
   */
 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 {
   GPIO_PinState bitstatus;
   /* Check the parameters */
   assert_param(IS_GPIO_PIN(GPIO_Pin));
   if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
   {
     bitstatus = GPIO_PIN_SET;
   }
   else
   {
     bitstatus = GPIO_PIN_RESET;
   }
   return bitstatus;
 }
 /**
   * @brief  Sets or clears the selected data port bit.
   *
   * @note   This function uses GPIOx_BSRR register to allow atomic read/modify
   *         accesses. In this way, there is no risk of an IRQ occurring between
   *         the read and the modify access.
   *
   * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
   * @param  GPIO_Pin: specifies the port bit to be written.
   *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
   * @param  PinState: specifies the value to be written to the selected bit.
   *          This parameter can be one of the GPIO_PinState enum values:
   *            @arg GPIO_PIN_RESET: to clear the port pin
   *            @arg GPIO_PIN_SET: to set the port pin
   * @retval None
   */
 void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
 {
   /* Check the parameters */
   assert_param(IS_GPIO_PIN(GPIO_Pin));
   assert_param(IS_GPIO_PIN_ACTION(PinState));
   if (PinState != GPIO_PIN_RESET)
   {
     GPIOx->BSRR = GPIO_Pin;
   }
   else
   {
     GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
   }
 }
 /**
   * @brief  Toggles the specified GPIO pin
   * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
   * @param  GPIO_Pin: Specifies the pins to be toggled.
   * @retval None
   */
 void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 {
   uint32_t odr;
   /* Check the parameters */
   assert_param(IS_GPIO_PIN(GPIO_Pin));
-  /* get current Ouput Data Register value */
+  /* get current Output Data Register value */
   odr = GPIOx->ODR;
   /* Set selected pins that were at low level, and reset ones that were high */
   GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
 }
 /**
 * @brief  Locks GPIO Pins configuration registers.
 * @note   The locking mechanism allows the IO configuration to be frozen. When the LOCK sequence
 *         has been applied on a port bit, it is no longer possible to modify the value of the port bit until
 *         the next reset.
 * @param  GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
 * @param  GPIO_Pin: specifies the port bit to be locked.
 *         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
 * @retval None
 */
 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 {
   __IO uint32_t tmp = GPIO_LCKR_LCKK;
   /* Check the parameters */
   assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
   assert_param(IS_GPIO_PIN(GPIO_Pin));
   /* Apply lock key write sequence */
   SET_BIT(tmp, GPIO_Pin);
   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
   GPIOx->LCKR = tmp;
   /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
   GPIOx->LCKR = GPIO_Pin;
   /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
   GPIOx->LCKR = tmp;
   /* Read LCKK register. This read is mandatory to complete key lock sequence */
   tmp = GPIOx->LCKR;
   /* read again in order to confirm lock is active */
   if ((uint32_t)(GPIOx->LCKR & GPIO_LCKR_LCKK))
   {
     return HAL_OK;
   }
   else
   {
     return HAL_ERROR;
   }
 }
 /**
   * @brief  This function handles EXTI interrupt request.
   * @param  GPIO_Pin: Specifies the pins connected EXTI line
   * @retval None
   */
 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
 {
   /* EXTI line interrupt detected */
   if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u)
   {
     __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
     HAL_GPIO_EXTI_Callback(GPIO_Pin);
   }
 }
 /**
   * @brief  EXTI line detection callbacks.
   * @param  GPIO_Pin: Specifies the pins connected EXTI line
   * @retval None
   */
 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
 {
   /* Prevent unused argument(s) compilation warning */
   UNUSED(GPIO_Pin);
   /* NOTE: This function Should not be modified, when the callback is needed,
            the HAL_GPIO_EXTI_Callback could be implemented in the user file
    */
 }
 /**
   * @}
   */
 /**
   * @}
   */
 #endif /* HAL_GPIO_MODULE_ENABLED */
 /**
   * @}
   */
 /**
   * @}
   */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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(root)/trunk/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c – Rev 2 → 18