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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_hal_dac.c |
3 | * @file stm32f1xx_hal_dac.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief DAC HAL module driver. |
5 | * @brief DAC HAL module driver. |
| 6 | * This file provides firmware functions to manage the following |
6 | * This file provides firmware functions to manage the following |
| 7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
7 | * functionalities of the Digital to Analog Converter (DAC) peripheral: |
| 8 | * + Initialization and de-initialization functions |
8 | * + Initialization and de-initialization functions |
| 9 | * + IO operation functions |
9 | * + IO operation functions |
| 10 | * + Peripheral Control functions |
10 | * + Peripheral Control functions |
| 11 | * + Peripheral State and Errors functions |
11 | * + Peripheral State and Errors functions |
| 12 | * |
12 | * |
| 13 | * |
13 | * |
| 14 | @verbatim |
14 | ****************************************************************************** |
| 15 | ============================================================================== |
15 | * @attention |
| 16 | ##### DAC Peripheral features ##### |
16 | * |
| 17 | ============================================================================== |
17 | * Copyright (c) 2016 STMicroelectronics. |
| 18 | [..] |
18 | * All rights reserved. |
| 19 | *** DAC Channels *** |
19 | * |
| 20 | ==================== |
20 | * This software is licensed under terms that can be found in the LICENSE file |
| 21 | [..] |
21 | * in the root directory of this software component. |
| 22 | STM32F1 devices integrate two 12-bit Digital Analog Converters |
22 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 23 | 23 | * |
|
| 24 | The 2 converters (i.e. channel1 & channel2) |
24 | ****************************************************************************** |
| 25 | can be used independently or simultaneously (dual mode): |
25 | @verbatim |
| 26 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
26 | ============================================================================== |
| 27 | peripherals (ex. timers). |
27 | ##### DAC Peripheral features ##### |
| 28 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
28 | ============================================================================== |
| 29 | peripherals (ex. timers). |
29 | [..] |
| 30 | 30 | *** DAC Channels *** |
|
| 31 | *** DAC Triggers *** |
31 | ==================== |
| 32 | ==================== |
32 | [..] |
| 33 | [..] |
33 | STM32F1 devices integrate two 12-bit Digital Analog Converters |
| 34 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
34 | |
| 35 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
35 | The 2 converters (i.e. channel1 & channel2) |
| 36 | [..] |
36 | can be used independently or simultaneously (dual mode): |
| 37 | Digital to Analog conversion can be triggered by: |
37 | (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip |
| 38 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
38 | peripherals (ex. timers). |
| 39 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
39 | (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip |
| 40 | 40 | peripherals (ex. timers). |
|
| 41 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 |
41 | |
| 42 | For STM32F10x connectivity line devices and STM32F100x devices: TIM3 |
42 | *** DAC Triggers *** |
| 43 | For STM32F10x high-density and XL-density devices: TIM8 |
43 | ==================== |
| 44 | For STM32F100x high-density value line devices: TIM15 as |
44 | [..] |
| 45 | replacement of TIM5. |
45 | Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE |
| 46 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
46 | and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. |
| 47 | 47 | [..] |
|
| 48 | (#) Software using DAC_TRIGGER_SOFTWARE |
48 | Digital to Analog conversion can be triggered by: |
| 49 | 49 | (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. |
|
| 50 | *** DAC Buffer mode feature *** |
50 | The used pin (GPIOx_PIN_9) must be configured in input mode. |
| 51 | =============================== |
51 | |
| 52 | [..] |
52 | (#) Timers TRGO: TIM2, TIM4, TIM6, TIM7 |
| 53 | Each DAC channel integrates an output buffer that can be used to |
53 | For STM32F10x connectivity line devices and STM32F100x devices: TIM3 |
| 54 | reduce the output impedance, and to drive external loads directly |
54 | For STM32F10x high-density and XL-density devices: TIM8 |
| 55 | without having to add an external operational amplifier. |
55 | For STM32F100x high-density value line devices: TIM15 as |
| 56 | To enable, the output buffer use |
56 | replacement of TIM5. |
| 57 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
57 | (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...) |
| 58 | [..] |
58 | |
| 59 | (@) Refer to the device datasheet for more details about output |
59 | (#) Software using DAC_TRIGGER_SOFTWARE |
| 60 | impedance value with and without output buffer. |
60 | |
| 61 | 61 | *** DAC Buffer mode feature *** |
|
| 62 | *** GPIO configurations guidelines *** |
62 | =============================== |
| 63 | ===================== |
63 | [..] |
| 64 | [..] |
64 | Each DAC channel integrates an output buffer that can be used to |
| 65 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
65 | reduce the output impedance, and to drive external loads directly |
| 66 | (ex channel2 on PA5 is configured in Analog and disabled). |
66 | without having to add an external operational amplifier. |
| 67 | Channel1 may disturb channel2 as coupling effect. |
67 | To enable, the output buffer use |
| 68 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
68 | sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; |
| 69 | Coupling on adjacent channel could be avoided as follows: |
69 | [..] |
| 70 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
70 | (@) Refer to the device datasheet for more details about output |
| 71 | PA5 is configured in ANALOG just before it is turned on. |
71 | impedance value with and without output buffer. |
| 72 | 72 | ||
| 73 | *** DAC wave generation feature *** |
73 | *** GPIO configurations guidelines *** |
| 74 | =================================== |
74 | ===================== |
| 75 | [..] |
75 | [..] |
| 76 | Both DAC channels can be used to generate |
76 | When a DAC channel is used (ex channel1 on PA4) and the other is not |
| 77 | (#) Noise wave |
77 | (ex channel2 on PA5 is configured in Analog and disabled). |
| 78 | (#) Triangle wave |
78 | Channel1 may disturb channel2 as coupling effect. |
| 79 | 79 | Note that there is no coupling on channel2 as soon as channel2 is turned on. |
|
| 80 | *** DAC data format *** |
80 | Coupling on adjacent channel could be avoided as follows: |
| 81 | ======================= |
81 | when unused PA5 is configured as INPUT PULL-UP or DOWN. |
| 82 | [..] |
82 | PA5 is configured in ANALOG just before it is turned on. |
| 83 | The DAC data format can be: |
83 | |
| 84 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
84 | *** DAC wave generation feature *** |
| 85 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
85 | =================================== |
| 86 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
86 | [..] |
| 87 | 87 | Both DAC channels can be used to generate |
|
| 88 | *** DAC data value to voltage correspondence *** |
88 | (#) Noise wave |
| 89 | ================================================ |
89 | (#) Triangle wave |
| 90 | [..] |
90 | |
| 91 | The analog output voltage on each DAC channel pin is determined |
91 | *** DAC data format *** |
| 92 | by the following equation: |
92 | ======================= |
| 93 | [..] |
93 | [..] |
| 94 | DAC_OUTx = VREF+ * DOR / 4095 |
94 | The DAC data format can be: |
| 95 | (+) with DOR is the Data Output Register |
95 | (#) 8-bit right alignment using DAC_ALIGN_8B_R |
| 96 | [..] |
96 | (#) 12-bit left alignment using DAC_ALIGN_12B_L |
| 97 | VREF+ is the input voltage reference (refer to the device datasheet) |
97 | (#) 12-bit right alignment using DAC_ALIGN_12B_R |
| 98 | [..] |
98 | |
| 99 | e.g. To set DAC_OUT1 to 0.7V, use |
99 | *** DAC data value to voltage correspondence *** |
| 100 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
100 | ================================================ |
| 101 | 101 | [..] |
|
| 102 | *** DMA requests *** |
102 | The analog output voltage on each DAC channel pin is determined |
| 103 | ===================== |
103 | by the following equation: |
| 104 | [..] |
104 | [..] |
| 105 | A DMA request can be generated when an external trigger (but not a software trigger) |
105 | DAC_OUTx = VREF+ * DOR / 4095 |
| 106 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
106 | (+) with DOR is the Data Output Register |
| 107 | DMA1 requests are mapped as following: |
107 | [..] |
| 108 | (#) DAC channel1 mapped on DMA1 channel3 |
108 | VREF+ is the input voltage reference (refer to the device datasheet) |
| 109 | for STM32F100x low-density, medium-density, high-density with DAC |
109 | [..] |
| 110 | DMA remap: |
110 | e.g. To set DAC_OUT1 to 0.7V, use |
| 111 | (#) DAC channel2 mapped on DMA2 channel3 |
111 | (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V |
| 112 | for STM32F100x high-density without DAC DMA remap and other |
112 | |
| 113 | STM32F1 devices |
113 | *** DMA requests *** |
| 114 | 114 | ===================== |
|
| 115 | [..] |
115 | [..] |
| 116 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
116 | A DMA request can be generated when an external trigger (but not a software trigger) |
| 117 | refer to Extended Features Driver description |
117 | occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). |
| 118 | 118 | DMA1 requests are mapped as following: |
|
| 119 | ##### How to use this driver ##### |
119 | (#) DAC channel1 mapped on DMA1 channel3 |
| 120 | ============================================================================== |
120 | for STM32F100x low-density, medium-density, high-density with DAC |
| 121 | [..] |
121 | DMA remap: |
| 122 | (+) DAC APB clock must be enabled to get write access to DAC |
122 | (#) DAC channel2 mapped on DMA2 channel3 |
| 123 | registers using HAL_DAC_Init() |
123 | for STM32F100x high-density without DAC DMA remap and other |
| 124 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
124 | STM32F1 devices |
| 125 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
125 | |
| 126 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
126 | [..] |
| 127 | 127 | (@) For Dual mode and specific signal (Triangle and noise) generation please |
|
| 128 | 128 | refer to Extended Features Driver description |
|
| 129 | *** Polling mode IO operation *** |
129 | |
| 130 | ================================= |
130 | ##### How to use this driver ##### |
| 131 | [..] |
131 | ============================================================================== |
| 132 | (+) Start the DAC peripheral using HAL_DAC_Start() |
132 | [..] |
| 133 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
133 | (+) DAC APB clock must be enabled to get write access to DAC |
| 134 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
134 | registers using HAL_DAC_Init() |
| 135 | 135 | (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. |
|
| 136 | *** DMA mode IO operation *** |
136 | (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. |
| 137 | ============================== |
137 | (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. |
| 138 | [..] |
138 | |
| 139 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
139 | |
| 140 | of data to be transferred at each end of conversion |
140 | *** Polling mode IO operation *** |
| 141 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
141 | ================================= |
| 142 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
142 | [..] |
| 143 | function is executed and user can add his own code by customization of function pointer |
143 | (+) Start the DAC peripheral using HAL_DAC_Start() |
| 144 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
144 | (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. |
| 145 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
145 | (+) Stop the DAC peripheral using HAL_DAC_Stop() |
| 146 | function is executed and user can add his own code by customization of function pointer |
146 | |
| 147 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
147 | *** DMA mode IO operation *** |
| 148 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
148 | ============================== |
| 149 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
149 | [..] |
| 150 | (+) For STM32F100x devices with specific feature: DMA underrun. |
150 | (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length |
| 151 | In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
151 | of data to be transferred at each end of conversion |
| 152 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
152 | First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue(). |
| 153 | function is executed and user can add his own code by customization of function pointer |
153 | (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
| 154 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
154 | function is executed and user can add his own code by customization of function pointer |
| 155 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
155 | HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
| 156 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
156 | (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
| 157 | 157 | function is executed and user can add his own code by customization of function pointer |
|
| 158 | *** Callback registration *** |
158 | HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() |
| 159 | ============================================= |
159 | (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can |
| 160 | [..] |
160 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 |
| 161 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
161 | (+) For STM32F100x devices with specific feature: DMA underrun. |
| 162 | allows the user to configure dynamically the driver callbacks. |
162 | In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. |
| 163 | 163 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() |
|
| 164 | Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback, |
164 | function is executed and user can add his own code by customization of function pointer |
| 165 | it allows to register following callbacks: |
165 | HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and |
| 166 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
166 | add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() |
| 167 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
167 | (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() |
| 168 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
168 | |
| 169 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
169 | *** Callback registration *** |
| 170 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
170 | ============================================= |
| 171 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
171 | [..] |
| 172 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
172 | The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 |
| 173 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
173 | allows the user to configure dynamically the driver callbacks. |
| 174 | (+) MspInitCallback : DAC MspInit. |
174 | |
| 175 | (+) MspDeInitCallback : DAC MspdeInit. |
175 | Use Functions HAL_DAC_RegisterCallback() to register a user callback, |
| 176 | This function takes as parameters the HAL peripheral handle, the Callback ID |
176 | it allows to register following callbacks: |
| 177 | and a pointer to the user callback function. |
177 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
| 178 | 178 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
|
| 179 | Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default |
179 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
| 180 | weak (surcharged) function. It allows to reset following callbacks: |
180 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
| 181 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
181 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
| 182 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
182 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
| 183 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
183 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
| 184 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
184 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
| 185 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
185 | (+) MspInitCallback : DAC MspInit. |
| 186 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
186 | (+) MspDeInitCallback : DAC MspdeInit. |
| 187 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
187 | This function takes as parameters the HAL peripheral handle, the Callback ID |
| 188 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
188 | and a pointer to the user callback function. |
| 189 | (+) MspInitCallback : DAC MspInit. |
189 | |
| 190 | (+) MspDeInitCallback : DAC MspdeInit. |
190 | Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default |
| 191 | (+) All Callbacks |
191 | weak (overridden) function. It allows to reset following callbacks: |
| 192 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
192 | (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. |
| 193 | 193 | (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. |
|
| 194 | By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
194 | (+) ErrorCallbackCh1 : callback when an error occurs on Ch1. |
| 195 | all callbacks are reset to the corresponding legacy weak (surcharged) functions. |
195 | (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1. |
| 196 | Exception done for MspInit and MspDeInit callbacks that are respectively |
196 | (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2. |
| 197 | reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init |
197 | (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2. |
| 198 | and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
198 | (+) ErrorCallbackCh2 : callback when an error occurs on Ch2. |
| 199 | If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit |
199 | (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2. |
| 200 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
200 | (+) MspInitCallback : DAC MspInit. |
| 201 | 201 | (+) MspDeInitCallback : DAC MspdeInit. |
|
| 202 | Callbacks can be registered/unregistered in READY state only. |
202 | (+) All Callbacks |
| 203 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
203 | This function) takes as parameters the HAL peripheral handle and the Callback ID. |
| 204 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
204 | |
| 205 | during the Init/DeInit. |
205 | By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET |
| 206 | In that case first register the MspInit/MspDeInit user callbacks |
206 | all callbacks are reset to the corresponding legacy weak (overridden) functions. |
| 207 | using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit |
207 | Exception done for MspInit and MspDeInit callbacks that are respectively |
| 208 | or @ref HAL_DAC_Init function. |
208 | reset to the legacy weak (overridden) functions in the HAL_DAC_Init |
| 209 | 209 | and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). |
|
| 210 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
210 | If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit |
| 211 | not defined, the callback registering feature is not available |
211 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
| 212 | and weak (surcharged) callbacks are used. |
212 | |
| 213 | 213 | Callbacks can be registered/unregistered in READY state only. |
|
| 214 | *** DAC HAL driver macros list *** |
214 | Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered |
| 215 | ============================================= |
215 | in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used |
| 216 | [..] |
216 | during the Init/DeInit. |
| 217 | Below the list of most used macros in DAC HAL driver. |
217 | In that case first register the MspInit/MspDeInit user callbacks |
| 218 | 218 | using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit |
|
| 219 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
219 | or HAL_DAC_Init function. |
| 220 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
220 | |
| 221 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) |
221 | When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or |
| 222 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) |
222 | not defined, the callback registering feature is not available |
| 223 | 223 | and weak (overridden) callbacks are used. |
|
| 224 | [..] |
224 | |
| 225 | (@) You can refer to the DAC HAL driver header file for more useful macros |
225 | *** DAC HAL driver macros list *** |
| 226 | 226 | ============================================= |
|
| 227 | @endverbatim |
227 | [..] |
| 228 | ****************************************************************************** |
228 | Below the list of most used macros in DAC HAL driver. |
| 229 | * @attention |
229 | |
| 230 | * |
230 | (+) __HAL_DAC_ENABLE : Enable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
| 231 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
231 | (+) __HAL_DAC_DISABLE : Disable the DAC peripheral (For STM32F100x devices with specific feature: DMA underrun) |
| 232 | * All rights reserved.</center></h2> |
232 | (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags (For STM32F100x devices with specific feature: DMA underrun) |
| 233 | * |
233 | (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status (For STM32F100x devices with specific feature: DMA underrun) |
| 234 | * This software component is licensed by ST under BSD 3-Clause license, |
234 | |
| 235 | * the "License"; You may not use this file except in compliance with the |
235 | [..] |
| 236 | * License. You may obtain a copy of the License at: |
236 | (@) You can refer to the DAC HAL driver header file for more useful macros |
| 237 | * opensource.org/licenses/BSD-3-Clause |
237 | |
| 238 | * |
238 | @endverbatim |
| 239 | ****************************************************************************** |
239 | ****************************************************************************** |
| 240 | */ |
240 | */ |
| 241 | 241 | ||
| 242 | /* Includes ------------------------------------------------------------------*/ |
242 | /* Includes ------------------------------------------------------------------*/ |
| 243 | #include "stm32f1xx_hal.h" |
243 | #include "stm32f1xx_hal.h" |
| 244 | 244 | ||
| 245 | /** @addtogroup STM32F1xx_HAL_Driver |
245 | /** @addtogroup STM32F1xx_HAL_Driver |
| 246 | * @{ |
246 | * @{ |
| 247 | */ |
247 | */ |
| 248 | 248 | ||
| 249 | #ifdef HAL_DAC_MODULE_ENABLED |
249 | #ifdef HAL_DAC_MODULE_ENABLED |
| 250 | #if defined(DAC) |
250 | #if defined(DAC) |
| 251 | 251 | ||
| 252 | /** @defgroup DAC DAC |
252 | /** @defgroup DAC DAC |
| 253 | * @brief DAC driver modules |
253 | * @brief DAC driver modules |
| 254 | * @{ |
254 | * @{ |
| 255 | */ |
255 | */ |
| 256 | 256 | ||
| 257 | /* Private typedef -----------------------------------------------------------*/ |
257 | /* Private typedef -----------------------------------------------------------*/ |
| 258 | /* Private define ------------------------------------------------------------*/ |
258 | /* Private define ------------------------------------------------------------*/ |
| 259 | /* Private constants ---------------------------------------------------------*/ |
259 | /* Private constants ---------------------------------------------------------*/ |
| 260 | /* Private macro -------------------------------------------------------------*/ |
260 | /* Private macro -------------------------------------------------------------*/ |
| 261 | /* Private variables ---------------------------------------------------------*/ |
261 | /* Private variables ---------------------------------------------------------*/ |
| 262 | /* Private function prototypes -----------------------------------------------*/ |
262 | /* Private function prototypes -----------------------------------------------*/ |
| 263 | /* Exported functions -------------------------------------------------------*/ |
263 | /* Exported functions -------------------------------------------------------*/ |
| 264 | 264 | ||
| 265 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
265 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
| 266 | * @{ |
266 | * @{ |
| 267 | */ |
267 | */ |
| 268 | 268 | ||
| 269 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
269 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
| 270 | * @brief Initialization and Configuration functions |
270 | * @brief Initialization and Configuration functions |
| 271 | * |
271 | * |
| 272 | @verbatim |
272 | @verbatim |
| 273 | ============================================================================== |
273 | ============================================================================== |
| 274 | ##### Initialization and de-initialization functions ##### |
274 | ##### Initialization and de-initialization functions ##### |
| 275 | ============================================================================== |
275 | ============================================================================== |
| 276 | [..] This section provides functions allowing to: |
276 | [..] This section provides functions allowing to: |
| 277 | (+) Initialize and configure the DAC. |
277 | (+) Initialize and configure the DAC. |
| 278 | (+) De-initialize the DAC. |
278 | (+) De-initialize the DAC. |
| 279 | 279 | ||
| 280 | @endverbatim |
280 | @endverbatim |
| 281 | * @{ |
281 | * @{ |
| 282 | */ |
282 | */ |
| 283 | 283 | ||
| 284 | /** |
284 | /** |
| 285 | * @brief Initialize the DAC peripheral according to the specified parameters |
285 | * @brief Initialize the DAC peripheral according to the specified parameters |
| 286 | * in the DAC_InitStruct and initialize the associated handle. |
286 | * in the DAC_InitStruct and initialize the associated handle. |
| 287 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
287 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 288 | * the configuration information for the specified DAC. |
288 | * the configuration information for the specified DAC. |
| 289 | * @retval HAL status |
289 | * @retval HAL status |
| 290 | */ |
290 | */ |
| 291 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
291 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac) |
| 292 | { |
292 | { |
| 293 | /* Check DAC handle */ |
293 | /* Check the DAC peripheral handle */ |
| 294 | if (hdac == NULL) |
294 | if (hdac == NULL) |
| 295 | { |
295 | { |
| 296 | return HAL_ERROR; |
296 | return HAL_ERROR; |
| 297 | } |
297 | } |
| 298 | /* Check the parameters */ |
298 | /* Check the parameters */ |
| 299 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
299 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
| 300 | 300 | ||
| 301 | if (hdac->State == HAL_DAC_STATE_RESET) |
301 | if (hdac->State == HAL_DAC_STATE_RESET) |
| 302 | { |
302 | { |
| 303 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
303 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| 304 | /* Init the DAC Callback settings */ |
304 | /* Init the DAC Callback settings */ |
| 305 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
305 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
| 306 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
306 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
| 307 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
307 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
| 308 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
308 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
| 309 | 309 | ||
| 310 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
310 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
| 311 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
311 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
| 312 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
312 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
| 313 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
313 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
| 314 | 314 | ||
| 315 | if (hdac->MspInitCallback == NULL) |
315 | if (hdac->MspInitCallback == NULL) |
| 316 | { |
316 | { |
| 317 | hdac->MspInitCallback = HAL_DAC_MspInit; |
317 | hdac->MspInitCallback = HAL_DAC_MspInit; |
| 318 | } |
318 | } |
| 319 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
319 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 320 | 320 | ||
| 321 | /* Allocate lock resource and initialize it */ |
321 | /* Allocate lock resource and initialize it */ |
| 322 | hdac->Lock = HAL_UNLOCKED; |
322 | hdac->Lock = HAL_UNLOCKED; |
| 323 | 323 | ||
| 324 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
324 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| 325 | /* Init the low level hardware */ |
325 | /* Init the low level hardware */ |
| 326 | hdac->MspInitCallback(hdac); |
326 | hdac->MspInitCallback(hdac); |
| 327 | #else |
327 | #else |
| 328 | /* Init the low level hardware */ |
328 | /* Init the low level hardware */ |
| 329 | HAL_DAC_MspInit(hdac); |
329 | HAL_DAC_MspInit(hdac); |
| 330 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
330 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 331 | } |
331 | } |
| 332 | 332 | ||
| 333 | /* Initialize the DAC state*/ |
333 | /* Initialize the DAC state*/ |
| 334 | hdac->State = HAL_DAC_STATE_BUSY; |
334 | hdac->State = HAL_DAC_STATE_BUSY; |
| 335 | 335 | ||
| 336 | /* Set DAC error code to none */ |
336 | /* Set DAC error code to none */ |
| 337 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
337 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
| 338 | 338 | ||
| 339 | /* Initialize the DAC state*/ |
339 | /* Initialize the DAC state*/ |
| 340 | hdac->State = HAL_DAC_STATE_READY; |
340 | hdac->State = HAL_DAC_STATE_READY; |
| 341 | 341 | ||
| 342 | /* Return function status */ |
342 | /* Return function status */ |
| 343 | return HAL_OK; |
343 | return HAL_OK; |
| 344 | } |
344 | } |
| 345 | 345 | ||
| 346 | /** |
346 | /** |
| 347 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
347 | * @brief Deinitialize the DAC peripheral registers to their default reset values. |
| 348 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
348 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 349 | * the configuration information for the specified DAC. |
349 | * the configuration information for the specified DAC. |
| 350 | * @retval HAL status |
350 | * @retval HAL status |
| 351 | */ |
351 | */ |
| 352 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
352 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac) |
| 353 | { |
353 | { |
| 354 | /* Check DAC handle */ |
354 | /* Check the DAC peripheral handle */ |
| 355 | if (hdac == NULL) |
355 | if (hdac == NULL) |
| 356 | { |
356 | { |
| 357 | return HAL_ERROR; |
357 | return HAL_ERROR; |
| 358 | } |
358 | } |
| 359 | 359 | ||
| 360 | /* Check the parameters */ |
360 | /* Check the parameters */ |
| 361 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
361 | assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); |
| 362 | 362 | ||
| 363 | /* Change DAC state */ |
363 | /* Change DAC state */ |
| 364 | hdac->State = HAL_DAC_STATE_BUSY; |
364 | hdac->State = HAL_DAC_STATE_BUSY; |
| 365 | 365 | ||
| 366 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
366 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| 367 | if (hdac->MspDeInitCallback == NULL) |
367 | if (hdac->MspDeInitCallback == NULL) |
| 368 | { |
368 | { |
| 369 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
369 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
| 370 | } |
370 | } |
| 371 | /* DeInit the low level hardware */ |
371 | /* DeInit the low level hardware */ |
| 372 | hdac->MspDeInitCallback(hdac); |
372 | hdac->MspDeInitCallback(hdac); |
| 373 | #else |
373 | #else |
| 374 | /* DeInit the low level hardware */ |
374 | /* DeInit the low level hardware */ |
| 375 | HAL_DAC_MspDeInit(hdac); |
375 | HAL_DAC_MspDeInit(hdac); |
| 376 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
376 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 377 | 377 | ||
| 378 | /* Set DAC error code to none */ |
378 | /* Set DAC error code to none */ |
| 379 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
379 | hdac->ErrorCode = HAL_DAC_ERROR_NONE; |
| 380 | 380 | ||
| 381 | /* Change DAC state */ |
381 | /* Change DAC state */ |
| 382 | hdac->State = HAL_DAC_STATE_RESET; |
382 | hdac->State = HAL_DAC_STATE_RESET; |
| 383 | 383 | ||
| 384 | /* Release Lock */ |
384 | /* Release Lock */ |
| 385 | __HAL_UNLOCK(hdac); |
385 | __HAL_UNLOCK(hdac); |
| 386 | 386 | ||
| 387 | /* Return function status */ |
387 | /* Return function status */ |
| 388 | return HAL_OK; |
388 | return HAL_OK; |
| 389 | } |
389 | } |
| 390 | 390 | ||
| 391 | /** |
391 | /** |
| 392 | * @brief Initialize the DAC MSP. |
392 | * @brief Initialize the DAC MSP. |
| 393 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
393 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 394 | * the configuration information for the specified DAC. |
394 | * the configuration information for the specified DAC. |
| 395 | * @retval None |
395 | * @retval None |
| 396 | */ |
396 | */ |
| 397 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
397 | __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac) |
| 398 | { |
398 | { |
| 399 | /* Prevent unused argument(s) compilation warning */ |
399 | /* Prevent unused argument(s) compilation warning */ |
| 400 | UNUSED(hdac); |
400 | UNUSED(hdac); |
| 401 | 401 | ||
| 402 | /* NOTE : This function should not be modified, when the callback is needed, |
402 | /* NOTE : This function should not be modified, when the callback is needed, |
| 403 | the HAL_DAC_MspInit could be implemented in the user file |
403 | the HAL_DAC_MspInit could be implemented in the user file |
| 404 | */ |
404 | */ |
| 405 | } |
405 | } |
| 406 | 406 | ||
| 407 | /** |
407 | /** |
| 408 | * @brief DeInitialize the DAC MSP. |
408 | * @brief DeInitialize the DAC MSP. |
| 409 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
409 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 410 | * the configuration information for the specified DAC. |
410 | * the configuration information for the specified DAC. |
| 411 | * @retval None |
411 | * @retval None |
| 412 | */ |
412 | */ |
| 413 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
413 | __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac) |
| 414 | { |
414 | { |
| 415 | /* Prevent unused argument(s) compilation warning */ |
415 | /* Prevent unused argument(s) compilation warning */ |
| 416 | UNUSED(hdac); |
416 | UNUSED(hdac); |
| 417 | 417 | ||
| 418 | /* NOTE : This function should not be modified, when the callback is needed, |
418 | /* NOTE : This function should not be modified, when the callback is needed, |
| 419 | the HAL_DAC_MspDeInit could be implemented in the user file |
419 | the HAL_DAC_MspDeInit could be implemented in the user file |
| 420 | */ |
420 | */ |
| 421 | } |
421 | } |
| 422 | 422 | ||
| 423 | /** |
423 | /** |
| 424 | * @} |
424 | * @} |
| 425 | */ |
425 | */ |
| 426 | 426 | ||
| 427 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
427 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
| 428 | * @brief IO operation functions |
428 | * @brief IO operation functions |
| 429 | * |
429 | * |
| 430 | @verbatim |
430 | @verbatim |
| 431 | ============================================================================== |
431 | ============================================================================== |
| 432 | ##### IO operation functions ##### |
432 | ##### IO operation functions ##### |
| 433 | ============================================================================== |
433 | ============================================================================== |
| 434 | [..] This section provides functions allowing to: |
434 | [..] This section provides functions allowing to: |
| 435 | (+) Start conversion. |
435 | (+) Start conversion. |
| 436 | (+) Stop conversion. |
436 | (+) Stop conversion. |
| 437 | (+) Start conversion and enable DMA transfer. |
437 | (+) Start conversion and enable DMA transfer. |
| 438 | (+) Stop conversion and disable DMA transfer. |
438 | (+) Stop conversion and disable DMA transfer. |
| 439 | (+) Get result of conversion. |
439 | (+) Get result of conversion. |
| 440 | 440 | ||
| 441 | @endverbatim |
441 | @endverbatim |
| 442 | * @{ |
442 | * @{ |
| 443 | */ |
443 | */ |
| 444 | 444 | ||
| 445 | /** |
445 | /** |
| 446 | * @brief Enables DAC and starts conversion of channel. |
446 | * @brief Enables DAC and starts conversion of channel. |
| 447 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
447 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 448 | * the configuration information for the specified DAC. |
448 | * the configuration information for the specified DAC. |
| 449 | * @param Channel The selected DAC channel. |
449 | * @param Channel The selected DAC channel. |
| 450 | * This parameter can be one of the following values: |
450 | * This parameter can be one of the following values: |
| 451 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
451 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 452 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
452 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| 453 | * @retval HAL status |
453 | * @retval HAL status |
| 454 | */ |
454 | */ |
| 455 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
455 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel) |
| 456 | { |
456 | { |
| 457 | /* Check the parameters */ |
457 | /* Check the DAC peripheral handle */ |
| 458 | assert_param(IS_DAC_CHANNEL(Channel)); |
458 | if (hdac == NULL) |
| 459 | 459 | { |
|
| 460 | /* Process locked */ |
460 | return HAL_ERROR; |
| 461 | __HAL_LOCK(hdac); |
461 | } |
| 462 | 462 | ||
| 463 | /* Change DAC state */ |
463 | /* Check the parameters */ |
| 464 | hdac->State = HAL_DAC_STATE_BUSY; |
464 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 465 | 465 | ||
| 466 | /* Enable the Peripheral */ |
466 | /* Process locked */ |
| 467 | __HAL_DAC_ENABLE(hdac, Channel); |
467 | __HAL_LOCK(hdac); |
| 468 | 468 | ||
| 469 | if (Channel == DAC_CHANNEL_1) |
469 | /* Change DAC state */ |
| 470 | { |
470 | hdac->State = HAL_DAC_STATE_BUSY; |
| 471 | /* Check if software trigger enabled */ |
471 | |
| 472 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
472 | /* Enable the Peripheral */ |
| 473 | { |
473 | __HAL_DAC_ENABLE(hdac, Channel); |
| 474 | /* Enable the selected DAC software conversion */ |
474 | |
| 475 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
475 | if (Channel == DAC_CHANNEL_1) |
| 476 | } |
476 | { |
| 477 | } |
477 | /* Check if software trigger enabled */ |
| 478 | 478 | if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_TRIGGER_SOFTWARE) |
|
| 479 | else |
479 | { |
| 480 | { |
480 | /* Enable the selected DAC software conversion */ |
| 481 | /* Check if software trigger enabled */ |
481 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); |
| 482 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) |
482 | } |
| 483 | { |
483 | } |
| 484 | /* Enable the selected DAC software conversion*/ |
484 | |
| 485 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
485 | else |
| 486 | } |
486 | { |
| 487 | } |
487 | /* Check if software trigger enabled */ |
| 488 | 488 | if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_TRIGGER_SOFTWARE << (Channel & 0x10UL))) |
|
| 489 | 489 | { |
|
| 490 | /* Change DAC state */ |
490 | /* Enable the selected DAC software conversion*/ |
| 491 | hdac->State = HAL_DAC_STATE_READY; |
491 | SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); |
| 492 | 492 | } |
|
| 493 | /* Process unlocked */ |
493 | } |
| 494 | __HAL_UNLOCK(hdac); |
494 | |
| 495 | 495 | ||
| 496 | /* Return function status */ |
496 | /* Change DAC state */ |
| 497 | return HAL_OK; |
497 | hdac->State = HAL_DAC_STATE_READY; |
| 498 | } |
498 | |
| 499 | 499 | /* Process unlocked */ |
|
| 500 | /** |
500 | __HAL_UNLOCK(hdac); |
| 501 | * @brief Disables DAC and stop conversion of channel. |
501 | |
| 502 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
502 | /* Return function status */ |
| 503 | * the configuration information for the specified DAC. |
503 | return HAL_OK; |
| 504 | * @param Channel The selected DAC channel. |
504 | } |
| 505 | * This parameter can be one of the following values: |
505 | |
| 506 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
506 | /** |
| 507 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
507 | * @brief Disables DAC and stop conversion of channel. |
| 508 | * @retval HAL status |
508 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 509 | */ |
509 | * the configuration information for the specified DAC. |
| 510 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
510 | * @param Channel The selected DAC channel. |
| 511 | { |
511 | * This parameter can be one of the following values: |
| 512 | /* Check the parameters */ |
512 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 513 | assert_param(IS_DAC_CHANNEL(Channel)); |
513 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| 514 | 514 | * @retval HAL status |
|
| 515 | /* Disable the Peripheral */ |
515 | */ |
| 516 | __HAL_DAC_DISABLE(hdac, Channel); |
516 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) |
| 517 | 517 | { |
|
| 518 | /* Change DAC state */ |
518 | /* Check the DAC peripheral handle */ |
| 519 | hdac->State = HAL_DAC_STATE_READY; |
519 | if (hdac == NULL) |
| 520 | 520 | { |
|
| 521 | /* Return function status */ |
521 | return HAL_ERROR; |
| 522 | return HAL_OK; |
522 | } |
| 523 | } |
523 | |
| 524 | 524 | /* Check the parameters */ |
|
| 525 | /** |
525 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 526 | * @brief Enables DAC and starts conversion of channel. |
526 | |
| 527 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
527 | /* Disable the Peripheral */ |
| 528 | * the configuration information for the specified DAC. |
528 | __HAL_DAC_DISABLE(hdac, Channel); |
| 529 | * @param Channel The selected DAC channel. |
529 | |
| 530 | * This parameter can be one of the following values: |
530 | /* Change DAC state */ |
| 531 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
531 | hdac->State = HAL_DAC_STATE_READY; |
| 532 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
532 | |
| 533 | * @param pData The source Buffer address. |
533 | /* Return function status */ |
| 534 | * @param Length The length of data to be transferred from memory to DAC peripheral |
534 | return HAL_OK; |
| 535 | * @param Alignment Specifies the data alignment for DAC channel. |
535 | } |
| 536 | * This parameter can be one of the following values: |
536 | |
| 537 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
537 | /** |
| 538 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
538 | * @brief Enables DAC and starts conversion of channel. |
| 539 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
539 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 540 | * @retval HAL status |
540 | * the configuration information for the specified DAC. |
| 541 | */ |
541 | * @param Channel The selected DAC channel. |
| 542 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, |
542 | * This parameter can be one of the following values: |
| 543 | uint32_t Alignment) |
543 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 544 | { |
544 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| 545 | HAL_StatusTypeDef status; |
545 | * @param pData The source Buffer address. |
| 546 | uint32_t tmpreg = 0U; |
546 | * @param Length The length of data to be transferred from memory to DAC peripheral |
| 547 | 547 | * @param Alignment Specifies the data alignment for DAC channel. |
|
| 548 | /* Check the parameters */ |
548 | * This parameter can be one of the following values: |
| 549 | assert_param(IS_DAC_CHANNEL(Channel)); |
549 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
| 550 | assert_param(IS_DAC_ALIGN(Alignment)); |
550 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
| 551 | 551 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
|
| 552 | /* Process locked */ |
552 | * @retval HAL status |
| 553 | __HAL_LOCK(hdac); |
553 | */ |
| 554 | 554 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, const uint32_t *pData, uint32_t Length, |
|
| 555 | /* Change DAC state */ |
555 | uint32_t Alignment) |
| 556 | hdac->State = HAL_DAC_STATE_BUSY; |
556 | { |
| 557 | 557 | HAL_StatusTypeDef status; |
|
| 558 | if (Channel == DAC_CHANNEL_1) |
558 | uint32_t tmpreg; |
| 559 | { |
559 | |
| 560 | /* Set the DMA transfer complete callback for channel1 */ |
560 | /* Check the DAC peripheral handle */ |
| 561 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
561 | if (hdac == NULL) |
| 562 | 562 | { |
|
| 563 | /* Set the DMA half transfer complete callback for channel1 */ |
563 | return HAL_ERROR; |
| 564 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
564 | } |
| 565 | 565 | ||
| 566 | /* Set the DMA error callback for channel1 */ |
566 | /* Check the parameters */ |
| 567 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
567 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 568 | 568 | assert_param(IS_DAC_ALIGN(Alignment)); |
|
| 569 | /* Enable the selected DAC channel1 DMA request */ |
569 | |
| 570 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
570 | /* Process locked */ |
| 571 | 571 | __HAL_LOCK(hdac); |
|
| 572 | /* Case of use of channel 1 */ |
572 | |
| 573 | switch (Alignment) |
573 | /* Change DAC state */ |
| 574 | { |
574 | hdac->State = HAL_DAC_STATE_BUSY; |
| 575 | case DAC_ALIGN_12B_R: |
575 | |
| 576 | /* Get DHR12R1 address */ |
576 | if (Channel == DAC_CHANNEL_1) |
| 577 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
577 | { |
| 578 | break; |
578 | /* Set the DMA transfer complete callback for channel1 */ |
| 579 | case DAC_ALIGN_12B_L: |
579 | hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; |
| 580 | /* Get DHR12L1 address */ |
580 | |
| 581 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
581 | /* Set the DMA half transfer complete callback for channel1 */ |
| 582 | break; |
582 | hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; |
| 583 | case DAC_ALIGN_8B_R: |
583 | |
| 584 | /* Get DHR8R1 address */ |
584 | /* Set the DMA error callback for channel1 */ |
| 585 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
585 | hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; |
| 586 | break; |
586 | |
| 587 | default: |
587 | /* Enable the selected DAC channel1 DMA request */ |
| 588 | break; |
588 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
| 589 | } |
589 | |
| 590 | } |
590 | /* Case of use of channel 1 */ |
| 591 | 591 | switch (Alignment) |
|
| 592 | else |
592 | { |
| 593 | { |
593 | case DAC_ALIGN_12B_R: |
| 594 | /* Set the DMA transfer complete callback for channel2 */ |
594 | /* Get DHR12R1 address */ |
| 595 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
595 | tmpreg = (uint32_t)&hdac->Instance->DHR12R1; |
| 596 | 596 | break; |
|
| 597 | /* Set the DMA half transfer complete callback for channel2 */ |
597 | case DAC_ALIGN_12B_L: |
| 598 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
598 | /* Get DHR12L1 address */ |
| 599 | 599 | tmpreg = (uint32_t)&hdac->Instance->DHR12L1; |
|
| 600 | /* Set the DMA error callback for channel2 */ |
600 | break; |
| 601 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
601 | default: /* case DAC_ALIGN_8B_R */ |
| 602 | 602 | /* Get DHR8R1 address */ |
|
| 603 | /* Enable the selected DAC channel2 DMA request */ |
603 | tmpreg = (uint32_t)&hdac->Instance->DHR8R1; |
| 604 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
604 | break; |
| 605 | 605 | } |
|
| 606 | /* Case of use of channel 2 */ |
606 | } |
| 607 | switch (Alignment) |
607 | |
| 608 | { |
608 | else |
| 609 | case DAC_ALIGN_12B_R: |
609 | { |
| 610 | /* Get DHR12R2 address */ |
610 | /* Set the DMA transfer complete callback for channel2 */ |
| 611 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
611 | hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; |
| 612 | break; |
612 | |
| 613 | case DAC_ALIGN_12B_L: |
613 | /* Set the DMA half transfer complete callback for channel2 */ |
| 614 | /* Get DHR12L2 address */ |
614 | hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; |
| 615 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
615 | |
| 616 | break; |
616 | /* Set the DMA error callback for channel2 */ |
| 617 | case DAC_ALIGN_8B_R: |
617 | hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; |
| 618 | /* Get DHR8R2 address */ |
618 | |
| 619 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
619 | /* Enable the selected DAC channel2 DMA request */ |
| 620 | break; |
620 | SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
| 621 | default: |
621 | |
| 622 | break; |
622 | /* Case of use of channel 2 */ |
| 623 | } |
623 | switch (Alignment) |
| 624 | } |
624 | { |
| 625 | 625 | case DAC_ALIGN_12B_R: |
|
| 626 | 626 | /* Get DHR12R2 address */ |
|
| 627 | /* Enable the DMA Stream */ |
627 | tmpreg = (uint32_t)&hdac->Instance->DHR12R2; |
| 628 | if (Channel == DAC_CHANNEL_1) |
628 | break; |
| 629 | { |
629 | case DAC_ALIGN_12B_L: |
| 630 | #if defined(DAC_CR_DMAUDRIE1) |
630 | /* Get DHR12L2 address */ |
| 631 | /* Enable the DAC DMA underrun interrupt */ |
631 | tmpreg = (uint32_t)&hdac->Instance->DHR12L2; |
| 632 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
632 | break; |
| 633 | #endif /* DAC_CR_DMAUDRIE1 */ |
633 | default: /* case DAC_ALIGN_8B_R */ |
| 634 | 634 | /* Get DHR8R2 address */ |
|
| 635 | /* Enable the DMA Stream */ |
635 | tmpreg = (uint32_t)&hdac->Instance->DHR8R2; |
| 636 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
636 | break; |
| 637 | } |
637 | } |
| 638 | 638 | } |
|
| 639 | else |
639 | |
| 640 | { |
640 | if (Channel == DAC_CHANNEL_1) |
| 641 | #if defined(DAC_CR_DMAUDRIE2) |
641 | { |
| 642 | /* Enable the DAC DMA underrun interrupt */ |
642 | #if defined(DAC_CR_DMAUDRIE1) |
| 643 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
643 | /* Enable the DAC DMA underrun interrupt */ |
| 644 | #endif /* DAC_CR_DMAUDRIE2 */ |
644 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); |
| 645 | 645 | #endif /* DAC_CR_DMAUDRIE1 */ |
|
| 646 | /* Enable the DMA Stream */ |
646 | |
| 647 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
647 | /* Enable the DMA Stream */ |
| 648 | } |
648 | status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); |
| 649 | 649 | } |
|
| 650 | 650 | ||
| 651 | /* Process Unlocked */ |
651 | else |
| 652 | __HAL_UNLOCK(hdac); |
652 | { |
| 653 | 653 | #if defined(DAC_CR_DMAUDRIE2) |
|
| 654 | if (status == HAL_OK) |
654 | /* Enable the DAC DMA underrun interrupt */ |
| 655 | { |
655 | __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); |
| 656 | /* Enable the Peripheral */ |
656 | #endif /* DAC_CR_DMAUDRIE2 */ |
| 657 | __HAL_DAC_ENABLE(hdac, Channel); |
657 | |
| 658 | } |
658 | /* Enable the DMA Stream */ |
| 659 | else |
659 | status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); |
| 660 | { |
660 | } |
| 661 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
661 | |
| 662 | } |
662 | |
| 663 | 663 | /* Process Unlocked */ |
|
| 664 | /* Return function status */ |
664 | __HAL_UNLOCK(hdac); |
| 665 | return status; |
665 | |
| 666 | } |
666 | if (status == HAL_OK) |
| 667 | 667 | { |
|
| 668 | /** |
668 | /* Enable the Peripheral */ |
| 669 | * @brief Disables DAC and stop conversion of channel. |
669 | __HAL_DAC_ENABLE(hdac, Channel); |
| 670 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
670 | } |
| 671 | * the configuration information for the specified DAC. |
671 | else |
| 672 | * @param Channel The selected DAC channel. |
672 | { |
| 673 | * This parameter can be one of the following values: |
673 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
| 674 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
674 | } |
| 675 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
675 | |
| 676 | * @retval HAL status |
676 | /* Return function status */ |
| 677 | */ |
677 | return status; |
| 678 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
678 | } |
| 679 | { |
679 | |
| 680 | /* Check the parameters */ |
680 | /** |
| 681 | assert_param(IS_DAC_CHANNEL(Channel)); |
681 | * @brief Disables DAC and stop conversion of channel. |
| 682 | 682 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
|
| 683 | /* Disable the selected DAC channel DMA request */ |
683 | * the configuration information for the specified DAC. |
| 684 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
684 | * @param Channel The selected DAC channel. |
| 685 | 685 | * This parameter can be one of the following values: |
|
| 686 | /* Disable the Peripheral */ |
686 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 687 | __HAL_DAC_DISABLE(hdac, Channel); |
687 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| 688 | 688 | * @retval HAL status |
|
| 689 | /* Disable the DMA Stream */ |
689 | */ |
| 690 | 690 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel) |
|
| 691 | /* Channel1 is used */ |
691 | { |
| 692 | if (Channel == DAC_CHANNEL_1) |
692 | /* Check the DAC peripheral handle */ |
| 693 | { |
693 | if (hdac == NULL) |
| 694 | /* Disable the DMA Stream */ |
694 | { |
| 695 | (void)HAL_DMA_Abort(hdac->DMA_Handle1); |
695 | return HAL_ERROR; |
| 696 | #if defined(DAC_CR_DMAUDRIE1) |
696 | } |
| 697 | /* Disable the DAC DMA underrun interrupt */ |
697 | |
| 698 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
698 | /* Check the parameters */ |
| 699 | #endif /* DAC_CR_DMAUDRIE1 */ |
699 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 700 | } |
700 | |
| 701 | 701 | /* Disable the selected DAC channel DMA request */ |
|
| 702 | else /* Channel2 is used for */ |
702 | hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL)); |
| 703 | { |
703 | |
| 704 | /* Disable the DMA Stream */ |
704 | /* Disable the Peripheral */ |
| 705 | (void)HAL_DMA_Abort(hdac->DMA_Handle2); |
705 | __HAL_DAC_DISABLE(hdac, Channel); |
| 706 | #if defined(DAC_CR_DMAUDRIE2) |
706 | |
| 707 | /* Disable the DAC DMA underrun interrupt */ |
707 | /* Disable the DMA Stream */ |
| 708 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
708 | |
| 709 | #endif /* DAC_CR_DMAUDRIE2 */ |
709 | /* Channel1 is used */ |
| 710 | } |
710 | if (Channel == DAC_CHANNEL_1) |
| 711 | 711 | { |
|
| 712 | 712 | /* Disable the DMA Stream */ |
|
| 713 | /* Change DAC state */ |
713 | (void)HAL_DMA_Abort(hdac->DMA_Handle1); |
| 714 | hdac->State = HAL_DAC_STATE_READY; |
714 | |
| 715 | 715 | #if defined(DAC_CR_DMAUDRIE1) |
|
| 716 | /* Return function status */ |
716 | /* Disable the DAC DMA underrun interrupt */ |
| 717 | return HAL_OK; |
717 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); |
| 718 | } |
718 | #endif /* DAC_CR_DMAUDRIE1 */ |
| 719 | 719 | } |
|
| 720 | /** |
720 | |
| 721 | * @brief Handles DAC interrupt request |
721 | else /* Channel2 is used for */ |
| 722 | * This function uses the interruption of DMA |
722 | { |
| 723 | * underrun. |
723 | /* Disable the DMA Stream */ |
| 724 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
724 | (void)HAL_DMA_Abort(hdac->DMA_Handle2); |
| 725 | * the configuration information for the specified DAC. |
725 | |
| 726 | * @retval None |
726 | #if defined(DAC_CR_DMAUDRIE2) |
| 727 | */ |
727 | /* Disable the DAC DMA underrun interrupt */ |
| 728 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
728 | __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); |
| 729 | { |
729 | #endif /* DAC_CR_DMAUDRIE2 */ |
| 730 | #if !defined(DAC_SR_DMAUDR1) && !defined(DAC_SR_DMAUDR2) |
730 | } |
| 731 | UNUSED(hdac); |
731 | |
| 732 | #endif |
732 | |
| 733 | 733 | /* Change DAC state */ |
|
| 734 | #if defined(DAC_SR_DMAUDR1) |
734 | hdac->State = HAL_DAC_STATE_READY; |
| 735 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) |
735 | |
| 736 | { |
736 | /* Return function status */ |
| 737 | /* Check underrun flag of DAC channel 1 */ |
737 | return HAL_OK; |
| 738 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) |
738 | } |
| 739 | { |
739 | |
| 740 | /* Change DAC state to error state */ |
740 | /** |
| 741 | hdac->State = HAL_DAC_STATE_ERROR; |
741 | * @brief Handles DAC interrupt request |
| 742 | 742 | * This function uses the interruption of DMA |
|
| 743 | /* Set DAC error code to channel1 DMA underrun error */ |
743 | * underrun. |
| 744 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
744 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 745 | 745 | * the configuration information for the specified DAC. |
|
| 746 | /* Clear the underrun flag */ |
746 | * @retval None |
| 747 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
747 | */ |
| 748 | 748 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac) |
|
| 749 | /* Disable the selected DAC channel1 DMA request */ |
749 | { |
| 750 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); |
750 | #if !defined(DAC_SR_DMAUDR1) && !defined(DAC_SR_DMAUDR2) |
| 751 | 751 | UNUSED(hdac); |
|
| 752 | /* Error callback */ |
752 | #else |
| 753 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
753 | uint32_t itsource = hdac->Instance->CR; |
| 754 | hdac->DMAUnderrunCallbackCh1(hdac); |
754 | uint32_t itflag = hdac->Instance->SR; |
| 755 | #else |
755 | #endif /* !DAC_SR_DMAUDR1 && !DAC_SR_DMAUDR2 */ |
| 756 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
756 | |
| 757 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
757 | #if defined(DAC_SR_DMAUDR1) |
| 758 | } |
758 | if ((itsource & DAC_IT_DMAUDR1) == DAC_IT_DMAUDR1) |
| 759 | } |
759 | { |
| 760 | #endif /* DAC_SR_DMAUDR1 */ |
760 | /* Check underrun flag of DAC channel 1 */ |
| 761 | 761 | if ((itflag & DAC_FLAG_DMAUDR1) == DAC_FLAG_DMAUDR1) |
|
| 762 | #if defined(DAC_SR_DMAUDR2) |
762 | { |
| 763 | if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) |
763 | /* Change DAC state to error state */ |
| 764 | { |
764 | hdac->State = HAL_DAC_STATE_ERROR; |
| 765 | /* Check underrun flag of DAC channel 2 */ |
765 | |
| 766 | if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) |
766 | /* Set DAC error code to channel1 DMA underrun error */ |
| 767 | { |
767 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); |
| 768 | /* Change DAC state to error state */ |
768 | |
| 769 | hdac->State = HAL_DAC_STATE_ERROR; |
769 | /* Clear the underrun flag */ |
| 770 | 770 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1); |
|
| 771 | /* Set DAC error code to channel2 DMA underrun error */ |
771 | |
| 772 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
772 | /* Disable the selected DAC channel1 DMA request */ |
| 773 | 773 | __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN1); |
|
| 774 | /* Clear the underrun flag */ |
774 | |
| 775 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
775 | /* Error callback */ |
| 776 | 776 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
|
| 777 | /* Disable the selected DAC channel2 DMA request */ |
777 | hdac->DMAUnderrunCallbackCh1(hdac); |
| 778 | CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); |
778 | #else |
| 779 | 779 | HAL_DAC_DMAUnderrunCallbackCh1(hdac); |
|
| 780 | /* Error callback */ |
780 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 781 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
781 | } |
| 782 | hdac->DMAUnderrunCallbackCh2(hdac); |
782 | } |
| 783 | #else |
783 | #endif /* DAC_SR_DMAUDR1 */ |
| 784 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
784 | |
| 785 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
785 | #if defined(DAC_SR_DMAUDR2) |
| 786 | } |
786 | if ((itsource & DAC_IT_DMAUDR2) == DAC_IT_DMAUDR2) |
| 787 | } |
787 | { |
| 788 | #endif /* DAC_SR_DMAUDR2 */ |
788 | /* Check underrun flag of DAC channel 2 */ |
| 789 | } |
789 | if ((itflag & DAC_FLAG_DMAUDR2) == DAC_FLAG_DMAUDR2) |
| 790 | 790 | { |
|
| 791 | /** |
791 | /* Change DAC state to error state */ |
| 792 | * @brief Set the specified data holding register value for DAC channel. |
792 | hdac->State = HAL_DAC_STATE_ERROR; |
| 793 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
793 | |
| 794 | * the configuration information for the specified DAC. |
794 | /* Set DAC error code to channel2 DMA underrun error */ |
| 795 | * @param Channel The selected DAC channel. |
795 | SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); |
| 796 | * This parameter can be one of the following values: |
796 | |
| 797 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
797 | /* Clear the underrun flag */ |
| 798 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
798 | __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2); |
| 799 | * @param Alignment Specifies the data alignment. |
799 | |
| 800 | * This parameter can be one of the following values: |
800 | /* Disable the selected DAC channel2 DMA request */ |
| 801 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
801 | __HAL_DAC_DISABLE_IT(hdac, DAC_CR_DMAEN2); |
| 802 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
802 | |
| 803 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
803 | /* Error callback */ |
| 804 | * @param Data Data to be loaded in the selected data holding register. |
804 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| 805 | * @retval HAL status |
805 | hdac->DMAUnderrunCallbackCh2(hdac); |
| 806 | */ |
806 | #else |
| 807 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
807 | HAL_DACEx_DMAUnderrunCallbackCh2(hdac); |
| 808 | { |
808 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 809 | __IO uint32_t tmp = 0UL; |
809 | } |
| 810 | 810 | } |
|
| 811 | /* Check the parameters */ |
811 | #endif /* DAC_SR_DMAUDR2 */ |
| 812 | assert_param(IS_DAC_CHANNEL(Channel)); |
812 | } |
| 813 | assert_param(IS_DAC_ALIGN(Alignment)); |
813 | |
| 814 | assert_param(IS_DAC_DATA(Data)); |
814 | /** |
| 815 | 815 | * @brief Set the specified data holding register value for DAC channel. |
|
| 816 | tmp = (uint32_t)hdac->Instance; |
816 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 817 | if (Channel == DAC_CHANNEL_1) |
817 | * the configuration information for the specified DAC. |
| 818 | { |
818 | * @param Channel The selected DAC channel. |
| 819 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
819 | * This parameter can be one of the following values: |
| 820 | } |
820 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 821 | 821 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
|
| 822 | else |
822 | * @param Alignment Specifies the data alignment. |
| 823 | { |
823 | * This parameter can be one of the following values: |
| 824 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
824 | * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected |
| 825 | } |
825 | * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected |
| 826 | 826 | * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected |
|
| 827 | 827 | * @param Data Data to be loaded in the selected data holding register. |
|
| 828 | /* Set the DAC channel selected data holding register */ |
828 | * @retval HAL status |
| 829 | *(__IO uint32_t *) tmp = Data; |
829 | */ |
| 830 | 830 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) |
|
| 831 | /* Return function status */ |
831 | { |
| 832 | return HAL_OK; |
832 | __IO uint32_t tmp = 0UL; |
| 833 | } |
833 | |
| 834 | 834 | /* Check the DAC peripheral handle */ |
|
| 835 | /** |
835 | if (hdac == NULL) |
| 836 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
836 | { |
| 837 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
837 | return HAL_ERROR; |
| 838 | * the configuration information for the specified DAC. |
838 | } |
| 839 | * @retval None |
839 | |
| 840 | */ |
840 | /* Check the parameters */ |
| 841 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
841 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 842 | { |
842 | assert_param(IS_DAC_ALIGN(Alignment)); |
| 843 | /* Prevent unused argument(s) compilation warning */ |
843 | assert_param(IS_DAC_DATA(Data)); |
| 844 | UNUSED(hdac); |
844 | |
| 845 | 845 | tmp = (uint32_t)hdac->Instance; |
|
| 846 | /* NOTE : This function should not be modified, when the callback is needed, |
846 | if (Channel == DAC_CHANNEL_1) |
| 847 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
847 | { |
| 848 | */ |
848 | tmp += DAC_DHR12R1_ALIGNMENT(Alignment); |
| 849 | } |
849 | } |
| 850 | 850 | ||
| 851 | /** |
851 | else |
| 852 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
852 | { |
| 853 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
853 | tmp += DAC_DHR12R2_ALIGNMENT(Alignment); |
| 854 | * the configuration information for the specified DAC. |
854 | } |
| 855 | * @retval None |
855 | |
| 856 | */ |
856 | |
| 857 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
857 | /* Set the DAC channel selected data holding register */ |
| 858 | { |
858 | *(__IO uint32_t *) tmp = Data; |
| 859 | /* Prevent unused argument(s) compilation warning */ |
859 | |
| 860 | UNUSED(hdac); |
860 | /* Return function status */ |
| 861 | 861 | return HAL_OK; |
|
| 862 | /* NOTE : This function should not be modified, when the callback is needed, |
862 | } |
| 863 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
863 | |
| 864 | */ |
864 | /** |
| 865 | } |
865 | * @brief Conversion complete callback in non-blocking mode for Channel1 |
| 866 | 866 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
|
| 867 | /** |
867 | * the configuration information for the specified DAC. |
| 868 | * @brief Error DAC callback for Channel1. |
868 | * @retval None |
| 869 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
869 | */ |
| 870 | * the configuration information for the specified DAC. |
870 | __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
| 871 | * @retval None |
871 | { |
| 872 | */ |
872 | /* Prevent unused argument(s) compilation warning */ |
| 873 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
873 | UNUSED(hdac); |
| 874 | { |
874 | |
| 875 | /* Prevent unused argument(s) compilation warning */ |
875 | /* NOTE : This function should not be modified, when the callback is needed, |
| 876 | UNUSED(hdac); |
876 | the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file |
| 877 | 877 | */ |
|
| 878 | /* NOTE : This function should not be modified, when the callback is needed, |
878 | } |
| 879 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
879 | |
| 880 | */ |
880 | /** |
| 881 | } |
881 | * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 |
| 882 | 882 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
|
| 883 | /** |
883 | * the configuration information for the specified DAC. |
| 884 | * @brief DMA underrun DAC callback for channel1. |
884 | * @retval None |
| 885 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
885 | */ |
| 886 | * the configuration information for the specified DAC. |
886 | __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac) |
| 887 | * @retval None |
887 | { |
| 888 | */ |
888 | /* Prevent unused argument(s) compilation warning */ |
| 889 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
889 | UNUSED(hdac); |
| 890 | { |
890 | |
| 891 | /* Prevent unused argument(s) compilation warning */ |
891 | /* NOTE : This function should not be modified, when the callback is needed, |
| 892 | UNUSED(hdac); |
892 | the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file |
| 893 | 893 | */ |
|
| 894 | /* NOTE : This function should not be modified, when the callback is needed, |
894 | } |
| 895 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
895 | |
| 896 | */ |
896 | /** |
| 897 | } |
897 | * @brief Error DAC callback for Channel1. |
| 898 | 898 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
|
| 899 | /** |
899 | * the configuration information for the specified DAC. |
| 900 | * @} |
900 | * @retval None |
| 901 | */ |
901 | */ |
| 902 | 902 | __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) |
|
| 903 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
903 | { |
| 904 | * @brief Peripheral Control functions |
904 | /* Prevent unused argument(s) compilation warning */ |
| 905 | * |
905 | UNUSED(hdac); |
| 906 | @verbatim |
906 | |
| 907 | ============================================================================== |
907 | /* NOTE : This function should not be modified, when the callback is needed, |
| 908 | ##### Peripheral Control functions ##### |
908 | the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file |
| 909 | ============================================================================== |
909 | */ |
| 910 | [..] This section provides functions allowing to: |
910 | } |
| 911 | (+) Configure channels. |
911 | |
| 912 | (+) Set the specified data holding register value for DAC channel. |
912 | /** |
| 913 | 913 | * @brief DMA underrun DAC callback for channel1. |
|
| 914 | @endverbatim |
914 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 915 | * @{ |
915 | * the configuration information for the specified DAC. |
| 916 | */ |
916 | * @retval None |
| 917 | 917 | */ |
|
| 918 | /** |
918 | __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) |
| 919 | * @brief Returns the last data output value of the selected DAC channel. |
919 | { |
| 920 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
920 | /* Prevent unused argument(s) compilation warning */ |
| 921 | * the configuration information for the specified DAC. |
921 | UNUSED(hdac); |
| 922 | * @param Channel The selected DAC channel. |
922 | |
| 923 | * This parameter can be one of the following values: |
923 | /* NOTE : This function should not be modified, when the callback is needed, |
| 924 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
924 | the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file |
| 925 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
925 | */ |
| 926 | * @retval The selected DAC channel data output value. |
926 | } |
| 927 | */ |
927 | |
| 928 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) |
928 | /** |
| 929 | { |
929 | * @} |
| 930 | uint32_t result; |
930 | */ |
| 931 | 931 | ||
| 932 | /* Check the parameters */ |
932 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
| 933 | assert_param(IS_DAC_CHANNEL(Channel)); |
933 | * @brief Peripheral Control functions |
| 934 | 934 | * |
|
| 935 | if (Channel == DAC_CHANNEL_1) |
935 | @verbatim |
| 936 | { |
936 | ============================================================================== |
| 937 | result = hdac->Instance->DOR1; |
937 | ##### Peripheral Control functions ##### |
| 938 | } |
938 | ============================================================================== |
| 939 | 939 | [..] This section provides functions allowing to: |
|
| 940 | else |
940 | (+) Configure channels. |
| 941 | { |
941 | (+) Set the specified data holding register value for DAC channel. |
| 942 | result = hdac->Instance->DOR2; |
942 | |
| 943 | } |
943 | @endverbatim |
| 944 | 944 | * @{ |
|
| 945 | /* Returns the DAC channel data output register value */ |
945 | */ |
| 946 | return result; |
946 | |
| 947 | } |
947 | /** |
| 948 | 948 | * @brief Returns the last data output value of the selected DAC channel. |
|
| 949 | /** |
949 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 950 | * @brief Configures the selected DAC channel. |
950 | * the configuration information for the specified DAC. |
| 951 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
951 | * @param Channel The selected DAC channel. |
| 952 | * the configuration information for the specified DAC. |
952 | * This parameter can be one of the following values: |
| 953 | * @param sConfig DAC configuration structure. |
953 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 954 | * @param Channel The selected DAC channel. |
954 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| 955 | * This parameter can be one of the following values: |
955 | * @retval The selected DAC channel data output value. |
| 956 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
956 | */ |
| 957 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
957 | uint32_t HAL_DAC_GetValue(const DAC_HandleTypeDef *hdac, uint32_t Channel) |
| 958 | * @retval HAL status |
958 | { |
| 959 | */ |
959 | uint32_t result; |
| 960 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
960 | |
| 961 | { |
961 | /* Check the DAC peripheral handle */ |
| 962 | uint32_t tmpreg1; |
962 | if (hdac == NULL) |
| 963 | uint32_t tmpreg2; |
963 | { |
| 964 | 964 | return HAL_ERROR; |
|
| 965 | /* Check the DAC parameters */ |
965 | } |
| 966 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
966 | |
| 967 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
967 | /* Check the parameters */ |
| 968 | assert_param(IS_DAC_CHANNEL(Channel)); |
968 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 969 | 969 | ||
| 970 | /* Process locked */ |
970 | if (Channel == DAC_CHANNEL_1) |
| 971 | __HAL_LOCK(hdac); |
971 | { |
| 972 | 972 | result = hdac->Instance->DOR1; |
|
| 973 | /* Change DAC state */ |
973 | } |
| 974 | hdac->State = HAL_DAC_STATE_BUSY; |
974 | |
| 975 | 975 | else |
|
| 976 | /* Get the DAC CR value */ |
976 | { |
| 977 | tmpreg1 = hdac->Instance->CR; |
977 | result = hdac->Instance->DOR2; |
| 978 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
978 | } |
| 979 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << (Channel & 0x10UL)); |
979 | |
| 980 | /* Configure for the selected DAC channel: buffer output, trigger */ |
980 | /* Returns the DAC channel data output register value */ |
| 981 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
981 | return result; |
| 982 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
982 | } |
| 983 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
983 | |
| 984 | /* Calculate CR register value depending on DAC_Channel */ |
984 | /** |
| 985 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
985 | * @brief Configures the selected DAC channel. |
| 986 | /* Write to DAC CR */ |
986 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 987 | hdac->Instance->CR = tmpreg1; |
987 | * the configuration information for the specified DAC. |
| 988 | /* Disable wave generation */ |
988 | * @param sConfig DAC configuration structure. |
| 989 | CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); |
989 | * @param Channel The selected DAC channel. |
| 990 | 990 | * This parameter can be one of the following values: |
|
| 991 | /* Change DAC state */ |
991 | * @arg DAC_CHANNEL_1: DAC Channel1 selected |
| 992 | hdac->State = HAL_DAC_STATE_READY; |
992 | * @arg DAC_CHANNEL_2: DAC Channel2 selected |
| 993 | 993 | * @retval HAL status |
|
| 994 | /* Process unlocked */ |
994 | */ |
| 995 | __HAL_UNLOCK(hdac); |
995 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, |
| 996 | 996 | const DAC_ChannelConfTypeDef *sConfig, uint32_t Channel) |
|
| 997 | /* Return function status */ |
997 | { |
| 998 | return HAL_OK; |
998 | HAL_StatusTypeDef status = HAL_OK; |
| 999 | } |
999 | uint32_t tmpreg1; |
| 1000 | 1000 | uint32_t tmpreg2; |
|
| 1001 | /** |
1001 | |
| 1002 | * @} |
1002 | /* Check the DAC peripheral handle and channel configuration struct */ |
| 1003 | */ |
1003 | if ((hdac == NULL) || (sConfig == NULL)) |
| 1004 | 1004 | { |
|
| 1005 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
1005 | return HAL_ERROR; |
| 1006 | * @brief Peripheral State and Errors functions |
1006 | } |
| 1007 | * |
1007 | |
| 1008 | @verbatim |
1008 | /* Check the DAC parameters */ |
| 1009 | ============================================================================== |
1009 | assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); |
| 1010 | ##### Peripheral State and Errors functions ##### |
1010 | assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); |
| 1011 | ============================================================================== |
1011 | assert_param(IS_DAC_CHANNEL(Channel)); |
| 1012 | [..] |
1012 | |
| 1013 | This subsection provides functions allowing to |
1013 | /* Process locked */ |
| 1014 | (+) Check the DAC state. |
1014 | __HAL_LOCK(hdac); |
| 1015 | (+) Check the DAC Errors. |
1015 | |
| 1016 | 1016 | /* Change DAC state */ |
|
| 1017 | @endverbatim |
1017 | hdac->State = HAL_DAC_STATE_BUSY; |
| 1018 | * @{ |
1018 | |
| 1019 | */ |
1019 | /* Get the DAC CR value */ |
| 1020 | 1020 | tmpreg1 = hdac->Instance->CR; |
|
| 1021 | /** |
1021 | /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ |
| 1022 | * @brief return the DAC handle state |
1022 | tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) |
| 1023 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
1023 | << (Channel & 0x10UL)); |
| 1024 | * the configuration information for the specified DAC. |
1024 | /* Configure for the selected DAC channel: buffer output, trigger */ |
| 1025 | * @retval HAL state |
1025 | /* Set TSELx and TENx bits according to DAC_Trigger value */ |
| 1026 | */ |
1026 | /* Set BOFFx bit according to DAC_OutputBuffer value */ |
| 1027 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac) |
1027 | tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer); |
| 1028 | { |
1028 | /* Calculate CR register value depending on DAC_Channel */ |
| 1029 | /* Return DAC handle state */ |
1029 | tmpreg1 |= tmpreg2 << (Channel & 0x10UL); |
| 1030 | return hdac->State; |
1030 | /* Write to DAC CR */ |
| 1031 | } |
1031 | hdac->Instance->CR = tmpreg1; |
| 1032 | 1032 | /* Disable wave generation */ |
|
| 1033 | 1033 | CLEAR_BIT(hdac->Instance->CR, (DAC_CR_WAVE1 << (Channel & 0x10UL))); |
|
| 1034 | /** |
1034 | |
| 1035 | * @brief Return the DAC error code |
1035 | /* Change DAC state */ |
| 1036 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
1036 | hdac->State = HAL_DAC_STATE_READY; |
| 1037 | * the configuration information for the specified DAC. |
1037 | |
| 1038 | * @retval DAC Error Code |
1038 | /* Process unlocked */ |
| 1039 | */ |
1039 | __HAL_UNLOCK(hdac); |
| 1040 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) |
1040 | |
| 1041 | { |
1041 | /* Return function status */ |
| 1042 | return hdac->ErrorCode; |
1042 | return status; |
| 1043 | } |
1043 | } |
| 1044 | 1044 | ||
| 1045 | /** |
1045 | /** |
| 1046 | * @} |
1046 | * @} |
| 1047 | */ |
1047 | */ |
| 1048 | 1048 | ||
| 1049 | /** |
1049 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
| 1050 | * @} |
1050 | * @brief Peripheral State and Errors functions |
| 1051 | */ |
1051 | * |
| 1052 | 1052 | @verbatim |
|
| 1053 | /** @addtogroup DAC_Exported_Functions |
1053 | ============================================================================== |
| 1054 | * @{ |
1054 | ##### Peripheral State and Errors functions ##### |
| 1055 | */ |
1055 | ============================================================================== |
| 1056 | 1056 | [..] |
|
| 1057 | /** @addtogroup DAC_Exported_Functions_Group1 |
1057 | This subsection provides functions allowing to |
| 1058 | * @{ |
1058 | (+) Check the DAC state. |
| 1059 | */ |
1059 | (+) Check the DAC Errors. |
| 1060 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1060 | |
| 1061 | /** |
1061 | @endverbatim |
| 1062 | * @brief Register a User DAC Callback |
1062 | * @{ |
| 1063 | * To be used instead of the weak (surcharged) predefined callback |
1063 | */ |
| 1064 | * @param hdac DAC handle |
1064 | |
| 1065 | * @param CallbackID ID of the callback to be registered |
1065 | /** |
| 1066 | * This parameter can be one of the following values: |
1066 | * @brief return the DAC handle state |
| 1067 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
1067 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 1068 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
1068 | * the configuration information for the specified DAC. |
| 1069 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
1069 | * @retval HAL state |
| 1070 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
1070 | */ |
| 1071 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
1071 | HAL_DAC_StateTypeDef HAL_DAC_GetState(const DAC_HandleTypeDef *hdac) |
| 1072 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
1072 | { |
| 1073 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
1073 | /* Return DAC handle state */ |
| 1074 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
1074 | return hdac->State; |
| 1075 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
1075 | } |
| 1076 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
1076 | |
| 1077 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
1077 | |
| 1078 | * |
1078 | /** |
| 1079 | * @param pCallback pointer to the Callback function |
1079 | * @brief Return the DAC error code |
| 1080 | * @retval status |
1080 | * @param hdac pointer to a DAC_HandleTypeDef structure that contains |
| 1081 | */ |
1081 | * the configuration information for the specified DAC. |
| 1082 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
1082 | * @retval DAC Error Code |
| 1083 | pDAC_CallbackTypeDef pCallback) |
1083 | */ |
| 1084 | { |
1084 | uint32_t HAL_DAC_GetError(const DAC_HandleTypeDef *hdac) |
| 1085 | HAL_StatusTypeDef status = HAL_OK; |
1085 | { |
| 1086 | 1086 | return hdac->ErrorCode; |
|
| 1087 | if (pCallback == NULL) |
1087 | } |
| 1088 | { |
1088 | |
| 1089 | /* Update the error code */ |
1089 | /** |
| 1090 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1090 | * @} |
| 1091 | return HAL_ERROR; |
1091 | */ |
| 1092 | } |
1092 | |
| 1093 | 1093 | /** |
|
| 1094 | /* Process locked */ |
1094 | * @} |
| 1095 | __HAL_LOCK(hdac); |
1095 | */ |
| 1096 | 1096 | ||
| 1097 | if (hdac->State == HAL_DAC_STATE_READY) |
1097 | /** @addtogroup DAC_Exported_Functions |
| 1098 | { |
1098 | * @{ |
| 1099 | switch (CallbackID) |
1099 | */ |
| 1100 | { |
1100 | |
| 1101 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
1101 | /** @addtogroup DAC_Exported_Functions_Group1 |
| 1102 | hdac->ConvCpltCallbackCh1 = pCallback; |
1102 | * @{ |
| 1103 | break; |
1103 | */ |
| 1104 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
1104 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| 1105 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
1105 | /** |
| 1106 | break; |
1106 | * @brief Register a User DAC Callback |
| 1107 | case HAL_DAC_CH1_ERROR_ID : |
1107 | * To be used instead of the weak (overridden) predefined callback |
| 1108 | hdac->ErrorCallbackCh1 = pCallback; |
1108 | * @note The HAL_DAC_RegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to register |
| 1109 | break; |
1109 | * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID |
| 1110 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
1110 | * @param hdac DAC handle |
| 1111 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
1111 | * @param CallbackID ID of the callback to be registered |
| 1112 | break; |
1112 | * This parameter can be one of the following values: |
| 1113 | 1113 | * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID |
|
| 1114 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
1114 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID |
| 1115 | hdac->ConvCpltCallbackCh2 = pCallback; |
1115 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
| 1116 | break; |
1116 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
| 1117 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
1117 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
| 1118 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
1118 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
| 1119 | break; |
1119 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
| 1120 | case HAL_DAC_CH2_ERROR_ID : |
1120 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
| 1121 | hdac->ErrorCallbackCh2 = pCallback; |
1121 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
| 1122 | break; |
1122 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
| 1123 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
1123 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
| 1124 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
1124 | * |
| 1125 | break; |
1125 | * @param pCallback pointer to the Callback function |
| 1126 | 1126 | * @retval status |
|
| 1127 | case HAL_DAC_MSPINIT_CB_ID : |
1127 | */ |
| 1128 | hdac->MspInitCallback = pCallback; |
1128 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
| 1129 | break; |
1129 | pDAC_CallbackTypeDef pCallback) |
| 1130 | case HAL_DAC_MSPDEINIT_CB_ID : |
1130 | { |
| 1131 | hdac->MspDeInitCallback = pCallback; |
1131 | HAL_StatusTypeDef status = HAL_OK; |
| 1132 | break; |
1132 | |
| 1133 | default : |
1133 | /* Check the DAC peripheral handle */ |
| 1134 | /* Update the error code */ |
1134 | if (hdac == NULL) |
| 1135 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1135 | { |
| 1136 | /* update return status */ |
1136 | return HAL_ERROR; |
| 1137 | status = HAL_ERROR; |
1137 | } |
| 1138 | break; |
1138 | |
| 1139 | } |
1139 | if (pCallback == NULL) |
| 1140 | } |
1140 | { |
| 1141 | else if (hdac->State == HAL_DAC_STATE_RESET) |
1141 | /* Update the error code */ |
| 1142 | { |
1142 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1143 | switch (CallbackID) |
1143 | return HAL_ERROR; |
| 1144 | { |
1144 | } |
| 1145 | case HAL_DAC_MSPINIT_CB_ID : |
1145 | |
| 1146 | hdac->MspInitCallback = pCallback; |
1146 | if (hdac->State == HAL_DAC_STATE_READY) |
| 1147 | break; |
1147 | { |
| 1148 | case HAL_DAC_MSPDEINIT_CB_ID : |
1148 | switch (CallbackID) |
| 1149 | hdac->MspDeInitCallback = pCallback; |
1149 | { |
| 1150 | break; |
1150 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
| 1151 | default : |
1151 | hdac->ConvCpltCallbackCh1 = pCallback; |
| 1152 | /* Update the error code */ |
1152 | break; |
| 1153 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1153 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
| 1154 | /* update return status */ |
1154 | hdac->ConvHalfCpltCallbackCh1 = pCallback; |
| 1155 | status = HAL_ERROR; |
1155 | break; |
| 1156 | break; |
1156 | case HAL_DAC_CH1_ERROR_ID : |
| 1157 | } |
1157 | hdac->ErrorCallbackCh1 = pCallback; |
| 1158 | } |
1158 | break; |
| 1159 | else |
1159 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
| 1160 | { |
1160 | hdac->DMAUnderrunCallbackCh1 = pCallback; |
| 1161 | /* Update the error code */ |
1161 | break; |
| 1162 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1162 | |
| 1163 | /* update return status */ |
1163 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
| 1164 | status = HAL_ERROR; |
1164 | hdac->ConvCpltCallbackCh2 = pCallback; |
| 1165 | } |
1165 | break; |
| 1166 | 1166 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
|
| 1167 | /* Release Lock */ |
1167 | hdac->ConvHalfCpltCallbackCh2 = pCallback; |
| 1168 | __HAL_UNLOCK(hdac); |
1168 | break; |
| 1169 | return status; |
1169 | case HAL_DAC_CH2_ERROR_ID : |
| 1170 | } |
1170 | hdac->ErrorCallbackCh2 = pCallback; |
| 1171 | 1171 | break; |
|
| 1172 | /** |
1172 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
| 1173 | * @brief Unregister a User DAC Callback |
1173 | hdac->DMAUnderrunCallbackCh2 = pCallback; |
| 1174 | * DAC Callback is redirected to the weak (surcharged) predefined callback |
1174 | break; |
| 1175 | * @param hdac DAC handle |
1175 | |
| 1176 | * @param CallbackID ID of the callback to be unregistered |
1176 | case HAL_DAC_MSPINIT_CB_ID : |
| 1177 | * This parameter can be one of the following values: |
1177 | hdac->MspInitCallback = pCallback; |
| 1178 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID |
1178 | break; |
| 1179 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
1179 | case HAL_DAC_MSPDEINIT_CB_ID : |
| 1180 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
1180 | hdac->MspDeInitCallback = pCallback; |
| 1181 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
1181 | break; |
| 1182 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
1182 | default : |
| 1183 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
1183 | /* Update the error code */ |
| 1184 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
1184 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1185 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
1185 | /* update return status */ |
| 1186 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
1186 | status = HAL_ERROR; |
| 1187 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
1187 | break; |
| 1188 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
1188 | } |
| 1189 | * @retval status |
1189 | } |
| 1190 | */ |
1190 | else if (hdac->State == HAL_DAC_STATE_RESET) |
| 1191 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
1191 | { |
| 1192 | { |
1192 | switch (CallbackID) |
| 1193 | HAL_StatusTypeDef status = HAL_OK; |
1193 | { |
| 1194 | 1194 | case HAL_DAC_MSPINIT_CB_ID : |
|
| 1195 | /* Process locked */ |
1195 | hdac->MspInitCallback = pCallback; |
| 1196 | __HAL_LOCK(hdac); |
1196 | break; |
| 1197 | 1197 | case HAL_DAC_MSPDEINIT_CB_ID : |
|
| 1198 | if (hdac->State == HAL_DAC_STATE_READY) |
1198 | hdac->MspDeInitCallback = pCallback; |
| 1199 | { |
1199 | break; |
| 1200 | switch (CallbackID) |
1200 | default : |
| 1201 | { |
1201 | /* Update the error code */ |
| 1202 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
1202 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1203 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
1203 | /* update return status */ |
| 1204 | break; |
1204 | status = HAL_ERROR; |
| 1205 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
1205 | break; |
| 1206 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
1206 | } |
| 1207 | break; |
1207 | } |
| 1208 | case HAL_DAC_CH1_ERROR_ID : |
1208 | else |
| 1209 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
1209 | { |
| 1210 | break; |
1210 | /* Update the error code */ |
| 1211 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
1211 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1212 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
1212 | /* update return status */ |
| 1213 | break; |
1213 | status = HAL_ERROR; |
| 1214 | 1214 | } |
|
| 1215 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
1215 | |
| 1216 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
1216 | return status; |
| 1217 | break; |
1217 | } |
| 1218 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
1218 | |
| 1219 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
1219 | /** |
| 1220 | break; |
1220 | * @brief Unregister a User DAC Callback |
| 1221 | case HAL_DAC_CH2_ERROR_ID : |
1221 | * DAC Callback is redirected to the weak (overridden) predefined callback |
| 1222 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
1222 | * @note The HAL_DAC_UnRegisterCallback() may be called before HAL_DAC_Init() in HAL_DAC_STATE_RESET to un-register |
| 1223 | break; |
1223 | * callbacks for HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID |
| 1224 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
1224 | * @param hdac DAC handle |
| 1225 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
1225 | * @param CallbackID ID of the callback to be unregistered |
| 1226 | break; |
1226 | * This parameter can be one of the following values: |
| 1227 | 1227 | * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 transfer Complete Callback ID |
|
| 1228 | case HAL_DAC_MSPINIT_CB_ID : |
1228 | * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID |
| 1229 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1229 | * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID |
| 1230 | break; |
1230 | * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID |
| 1231 | case HAL_DAC_MSPDEINIT_CB_ID : |
1231 | * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID |
| 1232 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1232 | * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID |
| 1233 | break; |
1233 | * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID |
| 1234 | case HAL_DAC_ALL_CB_ID : |
1234 | * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID |
| 1235 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
1235 | * @arg @ref HAL_DAC_MSPINIT_CB_ID DAC MSP Init Callback ID |
| 1236 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
1236 | * @arg @ref HAL_DAC_MSPDEINIT_CB_ID DAC MSP DeInit Callback ID |
| 1237 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
1237 | * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks |
| 1238 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
1238 | * @retval status |
| 1239 | 1239 | */ |
|
| 1240 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
1240 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID) |
| 1241 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
1241 | { |
| 1242 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
1242 | HAL_StatusTypeDef status = HAL_OK; |
| 1243 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
1243 | |
| 1244 | 1244 | /* Check the DAC peripheral handle */ |
|
| 1245 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1245 | if (hdac == NULL) |
| 1246 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1246 | { |
| 1247 | break; |
1247 | return HAL_ERROR; |
| 1248 | default : |
1248 | } |
| 1249 | /* Update the error code */ |
1249 | |
| 1250 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1250 | if (hdac->State == HAL_DAC_STATE_READY) |
| 1251 | /* update return status */ |
1251 | { |
| 1252 | status = HAL_ERROR; |
1252 | switch (CallbackID) |
| 1253 | break; |
1253 | { |
| 1254 | } |
1254 | case HAL_DAC_CH1_COMPLETE_CB_ID : |
| 1255 | } |
1255 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
| 1256 | else if (hdac->State == HAL_DAC_STATE_RESET) |
1256 | break; |
| 1257 | { |
1257 | case HAL_DAC_CH1_HALF_COMPLETE_CB_ID : |
| 1258 | switch (CallbackID) |
1258 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
| 1259 | { |
1259 | break; |
| 1260 | case HAL_DAC_MSPINIT_CB_ID : |
1260 | case HAL_DAC_CH1_ERROR_ID : |
| 1261 | hdac->MspInitCallback = HAL_DAC_MspInit; |
1261 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
| 1262 | break; |
1262 | break; |
| 1263 | case HAL_DAC_MSPDEINIT_CB_ID : |
1263 | case HAL_DAC_CH1_UNDERRUN_CB_ID : |
| 1264 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
1264 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
| 1265 | break; |
1265 | break; |
| 1266 | default : |
1266 | |
| 1267 | /* Update the error code */ |
1267 | case HAL_DAC_CH2_COMPLETE_CB_ID : |
| 1268 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1268 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
| 1269 | /* update return status */ |
1269 | break; |
| 1270 | status = HAL_ERROR; |
1270 | case HAL_DAC_CH2_HALF_COMPLETE_CB_ID : |
| 1271 | break; |
1271 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
| 1272 | } |
1272 | break; |
| 1273 | } |
1273 | case HAL_DAC_CH2_ERROR_ID : |
| 1274 | else |
1274 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
| 1275 | { |
1275 | break; |
| 1276 | /* Update the error code */ |
1276 | case HAL_DAC_CH2_UNDERRUN_CB_ID : |
| 1277 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
1277 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
| 1278 | /* update return status */ |
1278 | break; |
| 1279 | status = HAL_ERROR; |
1279 | |
| 1280 | } |
1280 | case HAL_DAC_MSPINIT_CB_ID : |
| 1281 | 1281 | hdac->MspInitCallback = HAL_DAC_MspInit; |
|
| 1282 | /* Release Lock */ |
1282 | break; |
| 1283 | __HAL_UNLOCK(hdac); |
1283 | case HAL_DAC_MSPDEINIT_CB_ID : |
| 1284 | return status; |
1284 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
| 1285 | } |
1285 | break; |
| 1286 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1286 | case HAL_DAC_ALL_CB_ID : |
| 1287 | 1287 | hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1; |
|
| 1288 | /** |
1288 | hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1; |
| 1289 | * @} |
1289 | hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1; |
| 1290 | */ |
1290 | hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1; |
| 1291 | 1291 | ||
| 1292 | /** |
1292 | hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2; |
| 1293 | * @} |
1293 | hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2; |
| 1294 | */ |
1294 | hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2; |
| 1295 | 1295 | hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2; |
|
| 1296 | /** @addtogroup DAC_Private_Functions |
1296 | |
| 1297 | * @{ |
1297 | hdac->MspInitCallback = HAL_DAC_MspInit; |
| 1298 | */ |
1298 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
| 1299 | 1299 | break; |
|
| 1300 | /** |
1300 | default : |
| 1301 | * @brief DMA conversion complete callback. |
1301 | /* Update the error code */ |
| 1302 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1302 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1303 | * the configuration information for the specified DMA module. |
1303 | /* update return status */ |
| 1304 | * @retval None |
1304 | status = HAL_ERROR; |
| 1305 | */ |
1305 | break; |
| 1306 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
1306 | } |
| 1307 | { |
1307 | } |
| 1308 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1308 | else if (hdac->State == HAL_DAC_STATE_RESET) |
| 1309 | 1309 | { |
|
| 1310 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1310 | switch (CallbackID) |
| 1311 | hdac->ConvCpltCallbackCh1(hdac); |
1311 | { |
| 1312 | #else |
1312 | case HAL_DAC_MSPINIT_CB_ID : |
| 1313 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
1313 | hdac->MspInitCallback = HAL_DAC_MspInit; |
| 1314 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1314 | break; |
| 1315 | 1315 | case HAL_DAC_MSPDEINIT_CB_ID : |
|
| 1316 | hdac->State = HAL_DAC_STATE_READY; |
1316 | hdac->MspDeInitCallback = HAL_DAC_MspDeInit; |
| 1317 | } |
1317 | break; |
| 1318 | 1318 | default : |
|
| 1319 | /** |
1319 | /* Update the error code */ |
| 1320 | * @brief DMA half transfer complete callback. |
1320 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1321 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1321 | /* update return status */ |
| 1322 | * the configuration information for the specified DMA module. |
1322 | status = HAL_ERROR; |
| 1323 | * @retval None |
1323 | break; |
| 1324 | */ |
1324 | } |
| 1325 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
1325 | } |
| 1326 | { |
1326 | else |
| 1327 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1327 | { |
| 1328 | /* Conversion complete callback */ |
1328 | /* Update the error code */ |
| 1329 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1329 | hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK; |
| 1330 | hdac->ConvHalfCpltCallbackCh1(hdac); |
1330 | /* update return status */ |
| 1331 | #else |
1331 | status = HAL_ERROR; |
| 1332 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
1332 | } |
| 1333 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1333 | |
| 1334 | } |
1334 | return status; |
| 1335 | 1335 | } |
|
| 1336 | /** |
1336 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 1337 | * @brief DMA error callback |
1337 | |
| 1338 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
1338 | /** |
| 1339 | * the configuration information for the specified DMA module. |
1339 | * @} |
| 1340 | * @retval None |
1340 | */ |
| 1341 | */ |
1341 | |
| 1342 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
1342 | /** |
| 1343 | { |
1343 | * @} |
| 1344 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
1344 | */ |
| 1345 | 1345 | ||
| 1346 | /* Set DAC error code to DMA error */ |
1346 | /** @addtogroup DAC_Private_Functions |
| 1347 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
1347 | * @{ |
| 1348 | 1348 | */ |
|
| 1349 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
1349 | |
| 1350 | hdac->ErrorCallbackCh1(hdac); |
1350 | /** |
| 1351 | #else |
1351 | * @brief DMA conversion complete callback. |
| 1352 | HAL_DAC_ErrorCallbackCh1(hdac); |
1352 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
| 1353 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
1353 | * the configuration information for the specified DMA module. |
| 1354 | 1354 | * @retval None |
|
| 1355 | hdac->State = HAL_DAC_STATE_READY; |
1355 | */ |
| 1356 | } |
1356 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) |
| 1357 | 1357 | { |
|
| 1358 | /** |
1358 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
| 1359 | * @} |
1359 | |
| 1360 | */ |
1360 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| 1361 | 1361 | hdac->ConvCpltCallbackCh1(hdac); |
|
| 1362 | /** |
1362 | #else |
| 1363 | * @} |
1363 | HAL_DAC_ConvCpltCallbackCh1(hdac); |
| 1364 | */ |
1364 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| 1365 | 1365 | ||
| 1366 | #endif /* DAC */ |
1366 | hdac->State = HAL_DAC_STATE_READY; |
| 1367 | 1367 | } |
|
| 1368 | #endif /* HAL_DAC_MODULE_ENABLED */ |
1368 | |
| 1369 | 1369 | /** |
|
| 1370 | /** |
1370 | * @brief DMA half transfer complete callback. |
| 1371 | * @} |
1371 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
| 1372 | */ |
1372 | * the configuration information for the specified DMA module. |
| 1373 | 1373 | * @retval None |
|
| 1374 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1374 | */ |
| - | 1375 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) |
|
| - | 1376 | { |
|
| - | 1377 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
|
| - | 1378 | /* Conversion complete callback */ |
|
| - | 1379 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
|
| - | 1380 | hdac->ConvHalfCpltCallbackCh1(hdac); |
|
| - | 1381 | #else |
|
| - | 1382 | HAL_DAC_ConvHalfCpltCallbackCh1(hdac); |
|
| - | 1383 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
|
| - | 1384 | } |
|
| - | 1385 | ||
| - | 1386 | /** |
|
| - | 1387 | * @brief DMA error callback |
|
| - | 1388 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
|
| - | 1389 | * the configuration information for the specified DMA module. |
|
| - | 1390 | * @retval None |
|
| - | 1391 | */ |
|
| - | 1392 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) |
|
| - | 1393 | { |
|
| - | 1394 | DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
|
| - | 1395 | ||
| - | 1396 | /* Set DAC error code to DMA error */ |
|
| - | 1397 | hdac->ErrorCode |= HAL_DAC_ERROR_DMA; |
|
| - | 1398 | ||
| - | 1399 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
|
| - | 1400 | hdac->ErrorCallbackCh1(hdac); |
|
| - | 1401 | #else |
|
| - | 1402 | HAL_DAC_ErrorCallbackCh1(hdac); |
|
| - | 1403 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
|
| - | 1404 | ||
| - | 1405 | hdac->State = HAL_DAC_STATE_READY; |
|
| - | 1406 | } |
|
| - | 1407 | ||
| - | 1408 | /** |
|
| - | 1409 | * @} |
|
| - | 1410 | */ |
|
| - | 1411 | ||
| - | 1412 | /** |
|
| - | 1413 | * @} |
|
| - | 1414 | */ |
|
| - | 1415 | ||
| - | 1416 | #endif /* DAC */ |
|
| - | 1417 | ||
| - | 1418 | #endif /* HAL_DAC_MODULE_ENABLED */ |
|
| - | 1419 | /** |
|
| - | 1420 | * @} |
|
| - | 1421 | */ |
|