Rev 2 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 2 | Rev 18 | ||
|---|---|---|---|
| Line 1... | Line 1... | ||
| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_hal_can.c |
3 | * @file stm32f1xx_hal_can.c |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief CAN HAL module driver. |
5 | * @brief CAN HAL module driver. |
| 6 | * This file provides firmware functions to manage the following |
6 | * This file provides firmware functions to manage the following |
| 7 | * functionalities of the Controller Area Network (CAN) peripheral: |
7 | * functionalities of the Controller Area Network (CAN) peripheral: |
| 8 | * + Initialization and de-initialization functions |
8 | * + Initialization and de-initialization functions |
| 9 | * + Configuration functions |
9 | * + Configuration functions |
| 10 | * + Control functions |
10 | * + Control functions |
| 11 | * + Interrupts management |
11 | * + Interrupts management |
| 12 | * + Callbacks functions |
12 | * + Callbacks functions |
| 13 | * + Peripheral State and Error functions |
13 | * + Peripheral State and Error functions |
| 14 | * |
14 | * |
| 15 | @verbatim |
15 | ****************************************************************************** |
| 16 | ============================================================================== |
16 | * @attention |
| 17 | ##### How to use this driver ##### |
17 | * |
| 18 | ============================================================================== |
18 | * Copyright (c) 2016 STMicroelectronics. |
| 19 | [..] |
19 | * All rights reserved. |
| 20 | (#) Initialize the CAN low level resources by implementing the |
20 | * |
| 21 | HAL_CAN_MspInit(): |
21 | * This software is licensed under terms that can be found in the LICENSE file |
| 22 | (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() |
22 | * in the root directory of this software component. |
| 23 | (++) Configure CAN pins |
23 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 24 | (+++) Enable the clock for the CAN GPIOs |
24 | * |
| 25 | (+++) Configure CAN pins as alternate function open-drain |
25 | ****************************************************************************** |
| 26 | (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) |
26 | @verbatim |
| 27 | (+++) Configure the CAN interrupt priority using |
27 | ============================================================================== |
| 28 | HAL_NVIC_SetPriority() |
28 | ##### How to use this driver ##### |
| 29 | (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() |
29 | ============================================================================== |
| 30 | (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() |
30 | [..] |
| 31 | 31 | (#) Initialize the CAN low level resources by implementing the |
|
| 32 | (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This |
32 | HAL_CAN_MspInit(): |
| 33 | function resorts to HAL_CAN_MspInit() for low-level initialization. |
33 | (++) Enable the CAN interface clock using __HAL_RCC_CANx_CLK_ENABLE() |
| 34 | 34 | (++) Configure CAN pins |
|
| 35 | (#) Configure the reception filters using the following configuration |
35 | (+++) Enable the clock for the CAN GPIOs |
| 36 | functions: |
36 | (+++) Configure CAN pins as alternate function open-drain |
| 37 | (++) HAL_CAN_ConfigFilter() |
37 | (++) In case of using interrupts (e.g. HAL_CAN_ActivateNotification()) |
| 38 | 38 | (+++) Configure the CAN interrupt priority using |
|
| 39 | (#) Start the CAN module using HAL_CAN_Start() function. At this level |
39 | HAL_NVIC_SetPriority() |
| 40 | the node is active on the bus: it receive messages, and can send |
40 | (+++) Enable the CAN IRQ handler using HAL_NVIC_EnableIRQ() |
| 41 | messages. |
41 | (+++) In CAN IRQ handler, call HAL_CAN_IRQHandler() |
| 42 | 42 | ||
| 43 | (#) To manage messages transmission, the following Tx control functions |
43 | (#) Initialize the CAN peripheral using HAL_CAN_Init() function. This |
| 44 | can be used: |
44 | function resorts to HAL_CAN_MspInit() for low-level initialization. |
| 45 | (++) HAL_CAN_AddTxMessage() to request transmission of a new |
45 | |
| 46 | message. |
46 | (#) Configure the reception filters using the following configuration |
| 47 | (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending |
47 | functions: |
| 48 | message. |
48 | (++) HAL_CAN_ConfigFilter() |
| 49 | (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx |
49 | |
| 50 | mailboxes. |
50 | (#) Start the CAN module using HAL_CAN_Start() function. At this level |
| 51 | (++) HAL_CAN_IsTxMessagePending() to check if a message is pending |
51 | the node is active on the bus: it receive messages, and can send |
| 52 | in a Tx mailbox. |
52 | messages. |
| 53 | (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message |
53 | |
| 54 | sent, if time triggered communication mode is enabled. |
54 | (#) To manage messages transmission, the following Tx control functions |
| 55 | 55 | can be used: |
|
| 56 | (#) When a message is received into the CAN Rx FIFOs, it can be retrieved |
56 | (++) HAL_CAN_AddTxMessage() to request transmission of a new |
| 57 | using the HAL_CAN_GetRxMessage() function. The function |
57 | message. |
| 58 | HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are |
58 | (++) HAL_CAN_AbortTxRequest() to abort transmission of a pending |
| 59 | stored in the Rx Fifo. |
59 | message. |
| 60 | 60 | (++) HAL_CAN_GetTxMailboxesFreeLevel() to get the number of free Tx |
|
| 61 | (#) Calling the HAL_CAN_Stop() function stops the CAN module. |
61 | mailboxes. |
| 62 | 62 | (++) HAL_CAN_IsTxMessagePending() to check if a message is pending |
|
| 63 | (#) The deinitialization is achieved with HAL_CAN_DeInit() function. |
63 | in a Tx mailbox. |
| 64 | 64 | (++) HAL_CAN_GetTxTimestamp() to get the timestamp of Tx message |
|
| 65 | 65 | sent, if time triggered communication mode is enabled. |
|
| 66 | *** Polling mode operation *** |
66 | |
| 67 | ============================== |
67 | (#) When a message is received into the CAN Rx FIFOs, it can be retrieved |
| 68 | [..] |
68 | using the HAL_CAN_GetRxMessage() function. The function |
| 69 | (#) Reception: |
69 | HAL_CAN_GetRxFifoFillLevel() allows to know how many Rx message are |
| 70 | (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() |
70 | stored in the Rx Fifo. |
| 71 | until at least one message is received. |
71 | |
| 72 | (++) Then get the message using HAL_CAN_GetRxMessage(). |
72 | (#) Calling the HAL_CAN_Stop() function stops the CAN module. |
| 73 | 73 | ||
| 74 | (#) Transmission: |
74 | (#) The deinitialization is achieved with HAL_CAN_DeInit() function. |
| 75 | (++) Monitor the Tx mailboxes availability until at least one Tx |
75 | |
| 76 | mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). |
76 | |
| 77 | (++) Then request transmission of a message using |
77 | *** Polling mode operation *** |
| 78 | HAL_CAN_AddTxMessage(). |
78 | ============================== |
| 79 | 79 | [..] |
|
| 80 | 80 | (#) Reception: |
|
| 81 | *** Interrupt mode operation *** |
81 | (++) Monitor reception of message using HAL_CAN_GetRxFifoFillLevel() |
| 82 | ================================ |
82 | until at least one message is received. |
| 83 | [..] |
83 | (++) Then get the message using HAL_CAN_GetRxMessage(). |
| 84 | (#) Notifications are activated using HAL_CAN_ActivateNotification() |
84 | |
| 85 | function. Then, the process can be controlled through the |
85 | (#) Transmission: |
| 86 | available user callbacks: HAL_CAN_xxxCallback(), using same APIs |
86 | (++) Monitor the Tx mailboxes availability until at least one Tx |
| 87 | HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). |
87 | mailbox is free, using HAL_CAN_GetTxMailboxesFreeLevel(). |
| 88 | 88 | (++) Then request transmission of a message using |
|
| 89 | (#) Notifications can be deactivated using |
89 | HAL_CAN_AddTxMessage(). |
| 90 | HAL_CAN_DeactivateNotification() function. |
90 | |
| 91 | 91 | ||
| 92 | (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and |
92 | *** Interrupt mode operation *** |
| 93 | CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig |
93 | ================================ |
| 94 | the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and |
94 | [..] |
| 95 | HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options |
95 | (#) Notifications are activated using HAL_CAN_ActivateNotification() |
| 96 | here. |
96 | function. Then, the process can be controlled through the |
| 97 | (++) Directly get the Rx message in the callback, using |
97 | available user callbacks: HAL_CAN_xxxCallback(), using same APIs |
| 98 | HAL_CAN_GetRxMessage(). |
98 | HAL_CAN_GetRxMessage() and HAL_CAN_AddTxMessage(). |
| 99 | (++) Or deactivate the notification in the callback without |
99 | |
| 100 | getting the Rx message. The Rx message can then be got later |
100 | (#) Notifications can be deactivated using |
| 101 | using HAL_CAN_GetRxMessage(). Once the Rx message have been |
101 | HAL_CAN_DeactivateNotification() function. |
| 102 | read, the notification can be activated again. |
102 | |
| 103 | 103 | (#) Special care should be taken for CAN_IT_RX_FIFO0_MSG_PENDING and |
|
| 104 | 104 | CAN_IT_RX_FIFO1_MSG_PENDING notifications. These notifications trig |
|
| 105 | *** Sleep mode *** |
105 | the callbacks HAL_CAN_RxFIFO0MsgPendingCallback() and |
| 106 | ================== |
106 | HAL_CAN_RxFIFO1MsgPendingCallback(). User has two possible options |
| 107 | [..] |
107 | here. |
| 108 | (#) The CAN peripheral can be put in sleep mode (low power), using |
108 | (++) Directly get the Rx message in the callback, using |
| 109 | HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the |
109 | HAL_CAN_GetRxMessage(). |
| 110 | current CAN activity (transmission or reception of a CAN frame) will |
110 | (++) Or deactivate the notification in the callback without |
| 111 | be completed. |
111 | getting the Rx message. The Rx message can then be got later |
| 112 | 112 | using HAL_CAN_GetRxMessage(). Once the Rx message have been |
|
| 113 | (#) A notification can be activated to be informed when the sleep mode |
113 | read, the notification can be activated again. |
| 114 | will be entered. |
114 | |
| 115 | 115 | ||
| 116 | (#) It can be checked if the sleep mode is entered using |
116 | *** Sleep mode *** |
| 117 | HAL_CAN_IsSleepActive(). |
117 | ================== |
| 118 | Note that the CAN state (accessible from the API HAL_CAN_GetState()) |
118 | [..] |
| 119 | is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is |
119 | (#) The CAN peripheral can be put in sleep mode (low power), using |
| 120 | submitted (the sleep mode is not yet entered), and become |
120 | HAL_CAN_RequestSleep(). The sleep mode will be entered as soon as the |
| 121 | HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. |
121 | current CAN activity (transmission or reception of a CAN frame) will |
| 122 | 122 | be completed. |
|
| 123 | (#) The wake-up from sleep mode can be triggered by two ways: |
123 | |
| 124 | (++) Using HAL_CAN_WakeUp(). When returning from this function, |
124 | (#) A notification can be activated to be informed when the sleep mode |
| 125 | the sleep mode is exited (if return status is HAL_OK). |
125 | will be entered. |
| 126 | (++) When a start of Rx CAN frame is detected by the CAN peripheral, |
126 | |
| 127 | if automatic wake up mode is enabled. |
127 | (#) It can be checked if the sleep mode is entered using |
| 128 | 128 | HAL_CAN_IsSleepActive(). |
|
| 129 | *** Callback registration *** |
129 | Note that the CAN state (accessible from the API HAL_CAN_GetState()) |
| 130 | ============================================= |
130 | is HAL_CAN_STATE_SLEEP_PENDING as soon as the sleep mode request is |
| 131 | 131 | submitted (the sleep mode is not yet entered), and become |
|
| 132 | The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1 |
132 | HAL_CAN_STATE_SLEEP_ACTIVE when the sleep mode is effective. |
| 133 | allows the user to configure dynamically the driver callbacks. |
133 | |
| 134 | Use Function @ref HAL_CAN_RegisterCallback() to register an interrupt callback. |
134 | (#) The wake-up from sleep mode can be triggered by two ways: |
| 135 | 135 | (++) Using HAL_CAN_WakeUp(). When returning from this function, |
|
| 136 | Function @ref HAL_CAN_RegisterCallback() allows to register following callbacks: |
136 | the sleep mode is exited (if return status is HAL_OK). |
| 137 | (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. |
137 | (++) When a start of Rx CAN frame is detected by the CAN peripheral, |
| 138 | (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. |
138 | if automatic wake up mode is enabled. |
| 139 | (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. |
139 | |
| 140 | (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. |
140 | *** Callback registration *** |
| 141 | (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. |
141 | ============================================= |
| 142 | (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. |
142 | |
| 143 | (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. |
143 | The compilation define USE_HAL_CAN_REGISTER_CALLBACKS when set to 1 |
| 144 | (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. |
144 | allows the user to configure dynamically the driver callbacks. |
| 145 | (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. |
145 | Use Function HAL_CAN_RegisterCallback() to register an interrupt callback. |
| 146 | (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. |
146 | |
| 147 | (+) SleepCallback : Sleep Callback. |
147 | Function HAL_CAN_RegisterCallback() allows to register following callbacks: |
| 148 | (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. |
148 | (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. |
| 149 | (+) ErrorCallback : Error Callback. |
149 | (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. |
| 150 | (+) MspInitCallback : CAN MspInit. |
150 | (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. |
| 151 | (+) MspDeInitCallback : CAN MspDeInit. |
151 | (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. |
| 152 | This function takes as parameters the HAL peripheral handle, the Callback ID |
152 | (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. |
| 153 | and a pointer to the user callback function. |
153 | (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. |
| 154 | 154 | (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. |
|
| 155 | Use function @ref HAL_CAN_UnRegisterCallback() to reset a callback to the default |
155 | (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. |
| 156 | weak function. |
156 | (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. |
| 157 | @ref HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle, |
157 | (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. |
| 158 | and the Callback ID. |
158 | (+) SleepCallback : Sleep Callback. |
| 159 | This function allows to reset following callbacks: |
159 | (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. |
| 160 | (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. |
160 | (+) ErrorCallback : Error Callback. |
| 161 | (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. |
161 | (+) MspInitCallback : CAN MspInit. |
| 162 | (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. |
162 | (+) MspDeInitCallback : CAN MspDeInit. |
| 163 | (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. |
163 | This function takes as parameters the HAL peripheral handle, the Callback ID |
| 164 | (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. |
164 | and a pointer to the user callback function. |
| 165 | (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. |
165 | |
| 166 | (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. |
166 | Use function HAL_CAN_UnRegisterCallback() to reset a callback to the default |
| 167 | (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. |
167 | weak function. |
| 168 | (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. |
168 | HAL_CAN_UnRegisterCallback takes as parameters the HAL peripheral handle, |
| 169 | (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. |
169 | and the Callback ID. |
| 170 | (+) SleepCallback : Sleep Callback. |
170 | This function allows to reset following callbacks: |
| 171 | (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. |
171 | (+) TxMailbox0CompleteCallback : Tx Mailbox 0 Complete Callback. |
| 172 | (+) ErrorCallback : Error Callback. |
172 | (+) TxMailbox1CompleteCallback : Tx Mailbox 1 Complete Callback. |
| 173 | (+) MspInitCallback : CAN MspInit. |
173 | (+) TxMailbox2CompleteCallback : Tx Mailbox 2 Complete Callback. |
| 174 | (+) MspDeInitCallback : CAN MspDeInit. |
174 | (+) TxMailbox0AbortCallback : Tx Mailbox 0 Abort Callback. |
| 175 | 175 | (+) TxMailbox1AbortCallback : Tx Mailbox 1 Abort Callback. |
|
| 176 | By default, after the @ref HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET, |
176 | (+) TxMailbox2AbortCallback : Tx Mailbox 2 Abort Callback. |
| 177 | all callbacks are set to the corresponding weak functions: |
177 | (+) RxFifo0MsgPendingCallback : Rx Fifo 0 Message Pending Callback. |
| 178 | example @ref HAL_CAN_ErrorCallback(). |
178 | (+) RxFifo0FullCallback : Rx Fifo 0 Full Callback. |
| 179 | Exception done for MspInit and MspDeInit functions that are |
179 | (+) RxFifo1MsgPendingCallback : Rx Fifo 1 Message Pending Callback. |
| 180 | reset to the legacy weak function in the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit() only when |
180 | (+) RxFifo1FullCallback : Rx Fifo 1 Full Callback. |
| 181 | these callbacks are null (not registered beforehand). |
181 | (+) SleepCallback : Sleep Callback. |
| 182 | if not, MspInit or MspDeInit are not null, the @ref HAL_CAN_Init()/ @ref HAL_CAN_DeInit() |
182 | (+) WakeUpFromRxMsgCallback : Wake Up From Rx Message Callback. |
| 183 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
183 | (+) ErrorCallback : Error Callback. |
| 184 | 184 | (+) MspInitCallback : CAN MspInit. |
|
| 185 | Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only. |
185 | (+) MspDeInitCallback : CAN MspDeInit. |
| 186 | Exception done MspInit/MspDeInit that can be registered/unregistered |
186 | |
| 187 | in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state, |
187 | By default, after the HAL_CAN_Init() and when the state is HAL_CAN_STATE_RESET, |
| 188 | thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. |
188 | all callbacks are set to the corresponding weak functions: |
| 189 | In that case first register the MspInit/MspDeInit user callbacks |
189 | example HAL_CAN_ErrorCallback(). |
| 190 | using @ref HAL_CAN_RegisterCallback() before calling @ref HAL_CAN_DeInit() |
190 | Exception done for MspInit and MspDeInit functions that are |
| 191 | or @ref HAL_CAN_Init() function. |
191 | reset to the legacy weak function in the HAL_CAN_Init()/ HAL_CAN_DeInit() only when |
| 192 | 192 | these callbacks are null (not registered beforehand). |
|
| 193 | When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or |
193 | if not, MspInit or MspDeInit are not null, the HAL_CAN_Init()/ HAL_CAN_DeInit() |
| 194 | not defined, the callback registration feature is not available and all callbacks |
194 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) |
| 195 | are set to the corresponding weak functions. |
195 | |
| 196 | 196 | Callbacks can be registered/unregistered in HAL_CAN_STATE_READY state only. |
|
| 197 | @endverbatim |
197 | Exception done MspInit/MspDeInit that can be registered/unregistered |
| 198 | ****************************************************************************** |
198 | in HAL_CAN_STATE_READY or HAL_CAN_STATE_RESET state, |
| 199 | * @attention |
199 | thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. |
| 200 | * |
200 | In that case first register the MspInit/MspDeInit user callbacks |
| 201 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
201 | using HAL_CAN_RegisterCallback() before calling HAL_CAN_DeInit() |
| 202 | * All rights reserved.</center></h2> |
202 | or HAL_CAN_Init() function. |
| 203 | * |
203 | |
| 204 | * This software component is licensed by ST under BSD 3-Clause license, |
204 | When The compilation define USE_HAL_CAN_REGISTER_CALLBACKS is set to 0 or |
| 205 | * the "License"; You may not use this file except in compliance with the |
205 | not defined, the callback registration feature is not available and all callbacks |
| 206 | * License. You may obtain a copy of the License at: |
206 | are set to the corresponding weak functions. |
| 207 | * opensource.org/licenses/BSD-3-Clause |
207 | |
| 208 | * |
208 | @endverbatim |
| 209 | ****************************************************************************** |
209 | ****************************************************************************** |
| 210 | */ |
210 | */ |
| 211 | 211 | ||
| 212 | /* Includes ------------------------------------------------------------------*/ |
212 | /* Includes ------------------------------------------------------------------*/ |
| 213 | #include "stm32f1xx_hal.h" |
213 | #include "stm32f1xx_hal.h" |
| 214 | 214 | ||
| 215 | /** @addtogroup STM32F1xx_HAL_Driver |
215 | /** @addtogroup STM32F1xx_HAL_Driver |
| 216 | * @{ |
216 | * @{ |
| 217 | */ |
217 | */ |
| 218 | 218 | ||
| 219 | #if defined(CAN1) |
219 | #if defined(CAN1) |
| 220 | 220 | ||
| 221 | /** @defgroup CAN CAN |
221 | /** @defgroup CAN CAN |
| 222 | * @brief CAN driver modules |
222 | * @brief CAN driver modules |
| 223 | * @{ |
223 | * @{ |
| 224 | */ |
224 | */ |
| 225 | 225 | ||
| 226 | #ifdef HAL_CAN_MODULE_ENABLED |
226 | #ifdef HAL_CAN_MODULE_ENABLED |
| 227 | 227 | ||
| 228 | #ifdef HAL_CAN_LEGACY_MODULE_ENABLED |
228 | #ifdef HAL_CAN_LEGACY_MODULE_ENABLED |
| 229 | #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" |
229 | #error "The CAN driver cannot be used with its legacy, Please enable only one CAN module at once" |
| 230 | #endif |
230 | #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ |
| 231 | 231 | ||
| 232 | /* Private typedef -----------------------------------------------------------*/ |
232 | /* Private typedef -----------------------------------------------------------*/ |
| 233 | /* Private define ------------------------------------------------------------*/ |
233 | /* Private define ------------------------------------------------------------*/ |
| 234 | /** @defgroup CAN_Private_Constants CAN Private Constants |
234 | /** @defgroup CAN_Private_Constants CAN Private Constants |
| 235 | * @{ |
235 | * @{ |
| 236 | */ |
236 | */ |
| 237 | #define CAN_TIMEOUT_VALUE 10U |
237 | #define CAN_TIMEOUT_VALUE 10U |
| 238 | /** |
238 | /** |
| 239 | * @} |
239 | * @} |
| 240 | */ |
240 | */ |
| 241 | /* Private macro -------------------------------------------------------------*/ |
241 | /* Private macro -------------------------------------------------------------*/ |
| 242 | /* Private variables ---------------------------------------------------------*/ |
242 | /* Private variables ---------------------------------------------------------*/ |
| 243 | /* Private function prototypes -----------------------------------------------*/ |
243 | /* Private function prototypes -----------------------------------------------*/ |
| 244 | /* Exported functions --------------------------------------------------------*/ |
244 | /* Exported functions --------------------------------------------------------*/ |
| 245 | 245 | ||
| 246 | /** @defgroup CAN_Exported_Functions CAN Exported Functions |
246 | /** @defgroup CAN_Exported_Functions CAN Exported Functions |
| 247 | * @{ |
247 | * @{ |
| 248 | */ |
248 | */ |
| 249 | 249 | ||
| 250 | /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions |
250 | /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions |
| 251 | * @brief Initialization and Configuration functions |
251 | * @brief Initialization and Configuration functions |
| 252 | * |
252 | * |
| 253 | @verbatim |
253 | @verbatim |
| 254 | ============================================================================== |
254 | ============================================================================== |
| 255 | ##### Initialization and de-initialization functions ##### |
255 | ##### Initialization and de-initialization functions ##### |
| 256 | ============================================================================== |
256 | ============================================================================== |
| 257 | [..] This section provides functions allowing to: |
257 | [..] This section provides functions allowing to: |
| 258 | (+) HAL_CAN_Init : Initialize and configure the CAN. |
258 | (+) HAL_CAN_Init : Initialize and configure the CAN. |
| 259 | (+) HAL_CAN_DeInit : De-initialize the CAN. |
259 | (+) HAL_CAN_DeInit : De-initialize the CAN. |
| 260 | (+) HAL_CAN_MspInit : Initialize the CAN MSP. |
260 | (+) HAL_CAN_MspInit : Initialize the CAN MSP. |
| 261 | (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. |
261 | (+) HAL_CAN_MspDeInit : DeInitialize the CAN MSP. |
| 262 | 262 | ||
| 263 | @endverbatim |
263 | @endverbatim |
| 264 | * @{ |
264 | * @{ |
| 265 | */ |
265 | */ |
| 266 | 266 | ||
| 267 | /** |
267 | /** |
| 268 | * @brief Initializes the CAN peripheral according to the specified |
268 | * @brief Initializes the CAN peripheral according to the specified |
| 269 | * parameters in the CAN_InitStruct. |
269 | * parameters in the CAN_InitStruct. |
| 270 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
270 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 271 | * the configuration information for the specified CAN. |
271 | * the configuration information for the specified CAN. |
| 272 | * @retval HAL status |
272 | * @retval HAL status |
| 273 | */ |
273 | */ |
| 274 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) |
274 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan) |
| 275 | { |
275 | { |
| 276 | uint32_t tickstart; |
276 | uint32_t tickstart; |
| 277 | 277 | ||
| 278 | /* Check CAN handle */ |
278 | /* Check CAN handle */ |
| 279 | if (hcan == NULL) |
279 | if (hcan == NULL) |
| 280 | { |
280 | { |
| 281 | return HAL_ERROR; |
281 | return HAL_ERROR; |
| 282 | } |
282 | } |
| 283 | 283 | ||
| 284 | /* Check the parameters */ |
284 | /* Check the parameters */ |
| 285 | assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); |
285 | assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); |
| 286 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); |
286 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TimeTriggeredMode)); |
| 287 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); |
287 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoBusOff)); |
| 288 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); |
288 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoWakeUp)); |
| 289 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); |
289 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AutoRetransmission)); |
| 290 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); |
290 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ReceiveFifoLocked)); |
| 291 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); |
291 | assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TransmitFifoPriority)); |
| 292 | assert_param(IS_CAN_MODE(hcan->Init.Mode)); |
292 | assert_param(IS_CAN_MODE(hcan->Init.Mode)); |
| 293 | assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); |
293 | assert_param(IS_CAN_SJW(hcan->Init.SyncJumpWidth)); |
| 294 | assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); |
294 | assert_param(IS_CAN_BS1(hcan->Init.TimeSeg1)); |
| 295 | assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); |
295 | assert_param(IS_CAN_BS2(hcan->Init.TimeSeg2)); |
| 296 | assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); |
296 | assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); |
| 297 | 297 | ||
| 298 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
298 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 299 | if (hcan->State == HAL_CAN_STATE_RESET) |
299 | if (hcan->State == HAL_CAN_STATE_RESET) |
| 300 | { |
300 | { |
| 301 | /* Reset callbacks to legacy functions */ |
301 | /* Reset callbacks to legacy functions */ |
| 302 | hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0MsgPendingCallback */ |
302 | hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; /* Legacy weak RxFifo0MsgPendingCallback */ |
| 303 | hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0FullCallback */ |
303 | hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; /* Legacy weak RxFifo0FullCallback */ |
| 304 | hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1MsgPendingCallback */ |
304 | hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; /* Legacy weak RxFifo1MsgPendingCallback */ |
| 305 | hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1FullCallback */ |
305 | hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; /* Legacy weak RxFifo1FullCallback */ |
| 306 | hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbox0CompleteCallback */ |
306 | hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; /* Legacy weak TxMailbox0CompleteCallback */ |
| 307 | hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbox1CompleteCallback */ |
307 | hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; /* Legacy weak TxMailbox1CompleteCallback */ |
| 308 | hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbox2CompleteCallback */ |
308 | hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; /* Legacy weak TxMailbox2CompleteCallback */ |
| 309 | hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbox0AbortCallback */ |
309 | hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; /* Legacy weak TxMailbox0AbortCallback */ |
| 310 | hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbox1AbortCallback */ |
310 | hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; /* Legacy weak TxMailbox1AbortCallback */ |
| 311 | hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbox2AbortCallback */ |
311 | hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; /* Legacy weak TxMailbox2AbortCallback */ |
| 312 | hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCallback */ |
312 | hcan->SleepCallback = HAL_CAN_SleepCallback; /* Legacy weak SleepCallback */ |
| 313 | hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFromRxMsgCallback */ |
313 | hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; /* Legacy weak WakeUpFromRxMsgCallback */ |
| 314 | hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCallback */ |
314 | hcan->ErrorCallback = HAL_CAN_ErrorCallback; /* Legacy weak ErrorCallback */ |
| 315 | 315 | ||
| 316 | if (hcan->MspInitCallback == NULL) |
316 | if (hcan->MspInitCallback == NULL) |
| 317 | { |
317 | { |
| 318 | hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ |
318 | hcan->MspInitCallback = HAL_CAN_MspInit; /* Legacy weak MspInit */ |
| 319 | } |
319 | } |
| 320 | 320 | ||
| 321 | /* Init the low level hardware: CLOCK, NVIC */ |
321 | /* Init the low level hardware: CLOCK, NVIC */ |
| 322 | hcan->MspInitCallback(hcan); |
322 | hcan->MspInitCallback(hcan); |
| 323 | } |
323 | } |
| 324 | 324 | ||
| 325 | #else |
325 | #else |
| 326 | if (hcan->State == HAL_CAN_STATE_RESET) |
326 | if (hcan->State == HAL_CAN_STATE_RESET) |
| 327 | { |
327 | { |
| 328 | /* Init the low level hardware: CLOCK, NVIC */ |
328 | /* Init the low level hardware: CLOCK, NVIC */ |
| 329 | HAL_CAN_MspInit(hcan); |
329 | HAL_CAN_MspInit(hcan); |
| 330 | } |
330 | } |
| 331 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
331 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
| 332 | 332 | ||
| 333 | /* Request initialisation */ |
333 | /* Request initialisation */ |
| 334 | SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
334 | SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
| 335 | 335 | ||
| 336 | /* Get tick */ |
336 | /* Get tick */ |
| 337 | tickstart = HAL_GetTick(); |
337 | tickstart = HAL_GetTick(); |
| 338 | 338 | ||
| 339 | /* Wait initialisation acknowledge */ |
339 | /* Wait initialisation acknowledge */ |
| 340 | while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) |
340 | while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) |
| 341 | { |
341 | { |
| 342 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
342 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
| 343 | { |
343 | { |
| 344 | /* Update error code */ |
344 | /* Update error code */ |
| 345 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
345 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
| 346 | 346 | ||
| 347 | /* Change CAN state */ |
347 | /* Change CAN state */ |
| 348 | hcan->State = HAL_CAN_STATE_ERROR; |
348 | hcan->State = HAL_CAN_STATE_ERROR; |
| 349 | 349 | ||
| 350 | return HAL_ERROR; |
350 | return HAL_ERROR; |
| 351 | } |
351 | } |
| 352 | } |
352 | } |
| 353 | 353 | ||
| 354 | /* Exit from sleep mode */ |
354 | /* Exit from sleep mode */ |
| 355 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
355 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
| 356 | 356 | ||
| 357 | /* Get tick */ |
357 | /* Get tick */ |
| 358 | tickstart = HAL_GetTick(); |
358 | tickstart = HAL_GetTick(); |
| 359 | 359 | ||
| 360 | /* Check Sleep mode leave acknowledge */ |
360 | /* Check Sleep mode leave acknowledge */ |
| 361 | while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
361 | while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
| 362 | { |
362 | { |
| 363 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
363 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
| 364 | { |
364 | { |
| 365 | /* Update error code */ |
365 | /* Update error code */ |
| 366 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
366 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
| 367 | 367 | ||
| 368 | /* Change CAN state */ |
368 | /* Change CAN state */ |
| 369 | hcan->State = HAL_CAN_STATE_ERROR; |
369 | hcan->State = HAL_CAN_STATE_ERROR; |
| 370 | 370 | ||
| 371 | return HAL_ERROR; |
371 | return HAL_ERROR; |
| 372 | } |
372 | } |
| 373 | } |
373 | } |
| 374 | 374 | ||
| 375 | /* Set the time triggered communication mode */ |
375 | /* Set the time triggered communication mode */ |
| 376 | if (hcan->Init.TimeTriggeredMode == ENABLE) |
376 | if (hcan->Init.TimeTriggeredMode == ENABLE) |
| 377 | { |
377 | { |
| 378 | SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); |
378 | SET_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); |
| 379 | } |
379 | } |
| 380 | else |
380 | else |
| 381 | { |
381 | { |
| 382 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); |
382 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TTCM); |
| 383 | } |
383 | } |
| 384 | 384 | ||
| 385 | /* Set the automatic bus-off management */ |
385 | /* Set the automatic bus-off management */ |
| 386 | if (hcan->Init.AutoBusOff == ENABLE) |
386 | if (hcan->Init.AutoBusOff == ENABLE) |
| 387 | { |
387 | { |
| 388 | SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); |
388 | SET_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); |
| 389 | } |
389 | } |
| 390 | else |
390 | else |
| 391 | { |
391 | { |
| 392 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); |
392 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_ABOM); |
| 393 | } |
393 | } |
| 394 | 394 | ||
| 395 | /* Set the automatic wake-up mode */ |
395 | /* Set the automatic wake-up mode */ |
| 396 | if (hcan->Init.AutoWakeUp == ENABLE) |
396 | if (hcan->Init.AutoWakeUp == ENABLE) |
| 397 | { |
397 | { |
| 398 | SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); |
398 | SET_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); |
| 399 | } |
399 | } |
| 400 | else |
400 | else |
| 401 | { |
401 | { |
| 402 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); |
402 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_AWUM); |
| 403 | } |
403 | } |
| 404 | 404 | ||
| 405 | /* Set the automatic retransmission */ |
405 | /* Set the automatic retransmission */ |
| 406 | if (hcan->Init.AutoRetransmission == ENABLE) |
406 | if (hcan->Init.AutoRetransmission == ENABLE) |
| 407 | { |
407 | { |
| 408 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); |
408 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_NART); |
| 409 | } |
409 | } |
| 410 | else |
410 | else |
| 411 | { |
411 | { |
| 412 | SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); |
412 | SET_BIT(hcan->Instance->MCR, CAN_MCR_NART); |
| 413 | } |
413 | } |
| 414 | 414 | ||
| 415 | /* Set the receive FIFO locked mode */ |
415 | /* Set the receive FIFO locked mode */ |
| 416 | if (hcan->Init.ReceiveFifoLocked == ENABLE) |
416 | if (hcan->Init.ReceiveFifoLocked == ENABLE) |
| 417 | { |
417 | { |
| 418 | SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); |
418 | SET_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); |
| 419 | } |
419 | } |
| 420 | else |
420 | else |
| 421 | { |
421 | { |
| 422 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); |
422 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_RFLM); |
| 423 | } |
423 | } |
| 424 | 424 | ||
| 425 | /* Set the transmit FIFO priority */ |
425 | /* Set the transmit FIFO priority */ |
| 426 | if (hcan->Init.TransmitFifoPriority == ENABLE) |
426 | if (hcan->Init.TransmitFifoPriority == ENABLE) |
| 427 | { |
427 | { |
| 428 | SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); |
428 | SET_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); |
| 429 | } |
429 | } |
| 430 | else |
430 | else |
| 431 | { |
431 | { |
| 432 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); |
432 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_TXFP); |
| 433 | } |
433 | } |
| 434 | 434 | ||
| 435 | /* Set the bit timing register */ |
435 | /* Set the bit timing register */ |
| 436 | WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | |
436 | WRITE_REG(hcan->Instance->BTR, (uint32_t)(hcan->Init.Mode | |
| 437 | hcan->Init.SyncJumpWidth | |
437 | hcan->Init.SyncJumpWidth | |
| 438 | hcan->Init.TimeSeg1 | |
438 | hcan->Init.TimeSeg1 | |
| 439 | hcan->Init.TimeSeg2 | |
439 | hcan->Init.TimeSeg2 | |
| 440 | (hcan->Init.Prescaler - 1U))); |
440 | (hcan->Init.Prescaler - 1U))); |
| 441 | 441 | ||
| 442 | /* Initialize the error code */ |
442 | /* Initialize the error code */ |
| 443 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
443 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
| 444 | 444 | ||
| 445 | /* Initialize the CAN state */ |
445 | /* Initialize the CAN state */ |
| 446 | hcan->State = HAL_CAN_STATE_READY; |
446 | hcan->State = HAL_CAN_STATE_READY; |
| 447 | 447 | ||
| 448 | /* Return function status */ |
448 | /* Return function status */ |
| 449 | return HAL_OK; |
449 | return HAL_OK; |
| 450 | } |
450 | } |
| 451 | 451 | ||
| 452 | /** |
452 | /** |
| 453 | * @brief Deinitializes the CAN peripheral registers to their default |
453 | * @brief Deinitializes the CAN peripheral registers to their default |
| 454 | * reset values. |
454 | * reset values. |
| 455 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
455 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 456 | * the configuration information for the specified CAN. |
456 | * the configuration information for the specified CAN. |
| 457 | * @retval HAL status |
457 | * @retval HAL status |
| 458 | */ |
458 | */ |
| 459 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) |
459 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan) |
| 460 | { |
460 | { |
| 461 | /* Check CAN handle */ |
461 | /* Check CAN handle */ |
| 462 | if (hcan == NULL) |
462 | if (hcan == NULL) |
| 463 | { |
463 | { |
| 464 | return HAL_ERROR; |
464 | return HAL_ERROR; |
| 465 | } |
465 | } |
| 466 | 466 | ||
| 467 | /* Check the parameters */ |
467 | /* Check the parameters */ |
| 468 | assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); |
468 | assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); |
| 469 | 469 | ||
| 470 | /* Stop the CAN module */ |
470 | /* Stop the CAN module */ |
| 471 | (void)HAL_CAN_Stop(hcan); |
471 | (void)HAL_CAN_Stop(hcan); |
| 472 | 472 | ||
| 473 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
473 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 474 | if (hcan->MspDeInitCallback == NULL) |
474 | if (hcan->MspDeInitCallback == NULL) |
| 475 | { |
475 | { |
| 476 | hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */ |
476 | hcan->MspDeInitCallback = HAL_CAN_MspDeInit; /* Legacy weak MspDeInit */ |
| 477 | } |
477 | } |
| 478 | 478 | ||
| 479 | /* DeInit the low level hardware: CLOCK, NVIC */ |
479 | /* DeInit the low level hardware: CLOCK, NVIC */ |
| 480 | hcan->MspDeInitCallback(hcan); |
480 | hcan->MspDeInitCallback(hcan); |
| 481 | 481 | ||
| 482 | #else |
482 | #else |
| 483 | /* DeInit the low level hardware: CLOCK, NVIC */ |
483 | /* DeInit the low level hardware: CLOCK, NVIC */ |
| 484 | HAL_CAN_MspDeInit(hcan); |
484 | HAL_CAN_MspDeInit(hcan); |
| 485 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
485 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
| 486 | 486 | ||
| 487 | /* Reset the CAN peripheral */ |
487 | /* Reset the CAN peripheral */ |
| 488 | SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); |
488 | SET_BIT(hcan->Instance->MCR, CAN_MCR_RESET); |
| 489 | 489 | ||
| 490 | /* Reset the CAN ErrorCode */ |
490 | /* Reset the CAN ErrorCode */ |
| 491 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
491 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
| 492 | 492 | ||
| 493 | /* Change CAN state */ |
493 | /* Change CAN state */ |
| 494 | hcan->State = HAL_CAN_STATE_RESET; |
494 | hcan->State = HAL_CAN_STATE_RESET; |
| 495 | 495 | ||
| 496 | /* Return function status */ |
496 | /* Return function status */ |
| 497 | return HAL_OK; |
497 | return HAL_OK; |
| 498 | } |
498 | } |
| 499 | 499 | ||
| 500 | /** |
500 | /** |
| 501 | * @brief Initializes the CAN MSP. |
501 | * @brief Initializes the CAN MSP. |
| 502 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
502 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 503 | * the configuration information for the specified CAN. |
503 | * the configuration information for the specified CAN. |
| 504 | * @retval None |
504 | * @retval None |
| 505 | */ |
505 | */ |
| 506 | __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) |
506 | __weak void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan) |
| 507 | { |
507 | { |
| 508 | /* Prevent unused argument(s) compilation warning */ |
508 | /* Prevent unused argument(s) compilation warning */ |
| 509 | UNUSED(hcan); |
509 | UNUSED(hcan); |
| 510 | 510 | ||
| 511 | /* NOTE : This function Should not be modified, when the callback is needed, |
511 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 512 | the HAL_CAN_MspInit could be implemented in the user file |
512 | the HAL_CAN_MspInit could be implemented in the user file |
| 513 | */ |
513 | */ |
| 514 | } |
514 | } |
| 515 | 515 | ||
| 516 | /** |
516 | /** |
| 517 | * @brief DeInitializes the CAN MSP. |
517 | * @brief DeInitializes the CAN MSP. |
| 518 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
518 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 519 | * the configuration information for the specified CAN. |
519 | * the configuration information for the specified CAN. |
| 520 | * @retval None |
520 | * @retval None |
| 521 | */ |
521 | */ |
| 522 | __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) |
522 | __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan) |
| 523 | { |
523 | { |
| 524 | /* Prevent unused argument(s) compilation warning */ |
524 | /* Prevent unused argument(s) compilation warning */ |
| 525 | UNUSED(hcan); |
525 | UNUSED(hcan); |
| 526 | 526 | ||
| 527 | /* NOTE : This function Should not be modified, when the callback is needed, |
527 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 528 | the HAL_CAN_MspDeInit could be implemented in the user file |
528 | the HAL_CAN_MspDeInit could be implemented in the user file |
| 529 | */ |
529 | */ |
| 530 | } |
530 | } |
| 531 | 531 | ||
| 532 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
532 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 533 | /** |
533 | /** |
| 534 | * @brief Register a CAN CallBack. |
534 | * @brief Register a CAN CallBack. |
| 535 | * To be used instead of the weak predefined callback |
535 | * To be used instead of the weak predefined callback |
| 536 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
536 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 537 | * the configuration information for CAN module |
537 | * the configuration information for CAN module |
| 538 | * @param CallbackID ID of the callback to be registered |
538 | * @param CallbackID ID of the callback to be registered |
| 539 | * This parameter can be one of the following values: |
539 | * This parameter can be one of the following values: |
| 540 | * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID |
540 | * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID |
| 541 | * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID |
541 | * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID |
| 542 | * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID |
542 | * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID |
| 543 | * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID |
543 | * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID |
| 544 | * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID |
544 | * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID |
| 545 | * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID |
545 | * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID |
| 546 | * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID |
546 | * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID |
| 547 | * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID |
547 | * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID |
| 548 | * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID |
548 | * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID |
| 549 | * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID |
549 | * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID |
| 550 | * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID |
550 | * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID |
| 551 | * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID |
551 | * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID |
| 552 | * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID |
552 | * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID |
| 553 | * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID |
553 | * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID |
| 554 | * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID |
554 | * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID |
| 555 | * @param pCallback pointer to the Callback function |
555 | * @param pCallback pointer to the Callback function |
| 556 | * @retval HAL status |
556 | * @retval HAL status |
| 557 | */ |
557 | */ |
| 558 | HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan)) |
558 | HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, |
| 559 | { |
559 | void (* pCallback)(CAN_HandleTypeDef *_hcan)) |
| 560 | HAL_StatusTypeDef status = HAL_OK; |
560 | { |
| 561 | 561 | HAL_StatusTypeDef status = HAL_OK; |
|
| 562 | if (pCallback == NULL) |
562 | |
| 563 | { |
563 | if (pCallback == NULL) |
| 564 | /* Update the error code */ |
564 | { |
| 565 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
565 | /* Update the error code */ |
| 566 | 566 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 567 | return HAL_ERROR; |
567 | |
| 568 | } |
568 | return HAL_ERROR; |
| 569 | 569 | } |
|
| 570 | if (hcan->State == HAL_CAN_STATE_READY) |
570 | |
| 571 | { |
571 | if (hcan->State == HAL_CAN_STATE_READY) |
| 572 | switch (CallbackID) |
572 | { |
| 573 | { |
573 | switch (CallbackID) |
| 574 | case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : |
574 | { |
| 575 | hcan->TxMailbox0CompleteCallback = pCallback; |
575 | case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : |
| 576 | break; |
576 | hcan->TxMailbox0CompleteCallback = pCallback; |
| 577 | 577 | break; |
|
| 578 | case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : |
578 | |
| 579 | hcan->TxMailbox1CompleteCallback = pCallback; |
579 | case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : |
| 580 | break; |
580 | hcan->TxMailbox1CompleteCallback = pCallback; |
| 581 | 581 | break; |
|
| 582 | case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : |
582 | |
| 583 | hcan->TxMailbox2CompleteCallback = pCallback; |
583 | case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : |
| 584 | break; |
584 | hcan->TxMailbox2CompleteCallback = pCallback; |
| 585 | 585 | break; |
|
| 586 | case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : |
586 | |
| 587 | hcan->TxMailbox0AbortCallback = pCallback; |
587 | case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : |
| 588 | break; |
588 | hcan->TxMailbox0AbortCallback = pCallback; |
| 589 | 589 | break; |
|
| 590 | case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : |
590 | |
| 591 | hcan->TxMailbox1AbortCallback = pCallback; |
591 | case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : |
| 592 | break; |
592 | hcan->TxMailbox1AbortCallback = pCallback; |
| 593 | 593 | break; |
|
| 594 | case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : |
594 | |
| 595 | hcan->TxMailbox2AbortCallback = pCallback; |
595 | case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : |
| 596 | break; |
596 | hcan->TxMailbox2AbortCallback = pCallback; |
| 597 | 597 | break; |
|
| 598 | case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : |
598 | |
| 599 | hcan->RxFifo0MsgPendingCallback = pCallback; |
599 | case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : |
| 600 | break; |
600 | hcan->RxFifo0MsgPendingCallback = pCallback; |
| 601 | 601 | break; |
|
| 602 | case HAL_CAN_RX_FIFO0_FULL_CB_ID : |
602 | |
| 603 | hcan->RxFifo0FullCallback = pCallback; |
603 | case HAL_CAN_RX_FIFO0_FULL_CB_ID : |
| 604 | break; |
604 | hcan->RxFifo0FullCallback = pCallback; |
| 605 | 605 | break; |
|
| 606 | case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : |
606 | |
| 607 | hcan->RxFifo1MsgPendingCallback = pCallback; |
607 | case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : |
| 608 | break; |
608 | hcan->RxFifo1MsgPendingCallback = pCallback; |
| 609 | 609 | break; |
|
| 610 | case HAL_CAN_RX_FIFO1_FULL_CB_ID : |
610 | |
| 611 | hcan->RxFifo1FullCallback = pCallback; |
611 | case HAL_CAN_RX_FIFO1_FULL_CB_ID : |
| 612 | break; |
612 | hcan->RxFifo1FullCallback = pCallback; |
| 613 | 613 | break; |
|
| 614 | case HAL_CAN_SLEEP_CB_ID : |
614 | |
| 615 | hcan->SleepCallback = pCallback; |
615 | case HAL_CAN_SLEEP_CB_ID : |
| 616 | break; |
616 | hcan->SleepCallback = pCallback; |
| 617 | 617 | break; |
|
| 618 | case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : |
618 | |
| 619 | hcan->WakeUpFromRxMsgCallback = pCallback; |
619 | case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : |
| 620 | break; |
620 | hcan->WakeUpFromRxMsgCallback = pCallback; |
| 621 | 621 | break; |
|
| 622 | case HAL_CAN_ERROR_CB_ID : |
622 | |
| 623 | hcan->ErrorCallback = pCallback; |
623 | case HAL_CAN_ERROR_CB_ID : |
| 624 | break; |
624 | hcan->ErrorCallback = pCallback; |
| 625 | 625 | break; |
|
| 626 | case HAL_CAN_MSPINIT_CB_ID : |
626 | |
| 627 | hcan->MspInitCallback = pCallback; |
627 | case HAL_CAN_MSPINIT_CB_ID : |
| 628 | break; |
628 | hcan->MspInitCallback = pCallback; |
| 629 | 629 | break; |
|
| 630 | case HAL_CAN_MSPDEINIT_CB_ID : |
630 | |
| 631 | hcan->MspDeInitCallback = pCallback; |
631 | case HAL_CAN_MSPDEINIT_CB_ID : |
| 632 | break; |
632 | hcan->MspDeInitCallback = pCallback; |
| 633 | 633 | break; |
|
| 634 | default : |
634 | |
| 635 | /* Update the error code */ |
635 | default : |
| 636 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
636 | /* Update the error code */ |
| 637 | 637 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 638 | /* Return error status */ |
638 | |
| 639 | status = HAL_ERROR; |
639 | /* Return error status */ |
| 640 | break; |
640 | status = HAL_ERROR; |
| 641 | } |
641 | break; |
| 642 | } |
642 | } |
| 643 | else if (hcan->State == HAL_CAN_STATE_RESET) |
643 | } |
| 644 | { |
644 | else if (hcan->State == HAL_CAN_STATE_RESET) |
| 645 | switch (CallbackID) |
645 | { |
| 646 | { |
646 | switch (CallbackID) |
| 647 | case HAL_CAN_MSPINIT_CB_ID : |
647 | { |
| 648 | hcan->MspInitCallback = pCallback; |
648 | case HAL_CAN_MSPINIT_CB_ID : |
| 649 | break; |
649 | hcan->MspInitCallback = pCallback; |
| 650 | 650 | break; |
|
| 651 | case HAL_CAN_MSPDEINIT_CB_ID : |
651 | |
| 652 | hcan->MspDeInitCallback = pCallback; |
652 | case HAL_CAN_MSPDEINIT_CB_ID : |
| 653 | break; |
653 | hcan->MspDeInitCallback = pCallback; |
| 654 | 654 | break; |
|
| 655 | default : |
655 | |
| 656 | /* Update the error code */ |
656 | default : |
| 657 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
657 | /* Update the error code */ |
| 658 | 658 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 659 | /* Return error status */ |
659 | |
| 660 | status = HAL_ERROR; |
660 | /* Return error status */ |
| 661 | break; |
661 | status = HAL_ERROR; |
| 662 | } |
662 | break; |
| 663 | } |
663 | } |
| 664 | else |
664 | } |
| 665 | { |
665 | else |
| 666 | /* Update the error code */ |
666 | { |
| 667 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
667 | /* Update the error code */ |
| 668 | 668 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 669 | /* Return error status */ |
669 | |
| 670 | status = HAL_ERROR; |
670 | /* Return error status */ |
| 671 | } |
671 | status = HAL_ERROR; |
| 672 | 672 | } |
|
| 673 | return status; |
673 | |
| 674 | } |
674 | return status; |
| 675 | 675 | } |
|
| 676 | /** |
676 | |
| 677 | * @brief Unregister a CAN CallBack. |
677 | /** |
| 678 | * CAN callabck is redirected to the weak predefined callback |
678 | * @brief Unregister a CAN CallBack. |
| 679 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
679 | * CAN callback is redirected to the weak predefined callback |
| 680 | * the configuration information for CAN module |
680 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 681 | * @param CallbackID ID of the callback to be unregistered |
681 | * the configuration information for CAN module |
| 682 | * This parameter can be one of the following values: |
682 | * @param CallbackID ID of the callback to be unregistered |
| 683 | * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID |
683 | * This parameter can be one of the following values: |
| 684 | * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID |
684 | * @arg @ref HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID Tx Mailbox 0 Complete callback ID |
| 685 | * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID |
685 | * @arg @ref HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID Tx Mailbox 1 Complete callback ID |
| 686 | * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID |
686 | * @arg @ref HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID Tx Mailbox 2 Complete callback ID |
| 687 | * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID |
687 | * @arg @ref HAL_CAN_TX_MAILBOX0_ABORT_CB_ID Tx Mailbox 0 Abort callback ID |
| 688 | * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID |
688 | * @arg @ref HAL_CAN_TX_MAILBOX1_ABORT_CB_ID Tx Mailbox 1 Abort callback ID |
| 689 | * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID |
689 | * @arg @ref HAL_CAN_TX_MAILBOX2_ABORT_CB_ID Tx Mailbox 2 Abort callback ID |
| 690 | * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID |
690 | * @arg @ref HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID Rx Fifo 0 message pending callback ID |
| 691 | * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID |
691 | * @arg @ref HAL_CAN_RX_FIFO0_FULL_CB_ID Rx Fifo 0 full callback ID |
| 692 | * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID |
692 | * @arg @ref HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID Rx Fifo 1 message pending callback ID |
| 693 | * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID |
693 | * @arg @ref HAL_CAN_RX_FIFO1_FULL_CB_ID Rx Fifo 1 full callback ID |
| 694 | * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID |
694 | * @arg @ref HAL_CAN_SLEEP_CB_ID Sleep callback ID |
| 695 | * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID |
695 | * @arg @ref HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID Wake Up from Rx message callback ID |
| 696 | * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID |
696 | * @arg @ref HAL_CAN_ERROR_CB_ID Error callback ID |
| 697 | * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID |
697 | * @arg @ref HAL_CAN_MSPINIT_CB_ID MspInit callback ID |
| 698 | * @retval HAL status |
698 | * @arg @ref HAL_CAN_MSPDEINIT_CB_ID MspDeInit callback ID |
| 699 | */ |
699 | * @retval HAL status |
| 700 | HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID) |
700 | */ |
| 701 | { |
701 | HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID) |
| 702 | HAL_StatusTypeDef status = HAL_OK; |
702 | { |
| 703 | 703 | HAL_StatusTypeDef status = HAL_OK; |
|
| 704 | if (hcan->State == HAL_CAN_STATE_READY) |
704 | |
| 705 | { |
705 | if (hcan->State == HAL_CAN_STATE_READY) |
| 706 | switch (CallbackID) |
706 | { |
| 707 | { |
707 | switch (CallbackID) |
| 708 | case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : |
708 | { |
| 709 | hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; |
709 | case HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID : |
| 710 | break; |
710 | hcan->TxMailbox0CompleteCallback = HAL_CAN_TxMailbox0CompleteCallback; |
| 711 | 711 | break; |
|
| 712 | case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : |
712 | |
| 713 | hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; |
713 | case HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID : |
| 714 | break; |
714 | hcan->TxMailbox1CompleteCallback = HAL_CAN_TxMailbox1CompleteCallback; |
| 715 | 715 | break; |
|
| 716 | case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : |
716 | |
| 717 | hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; |
717 | case HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID : |
| 718 | break; |
718 | hcan->TxMailbox2CompleteCallback = HAL_CAN_TxMailbox2CompleteCallback; |
| 719 | 719 | break; |
|
| 720 | case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : |
720 | |
| 721 | hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; |
721 | case HAL_CAN_TX_MAILBOX0_ABORT_CB_ID : |
| 722 | break; |
722 | hcan->TxMailbox0AbortCallback = HAL_CAN_TxMailbox0AbortCallback; |
| 723 | 723 | break; |
|
| 724 | case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : |
724 | |
| 725 | hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; |
725 | case HAL_CAN_TX_MAILBOX1_ABORT_CB_ID : |
| 726 | break; |
726 | hcan->TxMailbox1AbortCallback = HAL_CAN_TxMailbox1AbortCallback; |
| 727 | 727 | break; |
|
| 728 | case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : |
728 | |
| 729 | hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; |
729 | case HAL_CAN_TX_MAILBOX2_ABORT_CB_ID : |
| 730 | break; |
730 | hcan->TxMailbox2AbortCallback = HAL_CAN_TxMailbox2AbortCallback; |
| 731 | 731 | break; |
|
| 732 | case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : |
732 | |
| 733 | hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; |
733 | case HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID : |
| 734 | break; |
734 | hcan->RxFifo0MsgPendingCallback = HAL_CAN_RxFifo0MsgPendingCallback; |
| 735 | 735 | break; |
|
| 736 | case HAL_CAN_RX_FIFO0_FULL_CB_ID : |
736 | |
| 737 | hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; |
737 | case HAL_CAN_RX_FIFO0_FULL_CB_ID : |
| 738 | break; |
738 | hcan->RxFifo0FullCallback = HAL_CAN_RxFifo0FullCallback; |
| 739 | 739 | break; |
|
| 740 | case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : |
740 | |
| 741 | hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; |
741 | case HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID : |
| 742 | break; |
742 | hcan->RxFifo1MsgPendingCallback = HAL_CAN_RxFifo1MsgPendingCallback; |
| 743 | 743 | break; |
|
| 744 | case HAL_CAN_RX_FIFO1_FULL_CB_ID : |
744 | |
| 745 | hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; |
745 | case HAL_CAN_RX_FIFO1_FULL_CB_ID : |
| 746 | break; |
746 | hcan->RxFifo1FullCallback = HAL_CAN_RxFifo1FullCallback; |
| 747 | 747 | break; |
|
| 748 | case HAL_CAN_SLEEP_CB_ID : |
748 | |
| 749 | hcan->SleepCallback = HAL_CAN_SleepCallback; |
749 | case HAL_CAN_SLEEP_CB_ID : |
| 750 | break; |
750 | hcan->SleepCallback = HAL_CAN_SleepCallback; |
| 751 | 751 | break; |
|
| 752 | case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : |
752 | |
| 753 | hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; |
753 | case HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID : |
| 754 | break; |
754 | hcan->WakeUpFromRxMsgCallback = HAL_CAN_WakeUpFromRxMsgCallback; |
| 755 | 755 | break; |
|
| 756 | case HAL_CAN_ERROR_CB_ID : |
756 | |
| 757 | hcan->ErrorCallback = HAL_CAN_ErrorCallback; |
757 | case HAL_CAN_ERROR_CB_ID : |
| 758 | break; |
758 | hcan->ErrorCallback = HAL_CAN_ErrorCallback; |
| 759 | 759 | break; |
|
| 760 | case HAL_CAN_MSPINIT_CB_ID : |
760 | |
| 761 | hcan->MspInitCallback = HAL_CAN_MspInit; |
761 | case HAL_CAN_MSPINIT_CB_ID : |
| 762 | break; |
762 | hcan->MspInitCallback = HAL_CAN_MspInit; |
| 763 | 763 | break; |
|
| 764 | case HAL_CAN_MSPDEINIT_CB_ID : |
764 | |
| 765 | hcan->MspDeInitCallback = HAL_CAN_MspDeInit; |
765 | case HAL_CAN_MSPDEINIT_CB_ID : |
| 766 | break; |
766 | hcan->MspDeInitCallback = HAL_CAN_MspDeInit; |
| 767 | 767 | break; |
|
| 768 | default : |
768 | |
| 769 | /* Update the error code */ |
769 | default : |
| 770 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
770 | /* Update the error code */ |
| 771 | 771 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 772 | /* Return error status */ |
772 | |
| 773 | status = HAL_ERROR; |
773 | /* Return error status */ |
| 774 | break; |
774 | status = HAL_ERROR; |
| 775 | } |
775 | break; |
| 776 | } |
776 | } |
| 777 | else if (hcan->State == HAL_CAN_STATE_RESET) |
777 | } |
| 778 | { |
778 | else if (hcan->State == HAL_CAN_STATE_RESET) |
| 779 | switch (CallbackID) |
779 | { |
| 780 | { |
780 | switch (CallbackID) |
| 781 | case HAL_CAN_MSPINIT_CB_ID : |
781 | { |
| 782 | hcan->MspInitCallback = HAL_CAN_MspInit; |
782 | case HAL_CAN_MSPINIT_CB_ID : |
| 783 | break; |
783 | hcan->MspInitCallback = HAL_CAN_MspInit; |
| 784 | 784 | break; |
|
| 785 | case HAL_CAN_MSPDEINIT_CB_ID : |
785 | |
| 786 | hcan->MspDeInitCallback = HAL_CAN_MspDeInit; |
786 | case HAL_CAN_MSPDEINIT_CB_ID : |
| 787 | break; |
787 | hcan->MspDeInitCallback = HAL_CAN_MspDeInit; |
| 788 | 788 | break; |
|
| 789 | default : |
789 | |
| 790 | /* Update the error code */ |
790 | default : |
| 791 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
791 | /* Update the error code */ |
| 792 | 792 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 793 | /* Return error status */ |
793 | |
| 794 | status = HAL_ERROR; |
794 | /* Return error status */ |
| 795 | break; |
795 | status = HAL_ERROR; |
| 796 | } |
796 | break; |
| 797 | } |
797 | } |
| 798 | else |
798 | } |
| 799 | { |
799 | else |
| 800 | /* Update the error code */ |
800 | { |
| 801 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
801 | /* Update the error code */ |
| 802 | 802 | hcan->ErrorCode |= HAL_CAN_ERROR_INVALID_CALLBACK; |
|
| 803 | /* Return error status */ |
803 | |
| 804 | status = HAL_ERROR; |
804 | /* Return error status */ |
| 805 | } |
805 | status = HAL_ERROR; |
| 806 | 806 | } |
|
| 807 | return status; |
807 | |
| 808 | } |
808 | return status; |
| 809 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
809 | } |
| 810 | 810 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 811 | /** |
811 | |
| 812 | * @} |
812 | /** |
| 813 | */ |
813 | * @} |
| 814 | 814 | */ |
|
| 815 | /** @defgroup CAN_Exported_Functions_Group2 Configuration functions |
815 | |
| 816 | * @brief Configuration functions. |
816 | /** @defgroup CAN_Exported_Functions_Group2 Configuration functions |
| 817 | * |
817 | * @brief Configuration functions. |
| 818 | @verbatim |
818 | * |
| 819 | ============================================================================== |
819 | @verbatim |
| 820 | ##### Configuration functions ##### |
820 | ============================================================================== |
| 821 | ============================================================================== |
821 | ##### Configuration functions ##### |
| 822 | [..] This section provides functions allowing to: |
822 | ============================================================================== |
| 823 | (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters |
823 | [..] This section provides functions allowing to: |
| 824 | 824 | (+) HAL_CAN_ConfigFilter : Configure the CAN reception filters |
|
| 825 | @endverbatim |
825 | |
| 826 | * @{ |
826 | @endverbatim |
| 827 | */ |
827 | * @{ |
| 828 | 828 | */ |
|
| 829 | /** |
829 | |
| 830 | * @brief Configures the CAN reception filter according to the specified |
830 | /** |
| 831 | * parameters in the CAN_FilterInitStruct. |
831 | * @brief Configures the CAN reception filter according to the specified |
| 832 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
832 | * parameters in the CAN_FilterInitStruct. |
| 833 | * the configuration information for the specified CAN. |
833 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 834 | * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that |
834 | * the configuration information for the specified CAN. |
| 835 | * contains the filter configuration information. |
835 | * @param sFilterConfig pointer to a CAN_FilterTypeDef structure that |
| 836 | * @retval None |
836 | * contains the filter configuration information. |
| 837 | */ |
837 | * @retval None |
| 838 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig) |
838 | */ |
| 839 | { |
839 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig) |
| 840 | uint32_t filternbrbitpos; |
840 | { |
| 841 | CAN_TypeDef *can_ip = hcan->Instance; |
841 | uint32_t filternbrbitpos; |
| 842 | HAL_CAN_StateTypeDef state = hcan->State; |
842 | CAN_TypeDef *can_ip = hcan->Instance; |
| 843 | 843 | HAL_CAN_StateTypeDef state = hcan->State; |
|
| 844 | if ((state == HAL_CAN_STATE_READY) || |
844 | |
| 845 | (state == HAL_CAN_STATE_LISTENING)) |
845 | if ((state == HAL_CAN_STATE_READY) || |
| 846 | { |
846 | (state == HAL_CAN_STATE_LISTENING)) |
| 847 | /* Check the parameters */ |
847 | { |
| 848 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); |
848 | /* Check the parameters */ |
| 849 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); |
849 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdHigh)); |
| 850 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); |
850 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterIdLow)); |
| 851 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); |
851 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdHigh)); |
| 852 | assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); |
852 | assert_param(IS_CAN_FILTER_ID_HALFWORD(sFilterConfig->FilterMaskIdLow)); |
| 853 | assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); |
853 | assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); |
| 854 | assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); |
854 | assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); |
| 855 | assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); |
855 | assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); |
| 856 | 856 | assert_param(IS_CAN_FILTER_ACTIVATION(sFilterConfig->FilterActivation)); |
|
| 857 | #if defined(CAN2) |
857 | |
| 858 | /* CAN1 and CAN2 are dual instances with 28 common filters banks */ |
858 | #if defined(CAN2) |
| 859 | /* Select master instance to access the filter banks */ |
859 | /* CAN1 and CAN2 are dual instances with 28 common filters banks */ |
| 860 | can_ip = CAN1; |
860 | /* Select master instance to access the filter banks */ |
| 861 | 861 | can_ip = CAN1; |
|
| 862 | /* Check the parameters */ |
862 | |
| 863 | assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank)); |
863 | /* Check the parameters */ |
| 864 | assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); |
864 | assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->FilterBank)); |
| 865 | #else |
865 | assert_param(IS_CAN_FILTER_BANK_DUAL(sFilterConfig->SlaveStartFilterBank)); |
| 866 | /* CAN1 is single instance with 14 dedicated filters banks */ |
866 | #else |
| 867 | 867 | /* CAN1 is single instance with 14 dedicated filters banks */ |
|
| 868 | /* Check the parameters */ |
868 | |
| 869 | assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); |
869 | /* Check the parameters */ |
| 870 | #endif |
870 | assert_param(IS_CAN_FILTER_BANK_SINGLE(sFilterConfig->FilterBank)); |
| 871 | 871 | #endif |
|
| 872 | /* Initialisation mode for the filter */ |
872 | |
| 873 | SET_BIT(can_ip->FMR, CAN_FMR_FINIT); |
873 | /* Initialisation mode for the filter */ |
| 874 | 874 | SET_BIT(can_ip->FMR, CAN_FMR_FINIT); |
|
| 875 | #if defined(CAN2) |
875 | |
| 876 | /* Select the start filter number of CAN2 slave instance */ |
876 | #if defined(CAN2) |
| 877 | CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); |
877 | /* Select the start filter number of CAN2 slave instance */ |
| 878 | SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); |
878 | CLEAR_BIT(can_ip->FMR, CAN_FMR_CAN2SB); |
| 879 | 879 | SET_BIT(can_ip->FMR, sFilterConfig->SlaveStartFilterBank << CAN_FMR_CAN2SB_Pos); |
|
| 880 | #endif |
880 | |
| 881 | /* Convert filter number into bit position */ |
881 | #endif |
| 882 | filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); |
882 | /* Convert filter number into bit position */ |
| 883 | 883 | filternbrbitpos = (uint32_t)1 << (sFilterConfig->FilterBank & 0x1FU); |
|
| 884 | /* Filter Deactivation */ |
884 | |
| 885 | CLEAR_BIT(can_ip->FA1R, filternbrbitpos); |
885 | /* Filter Deactivation */ |
| 886 | 886 | CLEAR_BIT(can_ip->FA1R, filternbrbitpos); |
|
| 887 | /* Filter Scale */ |
887 | |
| 888 | if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) |
888 | /* Filter Scale */ |
| 889 | { |
889 | if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) |
| 890 | /* 16-bit scale for the filter */ |
890 | { |
| 891 | CLEAR_BIT(can_ip->FS1R, filternbrbitpos); |
891 | /* 16-bit scale for the filter */ |
| 892 | 892 | CLEAR_BIT(can_ip->FS1R, filternbrbitpos); |
|
| 893 | /* First 16-bit identifier and First 16-bit mask */ |
893 | |
| 894 | /* Or First 16-bit identifier and Second 16-bit identifier */ |
894 | /* First 16-bit identifier and First 16-bit mask */ |
| 895 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = |
895 | /* Or First 16-bit identifier and Second 16-bit identifier */ |
| 896 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | |
896 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = |
| 897 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); |
897 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16U) | |
| 898 | 898 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); |
|
| 899 | /* Second 16-bit identifier and Second 16-bit mask */ |
899 | |
| 900 | /* Or Third 16-bit identifier and Fourth 16-bit identifier */ |
900 | /* Second 16-bit identifier and Second 16-bit mask */ |
| 901 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = |
901 | /* Or Third 16-bit identifier and Fourth 16-bit identifier */ |
| 902 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | |
902 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = |
| 903 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); |
903 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | |
| 904 | } |
904 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh); |
| 905 | 905 | } |
|
| 906 | if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) |
906 | |
| 907 | { |
907 | if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) |
| 908 | /* 32-bit scale for the filter */ |
908 | { |
| 909 | SET_BIT(can_ip->FS1R, filternbrbitpos); |
909 | /* 32-bit scale for the filter */ |
| 910 | 910 | SET_BIT(can_ip->FS1R, filternbrbitpos); |
|
| 911 | /* 32-bit identifier or First 32-bit identifier */ |
911 | |
| 912 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = |
912 | /* 32-bit identifier or First 32-bit identifier */ |
| 913 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | |
913 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR1 = |
| 914 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); |
914 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh) << 16U) | |
| 915 | 915 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdLow); |
|
| 916 | /* 32-bit mask or Second 32-bit identifier */ |
916 | |
| 917 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = |
917 | /* 32-bit mask or Second 32-bit identifier */ |
| 918 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | |
918 | can_ip->sFilterRegister[sFilterConfig->FilterBank].FR2 = |
| 919 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); |
919 | ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) | |
| 920 | } |
920 | (0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdLow); |
| 921 | 921 | } |
|
| 922 | /* Filter Mode */ |
922 | |
| 923 | if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) |
923 | /* Filter Mode */ |
| 924 | { |
924 | if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) |
| 925 | /* Id/Mask mode for the filter*/ |
925 | { |
| 926 | CLEAR_BIT(can_ip->FM1R, filternbrbitpos); |
926 | /* Id/Mask mode for the filter*/ |
| 927 | } |
927 | CLEAR_BIT(can_ip->FM1R, filternbrbitpos); |
| 928 | else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ |
928 | } |
| 929 | { |
929 | else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ |
| 930 | /* Identifier list mode for the filter*/ |
930 | { |
| 931 | SET_BIT(can_ip->FM1R, filternbrbitpos); |
931 | /* Identifier list mode for the filter*/ |
| 932 | } |
932 | SET_BIT(can_ip->FM1R, filternbrbitpos); |
| 933 | 933 | } |
|
| 934 | /* Filter FIFO assignment */ |
934 | |
| 935 | if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) |
935 | /* Filter FIFO assignment */ |
| 936 | { |
936 | if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) |
| 937 | /* FIFO 0 assignation for the filter */ |
937 | { |
| 938 | CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); |
938 | /* FIFO 0 assignation for the filter */ |
| 939 | } |
939 | CLEAR_BIT(can_ip->FFA1R, filternbrbitpos); |
| 940 | else |
940 | } |
| 941 | { |
941 | else |
| 942 | /* FIFO 1 assignation for the filter */ |
942 | { |
| 943 | SET_BIT(can_ip->FFA1R, filternbrbitpos); |
943 | /* FIFO 1 assignation for the filter */ |
| 944 | } |
944 | SET_BIT(can_ip->FFA1R, filternbrbitpos); |
| 945 | 945 | } |
|
| 946 | /* Filter activation */ |
946 | |
| 947 | if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) |
947 | /* Filter activation */ |
| 948 | { |
948 | if (sFilterConfig->FilterActivation == CAN_FILTER_ENABLE) |
| 949 | SET_BIT(can_ip->FA1R, filternbrbitpos); |
949 | { |
| 950 | } |
950 | SET_BIT(can_ip->FA1R, filternbrbitpos); |
| 951 | 951 | } |
|
| 952 | /* Leave the initialisation mode for the filter */ |
952 | |
| 953 | CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); |
953 | /* Leave the initialisation mode for the filter */ |
| 954 | 954 | CLEAR_BIT(can_ip->FMR, CAN_FMR_FINIT); |
|
| 955 | /* Return function status */ |
955 | |
| 956 | return HAL_OK; |
956 | /* Return function status */ |
| 957 | } |
957 | return HAL_OK; |
| 958 | else |
958 | } |
| 959 | { |
959 | else |
| 960 | /* Update error code */ |
960 | { |
| 961 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
961 | /* Update error code */ |
| 962 | 962 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
|
| 963 | return HAL_ERROR; |
963 | |
| 964 | } |
964 | return HAL_ERROR; |
| 965 | } |
965 | } |
| 966 | 966 | } |
|
| 967 | /** |
967 | |
| 968 | * @} |
968 | /** |
| 969 | */ |
969 | * @} |
| 970 | 970 | */ |
|
| 971 | /** @defgroup CAN_Exported_Functions_Group3 Control functions |
971 | |
| 972 | * @brief Control functions |
972 | /** @defgroup CAN_Exported_Functions_Group3 Control functions |
| 973 | * |
973 | * @brief Control functions |
| 974 | @verbatim |
974 | * |
| 975 | ============================================================================== |
975 | @verbatim |
| 976 | ##### Control functions ##### |
976 | ============================================================================== |
| 977 | ============================================================================== |
977 | ##### Control functions ##### |
| 978 | [..] This section provides functions allowing to: |
978 | ============================================================================== |
| 979 | (+) HAL_CAN_Start : Start the CAN module |
979 | [..] This section provides functions allowing to: |
| 980 | (+) HAL_CAN_Stop : Stop the CAN module |
980 | (+) HAL_CAN_Start : Start the CAN module |
| 981 | (+) HAL_CAN_RequestSleep : Request sleep mode entry. |
981 | (+) HAL_CAN_Stop : Stop the CAN module |
| 982 | (+) HAL_CAN_WakeUp : Wake up from sleep mode. |
982 | (+) HAL_CAN_RequestSleep : Request sleep mode entry. |
| 983 | (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. |
983 | (+) HAL_CAN_WakeUp : Wake up from sleep mode. |
| 984 | (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes |
984 | (+) HAL_CAN_IsSleepActive : Check is sleep mode is active. |
| 985 | and activate the corresponding |
985 | (+) HAL_CAN_AddTxMessage : Add a message to the Tx mailboxes |
| 986 | transmission request |
986 | and activate the corresponding |
| 987 | (+) HAL_CAN_AbortTxRequest : Abort transmission request |
987 | transmission request |
| 988 | (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level |
988 | (+) HAL_CAN_AbortTxRequest : Abort transmission request |
| 989 | (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is |
989 | (+) HAL_CAN_GetTxMailboxesFreeLevel : Return Tx mailboxes free level |
| 990 | pending on the selected Tx mailbox |
990 | (+) HAL_CAN_IsTxMessagePending : Check if a transmission request is |
| 991 | (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO |
991 | pending on the selected Tx mailbox |
| 992 | (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level |
992 | (+) HAL_CAN_GetRxMessage : Get a CAN frame from the Rx FIFO |
| 993 | 993 | (+) HAL_CAN_GetRxFifoFillLevel : Return Rx FIFO fill level |
|
| 994 | @endverbatim |
994 | |
| 995 | * @{ |
995 | @endverbatim |
| 996 | */ |
996 | * @{ |
| 997 | 997 | */ |
|
| 998 | /** |
998 | |
| 999 | * @brief Start the CAN module. |
999 | /** |
| 1000 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1000 | * @brief Start the CAN module. |
| 1001 | * the configuration information for the specified CAN. |
1001 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 1002 | * @retval HAL status |
1002 | * the configuration information for the specified CAN. |
| 1003 | */ |
1003 | * @retval HAL status |
| 1004 | HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) |
1004 | */ |
| 1005 | { |
1005 | HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan) |
| 1006 | uint32_t tickstart; |
1006 | { |
| 1007 | 1007 | uint32_t tickstart; |
|
| 1008 | if (hcan->State == HAL_CAN_STATE_READY) |
1008 | |
| 1009 | { |
1009 | if (hcan->State == HAL_CAN_STATE_READY) |
| 1010 | /* Change CAN peripheral state */ |
1010 | { |
| 1011 | hcan->State = HAL_CAN_STATE_LISTENING; |
1011 | /* Change CAN peripheral state */ |
| 1012 | 1012 | hcan->State = HAL_CAN_STATE_LISTENING; |
|
| 1013 | /* Request leave initialisation */ |
1013 | |
| 1014 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
1014 | /* Request leave initialisation */ |
| 1015 | 1015 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
|
| 1016 | /* Get tick */ |
1016 | |
| 1017 | tickstart = HAL_GetTick(); |
1017 | /* Get tick */ |
| 1018 | 1018 | tickstart = HAL_GetTick(); |
|
| 1019 | /* Wait the acknowledge */ |
1019 | |
| 1020 | while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) |
1020 | /* Wait the acknowledge */ |
| 1021 | { |
1021 | while ((hcan->Instance->MSR & CAN_MSR_INAK) != 0U) |
| 1022 | /* Check for the Timeout */ |
1022 | { |
| 1023 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
1023 | /* Check for the Timeout */ |
| 1024 | { |
1024 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
| 1025 | /* Update error code */ |
1025 | { |
| 1026 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
1026 | /* Update error code */ |
| 1027 | 1027 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
|
| 1028 | /* Change CAN state */ |
1028 | |
| 1029 | hcan->State = HAL_CAN_STATE_ERROR; |
1029 | /* Change CAN state */ |
| 1030 | 1030 | hcan->State = HAL_CAN_STATE_ERROR; |
|
| 1031 | return HAL_ERROR; |
1031 | |
| 1032 | } |
1032 | return HAL_ERROR; |
| 1033 | } |
1033 | } |
| 1034 | 1034 | } |
|
| 1035 | /* Reset the CAN ErrorCode */ |
1035 | |
| 1036 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
1036 | /* Reset the CAN ErrorCode */ |
| 1037 | 1037 | hcan->ErrorCode = HAL_CAN_ERROR_NONE; |
|
| 1038 | /* Return function status */ |
1038 | |
| 1039 | return HAL_OK; |
1039 | /* Return function status */ |
| 1040 | } |
1040 | return HAL_OK; |
| 1041 | else |
1041 | } |
| 1042 | { |
1042 | else |
| 1043 | /* Update error code */ |
1043 | { |
| 1044 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; |
1044 | /* Update error code */ |
| 1045 | 1045 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_READY; |
|
| 1046 | return HAL_ERROR; |
1046 | |
| 1047 | } |
1047 | return HAL_ERROR; |
| 1048 | } |
1048 | } |
| 1049 | 1049 | } |
|
| 1050 | /** |
1050 | |
| 1051 | * @brief Stop the CAN module and enable access to configuration registers. |
1051 | /** |
| 1052 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1052 | * @brief Stop the CAN module and enable access to configuration registers. |
| 1053 | * the configuration information for the specified CAN. |
1053 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 1054 | * @retval HAL status |
1054 | * the configuration information for the specified CAN. |
| 1055 | */ |
1055 | * @retval HAL status |
| 1056 | HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) |
1056 | */ |
| 1057 | { |
1057 | HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan) |
| 1058 | uint32_t tickstart; |
1058 | { |
| 1059 | 1059 | uint32_t tickstart; |
|
| 1060 | if (hcan->State == HAL_CAN_STATE_LISTENING) |
1060 | |
| 1061 | { |
1061 | if (hcan->State == HAL_CAN_STATE_LISTENING) |
| 1062 | /* Request initialisation */ |
1062 | { |
| 1063 | SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
1063 | /* Request initialisation */ |
| 1064 | 1064 | SET_BIT(hcan->Instance->MCR, CAN_MCR_INRQ); |
|
| 1065 | /* Get tick */ |
1065 | |
| 1066 | tickstart = HAL_GetTick(); |
1066 | /* Get tick */ |
| 1067 | 1067 | tickstart = HAL_GetTick(); |
|
| 1068 | /* Wait the acknowledge */ |
1068 | |
| 1069 | while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) |
1069 | /* Wait the acknowledge */ |
| 1070 | { |
1070 | while ((hcan->Instance->MSR & CAN_MSR_INAK) == 0U) |
| 1071 | /* Check for the Timeout */ |
1071 | { |
| 1072 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
1072 | /* Check for the Timeout */ |
| 1073 | { |
1073 | if ((HAL_GetTick() - tickstart) > CAN_TIMEOUT_VALUE) |
| 1074 | /* Update error code */ |
1074 | { |
| 1075 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
1075 | /* Update error code */ |
| 1076 | 1076 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
|
| 1077 | /* Change CAN state */ |
1077 | |
| 1078 | hcan->State = HAL_CAN_STATE_ERROR; |
1078 | /* Change CAN state */ |
| 1079 | 1079 | hcan->State = HAL_CAN_STATE_ERROR; |
|
| 1080 | return HAL_ERROR; |
1080 | |
| 1081 | } |
1081 | return HAL_ERROR; |
| 1082 | } |
1082 | } |
| 1083 | 1083 | } |
|
| 1084 | /* Exit from sleep mode */ |
1084 | |
| 1085 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
1085 | /* Exit from sleep mode */ |
| 1086 | 1086 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
|
| 1087 | /* Change CAN peripheral state */ |
1087 | |
| 1088 | hcan->State = HAL_CAN_STATE_READY; |
1088 | /* Change CAN peripheral state */ |
| 1089 | 1089 | hcan->State = HAL_CAN_STATE_READY; |
|
| 1090 | /* Return function status */ |
1090 | |
| 1091 | return HAL_OK; |
1091 | /* Return function status */ |
| 1092 | } |
1092 | return HAL_OK; |
| 1093 | else |
1093 | } |
| 1094 | { |
1094 | else |
| 1095 | /* Update error code */ |
1095 | { |
| 1096 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; |
1096 | /* Update error code */ |
| 1097 | 1097 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_STARTED; |
|
| 1098 | return HAL_ERROR; |
1098 | |
| 1099 | } |
1099 | return HAL_ERROR; |
| 1100 | } |
1100 | } |
| 1101 | 1101 | } |
|
| 1102 | /** |
1102 | |
| 1103 | * @brief Request the sleep mode (low power) entry. |
1103 | /** |
| 1104 | * When returning from this function, Sleep mode will be entered |
1104 | * @brief Request the sleep mode (low power) entry. |
| 1105 | * as soon as the current CAN activity (transmission or reception |
1105 | * When returning from this function, Sleep mode will be entered |
| 1106 | * of a CAN frame) has been completed. |
1106 | * as soon as the current CAN activity (transmission or reception |
| 1107 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1107 | * of a CAN frame) has been completed. |
| 1108 | * the configuration information for the specified CAN. |
1108 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 1109 | * @retval HAL status. |
1109 | * the configuration information for the specified CAN. |
| 1110 | */ |
1110 | * @retval HAL status. |
| 1111 | HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) |
1111 | */ |
| 1112 | { |
1112 | HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan) |
| 1113 | HAL_CAN_StateTypeDef state = hcan->State; |
1113 | { |
| 1114 | 1114 | HAL_CAN_StateTypeDef state = hcan->State; |
|
| 1115 | if ((state == HAL_CAN_STATE_READY) || |
1115 | |
| 1116 | (state == HAL_CAN_STATE_LISTENING)) |
1116 | if ((state == HAL_CAN_STATE_READY) || |
| 1117 | { |
1117 | (state == HAL_CAN_STATE_LISTENING)) |
| 1118 | /* Request Sleep mode */ |
1118 | { |
| 1119 | SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
1119 | /* Request Sleep mode */ |
| 1120 | 1120 | SET_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
|
| 1121 | /* Return function status */ |
1121 | |
| 1122 | return HAL_OK; |
1122 | /* Return function status */ |
| 1123 | } |
1123 | return HAL_OK; |
| 1124 | else |
1124 | } |
| 1125 | { |
1125 | else |
| 1126 | /* Update error code */ |
1126 | { |
| 1127 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1127 | /* Update error code */ |
| 1128 | 1128 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
|
| 1129 | /* Return function status */ |
1129 | |
| 1130 | return HAL_ERROR; |
1130 | /* Return function status */ |
| 1131 | } |
1131 | return HAL_ERROR; |
| 1132 | } |
1132 | } |
| 1133 | 1133 | } |
|
| 1134 | /** |
1134 | |
| 1135 | * @brief Wake up from sleep mode. |
1135 | /** |
| 1136 | * When returning with HAL_OK status from this function, Sleep mode |
1136 | * @brief Wake up from sleep mode. |
| 1137 | * is exited. |
1137 | * When returning with HAL_OK status from this function, Sleep mode |
| 1138 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1138 | * is exited. |
| 1139 | * the configuration information for the specified CAN. |
1139 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 1140 | * @retval HAL status. |
1140 | * the configuration information for the specified CAN. |
| 1141 | */ |
1141 | * @retval HAL status. |
| 1142 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) |
1142 | */ |
| 1143 | { |
1143 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan) |
| 1144 | __IO uint32_t count = 0; |
1144 | { |
| 1145 | uint32_t timeout = 1000000U; |
1145 | __IO uint32_t count = 0; |
| 1146 | HAL_CAN_StateTypeDef state = hcan->State; |
1146 | uint32_t timeout = 1000000U; |
| 1147 | 1147 | HAL_CAN_StateTypeDef state = hcan->State; |
|
| 1148 | if ((state == HAL_CAN_STATE_READY) || |
1148 | |
| 1149 | (state == HAL_CAN_STATE_LISTENING)) |
1149 | if ((state == HAL_CAN_STATE_READY) || |
| 1150 | { |
1150 | (state == HAL_CAN_STATE_LISTENING)) |
| 1151 | /* Wake up request */ |
1151 | { |
| 1152 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
1152 | /* Wake up request */ |
| 1153 | 1153 | CLEAR_BIT(hcan->Instance->MCR, CAN_MCR_SLEEP); |
|
| 1154 | /* Wait sleep mode is exited */ |
1154 | |
| 1155 | do |
1155 | /* Wait sleep mode is exited */ |
| 1156 | { |
1156 | do |
| 1157 | /* Increment counter */ |
1157 | { |
| 1158 | count++; |
1158 | /* Increment counter */ |
| 1159 | 1159 | count++; |
|
| 1160 | /* Check if timeout is reached */ |
1160 | |
| 1161 | if (count > timeout) |
1161 | /* Check if timeout is reached */ |
| 1162 | { |
1162 | if (count > timeout) |
| 1163 | /* Update error code */ |
1163 | { |
| 1164 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
1164 | /* Update error code */ |
| 1165 | 1165 | hcan->ErrorCode |= HAL_CAN_ERROR_TIMEOUT; |
|
| 1166 | return HAL_ERROR; |
1166 | |
| 1167 | } |
1167 | return HAL_ERROR; |
| 1168 | } |
1168 | } |
| 1169 | while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); |
1169 | } |
| 1170 | 1170 | while ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U); |
|
| 1171 | /* Return function status */ |
1171 | |
| 1172 | return HAL_OK; |
1172 | /* Return function status */ |
| 1173 | } |
1173 | return HAL_OK; |
| 1174 | else |
1174 | } |
| 1175 | { |
1175 | else |
| 1176 | /* Update error code */ |
1176 | { |
| 1177 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1177 | /* Update error code */ |
| 1178 | 1178 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
|
| 1179 | return HAL_ERROR; |
1179 | |
| 1180 | } |
1180 | return HAL_ERROR; |
| 1181 | } |
1181 | } |
| 1182 | 1182 | } |
|
| 1183 | /** |
1183 | |
| 1184 | * @brief Check is sleep mode is active. |
1184 | /** |
| 1185 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1185 | * @brief Check is sleep mode is active. |
| 1186 | * the configuration information for the specified CAN. |
1186 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 1187 | * @retval Status |
1187 | * the configuration information for the specified CAN. |
| 1188 | * - 0 : Sleep mode is not active. |
1188 | * @retval Status |
| 1189 | * - 1 : Sleep mode is active. |
1189 | * - 0 : Sleep mode is not active. |
| 1190 | */ |
1190 | * - 1 : Sleep mode is active. |
| 1191 | uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan) |
1191 | */ |
| 1192 | { |
1192 | uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan) |
| 1193 | uint32_t status = 0U; |
1193 | { |
| 1194 | HAL_CAN_StateTypeDef state = hcan->State; |
1194 | uint32_t status = 0U; |
| 1195 | 1195 | HAL_CAN_StateTypeDef state = hcan->State; |
|
| 1196 | if ((state == HAL_CAN_STATE_READY) || |
1196 | |
| 1197 | (state == HAL_CAN_STATE_LISTENING)) |
1197 | if ((state == HAL_CAN_STATE_READY) || |
| 1198 | { |
1198 | (state == HAL_CAN_STATE_LISTENING)) |
| 1199 | /* Check Sleep mode */ |
1199 | { |
| 1200 | if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
1200 | /* Check Sleep mode */ |
| 1201 | { |
1201 | if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
| 1202 | status = 1U; |
1202 | { |
| 1203 | } |
1203 | status = 1U; |
| 1204 | } |
1204 | } |
| 1205 | 1205 | } |
|
| 1206 | /* Return function status */ |
1206 | |
| 1207 | return status; |
1207 | /* Return function status */ |
| 1208 | } |
1208 | return status; |
| 1209 | 1209 | } |
|
| 1210 | /** |
1210 | |
| 1211 | * @brief Add a message to the first free Tx mailbox and activate the |
1211 | /** |
| 1212 | * corresponding transmission request. |
1212 | * @brief Add a message to the first free Tx mailbox and activate the |
| 1213 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1213 | * corresponding transmission request. |
| 1214 | * the configuration information for the specified CAN. |
1214 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 1215 | * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. |
1215 | * the configuration information for the specified CAN. |
| 1216 | * @param aData array containing the payload of the Tx frame. |
1216 | * @param pHeader pointer to a CAN_TxHeaderTypeDef structure. |
| 1217 | * @param pTxMailbox pointer to a variable where the function will return |
1217 | * @param aData array containing the payload of the Tx frame. |
| 1218 | * the TxMailbox used to store the Tx message. |
1218 | * @param pTxMailbox pointer to a variable where the function will return |
| 1219 | * This parameter can be a value of @arg CAN_Tx_Mailboxes. |
1219 | * the TxMailbox used to store the Tx message. |
| 1220 | * @retval HAL status |
1220 | * This parameter can be a value of @arg CAN_Tx_Mailboxes. |
| 1221 | */ |
1221 | * @retval HAL status |
| 1222 | HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox) |
1222 | */ |
| 1223 | { |
1223 | HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, |
| 1224 | uint32_t transmitmailbox; |
1224 | const uint8_t aData[], uint32_t *pTxMailbox) |
| 1225 | HAL_CAN_StateTypeDef state = hcan->State; |
1225 | { |
| 1226 | uint32_t tsr = READ_REG(hcan->Instance->TSR); |
1226 | uint32_t transmitmailbox; |
| 1227 | 1227 | HAL_CAN_StateTypeDef state = hcan->State; |
|
| 1228 | /* Check the parameters */ |
1228 | uint32_t tsr = READ_REG(hcan->Instance->TSR); |
| 1229 | assert_param(IS_CAN_IDTYPE(pHeader->IDE)); |
1229 | |
| 1230 | assert_param(IS_CAN_RTR(pHeader->RTR)); |
1230 | /* Check the parameters */ |
| 1231 | assert_param(IS_CAN_DLC(pHeader->DLC)); |
1231 | assert_param(IS_CAN_IDTYPE(pHeader->IDE)); |
| 1232 | if (pHeader->IDE == CAN_ID_STD) |
1232 | assert_param(IS_CAN_RTR(pHeader->RTR)); |
| 1233 | { |
1233 | assert_param(IS_CAN_DLC(pHeader->DLC)); |
| 1234 | assert_param(IS_CAN_STDID(pHeader->StdId)); |
1234 | if (pHeader->IDE == CAN_ID_STD) |
| 1235 | } |
1235 | { |
| 1236 | else |
1236 | assert_param(IS_CAN_STDID(pHeader->StdId)); |
| 1237 | { |
1237 | } |
| 1238 | assert_param(IS_CAN_EXTID(pHeader->ExtId)); |
1238 | else |
| 1239 | } |
1239 | { |
| 1240 | assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); |
1240 | assert_param(IS_CAN_EXTID(pHeader->ExtId)); |
| 1241 | 1241 | } |
|
| 1242 | if ((state == HAL_CAN_STATE_READY) || |
1242 | assert_param(IS_FUNCTIONAL_STATE(pHeader->TransmitGlobalTime)); |
| 1243 | (state == HAL_CAN_STATE_LISTENING)) |
1243 | |
| 1244 | { |
1244 | if ((state == HAL_CAN_STATE_READY) || |
| 1245 | /* Check that all the Tx mailboxes are not full */ |
1245 | (state == HAL_CAN_STATE_LISTENING)) |
| 1246 | if (((tsr & CAN_TSR_TME0) != 0U) || |
1246 | { |
| 1247 | ((tsr & CAN_TSR_TME1) != 0U) || |
1247 | /* Check that all the Tx mailboxes are not full */ |
| 1248 | ((tsr & CAN_TSR_TME2) != 0U)) |
1248 | if (((tsr & CAN_TSR_TME0) != 0U) || |
| 1249 | { |
1249 | ((tsr & CAN_TSR_TME1) != 0U) || |
| 1250 | /* Select an empty transmit mailbox */ |
1250 | ((tsr & CAN_TSR_TME2) != 0U)) |
| 1251 | transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; |
1251 | { |
| 1252 | 1252 | /* Select an empty transmit mailbox */ |
|
| 1253 | /* Check transmit mailbox value */ |
1253 | transmitmailbox = (tsr & CAN_TSR_CODE) >> CAN_TSR_CODE_Pos; |
| 1254 | if (transmitmailbox > 2U) |
1254 | |
| 1255 | { |
1255 | /* Store the Tx mailbox */ |
| 1256 | /* Update error code */ |
1256 | *pTxMailbox = (uint32_t)1 << transmitmailbox; |
| 1257 | hcan->ErrorCode |= HAL_CAN_ERROR_INTERNAL; |
1257 | |
| 1258 | 1258 | /* Set up the Id */ |
|
| 1259 | return HAL_ERROR; |
1259 | if (pHeader->IDE == CAN_ID_STD) |
| 1260 | } |
1260 | { |
| 1261 | 1261 | hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | |
|
| 1262 | /* Store the Tx mailbox */ |
1262 | pHeader->RTR); |
| 1263 | *pTxMailbox = (uint32_t)1 << transmitmailbox; |
1263 | } |
| 1264 | 1264 | else |
|
| 1265 | /* Set up the Id */ |
1265 | { |
| 1266 | if (pHeader->IDE == CAN_ID_STD) |
1266 | hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | |
| 1267 | { |
1267 | pHeader->IDE | |
| 1268 | hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->StdId << CAN_TI0R_STID_Pos) | |
1268 | pHeader->RTR); |
| 1269 | pHeader->RTR); |
1269 | } |
| 1270 | } |
1270 | |
| 1271 | else |
1271 | /* Set up the DLC */ |
| 1272 | { |
1272 | hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); |
| 1273 | hcan->Instance->sTxMailBox[transmitmailbox].TIR = ((pHeader->ExtId << CAN_TI0R_EXID_Pos) | |
1273 | |
| 1274 | pHeader->IDE | |
1274 | /* Set up the Transmit Global Time mode */ |
| 1275 | pHeader->RTR); |
1275 | if (pHeader->TransmitGlobalTime == ENABLE) |
| 1276 | } |
1276 | { |
| 1277 | 1277 | SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); |
|
| 1278 | /* Set up the DLC */ |
1278 | } |
| 1279 | hcan->Instance->sTxMailBox[transmitmailbox].TDTR = (pHeader->DLC); |
1279 | |
| 1280 | 1280 | /* Set up the data field */ |
|
| 1281 | /* Set up the Transmit Global Time mode */ |
1281 | WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, |
| 1282 | if (pHeader->TransmitGlobalTime == ENABLE) |
1282 | ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | |
| 1283 | { |
1283 | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | |
| 1284 | SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TDTR, CAN_TDT0R_TGT); |
1284 | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | |
| 1285 | } |
1285 | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); |
| 1286 | 1286 | WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, |
|
| 1287 | /* Set up the data field */ |
1287 | ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | |
| 1288 | WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDHR, |
1288 | ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | |
| 1289 | ((uint32_t)aData[7] << CAN_TDH0R_DATA7_Pos) | |
1289 | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | |
| 1290 | ((uint32_t)aData[6] << CAN_TDH0R_DATA6_Pos) | |
1290 | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); |
| 1291 | ((uint32_t)aData[5] << CAN_TDH0R_DATA5_Pos) | |
1291 | |
| 1292 | ((uint32_t)aData[4] << CAN_TDH0R_DATA4_Pos)); |
1292 | /* Request transmission */ |
| 1293 | WRITE_REG(hcan->Instance->sTxMailBox[transmitmailbox].TDLR, |
1293 | SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); |
| 1294 | ((uint32_t)aData[3] << CAN_TDL0R_DATA3_Pos) | |
1294 | |
| 1295 | ((uint32_t)aData[2] << CAN_TDL0R_DATA2_Pos) | |
1295 | /* Return function status */ |
| 1296 | ((uint32_t)aData[1] << CAN_TDL0R_DATA1_Pos) | |
1296 | return HAL_OK; |
| 1297 | ((uint32_t)aData[0] << CAN_TDL0R_DATA0_Pos)); |
1297 | } |
| 1298 | 1298 | else |
|
| 1299 | /* Request transmission */ |
1299 | { |
| 1300 | SET_BIT(hcan->Instance->sTxMailBox[transmitmailbox].TIR, CAN_TI0R_TXRQ); |
1300 | /* Update error code */ |
| 1301 | 1301 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
|
| 1302 | /* Return function status */ |
1302 | |
| 1303 | return HAL_OK; |
1303 | return HAL_ERROR; |
| 1304 | } |
1304 | } |
| 1305 | else |
1305 | } |
| 1306 | { |
1306 | else |
| 1307 | /* Update error code */ |
1307 | { |
| 1308 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
1308 | /* Update error code */ |
| 1309 | 1309 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
|
| 1310 | return HAL_ERROR; |
1310 | |
| 1311 | } |
1311 | return HAL_ERROR; |
| 1312 | } |
1312 | } |
| 1313 | else |
1313 | } |
| 1314 | { |
1314 | |
| 1315 | /* Update error code */ |
1315 | /** |
| 1316 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1316 | * @brief Abort transmission requests |
| 1317 | 1317 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
|
| 1318 | return HAL_ERROR; |
1318 | * the configuration information for the specified CAN. |
| 1319 | } |
1319 | * @param TxMailboxes List of the Tx Mailboxes to abort. |
| 1320 | } |
1320 | * This parameter can be any combination of @arg CAN_Tx_Mailboxes. |
| 1321 | 1321 | * @retval HAL status |
|
| 1322 | /** |
1322 | */ |
| 1323 | * @brief Abort transmission requests |
1323 | HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) |
| 1324 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1324 | { |
| 1325 | * the configuration information for the specified CAN. |
1325 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1326 | * @param TxMailboxes List of the Tx Mailboxes to abort. |
1326 | |
| 1327 | * This parameter can be any combination of @arg CAN_Tx_Mailboxes. |
1327 | /* Check function parameters */ |
| 1328 | * @retval HAL status |
1328 | assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); |
| 1329 | */ |
1329 | |
| 1330 | HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) |
1330 | if ((state == HAL_CAN_STATE_READY) || |
| 1331 | { |
1331 | (state == HAL_CAN_STATE_LISTENING)) |
| 1332 | HAL_CAN_StateTypeDef state = hcan->State; |
1332 | { |
| 1333 | 1333 | /* Check Tx Mailbox 0 */ |
|
| 1334 | /* Check function parameters */ |
1334 | if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) |
| 1335 | assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); |
1335 | { |
| 1336 | 1336 | /* Add cancellation request for Tx Mailbox 0 */ |
|
| 1337 | if ((state == HAL_CAN_STATE_READY) || |
1337 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); |
| 1338 | (state == HAL_CAN_STATE_LISTENING)) |
1338 | } |
| 1339 | { |
1339 | |
| 1340 | /* Check Tx Mailbox 0 */ |
1340 | /* Check Tx Mailbox 1 */ |
| 1341 | if ((TxMailboxes & CAN_TX_MAILBOX0) != 0U) |
1341 | if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) |
| 1342 | { |
1342 | { |
| 1343 | /* Add cancellation request for Tx Mailbox 0 */ |
1343 | /* Add cancellation request for Tx Mailbox 1 */ |
| 1344 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ0); |
1344 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); |
| 1345 | } |
1345 | } |
| 1346 | 1346 | ||
| 1347 | /* Check Tx Mailbox 1 */ |
1347 | /* Check Tx Mailbox 2 */ |
| 1348 | if ((TxMailboxes & CAN_TX_MAILBOX1) != 0U) |
1348 | if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) |
| 1349 | { |
1349 | { |
| 1350 | /* Add cancellation request for Tx Mailbox 1 */ |
1350 | /* Add cancellation request for Tx Mailbox 2 */ |
| 1351 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ1); |
1351 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); |
| 1352 | } |
1352 | } |
| 1353 | 1353 | ||
| 1354 | /* Check Tx Mailbox 2 */ |
1354 | /* Return function status */ |
| 1355 | if ((TxMailboxes & CAN_TX_MAILBOX2) != 0U) |
1355 | return HAL_OK; |
| 1356 | { |
1356 | } |
| 1357 | /* Add cancellation request for Tx Mailbox 2 */ |
1357 | else |
| 1358 | SET_BIT(hcan->Instance->TSR, CAN_TSR_ABRQ2); |
1358 | { |
| 1359 | } |
1359 | /* Update error code */ |
| 1360 | 1360 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
|
| 1361 | /* Return function status */ |
1361 | |
| 1362 | return HAL_OK; |
1362 | return HAL_ERROR; |
| 1363 | } |
1363 | } |
| 1364 | else |
1364 | } |
| 1365 | { |
1365 | |
| 1366 | /* Update error code */ |
1366 | /** |
| 1367 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1367 | * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. |
| 1368 | 1368 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
|
| 1369 | return HAL_ERROR; |
1369 | * the configuration information for the specified CAN. |
| 1370 | } |
1370 | * @retval Number of free Tx Mailboxes. |
| 1371 | } |
1371 | */ |
| 1372 | 1372 | uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan) |
|
| 1373 | /** |
1373 | { |
| 1374 | * @brief Return Tx Mailboxes free level: number of free Tx Mailboxes. |
1374 | uint32_t freelevel = 0U; |
| 1375 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1375 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1376 | * the configuration information for the specified CAN. |
1376 | |
| 1377 | * @retval Number of free Tx Mailboxes. |
1377 | if ((state == HAL_CAN_STATE_READY) || |
| 1378 | */ |
1378 | (state == HAL_CAN_STATE_LISTENING)) |
| 1379 | uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan) |
1379 | { |
| 1380 | { |
1380 | /* Check Tx Mailbox 0 status */ |
| 1381 | uint32_t freelevel = 0U; |
1381 | if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) |
| 1382 | HAL_CAN_StateTypeDef state = hcan->State; |
1382 | { |
| 1383 | 1383 | freelevel++; |
|
| 1384 | if ((state == HAL_CAN_STATE_READY) || |
1384 | } |
| 1385 | (state == HAL_CAN_STATE_LISTENING)) |
1385 | |
| 1386 | { |
1386 | /* Check Tx Mailbox 1 status */ |
| 1387 | /* Check Tx Mailbox 0 status */ |
1387 | if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) |
| 1388 | if ((hcan->Instance->TSR & CAN_TSR_TME0) != 0U) |
1388 | { |
| 1389 | { |
1389 | freelevel++; |
| 1390 | freelevel++; |
1390 | } |
| 1391 | } |
1391 | |
| 1392 | 1392 | /* Check Tx Mailbox 2 status */ |
|
| 1393 | /* Check Tx Mailbox 1 status */ |
1393 | if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) |
| 1394 | if ((hcan->Instance->TSR & CAN_TSR_TME1) != 0U) |
1394 | { |
| 1395 | { |
1395 | freelevel++; |
| 1396 | freelevel++; |
1396 | } |
| 1397 | } |
1397 | } |
| 1398 | 1398 | ||
| 1399 | /* Check Tx Mailbox 2 status */ |
1399 | /* Return Tx Mailboxes free level */ |
| 1400 | if ((hcan->Instance->TSR & CAN_TSR_TME2) != 0U) |
1400 | return freelevel; |
| 1401 | { |
1401 | } |
| 1402 | freelevel++; |
1402 | |
| 1403 | } |
1403 | /** |
| 1404 | } |
1404 | * @brief Check if a transmission request is pending on the selected Tx |
| 1405 | 1405 | * Mailboxes. |
|
| 1406 | /* Return Tx Mailboxes free level */ |
1406 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 1407 | return freelevel; |
1407 | * the configuration information for the specified CAN. |
| 1408 | } |
1408 | * @param TxMailboxes List of Tx Mailboxes to check. |
| 1409 | 1409 | * This parameter can be any combination of @arg CAN_Tx_Mailboxes. |
|
| 1410 | /** |
1410 | * @retval Status |
| 1411 | * @brief Check if a transmission request is pending on the selected Tx |
1411 | * - 0 : No pending transmission request on any selected Tx Mailboxes. |
| 1412 | * Mailboxes. |
1412 | * - 1 : Pending transmission request on at least one of the selected |
| 1413 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1413 | * Tx Mailbox. |
| 1414 | * the configuration information for the specified CAN. |
1414 | */ |
| 1415 | * @param TxMailboxes List of Tx Mailboxes to check. |
1415 | uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) |
| 1416 | * This parameter can be any combination of @arg CAN_Tx_Mailboxes. |
1416 | { |
| 1417 | * @retval Status |
1417 | uint32_t status = 0U; |
| 1418 | * - 0 : No pending transmission request on any selected Tx Mailboxes. |
1418 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1419 | * - 1 : Pending transmission request on at least one of the selected |
1419 | |
| 1420 | * Tx Mailbox. |
1420 | /* Check function parameters */ |
| 1421 | */ |
1421 | assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); |
| 1422 | uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes) |
1422 | |
| 1423 | { |
1423 | if ((state == HAL_CAN_STATE_READY) || |
| 1424 | uint32_t status = 0U; |
1424 | (state == HAL_CAN_STATE_LISTENING)) |
| 1425 | HAL_CAN_StateTypeDef state = hcan->State; |
1425 | { |
| 1426 | 1426 | /* Check pending transmission request on the selected Tx Mailboxes */ |
|
| 1427 | /* Check function parameters */ |
1427 | if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_Pos)) |
| 1428 | assert_param(IS_CAN_TX_MAILBOX_LIST(TxMailboxes)); |
1428 | { |
| 1429 | 1429 | status = 1U; |
|
| 1430 | if ((state == HAL_CAN_STATE_READY) || |
1430 | } |
| 1431 | (state == HAL_CAN_STATE_LISTENING)) |
1431 | } |
| 1432 | { |
1432 | |
| 1433 | /* Check pending transmission request on the selected Tx Mailboxes */ |
1433 | /* Return status */ |
| 1434 | if ((hcan->Instance->TSR & (TxMailboxes << CAN_TSR_TME0_Pos)) != (TxMailboxes << CAN_TSR_TME0_Pos)) |
1434 | return status; |
| 1435 | { |
1435 | } |
| 1436 | status = 1U; |
1436 | |
| 1437 | } |
1437 | /** |
| 1438 | } |
1438 | * @brief Return timestamp of Tx message sent, if time triggered communication |
| 1439 | 1439 | mode is enabled. |
|
| 1440 | /* Return status */ |
1440 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 1441 | return status; |
1441 | * the configuration information for the specified CAN. |
| 1442 | } |
1442 | * @param TxMailbox Tx Mailbox where the timestamp of message sent will be |
| 1443 | 1443 | * read. |
|
| 1444 | /** |
1444 | * This parameter can be one value of @arg CAN_Tx_Mailboxes. |
| 1445 | * @brief Return timestamp of Tx message sent, if time triggered communication |
1445 | * @retval Timestamp of message sent from Tx Mailbox. |
| 1446 | mode is enabled. |
1446 | */ |
| 1447 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1447 | uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox) |
| 1448 | * the configuration information for the specified CAN. |
1448 | { |
| 1449 | * @param TxMailbox Tx Mailbox where the timestamp of message sent will be |
1449 | uint32_t timestamp = 0U; |
| 1450 | * read. |
1450 | uint32_t transmitmailbox; |
| 1451 | * This parameter can be one value of @arg CAN_Tx_Mailboxes. |
1451 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1452 | * @retval Timestamp of message sent from Tx Mailbox. |
1452 | |
| 1453 | */ |
1453 | /* Check function parameters */ |
| 1454 | uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox) |
1454 | assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); |
| 1455 | { |
1455 | |
| 1456 | uint32_t timestamp = 0U; |
1456 | if ((state == HAL_CAN_STATE_READY) || |
| 1457 | uint32_t transmitmailbox; |
1457 | (state == HAL_CAN_STATE_LISTENING)) |
| 1458 | HAL_CAN_StateTypeDef state = hcan->State; |
1458 | { |
| 1459 | 1459 | /* Select the Tx mailbox */ |
|
| 1460 | /* Check function parameters */ |
1460 | transmitmailbox = POSITION_VAL(TxMailbox); |
| 1461 | assert_param(IS_CAN_TX_MAILBOX(TxMailbox)); |
1461 | |
| 1462 | 1462 | /* Get timestamp */ |
|
| 1463 | if ((state == HAL_CAN_STATE_READY) || |
1463 | timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TIME_Pos; |
| 1464 | (state == HAL_CAN_STATE_LISTENING)) |
1464 | } |
| 1465 | { |
1465 | |
| 1466 | /* Select the Tx mailbox */ |
1466 | /* Return the timestamp */ |
| 1467 | transmitmailbox = POSITION_VAL(TxMailbox); |
1467 | return timestamp; |
| 1468 | 1468 | } |
|
| 1469 | /* Get timestamp */ |
1469 | |
| 1470 | timestamp = (hcan->Instance->sTxMailBox[transmitmailbox].TDTR & CAN_TDT0R_TIME) >> CAN_TDT0R_TIME_Pos; |
1470 | /** |
| 1471 | } |
1471 | * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. |
| 1472 | 1472 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
|
| 1473 | /* Return the timestamp */ |
1473 | * the configuration information for the specified CAN. |
| 1474 | return timestamp; |
1474 | * @param RxFifo Fifo number of the received message to be read. |
| 1475 | } |
1475 | * This parameter can be a value of @arg CAN_receive_FIFO_number. |
| 1476 | 1476 | * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header |
|
| 1477 | /** |
1477 | * of the Rx frame will be stored. |
| 1478 | * @brief Get an CAN frame from the Rx FIFO zone into the message RAM. |
1478 | * @param aData array where the payload of the Rx frame will be stored. |
| 1479 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1479 | * @retval HAL status |
| 1480 | * the configuration information for the specified CAN. |
1480 | */ |
| 1481 | * @param RxFifo Fifo number of the received message to be read. |
1481 | HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, |
| 1482 | * This parameter can be a value of @arg CAN_receive_FIFO_number. |
1482 | CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) |
| 1483 | * @param pHeader pointer to a CAN_RxHeaderTypeDef structure where the header |
1483 | { |
| 1484 | * of the Rx frame will be stored. |
1484 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1485 | * @param aData array where the payload of the Rx frame will be stored. |
1485 | |
| 1486 | * @retval HAL status |
1486 | assert_param(IS_CAN_RX_FIFO(RxFifo)); |
| 1487 | */ |
1487 | |
| 1488 | HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]) |
1488 | if ((state == HAL_CAN_STATE_READY) || |
| 1489 | { |
1489 | (state == HAL_CAN_STATE_LISTENING)) |
| 1490 | HAL_CAN_StateTypeDef state = hcan->State; |
1490 | { |
| 1491 | 1491 | /* Check the Rx FIFO */ |
|
| 1492 | assert_param(IS_CAN_RX_FIFO(RxFifo)); |
1492 | if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ |
| 1493 | 1493 | { |
|
| 1494 | if ((state == HAL_CAN_STATE_READY) || |
1494 | /* Check that the Rx FIFO 0 is not empty */ |
| 1495 | (state == HAL_CAN_STATE_LISTENING)) |
1495 | if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) |
| 1496 | { |
1496 | { |
| 1497 | /* Check the Rx FIFO */ |
1497 | /* Update error code */ |
| 1498 | if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ |
1498 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
| 1499 | { |
1499 | |
| 1500 | /* Check that the Rx FIFO 0 is not empty */ |
1500 | return HAL_ERROR; |
| 1501 | if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) == 0U) |
1501 | } |
| 1502 | { |
1502 | } |
| 1503 | /* Update error code */ |
1503 | else /* Rx element is assigned to Rx FIFO 1 */ |
| 1504 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
1504 | { |
| 1505 | 1505 | /* Check that the Rx FIFO 1 is not empty */ |
|
| 1506 | return HAL_ERROR; |
1506 | if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) |
| 1507 | } |
1507 | { |
| 1508 | } |
1508 | /* Update error code */ |
| 1509 | else /* Rx element is assigned to Rx FIFO 1 */ |
1509 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
| 1510 | { |
1510 | |
| 1511 | /* Check that the Rx FIFO 1 is not empty */ |
1511 | return HAL_ERROR; |
| 1512 | if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) == 0U) |
1512 | } |
| 1513 | { |
1513 | } |
| 1514 | /* Update error code */ |
1514 | |
| 1515 | hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; |
1515 | /* Get the header */ |
| 1516 | 1516 | pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; |
|
| 1517 | return HAL_ERROR; |
1517 | if (pHeader->IDE == CAN_ID_STD) |
| 1518 | } |
1518 | { |
| 1519 | } |
1519 | pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; |
| 1520 | 1520 | } |
|
| 1521 | /* Get the header */ |
1521 | else |
| 1522 | pHeader->IDE = CAN_RI0R_IDE & hcan->Instance->sFIFOMailBox[RxFifo].RIR; |
1522 | { |
| 1523 | if (pHeader->IDE == CAN_ID_STD) |
1523 | pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & |
| 1524 | { |
1524 | hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; |
| 1525 | pHeader->StdId = (CAN_RI0R_STID & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_TI0R_STID_Pos; |
1525 | } |
| 1526 | } |
1526 | pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); |
| 1527 | else |
1527 | if (((CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos) >= 8U) |
| 1528 | { |
1528 | { |
| 1529 | pHeader->ExtId = ((CAN_RI0R_EXID | CAN_RI0R_STID) & hcan->Instance->sFIFOMailBox[RxFifo].RIR) >> CAN_RI0R_EXID_Pos; |
1529 | /* Truncate DLC to 8 if received field is over range */ |
| 1530 | } |
1530 | pHeader->DLC = 8U; |
| 1531 | pHeader->RTR = (CAN_RI0R_RTR & hcan->Instance->sFIFOMailBox[RxFifo].RIR); |
1531 | } |
| 1532 | pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; |
1532 | else |
| 1533 | pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; |
1533 | { |
| 1534 | pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; |
1534 | pHeader->DLC = (CAN_RDT0R_DLC & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_DLC_Pos; |
| 1535 | 1535 | } |
|
| 1536 | /* Get the data */ |
1536 | pHeader->FilterMatchIndex = (CAN_RDT0R_FMI & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_FMI_Pos; |
| 1537 | aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); |
1537 | pHeader->Timestamp = (CAN_RDT0R_TIME & hcan->Instance->sFIFOMailBox[RxFifo].RDTR) >> CAN_RDT0R_TIME_Pos; |
| 1538 | aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); |
1538 | |
| 1539 | aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); |
1539 | /* Get the data */ |
| 1540 | aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); |
1540 | aData[0] = (uint8_t)((CAN_RDL0R_DATA0 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA0_Pos); |
| 1541 | aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); |
1541 | aData[1] = (uint8_t)((CAN_RDL0R_DATA1 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA1_Pos); |
| 1542 | aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); |
1542 | aData[2] = (uint8_t)((CAN_RDL0R_DATA2 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA2_Pos); |
| 1543 | aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); |
1543 | aData[3] = (uint8_t)((CAN_RDL0R_DATA3 & hcan->Instance->sFIFOMailBox[RxFifo].RDLR) >> CAN_RDL0R_DATA3_Pos); |
| 1544 | aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); |
1544 | aData[4] = (uint8_t)((CAN_RDH0R_DATA4 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA4_Pos); |
| 1545 | 1545 | aData[5] = (uint8_t)((CAN_RDH0R_DATA5 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA5_Pos); |
|
| 1546 | /* Release the FIFO */ |
1546 | aData[6] = (uint8_t)((CAN_RDH0R_DATA6 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA6_Pos); |
| 1547 | if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ |
1547 | aData[7] = (uint8_t)((CAN_RDH0R_DATA7 & hcan->Instance->sFIFOMailBox[RxFifo].RDHR) >> CAN_RDH0R_DATA7_Pos); |
| 1548 | { |
1548 | |
| 1549 | /* Release RX FIFO 0 */ |
1549 | /* Release the FIFO */ |
| 1550 | SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); |
1550 | if (RxFifo == CAN_RX_FIFO0) /* Rx element is assigned to Rx FIFO 0 */ |
| 1551 | } |
1551 | { |
| 1552 | else /* Rx element is assigned to Rx FIFO 1 */ |
1552 | /* Release RX FIFO 0 */ |
| 1553 | { |
1553 | SET_BIT(hcan->Instance->RF0R, CAN_RF0R_RFOM0); |
| 1554 | /* Release RX FIFO 1 */ |
1554 | } |
| 1555 | SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); |
1555 | else /* Rx element is assigned to Rx FIFO 1 */ |
| 1556 | } |
1556 | { |
| 1557 | 1557 | /* Release RX FIFO 1 */ |
|
| 1558 | /* Return function status */ |
1558 | SET_BIT(hcan->Instance->RF1R, CAN_RF1R_RFOM1); |
| 1559 | return HAL_OK; |
1559 | } |
| 1560 | } |
1560 | |
| 1561 | else |
1561 | /* Return function status */ |
| 1562 | { |
1562 | return HAL_OK; |
| 1563 | /* Update error code */ |
1563 | } |
| 1564 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1564 | else |
| 1565 | 1565 | { |
|
| 1566 | return HAL_ERROR; |
1566 | /* Update error code */ |
| 1567 | } |
1567 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
| 1568 | } |
1568 | |
| 1569 | 1569 | return HAL_ERROR; |
|
| 1570 | /** |
1570 | } |
| 1571 | * @brief Return Rx FIFO fill level. |
1571 | } |
| 1572 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1572 | |
| 1573 | * the configuration information for the specified CAN. |
1573 | /** |
| 1574 | * @param RxFifo Rx FIFO. |
1574 | * @brief Return Rx FIFO fill level. |
| 1575 | * This parameter can be a value of @arg CAN_receive_FIFO_number. |
1575 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 1576 | * @retval Number of messages available in Rx FIFO. |
1576 | * the configuration information for the specified CAN. |
| 1577 | */ |
1577 | * @param RxFifo Rx FIFO. |
| 1578 | uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo) |
1578 | * This parameter can be a value of @arg CAN_receive_FIFO_number. |
| 1579 | { |
1579 | * @retval Number of messages available in Rx FIFO. |
| 1580 | uint32_t filllevel = 0U; |
1580 | */ |
| 1581 | HAL_CAN_StateTypeDef state = hcan->State; |
1581 | uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo) |
| 1582 | 1582 | { |
|
| 1583 | /* Check function parameters */ |
1583 | uint32_t filllevel = 0U; |
| 1584 | assert_param(IS_CAN_RX_FIFO(RxFifo)); |
1584 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1585 | 1585 | ||
| 1586 | if ((state == HAL_CAN_STATE_READY) || |
1586 | /* Check function parameters */ |
| 1587 | (state == HAL_CAN_STATE_LISTENING)) |
1587 | assert_param(IS_CAN_RX_FIFO(RxFifo)); |
| 1588 | { |
1588 | |
| 1589 | if (RxFifo == CAN_RX_FIFO0) |
1589 | if ((state == HAL_CAN_STATE_READY) || |
| 1590 | { |
1590 | (state == HAL_CAN_STATE_LISTENING)) |
| 1591 | filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; |
1591 | { |
| 1592 | } |
1592 | if (RxFifo == CAN_RX_FIFO0) |
| 1593 | else /* RxFifo == CAN_RX_FIFO1 */ |
1593 | { |
| 1594 | { |
1594 | filllevel = hcan->Instance->RF0R & CAN_RF0R_FMP0; |
| 1595 | filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; |
1595 | } |
| 1596 | } |
1596 | else /* RxFifo == CAN_RX_FIFO1 */ |
| 1597 | } |
1597 | { |
| 1598 | 1598 | filllevel = hcan->Instance->RF1R & CAN_RF1R_FMP1; |
|
| 1599 | /* Return Rx FIFO fill level */ |
1599 | } |
| 1600 | return filllevel; |
1600 | } |
| 1601 | } |
1601 | |
| 1602 | 1602 | /* Return Rx FIFO fill level */ |
|
| 1603 | /** |
1603 | return filllevel; |
| 1604 | * @} |
1604 | } |
| 1605 | */ |
1605 | |
| 1606 | 1606 | /** |
|
| 1607 | /** @defgroup CAN_Exported_Functions_Group4 Interrupts management |
1607 | * @} |
| 1608 | * @brief Interrupts management |
1608 | */ |
| 1609 | * |
1609 | |
| 1610 | @verbatim |
1610 | /** @defgroup CAN_Exported_Functions_Group4 Interrupts management |
| 1611 | ============================================================================== |
1611 | * @brief Interrupts management |
| 1612 | ##### Interrupts management ##### |
1612 | * |
| 1613 | ============================================================================== |
1613 | @verbatim |
| 1614 | [..] This section provides functions allowing to: |
1614 | ============================================================================== |
| 1615 | (+) HAL_CAN_ActivateNotification : Enable interrupts |
1615 | ##### Interrupts management ##### |
| 1616 | (+) HAL_CAN_DeactivateNotification : Disable interrupts |
1616 | ============================================================================== |
| 1617 | (+) HAL_CAN_IRQHandler : Handles CAN interrupt request |
1617 | [..] This section provides functions allowing to: |
| 1618 | 1618 | (+) HAL_CAN_ActivateNotification : Enable interrupts |
|
| 1619 | @endverbatim |
1619 | (+) HAL_CAN_DeactivateNotification : Disable interrupts |
| 1620 | * @{ |
1620 | (+) HAL_CAN_IRQHandler : Handles CAN interrupt request |
| 1621 | */ |
1621 | |
| 1622 | 1622 | @endverbatim |
|
| 1623 | /** |
1623 | * @{ |
| 1624 | * @brief Enable interrupts. |
1624 | */ |
| 1625 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1625 | |
| 1626 | * the configuration information for the specified CAN. |
1626 | /** |
| 1627 | * @param ActiveITs indicates which interrupts will be enabled. |
1627 | * @brief Enable interrupts. |
| 1628 | * This parameter can be any combination of @arg CAN_Interrupts. |
1628 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 1629 | * @retval HAL status |
1629 | * the configuration information for the specified CAN. |
| 1630 | */ |
1630 | * @param ActiveITs indicates which interrupts will be enabled. |
| 1631 | HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) |
1631 | * This parameter can be any combination of @arg CAN_Interrupts. |
| 1632 | { |
1632 | * @retval HAL status |
| 1633 | HAL_CAN_StateTypeDef state = hcan->State; |
1633 | */ |
| 1634 | 1634 | HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs) |
|
| 1635 | /* Check function parameters */ |
1635 | { |
| 1636 | assert_param(IS_CAN_IT(ActiveITs)); |
1636 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1637 | 1637 | ||
| 1638 | if ((state == HAL_CAN_STATE_READY) || |
1638 | /* Check function parameters */ |
| 1639 | (state == HAL_CAN_STATE_LISTENING)) |
1639 | assert_param(IS_CAN_IT(ActiveITs)); |
| 1640 | { |
1640 | |
| 1641 | /* Enable the selected interrupts */ |
1641 | if ((state == HAL_CAN_STATE_READY) || |
| 1642 | __HAL_CAN_ENABLE_IT(hcan, ActiveITs); |
1642 | (state == HAL_CAN_STATE_LISTENING)) |
| 1643 | 1643 | { |
|
| 1644 | /* Return function status */ |
1644 | /* Enable the selected interrupts */ |
| 1645 | return HAL_OK; |
1645 | __HAL_CAN_ENABLE_IT(hcan, ActiveITs); |
| 1646 | } |
1646 | |
| 1647 | else |
1647 | /* Return function status */ |
| 1648 | { |
1648 | return HAL_OK; |
| 1649 | /* Update error code */ |
1649 | } |
| 1650 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1650 | else |
| 1651 | 1651 | { |
|
| 1652 | return HAL_ERROR; |
1652 | /* Update error code */ |
| 1653 | } |
1653 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
| 1654 | } |
1654 | |
| 1655 | 1655 | return HAL_ERROR; |
|
| 1656 | /** |
1656 | } |
| 1657 | * @brief Disable interrupts. |
1657 | } |
| 1658 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
1658 | |
| 1659 | * the configuration information for the specified CAN. |
1659 | /** |
| 1660 | * @param InactiveITs indicates which interrupts will be disabled. |
1660 | * @brief Disable interrupts. |
| 1661 | * This parameter can be any combination of @arg CAN_Interrupts. |
1661 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 1662 | * @retval HAL status |
1662 | * the configuration information for the specified CAN. |
| 1663 | */ |
1663 | * @param InactiveITs indicates which interrupts will be disabled. |
| 1664 | HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) |
1664 | * This parameter can be any combination of @arg CAN_Interrupts. |
| 1665 | { |
1665 | * @retval HAL status |
| 1666 | HAL_CAN_StateTypeDef state = hcan->State; |
1666 | */ |
| 1667 | 1667 | HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs) |
|
| 1668 | /* Check function parameters */ |
1668 | { |
| 1669 | assert_param(IS_CAN_IT(InactiveITs)); |
1669 | HAL_CAN_StateTypeDef state = hcan->State; |
| 1670 | 1670 | ||
| 1671 | if ((state == HAL_CAN_STATE_READY) || |
1671 | /* Check function parameters */ |
| 1672 | (state == HAL_CAN_STATE_LISTENING)) |
1672 | assert_param(IS_CAN_IT(InactiveITs)); |
| 1673 | { |
1673 | |
| 1674 | /* Disable the selected interrupts */ |
1674 | if ((state == HAL_CAN_STATE_READY) || |
| 1675 | __HAL_CAN_DISABLE_IT(hcan, InactiveITs); |
1675 | (state == HAL_CAN_STATE_LISTENING)) |
| 1676 | 1676 | { |
|
| 1677 | /* Return function status */ |
1677 | /* Disable the selected interrupts */ |
| 1678 | return HAL_OK; |
1678 | __HAL_CAN_DISABLE_IT(hcan, InactiveITs); |
| 1679 | } |
1679 | |
| 1680 | else |
1680 | /* Return function status */ |
| 1681 | { |
1681 | return HAL_OK; |
| 1682 | /* Update error code */ |
1682 | } |
| 1683 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
1683 | else |
| 1684 | 1684 | { |
|
| 1685 | return HAL_ERROR; |
1685 | /* Update error code */ |
| 1686 | } |
1686 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
| 1687 | } |
1687 | |
| 1688 | 1688 | return HAL_ERROR; |
|
| 1689 | /** |
1689 | } |
| 1690 | * @brief Handles CAN interrupt request |
1690 | } |
| 1691 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
1691 | |
| 1692 | * the configuration information for the specified CAN. |
1692 | /** |
| 1693 | * @retval None |
1693 | * @brief Handles CAN interrupt request |
| 1694 | */ |
1694 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 1695 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) |
1695 | * the configuration information for the specified CAN. |
| 1696 | { |
1696 | * @retval None |
| 1697 | uint32_t errorcode = HAL_CAN_ERROR_NONE; |
1697 | */ |
| 1698 | uint32_t interrupts = READ_REG(hcan->Instance->IER); |
1698 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan) |
| 1699 | uint32_t msrflags = READ_REG(hcan->Instance->MSR); |
1699 | { |
| 1700 | uint32_t tsrflags = READ_REG(hcan->Instance->TSR); |
1700 | uint32_t errorcode = HAL_CAN_ERROR_NONE; |
| 1701 | uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); |
1701 | uint32_t interrupts = READ_REG(hcan->Instance->IER); |
| 1702 | uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); |
1702 | uint32_t msrflags = READ_REG(hcan->Instance->MSR); |
| 1703 | uint32_t esrflags = READ_REG(hcan->Instance->ESR); |
1703 | uint32_t tsrflags = READ_REG(hcan->Instance->TSR); |
| 1704 | 1704 | uint32_t rf0rflags = READ_REG(hcan->Instance->RF0R); |
|
| 1705 | /* Transmit Mailbox empty interrupt management *****************************/ |
1705 | uint32_t rf1rflags = READ_REG(hcan->Instance->RF1R); |
| 1706 | if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) |
1706 | uint32_t esrflags = READ_REG(hcan->Instance->ESR); |
| 1707 | { |
1707 | |
| 1708 | /* Transmit Mailbox 0 management *****************************************/ |
1708 | /* Transmit Mailbox empty interrupt management *****************************/ |
| 1709 | if ((tsrflags & CAN_TSR_RQCP0) != 0U) |
1709 | if ((interrupts & CAN_IT_TX_MAILBOX_EMPTY) != 0U) |
| 1710 | { |
1710 | { |
| 1711 | /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ |
1711 | /* Transmit Mailbox 0 management *****************************************/ |
| 1712 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); |
1712 | if ((tsrflags & CAN_TSR_RQCP0) != 0U) |
| 1713 | 1713 | { |
|
| 1714 | if ((tsrflags & CAN_TSR_TXOK0) != 0U) |
1714 | /* Clear the Transmission Complete flag (and TXOK0,ALST0,TERR0 bits) */ |
| 1715 | { |
1715 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP0); |
| 1716 | /* Transmission Mailbox 0 complete callback */ |
1716 | |
| 1717 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1717 | if ((tsrflags & CAN_TSR_TXOK0) != 0U) |
| 1718 | /* Call registered callback*/ |
1718 | { |
| 1719 | hcan->TxMailbox0CompleteCallback(hcan); |
1719 | /* Transmission Mailbox 0 complete callback */ |
| 1720 | #else |
1720 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1721 | /* Call weak (surcharged) callback */ |
1721 | /* Call registered callback*/ |
| 1722 | HAL_CAN_TxMailbox0CompleteCallback(hcan); |
1722 | hcan->TxMailbox0CompleteCallback(hcan); |
| 1723 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1723 | #else |
| 1724 | } |
1724 | /* Call weak (surcharged) callback */ |
| 1725 | else |
1725 | HAL_CAN_TxMailbox0CompleteCallback(hcan); |
| 1726 | { |
1726 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 1727 | if ((tsrflags & CAN_TSR_ALST0) != 0U) |
1727 | } |
| 1728 | { |
1728 | else |
| 1729 | /* Update error code */ |
1729 | { |
| 1730 | errorcode |= HAL_CAN_ERROR_TX_ALST0; |
1730 | if ((tsrflags & CAN_TSR_ALST0) != 0U) |
| 1731 | } |
1731 | { |
| 1732 | else if ((tsrflags & CAN_TSR_TERR0) != 0U) |
1732 | /* Update error code */ |
| 1733 | { |
1733 | errorcode |= HAL_CAN_ERROR_TX_ALST0; |
| 1734 | /* Update error code */ |
1734 | } |
| 1735 | errorcode |= HAL_CAN_ERROR_TX_TERR0; |
1735 | else if ((tsrflags & CAN_TSR_TERR0) != 0U) |
| 1736 | } |
1736 | { |
| 1737 | else |
1737 | /* Update error code */ |
| 1738 | { |
1738 | errorcode |= HAL_CAN_ERROR_TX_TERR0; |
| 1739 | /* Transmission Mailbox 0 abort callback */ |
1739 | } |
| 1740 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1740 | else |
| 1741 | /* Call registered callback*/ |
1741 | { |
| 1742 | hcan->TxMailbox0AbortCallback(hcan); |
1742 | /* Transmission Mailbox 0 abort callback */ |
| 1743 | #else |
1743 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1744 | /* Call weak (surcharged) callback */ |
1744 | /* Call registered callback*/ |
| 1745 | HAL_CAN_TxMailbox0AbortCallback(hcan); |
1745 | hcan->TxMailbox0AbortCallback(hcan); |
| 1746 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1746 | #else |
| 1747 | } |
1747 | /* Call weak (surcharged) callback */ |
| 1748 | } |
1748 | HAL_CAN_TxMailbox0AbortCallback(hcan); |
| 1749 | } |
1749 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 1750 | 1750 | } |
|
| 1751 | /* Transmit Mailbox 1 management *****************************************/ |
1751 | } |
| 1752 | if ((tsrflags & CAN_TSR_RQCP1) != 0U) |
1752 | } |
| 1753 | { |
1753 | |
| 1754 | /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ |
1754 | /* Transmit Mailbox 1 management *****************************************/ |
| 1755 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); |
1755 | if ((tsrflags & CAN_TSR_RQCP1) != 0U) |
| 1756 | 1756 | { |
|
| 1757 | if ((tsrflags & CAN_TSR_TXOK1) != 0U) |
1757 | /* Clear the Transmission Complete flag (and TXOK1,ALST1,TERR1 bits) */ |
| 1758 | { |
1758 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP1); |
| 1759 | /* Transmission Mailbox 1 complete callback */ |
1759 | |
| 1760 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1760 | if ((tsrflags & CAN_TSR_TXOK1) != 0U) |
| 1761 | /* Call registered callback*/ |
1761 | { |
| 1762 | hcan->TxMailbox1CompleteCallback(hcan); |
1762 | /* Transmission Mailbox 1 complete callback */ |
| 1763 | #else |
1763 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1764 | /* Call weak (surcharged) callback */ |
1764 | /* Call registered callback*/ |
| 1765 | HAL_CAN_TxMailbox1CompleteCallback(hcan); |
1765 | hcan->TxMailbox1CompleteCallback(hcan); |
| 1766 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1766 | #else |
| 1767 | } |
1767 | /* Call weak (surcharged) callback */ |
| 1768 | else |
1768 | HAL_CAN_TxMailbox1CompleteCallback(hcan); |
| 1769 | { |
1769 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 1770 | if ((tsrflags & CAN_TSR_ALST1) != 0U) |
1770 | } |
| 1771 | { |
1771 | else |
| 1772 | /* Update error code */ |
1772 | { |
| 1773 | errorcode |= HAL_CAN_ERROR_TX_ALST1; |
1773 | if ((tsrflags & CAN_TSR_ALST1) != 0U) |
| 1774 | } |
1774 | { |
| 1775 | else if ((tsrflags & CAN_TSR_TERR1) != 0U) |
1775 | /* Update error code */ |
| 1776 | { |
1776 | errorcode |= HAL_CAN_ERROR_TX_ALST1; |
| 1777 | /* Update error code */ |
1777 | } |
| 1778 | errorcode |= HAL_CAN_ERROR_TX_TERR1; |
1778 | else if ((tsrflags & CAN_TSR_TERR1) != 0U) |
| 1779 | } |
1779 | { |
| 1780 | else |
1780 | /* Update error code */ |
| 1781 | { |
1781 | errorcode |= HAL_CAN_ERROR_TX_TERR1; |
| 1782 | /* Transmission Mailbox 1 abort callback */ |
1782 | } |
| 1783 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1783 | else |
| 1784 | /* Call registered callback*/ |
1784 | { |
| 1785 | hcan->TxMailbox1AbortCallback(hcan); |
1785 | /* Transmission Mailbox 1 abort callback */ |
| 1786 | #else |
1786 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1787 | /* Call weak (surcharged) callback */ |
1787 | /* Call registered callback*/ |
| 1788 | HAL_CAN_TxMailbox1AbortCallback(hcan); |
1788 | hcan->TxMailbox1AbortCallback(hcan); |
| 1789 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1789 | #else |
| 1790 | } |
1790 | /* Call weak (surcharged) callback */ |
| 1791 | } |
1791 | HAL_CAN_TxMailbox1AbortCallback(hcan); |
| 1792 | } |
1792 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 1793 | 1793 | } |
|
| 1794 | /* Transmit Mailbox 2 management *****************************************/ |
1794 | } |
| 1795 | if ((tsrflags & CAN_TSR_RQCP2) != 0U) |
1795 | } |
| 1796 | { |
1796 | |
| 1797 | /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ |
1797 | /* Transmit Mailbox 2 management *****************************************/ |
| 1798 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); |
1798 | if ((tsrflags & CAN_TSR_RQCP2) != 0U) |
| 1799 | 1799 | { |
|
| 1800 | if ((tsrflags & CAN_TSR_TXOK2) != 0U) |
1800 | /* Clear the Transmission Complete flag (and TXOK2,ALST2,TERR2 bits) */ |
| 1801 | { |
1801 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_RQCP2); |
| 1802 | /* Transmission Mailbox 2 complete callback */ |
1802 | |
| 1803 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1803 | if ((tsrflags & CAN_TSR_TXOK2) != 0U) |
| 1804 | /* Call registered callback*/ |
1804 | { |
| 1805 | hcan->TxMailbox2CompleteCallback(hcan); |
1805 | /* Transmission Mailbox 2 complete callback */ |
| 1806 | #else |
1806 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1807 | /* Call weak (surcharged) callback */ |
1807 | /* Call registered callback*/ |
| 1808 | HAL_CAN_TxMailbox2CompleteCallback(hcan); |
1808 | hcan->TxMailbox2CompleteCallback(hcan); |
| 1809 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1809 | #else |
| 1810 | } |
1810 | /* Call weak (surcharged) callback */ |
| 1811 | else |
1811 | HAL_CAN_TxMailbox2CompleteCallback(hcan); |
| 1812 | { |
1812 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 1813 | if ((tsrflags & CAN_TSR_ALST2) != 0U) |
1813 | } |
| 1814 | { |
1814 | else |
| 1815 | /* Update error code */ |
1815 | { |
| 1816 | errorcode |= HAL_CAN_ERROR_TX_ALST2; |
1816 | if ((tsrflags & CAN_TSR_ALST2) != 0U) |
| 1817 | } |
1817 | { |
| 1818 | else if ((tsrflags & CAN_TSR_TERR2) != 0U) |
1818 | /* Update error code */ |
| 1819 | { |
1819 | errorcode |= HAL_CAN_ERROR_TX_ALST2; |
| 1820 | /* Update error code */ |
1820 | } |
| 1821 | errorcode |= HAL_CAN_ERROR_TX_TERR2; |
1821 | else if ((tsrflags & CAN_TSR_TERR2) != 0U) |
| 1822 | } |
1822 | { |
| 1823 | else |
1823 | /* Update error code */ |
| 1824 | { |
1824 | errorcode |= HAL_CAN_ERROR_TX_TERR2; |
| 1825 | /* Transmission Mailbox 2 abort callback */ |
1825 | } |
| 1826 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1826 | else |
| 1827 | /* Call registered callback*/ |
1827 | { |
| 1828 | hcan->TxMailbox2AbortCallback(hcan); |
1828 | /* Transmission Mailbox 2 abort callback */ |
| 1829 | #else |
1829 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1830 | /* Call weak (surcharged) callback */ |
1830 | /* Call registered callback*/ |
| 1831 | HAL_CAN_TxMailbox2AbortCallback(hcan); |
1831 | hcan->TxMailbox2AbortCallback(hcan); |
| 1832 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1832 | #else |
| 1833 | } |
1833 | /* Call weak (surcharged) callback */ |
| 1834 | } |
1834 | HAL_CAN_TxMailbox2AbortCallback(hcan); |
| 1835 | } |
1835 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 1836 | } |
1836 | } |
| 1837 | 1837 | } |
|
| 1838 | /* Receive FIFO 0 overrun interrupt management *****************************/ |
1838 | } |
| 1839 | if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) |
1839 | } |
| 1840 | { |
1840 | |
| 1841 | if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) |
1841 | /* Receive FIFO 0 overrun interrupt management *****************************/ |
| 1842 | { |
1842 | if ((interrupts & CAN_IT_RX_FIFO0_OVERRUN) != 0U) |
| 1843 | /* Set CAN error code to Rx Fifo 0 overrun error */ |
1843 | { |
| 1844 | errorcode |= HAL_CAN_ERROR_RX_FOV0; |
1844 | if ((rf0rflags & CAN_RF0R_FOVR0) != 0U) |
| 1845 | 1845 | { |
|
| 1846 | /* Clear FIFO0 Overrun Flag */ |
1846 | /* Set CAN error code to Rx Fifo 0 overrun error */ |
| 1847 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); |
1847 | errorcode |= HAL_CAN_ERROR_RX_FOV0; |
| 1848 | } |
1848 | |
| 1849 | } |
1849 | /* Clear FIFO0 Overrun Flag */ |
| 1850 | 1850 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV0); |
|
| 1851 | /* Receive FIFO 0 full interrupt management ********************************/ |
1851 | } |
| 1852 | if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) |
1852 | } |
| 1853 | { |
1853 | |
| 1854 | if ((rf0rflags & CAN_RF0R_FULL0) != 0U) |
1854 | /* Receive FIFO 0 full interrupt management ********************************/ |
| 1855 | { |
1855 | if ((interrupts & CAN_IT_RX_FIFO0_FULL) != 0U) |
| 1856 | /* Clear FIFO 0 full Flag */ |
1856 | { |
| 1857 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); |
1857 | if ((rf0rflags & CAN_RF0R_FULL0) != 0U) |
| 1858 | 1858 | { |
|
| 1859 | /* Receive FIFO 0 full Callback */ |
1859 | /* Clear FIFO 0 full Flag */ |
| 1860 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1860 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF0); |
| 1861 | /* Call registered callback*/ |
1861 | |
| 1862 | hcan->RxFifo0FullCallback(hcan); |
1862 | /* Receive FIFO 0 full Callback */ |
| 1863 | #else |
1863 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1864 | /* Call weak (surcharged) callback */ |
1864 | /* Call registered callback*/ |
| 1865 | HAL_CAN_RxFifo0FullCallback(hcan); |
1865 | hcan->RxFifo0FullCallback(hcan); |
| 1866 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1866 | #else |
| 1867 | } |
1867 | /* Call weak (surcharged) callback */ |
| 1868 | } |
1868 | HAL_CAN_RxFifo0FullCallback(hcan); |
| 1869 | 1869 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 1870 | /* Receive FIFO 0 message pending interrupt management *********************/ |
1870 | } |
| 1871 | if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) |
1871 | } |
| 1872 | { |
1872 | |
| 1873 | /* Check if message is still pending */ |
1873 | /* Receive FIFO 0 message pending interrupt management *********************/ |
| 1874 | if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) |
1874 | if ((interrupts & CAN_IT_RX_FIFO0_MSG_PENDING) != 0U) |
| 1875 | { |
1875 | { |
| 1876 | /* Receive FIFO 0 message pending Callback */ |
1876 | /* Check if message is still pending */ |
| 1877 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1877 | if ((hcan->Instance->RF0R & CAN_RF0R_FMP0) != 0U) |
| 1878 | /* Call registered callback*/ |
1878 | { |
| 1879 | hcan->RxFifo0MsgPendingCallback(hcan); |
1879 | /* Receive FIFO 0 message pending Callback */ |
| 1880 | #else |
1880 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1881 | /* Call weak (surcharged) callback */ |
1881 | /* Call registered callback*/ |
| 1882 | HAL_CAN_RxFifo0MsgPendingCallback(hcan); |
1882 | hcan->RxFifo0MsgPendingCallback(hcan); |
| 1883 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1883 | #else |
| 1884 | } |
1884 | /* Call weak (surcharged) callback */ |
| 1885 | } |
1885 | HAL_CAN_RxFifo0MsgPendingCallback(hcan); |
| 1886 | 1886 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 1887 | /* Receive FIFO 1 overrun interrupt management *****************************/ |
1887 | } |
| 1888 | if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) |
1888 | } |
| 1889 | { |
1889 | |
| 1890 | if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) |
1890 | /* Receive FIFO 1 overrun interrupt management *****************************/ |
| 1891 | { |
1891 | if ((interrupts & CAN_IT_RX_FIFO1_OVERRUN) != 0U) |
| 1892 | /* Set CAN error code to Rx Fifo 1 overrun error */ |
1892 | { |
| 1893 | errorcode |= HAL_CAN_ERROR_RX_FOV1; |
1893 | if ((rf1rflags & CAN_RF1R_FOVR1) != 0U) |
| 1894 | 1894 | { |
|
| 1895 | /* Clear FIFO1 Overrun Flag */ |
1895 | /* Set CAN error code to Rx Fifo 1 overrun error */ |
| 1896 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); |
1896 | errorcode |= HAL_CAN_ERROR_RX_FOV1; |
| 1897 | } |
1897 | |
| 1898 | } |
1898 | /* Clear FIFO1 Overrun Flag */ |
| 1899 | 1899 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FOV1); |
|
| 1900 | /* Receive FIFO 1 full interrupt management ********************************/ |
1900 | } |
| 1901 | if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) |
1901 | } |
| 1902 | { |
1902 | |
| 1903 | if ((rf1rflags & CAN_RF1R_FULL1) != 0U) |
1903 | /* Receive FIFO 1 full interrupt management ********************************/ |
| 1904 | { |
1904 | if ((interrupts & CAN_IT_RX_FIFO1_FULL) != 0U) |
| 1905 | /* Clear FIFO 1 full Flag */ |
1905 | { |
| 1906 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); |
1906 | if ((rf1rflags & CAN_RF1R_FULL1) != 0U) |
| 1907 | 1907 | { |
|
| 1908 | /* Receive FIFO 1 full Callback */ |
1908 | /* Clear FIFO 1 full Flag */ |
| 1909 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1909 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_FF1); |
| 1910 | /* Call registered callback*/ |
1910 | |
| 1911 | hcan->RxFifo1FullCallback(hcan); |
1911 | /* Receive FIFO 1 full Callback */ |
| 1912 | #else |
1912 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1913 | /* Call weak (surcharged) callback */ |
1913 | /* Call registered callback*/ |
| 1914 | HAL_CAN_RxFifo1FullCallback(hcan); |
1914 | hcan->RxFifo1FullCallback(hcan); |
| 1915 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1915 | #else |
| 1916 | } |
1916 | /* Call weak (surcharged) callback */ |
| 1917 | } |
1917 | HAL_CAN_RxFifo1FullCallback(hcan); |
| 1918 | 1918 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 1919 | /* Receive FIFO 1 message pending interrupt management *********************/ |
1919 | } |
| 1920 | if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) |
1920 | } |
| 1921 | { |
1921 | |
| 1922 | /* Check if message is still pending */ |
1922 | /* Receive FIFO 1 message pending interrupt management *********************/ |
| 1923 | if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) |
1923 | if ((interrupts & CAN_IT_RX_FIFO1_MSG_PENDING) != 0U) |
| 1924 | { |
1924 | { |
| 1925 | /* Receive FIFO 1 message pending Callback */ |
1925 | /* Check if message is still pending */ |
| 1926 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1926 | if ((hcan->Instance->RF1R & CAN_RF1R_FMP1) != 0U) |
| 1927 | /* Call registered callback*/ |
1927 | { |
| 1928 | hcan->RxFifo1MsgPendingCallback(hcan); |
1928 | /* Receive FIFO 1 message pending Callback */ |
| 1929 | #else |
1929 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1930 | /* Call weak (surcharged) callback */ |
1930 | /* Call registered callback*/ |
| 1931 | HAL_CAN_RxFifo1MsgPendingCallback(hcan); |
1931 | hcan->RxFifo1MsgPendingCallback(hcan); |
| 1932 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1932 | #else |
| 1933 | } |
1933 | /* Call weak (surcharged) callback */ |
| 1934 | } |
1934 | HAL_CAN_RxFifo1MsgPendingCallback(hcan); |
| 1935 | 1935 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 1936 | /* Sleep interrupt management *********************************************/ |
1936 | } |
| 1937 | if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) |
1937 | } |
| 1938 | { |
1938 | |
| 1939 | if ((msrflags & CAN_MSR_SLAKI) != 0U) |
1939 | /* Sleep interrupt management *********************************************/ |
| 1940 | { |
1940 | if ((interrupts & CAN_IT_SLEEP_ACK) != 0U) |
| 1941 | /* Clear Sleep interrupt Flag */ |
1941 | { |
| 1942 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); |
1942 | if ((msrflags & CAN_MSR_SLAKI) != 0U) |
| 1943 | 1943 | { |
|
| 1944 | /* Sleep Callback */ |
1944 | /* Clear Sleep interrupt Flag */ |
| 1945 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1945 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_SLAKI); |
| 1946 | /* Call registered callback*/ |
1946 | |
| 1947 | hcan->SleepCallback(hcan); |
1947 | /* Sleep Callback */ |
| 1948 | #else |
1948 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1949 | /* Call weak (surcharged) callback */ |
1949 | /* Call registered callback*/ |
| 1950 | HAL_CAN_SleepCallback(hcan); |
1950 | hcan->SleepCallback(hcan); |
| 1951 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1951 | #else |
| 1952 | } |
1952 | /* Call weak (surcharged) callback */ |
| 1953 | } |
1953 | HAL_CAN_SleepCallback(hcan); |
| 1954 | 1954 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 1955 | /* WakeUp interrupt management *********************************************/ |
1955 | } |
| 1956 | if ((interrupts & CAN_IT_WAKEUP) != 0U) |
1956 | } |
| 1957 | { |
1957 | |
| 1958 | if ((msrflags & CAN_MSR_WKUI) != 0U) |
1958 | /* WakeUp interrupt management *********************************************/ |
| 1959 | { |
1959 | if ((interrupts & CAN_IT_WAKEUP) != 0U) |
| 1960 | /* Clear WakeUp Flag */ |
1960 | { |
| 1961 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); |
1961 | if ((msrflags & CAN_MSR_WKUI) != 0U) |
| 1962 | 1962 | { |
|
| 1963 | /* WakeUp Callback */ |
1963 | /* Clear WakeUp Flag */ |
| 1964 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
1964 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_WKU); |
| 1965 | /* Call registered callback*/ |
1965 | |
| 1966 | hcan->WakeUpFromRxMsgCallback(hcan); |
1966 | /* WakeUp Callback */ |
| 1967 | #else |
1967 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 1968 | /* Call weak (surcharged) callback */ |
1968 | /* Call registered callback*/ |
| 1969 | HAL_CAN_WakeUpFromRxMsgCallback(hcan); |
1969 | hcan->WakeUpFromRxMsgCallback(hcan); |
| 1970 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
1970 | #else |
| 1971 | } |
1971 | /* Call weak (surcharged) callback */ |
| 1972 | } |
1972 | HAL_CAN_WakeUpFromRxMsgCallback(hcan); |
| 1973 | 1973 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 1974 | /* Error interrupts management *********************************************/ |
1974 | } |
| 1975 | if ((interrupts & CAN_IT_ERROR) != 0U) |
1975 | } |
| 1976 | { |
1976 | |
| 1977 | if ((msrflags & CAN_MSR_ERRI) != 0U) |
1977 | /* Error interrupts management *********************************************/ |
| 1978 | { |
1978 | if ((interrupts & CAN_IT_ERROR) != 0U) |
| 1979 | /* Check Error Warning Flag */ |
1979 | { |
| 1980 | if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && |
1980 | if ((msrflags & CAN_MSR_ERRI) != 0U) |
| 1981 | ((esrflags & CAN_ESR_EWGF) != 0U)) |
1981 | { |
| 1982 | { |
1982 | /* Check Error Warning Flag */ |
| 1983 | /* Set CAN error code to Error Warning */ |
1983 | if (((interrupts & CAN_IT_ERROR_WARNING) != 0U) && |
| 1984 | errorcode |= HAL_CAN_ERROR_EWG; |
1984 | ((esrflags & CAN_ESR_EWGF) != 0U)) |
| 1985 | 1985 | { |
|
| 1986 | /* No need for clear of Error Warning Flag as read-only */ |
1986 | /* Set CAN error code to Error Warning */ |
| 1987 | } |
1987 | errorcode |= HAL_CAN_ERROR_EWG; |
| 1988 | 1988 | ||
| 1989 | /* Check Error Passive Flag */ |
1989 | /* No need for clear of Error Warning Flag as read-only */ |
| 1990 | if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && |
1990 | } |
| 1991 | ((esrflags & CAN_ESR_EPVF) != 0U)) |
1991 | |
| 1992 | { |
1992 | /* Check Error Passive Flag */ |
| 1993 | /* Set CAN error code to Error Passive */ |
1993 | if (((interrupts & CAN_IT_ERROR_PASSIVE) != 0U) && |
| 1994 | errorcode |= HAL_CAN_ERROR_EPV; |
1994 | ((esrflags & CAN_ESR_EPVF) != 0U)) |
| 1995 | 1995 | { |
|
| 1996 | /* No need for clear of Error Passive Flag as read-only */ |
1996 | /* Set CAN error code to Error Passive */ |
| 1997 | } |
1997 | errorcode |= HAL_CAN_ERROR_EPV; |
| 1998 | 1998 | ||
| 1999 | /* Check Bus-off Flag */ |
1999 | /* No need for clear of Error Passive Flag as read-only */ |
| 2000 | if (((interrupts & CAN_IT_BUSOFF) != 0U) && |
2000 | } |
| 2001 | ((esrflags & CAN_ESR_BOFF) != 0U)) |
2001 | |
| 2002 | { |
2002 | /* Check Bus-off Flag */ |
| 2003 | /* Set CAN error code to Bus-Off */ |
2003 | if (((interrupts & CAN_IT_BUSOFF) != 0U) && |
| 2004 | errorcode |= HAL_CAN_ERROR_BOF; |
2004 | ((esrflags & CAN_ESR_BOFF) != 0U)) |
| 2005 | 2005 | { |
|
| 2006 | /* No need for clear of Error Bus-Off as read-only */ |
2006 | /* Set CAN error code to Bus-Off */ |
| 2007 | } |
2007 | errorcode |= HAL_CAN_ERROR_BOF; |
| 2008 | 2008 | ||
| 2009 | /* Check Last Error Code Flag */ |
2009 | /* No need for clear of Error Bus-Off as read-only */ |
| 2010 | if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && |
2010 | } |
| 2011 | ((esrflags & CAN_ESR_LEC) != 0U)) |
2011 | |
| 2012 | { |
2012 | /* Check Last Error Code Flag */ |
| 2013 | switch (esrflags & CAN_ESR_LEC) |
2013 | if (((interrupts & CAN_IT_LAST_ERROR_CODE) != 0U) && |
| 2014 | { |
2014 | ((esrflags & CAN_ESR_LEC) != 0U)) |
| 2015 | case (CAN_ESR_LEC_0): |
2015 | { |
| 2016 | /* Set CAN error code to Stuff error */ |
2016 | switch (esrflags & CAN_ESR_LEC) |
| 2017 | errorcode |= HAL_CAN_ERROR_STF; |
2017 | { |
| 2018 | break; |
2018 | case (CAN_ESR_LEC_0): |
| 2019 | case (CAN_ESR_LEC_1): |
2019 | /* Set CAN error code to Stuff error */ |
| 2020 | /* Set CAN error code to Form error */ |
2020 | errorcode |= HAL_CAN_ERROR_STF; |
| 2021 | errorcode |= HAL_CAN_ERROR_FOR; |
2021 | break; |
| 2022 | break; |
2022 | case (CAN_ESR_LEC_1): |
| 2023 | case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): |
2023 | /* Set CAN error code to Form error */ |
| 2024 | /* Set CAN error code to Acknowledgement error */ |
2024 | errorcode |= HAL_CAN_ERROR_FOR; |
| 2025 | errorcode |= HAL_CAN_ERROR_ACK; |
2025 | break; |
| 2026 | break; |
2026 | case (CAN_ESR_LEC_1 | CAN_ESR_LEC_0): |
| 2027 | case (CAN_ESR_LEC_2): |
2027 | /* Set CAN error code to Acknowledgement error */ |
| 2028 | /* Set CAN error code to Bit recessive error */ |
2028 | errorcode |= HAL_CAN_ERROR_ACK; |
| 2029 | errorcode |= HAL_CAN_ERROR_BR; |
2029 | break; |
| 2030 | break; |
2030 | case (CAN_ESR_LEC_2): |
| 2031 | case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): |
2031 | /* Set CAN error code to Bit recessive error */ |
| 2032 | /* Set CAN error code to Bit Dominant error */ |
2032 | errorcode |= HAL_CAN_ERROR_BR; |
| 2033 | errorcode |= HAL_CAN_ERROR_BD; |
2033 | break; |
| 2034 | break; |
2034 | case (CAN_ESR_LEC_2 | CAN_ESR_LEC_0): |
| 2035 | case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): |
2035 | /* Set CAN error code to Bit Dominant error */ |
| 2036 | /* Set CAN error code to CRC error */ |
2036 | errorcode |= HAL_CAN_ERROR_BD; |
| 2037 | errorcode |= HAL_CAN_ERROR_CRC; |
2037 | break; |
| 2038 | break; |
2038 | case (CAN_ESR_LEC_2 | CAN_ESR_LEC_1): |
| 2039 | default: |
2039 | /* Set CAN error code to CRC error */ |
| 2040 | break; |
2040 | errorcode |= HAL_CAN_ERROR_CRC; |
| 2041 | } |
2041 | break; |
| 2042 | 2042 | default: |
|
| 2043 | /* Clear Last error code Flag */ |
2043 | break; |
| 2044 | CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); |
2044 | } |
| 2045 | } |
2045 | |
| 2046 | } |
2046 | /* Clear Last error code Flag */ |
| 2047 | 2047 | CLEAR_BIT(hcan->Instance->ESR, CAN_ESR_LEC); |
|
| 2048 | /* Clear ERRI Flag */ |
2048 | } |
| 2049 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); |
2049 | } |
| 2050 | } |
2050 | |
| 2051 | 2051 | /* Clear ERRI Flag */ |
|
| 2052 | /* Call the Error call Back in case of Errors */ |
2052 | __HAL_CAN_CLEAR_FLAG(hcan, CAN_FLAG_ERRI); |
| 2053 | if (errorcode != HAL_CAN_ERROR_NONE) |
2053 | } |
| 2054 | { |
2054 | |
| 2055 | /* Update error code in handle */ |
2055 | /* Call the Error call Back in case of Errors */ |
| 2056 | hcan->ErrorCode |= errorcode; |
2056 | if (errorcode != HAL_CAN_ERROR_NONE) |
| 2057 | 2057 | { |
|
| 2058 | /* Call Error callback function */ |
2058 | /* Update error code in handle */ |
| 2059 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
2059 | hcan->ErrorCode |= errorcode; |
| 2060 | /* Call registered callback*/ |
2060 | |
| 2061 | hcan->ErrorCallback(hcan); |
2061 | /* Call Error callback function */ |
| 2062 | #else |
2062 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 2063 | /* Call weak (surcharged) callback */ |
2063 | /* Call registered callback*/ |
| 2064 | HAL_CAN_ErrorCallback(hcan); |
2064 | hcan->ErrorCallback(hcan); |
| 2065 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
2065 | #else |
| 2066 | } |
2066 | /* Call weak (surcharged) callback */ |
| 2067 | } |
2067 | HAL_CAN_ErrorCallback(hcan); |
| 2068 | 2068 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
|
| 2069 | /** |
2069 | } |
| 2070 | * @} |
2070 | } |
| 2071 | */ |
2071 | |
| 2072 | 2072 | /** |
|
| 2073 | /** @defgroup CAN_Exported_Functions_Group5 Callback functions |
2073 | * @} |
| 2074 | * @brief CAN Callback functions |
2074 | */ |
| 2075 | * |
2075 | |
| 2076 | @verbatim |
2076 | /** @defgroup CAN_Exported_Functions_Group5 Callback functions |
| 2077 | ============================================================================== |
2077 | * @brief CAN Callback functions |
| 2078 | ##### Callback functions ##### |
2078 | * |
| 2079 | ============================================================================== |
2079 | @verbatim |
| 2080 | [..] |
2080 | ============================================================================== |
| 2081 | This subsection provides the following callback functions: |
2081 | ##### Callback functions ##### |
| 2082 | (+) HAL_CAN_TxMailbox0CompleteCallback |
2082 | ============================================================================== |
| 2083 | (+) HAL_CAN_TxMailbox1CompleteCallback |
2083 | [..] |
| 2084 | (+) HAL_CAN_TxMailbox2CompleteCallback |
2084 | This subsection provides the following callback functions: |
| 2085 | (+) HAL_CAN_TxMailbox0AbortCallback |
2085 | (+) HAL_CAN_TxMailbox0CompleteCallback |
| 2086 | (+) HAL_CAN_TxMailbox1AbortCallback |
2086 | (+) HAL_CAN_TxMailbox1CompleteCallback |
| 2087 | (+) HAL_CAN_TxMailbox2AbortCallback |
2087 | (+) HAL_CAN_TxMailbox2CompleteCallback |
| 2088 | (+) HAL_CAN_RxFifo0MsgPendingCallback |
2088 | (+) HAL_CAN_TxMailbox0AbortCallback |
| 2089 | (+) HAL_CAN_RxFifo0FullCallback |
2089 | (+) HAL_CAN_TxMailbox1AbortCallback |
| 2090 | (+) HAL_CAN_RxFifo1MsgPendingCallback |
2090 | (+) HAL_CAN_TxMailbox2AbortCallback |
| 2091 | (+) HAL_CAN_RxFifo1FullCallback |
2091 | (+) HAL_CAN_RxFifo0MsgPendingCallback |
| 2092 | (+) HAL_CAN_SleepCallback |
2092 | (+) HAL_CAN_RxFifo0FullCallback |
| 2093 | (+) HAL_CAN_WakeUpFromRxMsgCallback |
2093 | (+) HAL_CAN_RxFifo1MsgPendingCallback |
| 2094 | (+) HAL_CAN_ErrorCallback |
2094 | (+) HAL_CAN_RxFifo1FullCallback |
| 2095 | 2095 | (+) HAL_CAN_SleepCallback |
|
| 2096 | @endverbatim |
2096 | (+) HAL_CAN_WakeUpFromRxMsgCallback |
| 2097 | * @{ |
2097 | (+) HAL_CAN_ErrorCallback |
| 2098 | */ |
2098 | |
| 2099 | 2099 | @endverbatim |
|
| 2100 | /** |
2100 | * @{ |
| 2101 | * @brief Transmission Mailbox 0 complete callback. |
2101 | */ |
| 2102 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2102 | |
| 2103 | * the configuration information for the specified CAN. |
2103 | /** |
| 2104 | * @retval None |
2104 | * @brief Transmission Mailbox 0 complete callback. |
| 2105 | */ |
2105 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2106 | __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) |
2106 | * the configuration information for the specified CAN. |
| 2107 | { |
2107 | * @retval None |
| 2108 | /* Prevent unused argument(s) compilation warning */ |
2108 | */ |
| 2109 | UNUSED(hcan); |
2109 | __weak void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) |
| 2110 | 2110 | { |
|
| 2111 | /* NOTE : This function Should not be modified, when the callback is needed, |
2111 | /* Prevent unused argument(s) compilation warning */ |
| 2112 | the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the |
2112 | UNUSED(hcan); |
| 2113 | user file |
2113 | |
| 2114 | */ |
2114 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2115 | } |
2115 | the HAL_CAN_TxMailbox0CompleteCallback could be implemented in the |
| 2116 | 2116 | user file |
|
| 2117 | /** |
2117 | */ |
| 2118 | * @brief Transmission Mailbox 1 complete callback. |
2118 | } |
| 2119 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2119 | |
| 2120 | * the configuration information for the specified CAN. |
2120 | /** |
| 2121 | * @retval None |
2121 | * @brief Transmission Mailbox 1 complete callback. |
| 2122 | */ |
2122 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2123 | __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) |
2123 | * the configuration information for the specified CAN. |
| 2124 | { |
2124 | * @retval None |
| 2125 | /* Prevent unused argument(s) compilation warning */ |
2125 | */ |
| 2126 | UNUSED(hcan); |
2126 | __weak void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) |
| 2127 | 2127 | { |
|
| 2128 | /* NOTE : This function Should not be modified, when the callback is needed, |
2128 | /* Prevent unused argument(s) compilation warning */ |
| 2129 | the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the |
2129 | UNUSED(hcan); |
| 2130 | user file |
2130 | |
| 2131 | */ |
2131 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2132 | } |
2132 | the HAL_CAN_TxMailbox1CompleteCallback could be implemented in the |
| 2133 | 2133 | user file |
|
| 2134 | /** |
2134 | */ |
| 2135 | * @brief Transmission Mailbox 2 complete callback. |
2135 | } |
| 2136 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2136 | |
| 2137 | * the configuration information for the specified CAN. |
2137 | /** |
| 2138 | * @retval None |
2138 | * @brief Transmission Mailbox 2 complete callback. |
| 2139 | */ |
2139 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2140 | __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) |
2140 | * the configuration information for the specified CAN. |
| 2141 | { |
2141 | * @retval None |
| 2142 | /* Prevent unused argument(s) compilation warning */ |
2142 | */ |
| 2143 | UNUSED(hcan); |
2143 | __weak void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) |
| 2144 | 2144 | { |
|
| 2145 | /* NOTE : This function Should not be modified, when the callback is needed, |
2145 | /* Prevent unused argument(s) compilation warning */ |
| 2146 | the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the |
2146 | UNUSED(hcan); |
| 2147 | user file |
2147 | |
| 2148 | */ |
2148 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2149 | } |
2149 | the HAL_CAN_TxMailbox2CompleteCallback could be implemented in the |
| 2150 | 2150 | user file |
|
| 2151 | /** |
2151 | */ |
| 2152 | * @brief Transmission Mailbox 0 Cancellation callback. |
2152 | } |
| 2153 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
2153 | |
| 2154 | * the configuration information for the specified CAN. |
2154 | /** |
| 2155 | * @retval None |
2155 | * @brief Transmission Mailbox 0 Cancellation callback. |
| 2156 | */ |
2156 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 2157 | __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) |
2157 | * the configuration information for the specified CAN. |
| 2158 | { |
2158 | * @retval None |
| 2159 | /* Prevent unused argument(s) compilation warning */ |
2159 | */ |
| 2160 | UNUSED(hcan); |
2160 | __weak void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) |
| 2161 | 2161 | { |
|
| 2162 | /* NOTE : This function Should not be modified, when the callback is needed, |
2162 | /* Prevent unused argument(s) compilation warning */ |
| 2163 | the HAL_CAN_TxMailbox0AbortCallback could be implemented in the |
2163 | UNUSED(hcan); |
| 2164 | user file |
2164 | |
| 2165 | */ |
2165 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2166 | } |
2166 | the HAL_CAN_TxMailbox0AbortCallback could be implemented in the |
| 2167 | 2167 | user file |
|
| 2168 | /** |
2168 | */ |
| 2169 | * @brief Transmission Mailbox 1 Cancellation callback. |
2169 | } |
| 2170 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
2170 | |
| 2171 | * the configuration information for the specified CAN. |
2171 | /** |
| 2172 | * @retval None |
2172 | * @brief Transmission Mailbox 1 Cancellation callback. |
| 2173 | */ |
2173 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 2174 | __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) |
2174 | * the configuration information for the specified CAN. |
| 2175 | { |
2175 | * @retval None |
| 2176 | /* Prevent unused argument(s) compilation warning */ |
2176 | */ |
| 2177 | UNUSED(hcan); |
2177 | __weak void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) |
| 2178 | 2178 | { |
|
| 2179 | /* NOTE : This function Should not be modified, when the callback is needed, |
2179 | /* Prevent unused argument(s) compilation warning */ |
| 2180 | the HAL_CAN_TxMailbox1AbortCallback could be implemented in the |
2180 | UNUSED(hcan); |
| 2181 | user file |
2181 | |
| 2182 | */ |
2182 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2183 | } |
2183 | the HAL_CAN_TxMailbox1AbortCallback could be implemented in the |
| 2184 | 2184 | user file |
|
| 2185 | /** |
2185 | */ |
| 2186 | * @brief Transmission Mailbox 2 Cancellation callback. |
2186 | } |
| 2187 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
2187 | |
| 2188 | * the configuration information for the specified CAN. |
2188 | /** |
| 2189 | * @retval None |
2189 | * @brief Transmission Mailbox 2 Cancellation callback. |
| 2190 | */ |
2190 | * @param hcan pointer to an CAN_HandleTypeDef structure that contains |
| 2191 | __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) |
2191 | * the configuration information for the specified CAN. |
| 2192 | { |
2192 | * @retval None |
| 2193 | /* Prevent unused argument(s) compilation warning */ |
2193 | */ |
| 2194 | UNUSED(hcan); |
2194 | __weak void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) |
| 2195 | 2195 | { |
|
| 2196 | /* NOTE : This function Should not be modified, when the callback is needed, |
2196 | /* Prevent unused argument(s) compilation warning */ |
| 2197 | the HAL_CAN_TxMailbox2AbortCallback could be implemented in the |
2197 | UNUSED(hcan); |
| 2198 | user file |
2198 | |
| 2199 | */ |
2199 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2200 | } |
2200 | the HAL_CAN_TxMailbox2AbortCallback could be implemented in the |
| 2201 | 2201 | user file |
|
| 2202 | /** |
2202 | */ |
| 2203 | * @brief Rx FIFO 0 message pending callback. |
2203 | } |
| 2204 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2204 | |
| 2205 | * the configuration information for the specified CAN. |
2205 | /** |
| 2206 | * @retval None |
2206 | * @brief Rx FIFO 0 message pending callback. |
| 2207 | */ |
2207 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2208 | __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) |
2208 | * the configuration information for the specified CAN. |
| 2209 | { |
2209 | * @retval None |
| 2210 | /* Prevent unused argument(s) compilation warning */ |
2210 | */ |
| 2211 | UNUSED(hcan); |
2211 | __weak void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) |
| 2212 | 2212 | { |
|
| 2213 | /* NOTE : This function Should not be modified, when the callback is needed, |
2213 | /* Prevent unused argument(s) compilation warning */ |
| 2214 | the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the |
2214 | UNUSED(hcan); |
| 2215 | user file |
2215 | |
| 2216 | */ |
2216 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2217 | } |
2217 | the HAL_CAN_RxFifo0MsgPendingCallback could be implemented in the |
| 2218 | 2218 | user file |
|
| 2219 | /** |
2219 | */ |
| 2220 | * @brief Rx FIFO 0 full callback. |
2220 | } |
| 2221 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2221 | |
| 2222 | * the configuration information for the specified CAN. |
2222 | /** |
| 2223 | * @retval None |
2223 | * @brief Rx FIFO 0 full callback. |
| 2224 | */ |
2224 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2225 | __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) |
2225 | * the configuration information for the specified CAN. |
| 2226 | { |
2226 | * @retval None |
| 2227 | /* Prevent unused argument(s) compilation warning */ |
2227 | */ |
| 2228 | UNUSED(hcan); |
2228 | __weak void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) |
| 2229 | 2229 | { |
|
| 2230 | /* NOTE : This function Should not be modified, when the callback is needed, |
2230 | /* Prevent unused argument(s) compilation warning */ |
| 2231 | the HAL_CAN_RxFifo0FullCallback could be implemented in the user |
2231 | UNUSED(hcan); |
| 2232 | file |
2232 | |
| 2233 | */ |
2233 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2234 | } |
2234 | the HAL_CAN_RxFifo0FullCallback could be implemented in the user |
| 2235 | 2235 | file |
|
| 2236 | /** |
2236 | */ |
| 2237 | * @brief Rx FIFO 1 message pending callback. |
2237 | } |
| 2238 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2238 | |
| 2239 | * the configuration information for the specified CAN. |
2239 | /** |
| 2240 | * @retval None |
2240 | * @brief Rx FIFO 1 message pending callback. |
| 2241 | */ |
2241 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2242 | __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) |
2242 | * the configuration information for the specified CAN. |
| 2243 | { |
2243 | * @retval None |
| 2244 | /* Prevent unused argument(s) compilation warning */ |
2244 | */ |
| 2245 | UNUSED(hcan); |
2245 | __weak void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) |
| 2246 | 2246 | { |
|
| 2247 | /* NOTE : This function Should not be modified, when the callback is needed, |
2247 | /* Prevent unused argument(s) compilation warning */ |
| 2248 | the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the |
2248 | UNUSED(hcan); |
| 2249 | user file |
2249 | |
| 2250 | */ |
2250 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2251 | } |
2251 | the HAL_CAN_RxFifo1MsgPendingCallback could be implemented in the |
| 2252 | 2252 | user file |
|
| 2253 | /** |
2253 | */ |
| 2254 | * @brief Rx FIFO 1 full callback. |
2254 | } |
| 2255 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2255 | |
| 2256 | * the configuration information for the specified CAN. |
2256 | /** |
| 2257 | * @retval None |
2257 | * @brief Rx FIFO 1 full callback. |
| 2258 | */ |
2258 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2259 | __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) |
2259 | * the configuration information for the specified CAN. |
| 2260 | { |
2260 | * @retval None |
| 2261 | /* Prevent unused argument(s) compilation warning */ |
2261 | */ |
| 2262 | UNUSED(hcan); |
2262 | __weak void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) |
| 2263 | 2263 | { |
|
| 2264 | /* NOTE : This function Should not be modified, when the callback is needed, |
2264 | /* Prevent unused argument(s) compilation warning */ |
| 2265 | the HAL_CAN_RxFifo1FullCallback could be implemented in the user |
2265 | UNUSED(hcan); |
| 2266 | file |
2266 | |
| 2267 | */ |
2267 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2268 | } |
2268 | the HAL_CAN_RxFifo1FullCallback could be implemented in the user |
| 2269 | 2269 | file |
|
| 2270 | /** |
2270 | */ |
| 2271 | * @brief Sleep callback. |
2271 | } |
| 2272 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2272 | |
| 2273 | * the configuration information for the specified CAN. |
2273 | /** |
| 2274 | * @retval None |
2274 | * @brief Sleep callback. |
| 2275 | */ |
2275 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2276 | __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) |
2276 | * the configuration information for the specified CAN. |
| 2277 | { |
2277 | * @retval None |
| 2278 | /* Prevent unused argument(s) compilation warning */ |
2278 | */ |
| 2279 | UNUSED(hcan); |
2279 | __weak void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) |
| 2280 | 2280 | { |
|
| 2281 | /* NOTE : This function Should not be modified, when the callback is needed, |
2281 | /* Prevent unused argument(s) compilation warning */ |
| 2282 | the HAL_CAN_SleepCallback could be implemented in the user file |
2282 | UNUSED(hcan); |
| 2283 | */ |
2283 | |
| 2284 | } |
2284 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2285 | 2285 | the HAL_CAN_SleepCallback could be implemented in the user file |
|
| 2286 | /** |
2286 | */ |
| 2287 | * @brief WakeUp from Rx message callback. |
2287 | } |
| 2288 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2288 | |
| 2289 | * the configuration information for the specified CAN. |
2289 | /** |
| 2290 | * @retval None |
2290 | * @brief WakeUp from Rx message callback. |
| 2291 | */ |
2291 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2292 | __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) |
2292 | * the configuration information for the specified CAN. |
| 2293 | { |
2293 | * @retval None |
| 2294 | /* Prevent unused argument(s) compilation warning */ |
2294 | */ |
| 2295 | UNUSED(hcan); |
2295 | __weak void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) |
| 2296 | 2296 | { |
|
| 2297 | /* NOTE : This function Should not be modified, when the callback is needed, |
2297 | /* Prevent unused argument(s) compilation warning */ |
| 2298 | the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the |
2298 | UNUSED(hcan); |
| 2299 | user file |
2299 | |
| 2300 | */ |
2300 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2301 | } |
2301 | the HAL_CAN_WakeUpFromRxMsgCallback could be implemented in the |
| 2302 | 2302 | user file |
|
| 2303 | /** |
2303 | */ |
| 2304 | * @brief Error CAN callback. |
2304 | } |
| 2305 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2305 | |
| 2306 | * the configuration information for the specified CAN. |
2306 | /** |
| 2307 | * @retval None |
2307 | * @brief Error CAN callback. |
| 2308 | */ |
2308 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2309 | __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) |
2309 | * the configuration information for the specified CAN. |
| 2310 | { |
2310 | * @retval None |
| 2311 | /* Prevent unused argument(s) compilation warning */ |
2311 | */ |
| 2312 | UNUSED(hcan); |
2312 | __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) |
| 2313 | 2313 | { |
|
| 2314 | /* NOTE : This function Should not be modified, when the callback is needed, |
2314 | /* Prevent unused argument(s) compilation warning */ |
| 2315 | the HAL_CAN_ErrorCallback could be implemented in the user file |
2315 | UNUSED(hcan); |
| 2316 | */ |
2316 | |
| 2317 | } |
2317 | /* NOTE : This function Should not be modified, when the callback is needed, |
| 2318 | 2318 | the HAL_CAN_ErrorCallback could be implemented in the user file |
|
| 2319 | /** |
2319 | */ |
| 2320 | * @} |
2320 | } |
| 2321 | */ |
2321 | |
| 2322 | 2322 | /** |
|
| 2323 | /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions |
2323 | * @} |
| 2324 | * @brief CAN Peripheral State functions |
2324 | */ |
| 2325 | * |
2325 | |
| 2326 | @verbatim |
2326 | /** @defgroup CAN_Exported_Functions_Group6 Peripheral State and Error functions |
| 2327 | ============================================================================== |
2327 | * @brief CAN Peripheral State functions |
| 2328 | ##### Peripheral State and Error functions ##### |
2328 | * |
| 2329 | ============================================================================== |
2329 | @verbatim |
| 2330 | [..] |
2330 | ============================================================================== |
| 2331 | This subsection provides functions allowing to : |
2331 | ##### Peripheral State and Error functions ##### |
| 2332 | (+) HAL_CAN_GetState() : Return the CAN state. |
2332 | ============================================================================== |
| 2333 | (+) HAL_CAN_GetError() : Return the CAN error codes if any. |
2333 | [..] |
| 2334 | (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. |
2334 | This subsection provides functions allowing to : |
| 2335 | 2335 | (+) HAL_CAN_GetState() : Return the CAN state. |
|
| 2336 | @endverbatim |
2336 | (+) HAL_CAN_GetError() : Return the CAN error codes if any. |
| 2337 | * @{ |
2337 | (+) HAL_CAN_ResetError(): Reset the CAN error codes if any. |
| 2338 | */ |
2338 | |
| 2339 | 2339 | @endverbatim |
|
| 2340 | /** |
2340 | * @{ |
| 2341 | * @brief Return the CAN state. |
2341 | */ |
| 2342 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2342 | |
| 2343 | * the configuration information for the specified CAN. |
2343 | /** |
| 2344 | * @retval HAL state |
2344 | * @brief Return the CAN state. |
| 2345 | */ |
2345 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2346 | HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan) |
2346 | * the configuration information for the specified CAN. |
| 2347 | { |
2347 | * @retval HAL state |
| 2348 | HAL_CAN_StateTypeDef state = hcan->State; |
2348 | */ |
| 2349 | 2349 | HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan) |
|
| 2350 | if ((state == HAL_CAN_STATE_READY) || |
2350 | { |
| 2351 | (state == HAL_CAN_STATE_LISTENING)) |
2351 | HAL_CAN_StateTypeDef state = hcan->State; |
| 2352 | { |
2352 | |
| 2353 | /* Check sleep mode acknowledge flag */ |
2353 | if ((state == HAL_CAN_STATE_READY) || |
| 2354 | if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
2354 | (state == HAL_CAN_STATE_LISTENING)) |
| 2355 | { |
2355 | { |
| 2356 | /* Sleep mode is active */ |
2356 | /* Check sleep mode acknowledge flag */ |
| 2357 | state = HAL_CAN_STATE_SLEEP_ACTIVE; |
2357 | if ((hcan->Instance->MSR & CAN_MSR_SLAK) != 0U) |
| 2358 | } |
2358 | { |
| 2359 | /* Check sleep mode request flag */ |
2359 | /* Sleep mode is active */ |
| 2360 | else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) |
2360 | state = HAL_CAN_STATE_SLEEP_ACTIVE; |
| 2361 | { |
2361 | } |
| 2362 | /* Sleep mode request is pending */ |
2362 | /* Check sleep mode request flag */ |
| 2363 | state = HAL_CAN_STATE_SLEEP_PENDING; |
2363 | else if ((hcan->Instance->MCR & CAN_MCR_SLEEP) != 0U) |
| 2364 | } |
2364 | { |
| 2365 | else |
2365 | /* Sleep mode request is pending */ |
| 2366 | { |
2366 | state = HAL_CAN_STATE_SLEEP_PENDING; |
| 2367 | /* Neither sleep mode request nor sleep mode acknowledge */ |
2367 | } |
| 2368 | } |
2368 | else |
| 2369 | } |
2369 | { |
| 2370 | 2370 | /* Neither sleep mode request nor sleep mode acknowledge */ |
|
| 2371 | /* Return CAN state */ |
2371 | } |
| 2372 | return state; |
2372 | } |
| 2373 | } |
2373 | |
| 2374 | 2374 | /* Return CAN state */ |
|
| 2375 | /** |
2375 | return state; |
| 2376 | * @brief Return the CAN error code. |
2376 | } |
| 2377 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2377 | |
| 2378 | * the configuration information for the specified CAN. |
2378 | /** |
| 2379 | * @retval CAN Error Code |
2379 | * @brief Return the CAN error code. |
| 2380 | */ |
2380 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2381 | uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan) |
2381 | * the configuration information for the specified CAN. |
| 2382 | { |
2382 | * @retval CAN Error Code |
| 2383 | /* Return CAN error code */ |
2383 | */ |
| 2384 | return hcan->ErrorCode; |
2384 | uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan) |
| 2385 | } |
2385 | { |
| 2386 | 2386 | /* Return CAN error code */ |
|
| 2387 | /** |
2387 | return hcan->ErrorCode; |
| 2388 | * @brief Reset the CAN error code. |
2388 | } |
| 2389 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
2389 | |
| 2390 | * the configuration information for the specified CAN. |
2390 | /** |
| 2391 | * @retval HAL status |
2391 | * @brief Reset the CAN error code. |
| 2392 | */ |
2392 | * @param hcan pointer to a CAN_HandleTypeDef structure that contains |
| 2393 | HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) |
2393 | * the configuration information for the specified CAN. |
| 2394 | { |
2394 | * @retval HAL status |
| 2395 | HAL_StatusTypeDef status = HAL_OK; |
2395 | */ |
| 2396 | HAL_CAN_StateTypeDef state = hcan->State; |
2396 | HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan) |
| 2397 | 2397 | { |
|
| 2398 | if ((state == HAL_CAN_STATE_READY) || |
2398 | HAL_StatusTypeDef status = HAL_OK; |
| 2399 | (state == HAL_CAN_STATE_LISTENING)) |
2399 | HAL_CAN_StateTypeDef state = hcan->State; |
| 2400 | { |
2400 | |
| 2401 | /* Reset CAN error code */ |
2401 | if ((state == HAL_CAN_STATE_READY) || |
| 2402 | hcan->ErrorCode = 0U; |
2402 | (state == HAL_CAN_STATE_LISTENING)) |
| 2403 | } |
2403 | { |
| 2404 | else |
2404 | /* Reset CAN error code */ |
| 2405 | { |
2405 | hcan->ErrorCode = 0U; |
| 2406 | /* Update error code */ |
2406 | } |
| 2407 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
2407 | else |
| 2408 | 2408 | { |
|
| 2409 | status = HAL_ERROR; |
2409 | /* Update error code */ |
| 2410 | } |
2410 | hcan->ErrorCode |= HAL_CAN_ERROR_NOT_INITIALIZED; |
| 2411 | 2411 | ||
| 2412 | /* Return the status */ |
2412 | status = HAL_ERROR; |
| 2413 | return status; |
2413 | } |
| 2414 | } |
2414 | |
| 2415 | 2415 | /* Return the status */ |
|
| 2416 | /** |
2416 | return status; |
| 2417 | * @} |
2417 | } |
| 2418 | */ |
2418 | |
| 2419 | 2419 | /** |
|
| 2420 | /** |
2420 | * @} |
| 2421 | * @} |
2421 | */ |
| 2422 | */ |
2422 | |
| 2423 | 2423 | /** |
|
| 2424 | #endif /* HAL_CAN_MODULE_ENABLED */ |
2424 | * @} |
| 2425 | 2425 | */ |
|
| 2426 | /** |
2426 | |
| 2427 | * @} |
2427 | #endif /* HAL_CAN_MODULE_ENABLED */ |
| 2428 | */ |
2428 | |
| 2429 | 2429 | /** |
|
| 2430 | #endif /* CAN1 */ |
2430 | * @} |
| 2431 | 2431 | */ |
|
| 2432 | /** |
2432 | |
| 2433 | * @} |
2433 | #endif /* CAN1 */ |
| 2434 | */ |
2434 | |
| 2435 | 2435 | /** |
|
| 2436 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
2436 | * @} |
| - | 2437 | */ |
|