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/**
 1 
/**
2 
  ******************************************************************************
 2 
  ******************************************************************************
3 
  * @file    stm32f1xx_hal_adc_ex.c
 3 
  * @file    stm32f1xx_hal_adc_ex.c
4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @brief   This file provides firmware functions to manage the following
 5 
  * @brief   This file provides firmware functions to manage the following
6 
  *          functionalities of the Analog to Digital Convertor (ADC)
 6 
  *          functionalities of the Analog to Digital Convertor (ADC)
7 
  *          peripheral:
 7 
  *          peripheral:
8 
  *           + Operation functions
 8 
  *           + Peripheral Control functions
9 
  *             ++ Start, stop, get result of conversions of injected
 9 
  *          Other functions (generic functions) are available in file
10 
  *                group, using 2 possible modes: polling, interruption.
 10 
  *          "stm32f1xx_hal_adc.c".
11 
  *             ++ Multimode feature (available on devices with 2 ADCs or more)
 11 
  *
12 
  *             ++ Calibration (ADC automatic self-calibration)
 12 
  ******************************************************************************
13 
  *           + Control functions
 13 
  * @attention
14 
  *             ++ Channels configuration on injected group
 14 
  *
15 
  *          Other functions (generic functions) are available in file
 15 
  * Copyright (c) 2016 STMicroelectronics.
16 
  *          "stm32f1xx_hal_adc.c".
 16 
  * All rights reserved.
17 
  *
 17 
  *
18 
  @verbatim
 18 
  * This software is licensed under terms that can be found in the LICENSE file
19 
  [..]
 19 
  * in the root directory of this software component.
20 
  (@) Sections "ADC peripheral features" and "How to use this driver" are
 20 
  * If no LICENSE file comes with this software, it is provided AS-IS.
21 
      available in file of generic functions "stm32f1xx_hal_adc.c".
 21 
  *
22 
  [..]
 22 
  ******************************************************************************
23 
  @endverbatim
 23 
  @verbatim
24 
  ******************************************************************************
 24 
  [..]
25 
  * @attention
 25 
  (@) Sections "ADC peripheral features" and "How to use this driver" are
26 
  *
 26 
      available in file of generic functions "stm32f1xx_hal_adc.c".
27 
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
 27 
  [..]
28 
  * All rights reserved.</center></h2>
 28 
  @endverbatim
29 
  *
 29 
  */
30 
  * This software component is licensed by ST under BSD 3-Clause license,
 30 
 
31 
  * the "License"; You may not use this file except in compliance with the
 31 
/* Includes ------------------------------------------------------------------*/
32 
  * License. You may obtain a copy of the License at:
 32 
#include "stm32f1xx_hal.h"
33 
  *                        opensource.org/licenses/BSD-3-Clause
 33 
 
34 
  *
 34 
/** @addtogroup STM32F1xx_HAL_Driver
35 
  ******************************************************************************
 35 
  * @{
36 
  */
 36 
  */
37 
 
 37 
 
38 
/* Includes ------------------------------------------------------------------*/
 38 
/** @defgroup ADCEx ADCEx
39 
#include "stm32f1xx_hal.h"
 39 
  * @brief ADC Extension HAL module driver
40 
 
 40 
  * @{
41 
/** @addtogroup STM32F1xx_HAL_Driver
 41 
  */
42 
  * @{
 42 
 
43 
  */
 43 
#ifdef HAL_ADC_MODULE_ENABLED
44 
 
 44 
 
45 
/** @defgroup ADCEx ADCEx
 45 
/* Private typedef -----------------------------------------------------------*/
46 
  * @brief ADC Extension HAL module driver
 46 
/* Private define ------------------------------------------------------------*/
47 
  * @{
 47 
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
48 
  */
 48 
  * @{
49 
 
 49 
  */
50 
#ifdef HAL_ADC_MODULE_ENABLED
 50 
 
51 
 
 51 
  /* Delay for ADC calibration:                                               */
52 
/* Private typedef -----------------------------------------------------------*/
 52 
  /* Hardware prerequisite before starting a calibration: the ADC must have   */
53 
/* Private define ------------------------------------------------------------*/
 53 
  /* been in power-on state for at least two ADC clock cycles.                */
54 
/** @defgroup ADCEx_Private_Constants ADCEx Private Constants
 54 
  /* Unit: ADC clock cycles                                                   */
55 
  * @{
 55 
  #define ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES       2U
56 
  */
 56 
 
57 
 
 57 
  /* Timeout value for ADC calibration                                        */
58 
  /* Delay for ADC calibration:                                               */
 58 
  /* Value defined to be higher than worst cases: low clocks freq,            */
59 
  /* Hardware prerequisite before starting a calibration: the ADC must have   */
 59 
  /* maximum prescaler.                                                       */
60 
  /* been in power-on state for at least two ADC clock cycles.                */
 60 
  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
61 
  /* Unit: ADC clock cycles                                                   */
 61 
  /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits.    */
62 
  #define ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES       2U
 62 
  /* Unit: ms                                                                 */
63 
 
 63 
  #define ADC_CALIBRATION_TIMEOUT          10U
64 
  /* Timeout value for ADC calibration                                        */
 64 
 
65 
  /* Value defined to be higher than worst cases: low clocks freq,            */
 65 
  /* Delay for temperature sensor stabilization time.                         */
66 
  /* maximum prescaler.                                                       */
 66 
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
67 
  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
 67 
  /* Unit: us                                                                 */
68 
  /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits.    */
 68 
  #define ADC_TEMPSENSOR_DELAY_US         10U
69 
  /* Unit: ms                                                                 */
 69 
 
70 
  #define ADC_CALIBRATION_TIMEOUT          10U
 70 
/**
71 
 
 71 
  * @}
72 
  /* Delay for temperature sensor stabilization time.                         */
 72 
  */
73 
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
 73 
 
74 
  /* Unit: us                                                                 */
 74 
/* Private macro -------------------------------------------------------------*/
75 
  #define ADC_TEMPSENSOR_DELAY_US         10U
 75 
/* Private variables ---------------------------------------------------------*/
76 
 
 76 
/* Private function prototypes -----------------------------------------------*/
77 
/**
 77 
/* Private functions ---------------------------------------------------------*/
78 
  * @}
 78 
 
79 
  */
 79 
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
80 
 
 80 
  * @{
81 
/* Private macro -------------------------------------------------------------*/
 81 
  */
82 
/* Private variables ---------------------------------------------------------*/
 82 
 
83 
/* Private function prototypes -----------------------------------------------*/
 83 
/** @defgroup ADCEx_Exported_Functions_Group1 Extended Extended IO operation functions
84 
/* Private functions ---------------------------------------------------------*/
 84 
 *  @brief    Extended Extended Input and Output operation functions
85 
 
 85 
 *
86 
/** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
 86 
@verbatim    
87 
  * @{
 87 
 ===============================================================================
88 
  */
 88 
                      ##### IO operation functions #####
89 
 
 89 
 ===============================================================================
90 
/** @defgroup ADCEx_Exported_Functions_Group1 Extended Extended IO operation functions
 90 
    [..]  This section provides functions allowing to:
91 
 *  @brief    Extended Extended Input and Output operation functions
 91 
      (+) Start conversion of injected group.
92 
 *
 92 
      (+) Stop conversion of injected group.
93 
@verbatim    
 93 
      (+) Poll for conversion complete on injected group.
94 
 ===============================================================================
 94 
      (+) Get result of injected channel conversion.
95 
                      ##### IO operation functions #####
 95 
      (+) Start conversion of injected group and enable interruptions.
96 
 ===============================================================================
 96 
      (+) Stop conversion of injected group and disable interruptions.
97 
    [..]  This section provides functions allowing to:
 97 
 
98 
      (+) Start conversion of injected group.
 98 
      (+) Start multimode and enable DMA transfer.
99 
      (+) Stop conversion of injected group.
 99 
      (+) Stop multimode and disable ADC DMA transfer.
100 
      (+) Poll for conversion complete on injected group.
 100 
      (+) Get result of multimode conversion.
101 
      (+) Get result of injected channel conversion.
 101 
 
102 
      (+) Start conversion of injected group and enable interruptions.
 102 
      (+) Perform the ADC self-calibration for single or differential ending.
103 
      (+) Stop conversion of injected group and disable interruptions.
 103 
      (+) Get calibration factors for single or differential ending.
104 
 
 104 
      (+) Set calibration factors for single or differential ending.
105 
      (+) Start multimode and enable DMA transfer.
 105 
     
106 
      (+) Stop multimode and disable ADC DMA transfer.
 106 
@endverbatim
107 
      (+) Get result of multimode conversion.
 107 
  * @{
108 
 
 108 
  */
109 
      (+) Perform the ADC self-calibration for single or differential ending.
 109 
 
110 
      (+) Get calibration factors for single or differential ending.
 110 
/**
111 
      (+) Set calibration factors for single or differential ending.
 111 
  * @brief  Perform an ADC automatic self-calibration
112 
     
 112 
  *         Calibration prerequisite: ADC must be disabled (execute this
113 
@endverbatim
 113 
  *         function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
114 
  * @{
 114 
  *         During calibration process, ADC is enabled. ADC is let enabled at
115 
  */
 115 
  *         the completion of this function.
116 
 
 116 
  * @param  hadc: ADC handle
117 
/**
 117 
  * @retval HAL status
118 
  * @brief  Perform an ADC automatic self-calibration
 118 
  */
119 
  *         Calibration prerequisite: ADC must be disabled (execute this
 119 
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
120 
  *         function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
 120 
{
121 
  *         During calibration process, ADC is enabled. ADC is let enabled at
 121 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
122 
  *         the completion of this function.
 122 
  uint32_t tickstart;
123 
  * @param  hadc: ADC handle
 123 
  __IO uint32_t wait_loop_index = 0U;
124 
  * @retval HAL status
 124 
 
125 
  */
 125 
  /* Check the parameters */
126 
HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
 126 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
127 
{
 127 
 
128 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 128 
  /* Process locked */
129 
  uint32_t tickstart;
 129 
  __HAL_LOCK(hadc);
130 
  __IO uint32_t wait_loop_index = 0U;
 130 
   
131 
 
 131 
   /* 1. Disable ADC peripheral                                                 */
132 
  /* Check the parameters */
 132 
   tmp_hal_status = ADC_ConversionStop_Disable(hadc);
133 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 133 
 
134 
 
 134 
   /* 2. Calibration prerequisite delay before starting the calibration.       */
135 
  /* Process locked */
 135 
   /*    - ADC must be enabled for at least two ADC clock cycles               */
136 
  __HAL_LOCK(hadc);
 136 
   tmp_hal_status = ADC_Enable(hadc);
137 
   
 137 
 
138 
  /* 1. Calibration prerequisite:                                             */
 138 
   /* Check if ADC is effectively enabled */
139 
  /*    - ADC must be disabled for at least two ADC clock cycles in disable   */
 139 
   if (tmp_hal_status == HAL_OK)
140 
  /*      mode before ADC enable                                              */
 140 
   {
141 
  /* Stop potential conversion on going, on regular and injected groups       */
 141 
     /* Set ADC state */
142 
  /* Disable ADC peripheral */
 142 
     ADC_STATE_CLR_SET(hadc->State,
143 
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 143 
                       HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
144 
 
 144 
                       HAL_ADC_STATE_BUSY_INTERNAL);
145 
  /* Check if ADC is effectively disabled */
 145 
   
146 
  if (tmp_hal_status == HAL_OK)
 146 
    /* Hardware prerequisite: delay before starting the calibration.          */
147 
  {
 147 
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles.  */
148 
    /* Set ADC state */
 148 
    /*  - Wait for the expected ADC clock cycles delay */
149 
    ADC_STATE_CLR_SET(hadc->State,
 149 
    wait_loop_index = ((SystemCoreClock
150 
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
 150 
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
151 
                      HAL_ADC_STATE_BUSY_INTERNAL);
 151 
                       * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES        );
152 
   
 152 
 
153 
    /* Hardware prerequisite: delay before starting the calibration.          */
 153 
    while(wait_loop_index != 0U)
154 
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles.  */
 154 
    {
155 
    /*  - Wait for the expected ADC clock cycles delay */
 155 
      wait_loop_index--;
156 
    wait_loop_index = ((SystemCoreClock
 156 
    }
157 
                        / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
 157 
 
158 
                       * ADC_PRECALIBRATION_DELAY_ADCCLOCKCYCLES        );
 158 
    /* 3. Resets ADC calibration registers */  
159 
 
 159 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL);
160 
    while(wait_loop_index != 0U)
 160 
   
161 
    {
 161 
    tickstart = HAL_GetTick();  
162 
      wait_loop_index--;
 162 
 
163 
    }
 163 
    /* Wait for calibration reset completion */
164 
   
 164 
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
165 
    /* 2. Enable the ADC peripheral */
 165 
    {
166 
    ADC_Enable(hadc);
 166 
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
167 
   
 167 
      {
168 
    /* 3. Resets ADC calibration registers */  
 168 
        /* New check to avoid false timeout detection in case of preemption */
169 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_RSTCAL);
 169 
        if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
170 
   
 170 
        {
171 
    tickstart = HAL_GetTick();  
 171 
          /* Update ADC state machine to error */
172 
 
 172 
          ADC_STATE_CLR_SET(hadc->State,
173 
    /* Wait for calibration reset completion */
 173 
                            HAL_ADC_STATE_BUSY_INTERNAL,
174 
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
 174 
                            HAL_ADC_STATE_ERROR_INTERNAL);
175 
    {
 175 
 
176 
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
 176 
          /* Process unlocked */
177 
      {
 177 
          __HAL_UNLOCK(hadc);
178 
        /* New check to avoid false timeout detection in case of preemption */
 178 
 
179 
        if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
 179 
          return HAL_ERROR;
180 
        {
 180 
        }
181 
          /* Update ADC state machine to error */
 181 
      }
182 
          ADC_STATE_CLR_SET(hadc->State,
 182 
    }
183 
                            HAL_ADC_STATE_BUSY_INTERNAL,
 183 
   
184 
                            HAL_ADC_STATE_ERROR_INTERNAL);
 184 
    /* 4. Start ADC calibration */
185 
 
 185 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL);
186 
          /* Process unlocked */
 186 
   
187 
          __HAL_UNLOCK(hadc);
 187 
    tickstart = HAL_GetTick();  
188 
 
 188 
 
189 
          return HAL_ERROR;
 189 
    /* Wait for calibration completion */
190 
        }
 190 
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
191 
      }
 191 
    {
192 
    }
 192 
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
193 
   
 193 
      {
194 
    /* 4. Start ADC calibration */
 194 
        /* New check to avoid false timeout detection in case of preemption */
195 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_CAL);
 195 
        if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
196 
   
 196 
        {
197 
    tickstart = HAL_GetTick();  
 197 
          /* Update ADC state machine to error */
198 
 
 198 
          ADC_STATE_CLR_SET(hadc->State,
199 
    /* Wait for calibration completion */
 199 
                            HAL_ADC_STATE_BUSY_INTERNAL,
200 
    while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
 200 
                            HAL_ADC_STATE_ERROR_INTERNAL);
201 
    {
 201 
 
202 
      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
 202 
          /* Process unlocked */
203 
      {
 203 
          __HAL_UNLOCK(hadc);
204 
        /* New check to avoid false timeout detection in case of preemption */
 204 
 
205 
        if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
 205 
          return HAL_ERROR;
206 
        {
 206 
        }
207 
          /* Update ADC state machine to error */
 207 
      }
208 
          ADC_STATE_CLR_SET(hadc->State,
 208 
    }
209 
                            HAL_ADC_STATE_BUSY_INTERNAL,
 209 
   
210 
                            HAL_ADC_STATE_ERROR_INTERNAL);
 210 
    /* Set ADC state */
211 
 
 211 
    ADC_STATE_CLR_SET(hadc->State,
212 
          /* Process unlocked */
 212 
                      HAL_ADC_STATE_BUSY_INTERNAL,
213 
          __HAL_UNLOCK(hadc);
 213 
                      HAL_ADC_STATE_READY);
214 
 
 214 
  }
215 
          return HAL_ERROR;
 215 
 
216 
        }
 216 
  /* Process unlocked */
217 
      }
 217 
  __HAL_UNLOCK(hadc);
218 
    }
 218 
 
219 
   
 219 
  /* Return function status */
220 
    /* Set ADC state */
 220 
  return tmp_hal_status;
221 
    ADC_STATE_CLR_SET(hadc->State,
 221 
}
222 
                      HAL_ADC_STATE_BUSY_INTERNAL,
 222 
 
223 
                      HAL_ADC_STATE_READY);
 223 
/**
224 
  }
 224 
  * @brief  Enables ADC, starts conversion of injected group.
225 
 
 225 
  *         Interruptions enabled in this function: None.
226 
  /* Process unlocked */
 226 
  * @param  hadc: ADC handle
227 
  __HAL_UNLOCK(hadc);
 227 
  * @retval HAL status
228 
 
 228 
  */
229 
  /* Return function status */
 229 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
230 
  return tmp_hal_status;
 230 
{
231 
}
 231 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
232 
 
 232 
 
233 
/**
 233 
  /* Check the parameters */
234 
  * @brief  Enables ADC, starts conversion of injected group.
 234 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
235 
  *         Interruptions enabled in this function: None.
 235 
 
236 
  * @param  hadc: ADC handle
 236 
  /* Process locked */
237 
  * @retval HAL status
 237 
  __HAL_LOCK(hadc);
238 
  */
 238 
   
239 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
 239 
  /* Enable the ADC peripheral */
240 
{
 240 
  tmp_hal_status = ADC_Enable(hadc);
241 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 241 
 
242 
 
 242 
  /* Start conversion if ADC is effectively enabled */
243 
  /* Check the parameters */
 243 
  if (tmp_hal_status == HAL_OK)
244 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 244 
  {
245 
 
 245 
    /* Set ADC state                                                          */
246 
  /* Process locked */
 246 
    /* - Clear state bitfield related to injected group conversion results    */
247 
  __HAL_LOCK(hadc);
 247 
    /* - Set state bitfield related to injected operation                     */
248 
   
 248 
    ADC_STATE_CLR_SET(hadc->State,
249 
  /* Enable the ADC peripheral */
 249 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
250 
  tmp_hal_status = ADC_Enable(hadc);
 250 
                      HAL_ADC_STATE_INJ_BUSY);
251 
 
 251 
   
252 
  /* Start conversion if ADC is effectively enabled */
 252 
    /* Case of independent mode or multimode (for devices with several ADCs): */
253 
  if (tmp_hal_status == HAL_OK)
 253 
    /* Set multimode state.                                                   */
254 
  {
 254 
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
255 
    /* Set ADC state                                                          */
 255 
    {
256 
    /* - Clear state bitfield related to injected group conversion results    */
 256 
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
257 
    /* - Set state bitfield related to injected operation                     */
 257 
    }
258 
    ADC_STATE_CLR_SET(hadc->State,
 258 
    else
259 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
 259 
    {
260 
                      HAL_ADC_STATE_INJ_BUSY);
 260 
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
261 
   
 261 
    }
262 
    /* Case of independent mode or multimode (for devices with several ADCs): */
 262 
   
263 
    /* Set multimode state.                                                   */
 263 
    /* Check if a regular conversion is ongoing */
264 
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 264 
    /* Note: On this device, there is no ADC error code fields related to     */
265 
    {
 265 
    /*       conversions on group injected only. In case of conversion on     */
266 
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 266 
    /*       going on group regular, no error code is reset.                  */
267 
    }
 267 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
268 
    else
 268 
    {
269 
    {
 269 
      /* Reset ADC all error code fields */
270 
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 270 
      ADC_CLEAR_ERRORCODE(hadc);
271 
    }
 271 
    }
272 
   
 272 
   
273 
    /* Check if a regular conversion is ongoing */
 273 
    /* Process unlocked */
274 
    /* Note: On this device, there is no ADC error code fields related to     */
 274 
    /* Unlock before starting ADC conversions: in case of potential           */
275 
    /*       conversions on group injected only. In case of conversion on     */
 275 
    /* interruption, to let the process to ADC IRQ Handler.                   */
276 
    /*       going on group regular, no error code is reset.                  */
 276 
    __HAL_UNLOCK(hadc);
277 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 277 
   
278 
    {
 278 
    /* Clear injected group conversion flag */
279 
      /* Reset ADC all error code fields */
 279 
    /* (To ensure of no unknown state from potential previous ADC operations) */
280 
      ADC_CLEAR_ERRORCODE(hadc);
 280 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
281 
    }
 281 
       
282 
   
 282 
    /* Enable conversion of injected group.                                   */
283 
    /* Process unlocked */
 283 
    /* If software start has been selected, conversion starts immediately.    */
284 
    /* Unlock before starting ADC conversions: in case of potential           */
 284 
    /* If external trigger has been selected, conversion will start at next   */
285 
    /* interruption, to let the process to ADC IRQ Handler.                   */
 285 
    /* trigger event.                                                         */
286 
    __HAL_UNLOCK(hadc);
 286 
    /* If automatic injected conversion is enabled, conversion will start     */
287 
   
 287 
    /* after next regular group conversion.                                   */
288 
    /* Clear injected group conversion flag */
 288 
    /* Case of multimode enabled (for devices with several ADCs): if ADC is   */
289 
    /* (To ensure of no unknown state from potential previous ADC operations) */
 289 
    /* slave, ADC is enabled only (conversion is not started). If ADC is      */
290 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
 290 
    /* master, ADC is enabled and conversion is started.                      */
291 
       
 291 
    if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
292 
    /* Enable conversion of injected group.                                   */
 292 
    {
293 
    /* If software start has been selected, conversion starts immediately.    */
 293 
      if (ADC_IS_SOFTWARE_START_INJECTED(hadc)     &&
294 
    /* If external trigger has been selected, conversion will start at next   */
 294 
          ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
295 
    /* trigger event.                                                         */
 295 
      {
296 
    /* If automatic injected conversion is enabled, conversion will start     */
 296 
        /* Start ADC conversion on injected group with SW start */
297 
    /* after next regular group conversion.                                   */
 297 
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
298 
    /* Case of multimode enabled (for devices with several ADCs): if ADC is   */
 298 
      }
299 
    /* slave, ADC is enabled only (conversion is not started). If ADC is      */
 299 
      else
300 
    /* master, ADC is enabled and conversion is started.                      */
 300 
      {
301 
    if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
 301 
        /* Start ADC conversion on injected group with external trigger */
302 
    {
 302 
        SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
303 
      if (ADC_IS_SOFTWARE_START_INJECTED(hadc)     &&
 303 
      }
304 
          ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
 304 
    }
305 
      {
 305 
  }
306 
        /* Start ADC conversion on injected group with SW start */
 306 
  else
307 
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
 307 
  {
308 
      }
 308 
    /* Process unlocked */
309 
      else
 309 
    __HAL_UNLOCK(hadc);
310 
      {
 310 
  }
311 
        /* Start ADC conversion on injected group with external trigger */
 311 
 
312 
        SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
 312 
  /* Return function status */
313 
      }
 313 
  return tmp_hal_status;
314 
    }
 314 
}
315 
  }
 315 
 
316 
  else
 316 
/**
317 
  {
 317 
  * @brief  Stop conversion of injected channels. Disable ADC peripheral if
318 
    /* Process unlocked */
 318 
  *         no regular conversion is on going.
319 
    __HAL_UNLOCK(hadc);
 319 
  * @note   If ADC must be disabled and if conversion is on going on
320 
  }
 320 
  *         regular group, function HAL_ADC_Stop must be used to stop both
321 
 
 321 
  *         injected and regular groups, and disable the ADC.
322 
  /* Return function status */
 322 
  * @note   If injected group mode auto-injection is enabled,
323 
  return tmp_hal_status;
 323 
  *         function HAL_ADC_Stop must be used.
324 
}
 324 
  * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
325 
 
 325 
  * @param  hadc: ADC handle
326 
/**
 326 
  * @retval None
327 
  * @brief  Stop conversion of injected channels. Disable ADC peripheral if
 327 
  */
328 
  *         no regular conversion is on going.
 328 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
329 
  * @note   If ADC must be disabled and if conversion is on going on
 329 
{
330 
  *         regular group, function HAL_ADC_Stop must be used to stop both
 330 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
331 
  *         injected and regular groups, and disable the ADC.
 331 
 
332 
  * @note   If injected group mode auto-injection is enabled,
 332 
  /* Check the parameters */
333 
  *         function HAL_ADC_Stop must be used.
 333 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
334 
  * @note   In case of auto-injection mode, HAL_ADC_Stop must be used.
 334 
 
335 
  * @param  hadc: ADC handle
 335 
  /* Process locked */
336 
  * @retval None
 336 
  __HAL_LOCK(hadc);
337 
  */
 337 
   
338 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
 338 
  /* Stop potential conversion and disable ADC peripheral                     */
339 
{
 339 
  /* Conditioned to:                                                          */
340 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 340 
  /* - No conversion on the other group (regular group) is intended to        */
341 
 
 341 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
342 
  /* Check the parameters */
 342 
  /*   are common)                                                            */
343 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 343 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
344 
 
 344 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
345 
  /* Process locked */
 345 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
346 
  __HAL_LOCK(hadc);
 346 
  {
347 
   
 347 
    /* Stop potential conversion on going, on regular and injected groups */
348 
  /* Stop potential conversion and disable ADC peripheral                     */
 348 
    /* Disable ADC peripheral */
349 
  /* Conditioned to:                                                          */
 349 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
350 
  /* - No conversion on the other group (regular group) is intended to        */
 350 
   
351 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
 351 
    /* Check if ADC is effectively disabled */
352 
  /*   are common)                                                            */
 352 
    if (tmp_hal_status == HAL_OK)
353 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
 353 
    {
354 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
 354 
      /* Set ADC state */
355 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
 355 
      ADC_STATE_CLR_SET(hadc->State,
356 
  {
 356 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
357 
    /* Stop potential conversion on going, on regular and injected groups */
 357 
                        HAL_ADC_STATE_READY);
358 
    /* Disable ADC peripheral */
 358 
    }
359 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 359 
  }
360 
   
 360 
  else
361 
    /* Check if ADC is effectively disabled */
 361 
  {
362 
    if (tmp_hal_status == HAL_OK)
 362 
    /* Update ADC state machine to error */
363 
    {
 363 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
364 
      /* Set ADC state */
 364 
     
365 
      ADC_STATE_CLR_SET(hadc->State,
 365 
    tmp_hal_status = HAL_ERROR;
366 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
 366 
  }
367 
                        HAL_ADC_STATE_READY);
 367 
 
368 
    }
 368 
  /* Process unlocked */
369 
  }
 369 
  __HAL_UNLOCK(hadc);
370 
  else
 370 
 
371 
  {
 371 
  /* Return function status */
372 
    /* Update ADC state machine to error */
 372 
  return tmp_hal_status;
373 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 373 
}
374 
     
 374 
 
375 
    tmp_hal_status = HAL_ERROR;
 375 
/**
376 
  }
 376 
  * @brief  Wait for injected group conversion to be completed.
377 
 
 377 
  * @param  hadc: ADC handle
378 
  /* Process unlocked */
 378 
  * @param  Timeout: Timeout value in millisecond.
379 
  __HAL_UNLOCK(hadc);
 379 
  * @retval HAL status
380 
 
 380 
  */
381 
  /* Return function status */
 381 
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
382 
  return tmp_hal_status;
 382 
{
383 
}
 383 
  uint32_t tickstart;
384 
 
 384 
 
385 
/**
 385 
  /* Variables for polling in case of scan mode enabled and polling for each  */
386 
  * @brief  Wait for injected group conversion to be completed.
 386 
  /* conversion.                                                              */
387 
  * @param  hadc: ADC handle
 387 
  __IO uint32_t Conversion_Timeout_CPU_cycles = 0U;
388 
  * @param  Timeout: Timeout value in millisecond.
 388 
  uint32_t Conversion_Timeout_CPU_cycles_max = 0U;
389 
  * @retval HAL status
 389 
 
390 
  */
 390 
  /* Check the parameters */
391 
HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
 391 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
392 
{
 392 
 
393 
  uint32_t tickstart;
 393 
  /* Get timeout */
394 
 
 394 
  tickstart = HAL_GetTick();  
395 
  /* Variables for polling in case of scan mode enabled and polling for each  */
 395 
     
396 
  /* conversion.                                                              */
 396 
  /* Polling for end of conversion: differentiation if single/sequence        */
397 
  __IO uint32_t Conversion_Timeout_CPU_cycles = 0U;
 397 
  /* conversion.                                                              */
398 
  uint32_t Conversion_Timeout_CPU_cycles_max = 0U;
 398 
  /* For injected group, flag JEOC is set only at the end of the sequence,    */
399 
 
 399 
  /* not for each conversion within the sequence.                             */
400 
  /* Check the parameters */
 400 
  /*  - If single conversion for injected group (scan mode disabled or        */
401 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 401 
  /*    InjectedNbrOfConversion ==1), flag JEOC is used to determine the      */
402 
 
 402 
  /*    conversion completion.                                                */
403 
  /* Get timeout */
 403 
  /*  - If sequence conversion for injected group (scan mode enabled and      */
404 
  tickstart = HAL_GetTick();  
 404 
  /*    InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
405 
     
 405 
  /*    sequence.                                                             */
406 
  /* Polling for end of conversion: differentiation if single/sequence        */
 406 
  /*    To poll for each conversion, the maximum conversion time is computed  */
407 
  /* conversion.                                                              */
 407 
  /*    from ADC conversion time (selected sampling time + conversion time of */
408 
  /* For injected group, flag JEOC is set only at the end of the sequence,    */
 408 
  /*    12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on    */
409 
  /* not for each conversion within the sequence.                             */
 409 
  /*    settings, conversion time range can be from 28 to 32256 CPU cycles).  */
410 
  /*  - If single conversion for injected group (scan mode disabled or        */
 410 
  /*    As flag JEOC is not set after each conversion, no timeout status can  */
411 
  /*    InjectedNbrOfConversion ==1), flag JEOC is used to determine the      */
 411 
  /*    be set.                                                               */
412 
  /*    conversion completion.                                                */
 412 
  if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
413 
  /*  - If sequence conversion for injected group (scan mode enabled and      */
 413 
  {
414 
  /*    InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
 414 
    /* Wait until End of Conversion flag is raised */
415 
  /*    sequence.                                                             */
 415 
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
416 
  /*    To poll for each conversion, the maximum conversion time is computed  */
 416 
    {
417 
  /*    from ADC conversion time (selected sampling time + conversion time of */
 417 
      /* Check if timeout is disabled (set to infinite wait) */
418 
  /*    12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on    */
 418 
      if(Timeout != HAL_MAX_DELAY)
419 
  /*    settings, conversion time range can be from 28 to 32256 CPU cycles).  */
 419 
      {
420 
  /*    As flag JEOC is not set after each conversion, no timeout status can  */
 420 
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
421 
  /*    be set.                                                               */
 421 
        {
422 
  if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
 422 
          /* New check to avoid false timeout detection in case of preemption */
423 
  {
 423 
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
424 
    /* Wait until End of Conversion flag is raised */
 424 
          {
425 
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
 425 
            /* Update ADC state machine to timeout */
426 
    {
 426 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
427 
      /* Check if timeout is disabled (set to infinite wait) */
 427 
 
428 
      if(Timeout != HAL_MAX_DELAY)
 428 
            /* Process unlocked */
429 
      {
 429 
            __HAL_UNLOCK(hadc);
430 
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
 430 
 
431 
        {
 431 
            return HAL_TIMEOUT;
432 
          /* New check to avoid false timeout detection in case of preemption */
 432 
          }
433 
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
 433 
        }
434 
          {
 434 
      }
435 
            /* Update ADC state machine to timeout */
 435 
    }
436 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
 436 
  }
437 
 
 437 
  else
438 
            /* Process unlocked */
 438 
  {
439 
            __HAL_UNLOCK(hadc);
 439 
    /* Replace polling by wait for maximum conversion time */
440 
 
 440 
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles   */
441 
            return HAL_TIMEOUT;
 441 
    /*    and ADC maximum conversion cycles on all channels.                  */
442 
          }
 442 
    /*  - Wait for the expected ADC clock cycles delay                        */
443 
        }
 443 
    Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
444 
      }
 444 
                                          / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
445 
    }
 445 
                                         * ADC_CONVCYCLES_MAX_RANGE(hadc)                 );
446 
  }
 446 
   
447 
  else
 447 
    while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
448 
  {
 448 
    {
449 
    /* Replace polling by wait for maximum conversion time */
 449 
      /* Check if timeout is disabled (set to infinite wait) */
450 
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles   */
 450 
      if(Timeout != HAL_MAX_DELAY)
451 
    /*    and ADC maximum conversion cycles on all channels.                  */
 451 
      {
452 
    /*  - Wait for the expected ADC clock cycles delay                        */
 452 
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
453 
    Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
 453 
        {
454 
                                          / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
 454 
          /* New check to avoid false timeout detection in case of preemption */
455 
                                         * ADC_CONVCYCLES_MAX_RANGE(hadc)                 );
 455 
          if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
456 
   
 456 
          {
457 
    while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
 457 
            /* Update ADC state machine to timeout */
458 
    {
 458 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
459 
      /* Check if timeout is disabled (set to infinite wait) */
 459 
 
460 
      if(Timeout != HAL_MAX_DELAY)
 460 
            /* Process unlocked */
461 
      {
 461 
            __HAL_UNLOCK(hadc);
462 
        if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
 462 
 
463 
        {
 463 
            return HAL_TIMEOUT;
464 
          /* New check to avoid false timeout detection in case of preemption */
 464 
          }
465 
          if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
 465 
        }
466 
          {
 466 
      }
467 
            /* Update ADC state machine to timeout */
 467 
      Conversion_Timeout_CPU_cycles ++;
468 
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
 468 
    }
469 
 
 469 
  }
470 
            /* Process unlocked */
 470 
 
471 
            __HAL_UNLOCK(hadc);
 471 
  /* Clear injected group conversion flag */
472 
 
 472 
  /* Note: On STM32F1 ADC, clear regular conversion flag raised               */
473 
            return HAL_TIMEOUT;
 473 
  /* simultaneously.                                                          */
474 
          }
 474 
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC | ADC_FLAG_EOC);
475 
        }
 475 
 
476 
      }
 476 
  /* Update ADC state machine */
477 
      Conversion_Timeout_CPU_cycles ++;
 477 
  SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
478 
    }
 478 
 
479 
  }
 479 
  /* Determine whether any further conversion upcoming on group injected      */
480 
 
 480 
  /* by external trigger or by automatic injected conversion                  */
481 
  /* Clear injected group conversion flag */
 481 
  /* from group regular.                                                      */
482 
  /* Note: On STM32F1 ADC, clear regular conversion flag raised               */
 482 
  if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     ||
483 
  /* simultaneously.                                                          */
 483 
     (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&    
484 
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC | ADC_FLAG_EOC);
 484 
     (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
485 
 
 485 
      (hadc->Init.ContinuousConvMode == DISABLE)   )        )   )
486 
  /* Update ADC state machine */
 486 
  {
487 
  SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
 487 
    /* Set ADC state */
488 
 
 488 
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);  
489 
  /* Determine whether any further conversion upcoming on group injected      */
 489 
   
490 
  /* by external trigger or by automatic injected conversion                  */
 490 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
491 
  /* from group regular.                                                      */
 491 
    {
492 
  if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     ||
 492 
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
493 
     (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&    
 493 
    }
494 
     (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
 494 
  }
495 
      (hadc->Init.ContinuousConvMode == DISABLE)   )        )   )
 495 
 
496 
  {
 496 
  /* Return ADC state */
497 
    /* Set ADC state */
 497 
  return HAL_OK;
498 
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);  
 498 
}
499 
   
 499 
 
500 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 500 
/**
501 
    {
 501 
  * @brief  Enables ADC, starts conversion of injected group with interruption.
502 
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 502 
  *          - JEOC (end of conversion of injected group)
503 
    }
 503 
  *         Each of these interruptions has its dedicated callback function.
504 
  }
 504 
  * @param  hadc: ADC handle
505 
 
 505 
  * @retval HAL status.
506 
  /* Return ADC state */
 506 
  */
507 
  return HAL_OK;
 507 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
508 
}
 508 
{
509 
 
 509 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
510 
/**
 510 
 
511 
  * @brief  Enables ADC, starts conversion of injected group with interruption.
 511 
  /* Check the parameters */
512 
  *          - JEOC (end of conversion of injected group)
 512 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
513 
  *         Each of these interruptions has its dedicated callback function.
 513 
 
514 
  * @param  hadc: ADC handle
 514 
  /* Process locked */
515 
  * @retval HAL status.
 515 
  __HAL_LOCK(hadc);
516 
  */
 516 
   
517 
HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
 517 
  /* Enable the ADC peripheral */
518 
{
 518 
  tmp_hal_status = ADC_Enable(hadc);
519 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 519 
 
520 
 
 520 
  /* Start conversion if ADC is effectively enabled */
521 
  /* Check the parameters */
 521 
  if (tmp_hal_status == HAL_OK)
522 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 522 
  {
523 
 
 523 
    /* Set ADC state                                                          */
524 
  /* Process locked */
 524 
    /* - Clear state bitfield related to injected group conversion results    */
525 
  __HAL_LOCK(hadc);
 525 
    /* - Set state bitfield related to injected operation                     */
526 
   
 526 
    ADC_STATE_CLR_SET(hadc->State,
527 
  /* Enable the ADC peripheral */
 527 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
528 
  tmp_hal_status = ADC_Enable(hadc);
 528 
                      HAL_ADC_STATE_INJ_BUSY);
529 
 
 529 
   
530 
  /* Start conversion if ADC is effectively enabled */
 530 
    /* Case of independent mode or multimode (for devices with several ADCs): */
531 
  if (tmp_hal_status == HAL_OK)
 531 
    /* Set multimode state.                                                   */
532 
  {
 532 
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
533 
    /* Set ADC state                                                          */
 533 
    {
534 
    /* - Clear state bitfield related to injected group conversion results    */
 534 
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
535 
    /* - Set state bitfield related to injected operation                     */
 535 
    }
536 
    ADC_STATE_CLR_SET(hadc->State,
 536 
    else
537 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
 537 
    {
538 
                      HAL_ADC_STATE_INJ_BUSY);
 538 
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
539 
   
 539 
    }
540 
    /* Case of independent mode or multimode (for devices with several ADCs): */
 540 
   
541 
    /* Set multimode state.                                                   */
 541 
    /* Check if a regular conversion is ongoing */
542 
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
 542 
    /* Note: On this device, there is no ADC error code fields related to     */
543 
    {
 543 
    /*       conversions on group injected only. In case of conversion on     */
544 
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 544 
    /*       going on group regular, no error code is reset.                  */
545 
    }
 545 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
546 
    else
 546 
    {
547 
    {
 547 
      /* Reset ADC all error code fields */
548 
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
 548 
      ADC_CLEAR_ERRORCODE(hadc);
549 
    }
 549 
    }
550 
   
 550 
   
551 
    /* Check if a regular conversion is ongoing */
 551 
    /* Process unlocked */
552 
    /* Note: On this device, there is no ADC error code fields related to     */
 552 
    /* Unlock before starting ADC conversions: in case of potential           */
553 
    /*       conversions on group injected only. In case of conversion on     */
 553 
    /* interruption, to let the process to ADC IRQ Handler.                   */
554 
    /*       going on group regular, no error code is reset.                  */
 554 
    __HAL_UNLOCK(hadc);
555 
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 555 
   
556 
    {
 556 
    /* Clear injected group conversion flag */
557 
      /* Reset ADC all error code fields */
 557 
    /* (To ensure of no unknown state from potential previous ADC operations) */
558 
      ADC_CLEAR_ERRORCODE(hadc);
 558 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
559 
    }
 559 
   
560 
   
 560 
    /* Enable end of conversion interrupt for injected channels */
561 
    /* Process unlocked */
 561 
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
562 
    /* Unlock before starting ADC conversions: in case of potential           */
 562 
   
563 
    /* interruption, to let the process to ADC IRQ Handler.                   */
 563 
    /* Start conversion of injected group if software start has been selected */
564 
    __HAL_UNLOCK(hadc);
 564 
    /* and if automatic injected conversion is disabled.                      */
565 
   
 565 
    /* If external trigger has been selected, conversion will start at next   */
566 
    /* Clear injected group conversion flag */
 566 
    /* trigger event.                                                         */
567 
    /* (To ensure of no unknown state from potential previous ADC operations) */
 567 
    /* If automatic injected conversion is enabled, conversion will start     */
568 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
 568 
    /* after next regular group conversion.                                   */
569 
   
 569 
    if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
570 
    /* Enable end of conversion interrupt for injected channels */
 570 
    {
571 
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
 571 
      if (ADC_IS_SOFTWARE_START_INJECTED(hadc)     &&
572 
   
 572 
          ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
573 
    /* Start conversion of injected group if software start has been selected */
 573 
      {
574 
    /* and if automatic injected conversion is disabled.                      */
 574 
        /* Start ADC conversion on injected group with SW start */
575 
    /* If external trigger has been selected, conversion will start at next   */
 575 
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
576 
    /* trigger event.                                                         */
 576 
      }
577 
    /* If automatic injected conversion is enabled, conversion will start     */
 577 
      else
578 
    /* after next regular group conversion.                                   */
 578 
      {
579 
    if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO))
 579 
        /* Start ADC conversion on injected group with external trigger */
580 
    {
 580 
        SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
581 
      if (ADC_IS_SOFTWARE_START_INJECTED(hadc)     &&
 581 
      }
582 
          ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
 582 
    }
583 
      {
 583 
  }
584 
        /* Start ADC conversion on injected group with SW start */
 584 
  else
585 
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_JSWSTART | ADC_CR2_JEXTTRIG));
 585 
  {
586 
      }
 586 
    /* Process unlocked */
587 
      else
 587 
    __HAL_UNLOCK(hadc);
588 
      {
 588 
  }
589 
        /* Start ADC conversion on injected group with external trigger */
 589 
 
590 
        SET_BIT(hadc->Instance->CR2, ADC_CR2_JEXTTRIG);
 590 
  /* Return function status */
591 
      }
 591 
  return tmp_hal_status;
592 
    }
 592 
}
593 
  }
 593 
 
594 
  else
 594 
/**
595 
  {
 595 
  * @brief  Stop conversion of injected channels, disable interruption of
596 
    /* Process unlocked */
 596 
  *         end-of-conversion. Disable ADC peripheral if no regular conversion
597 
    __HAL_UNLOCK(hadc);
 597 
  *         is on going.
598 
  }
 598 
  * @note   If ADC must be disabled and if conversion is on going on
599 
 
 599 
  *         regular group, function HAL_ADC_Stop must be used to stop both
600 
  /* Return function status */
 600 
  *         injected and regular groups, and disable the ADC.
601 
  return tmp_hal_status;
 601 
  * @note   If injected group mode auto-injection is enabled,
602 
}
 602 
  *         function HAL_ADC_Stop must be used.
603 
 
 603 
  * @param  hadc: ADC handle
604 
/**
 604 
  * @retval None
605 
  * @brief  Stop conversion of injected channels, disable interruption of
 605 
  */
606 
  *         end-of-conversion. Disable ADC peripheral if no regular conversion
 606 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
607 
  *         is on going.
 607 
{
608 
  * @note   If ADC must be disabled and if conversion is on going on
 608 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
609 
  *         regular group, function HAL_ADC_Stop must be used to stop both
 609 
 
610 
  *         injected and regular groups, and disable the ADC.
 610 
  /* Check the parameters */
611 
  * @note   If injected group mode auto-injection is enabled,
 611 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
612 
  *         function HAL_ADC_Stop must be used.
 612 
 
613 
  * @param  hadc: ADC handle
 613 
  /* Process locked */
614 
  * @retval None
 614 
  __HAL_LOCK(hadc);
615 
  */
 615 
   
616 
HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
 616 
  /* Stop potential conversion and disable ADC peripheral                     */
617 
{
 617 
  /* Conditioned to:                                                          */
618 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 618 
  /* - No conversion on the other group (regular group) is intended to        */
619 
 
 619 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
620 
  /* Check the parameters */
 620 
  /*   are common)                                                            */
621 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 621 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
622 
 
 622 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
623 
  /* Process locked */
 623 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
624 
  __HAL_LOCK(hadc);
 624 
  {
625 
   
 625 
    /* Stop potential conversion on going, on regular and injected groups */
626 
  /* Stop potential conversion and disable ADC peripheral                     */
 626 
    /* Disable ADC peripheral */
627 
  /* Conditioned to:                                                          */
 627 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
628 
  /* - No conversion on the other group (regular group) is intended to        */
 628 
   
629 
  /*   continue (injected and regular groups stop conversion and ADC disable  */
 629 
    /* Check if ADC is effectively disabled */
630 
  /*   are common)                                                            */
 630 
    if (tmp_hal_status == HAL_OK)
631 
  /* - In case of auto-injection mode, HAL_ADC_Stop must be used.             */
 631 
    {
632 
  if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET)  &&
 632 
      /* Disable ADC end of conversion interrupt for injected channels */
633 
     HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO)   )
 633 
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
634 
  {
 634 
     
635 
    /* Stop potential conversion on going, on regular and injected groups */
 635 
      /* Set ADC state */
636 
    /* Disable ADC peripheral */
 636 
      ADC_STATE_CLR_SET(hadc->State,
637 
    tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 637 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
638 
   
 638 
                        HAL_ADC_STATE_READY);
639 
    /* Check if ADC is effectively disabled */
 639 
    }
640 
    if (tmp_hal_status == HAL_OK)
 640 
  }
641 
    {
 641 
  else
642 
      /* Disable ADC end of conversion interrupt for injected channels */
 642 
  {
643 
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
 643 
    /* Update ADC state machine to error */
644 
     
 644 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
645 
      /* Set ADC state */
 645 
     
646 
      ADC_STATE_CLR_SET(hadc->State,
 646 
    tmp_hal_status = HAL_ERROR;
647 
                        HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
 647 
  }
648 
                        HAL_ADC_STATE_READY);
 648 
 
649 
    }
 649 
  /* Process unlocked */
650 
  }
 650 
  __HAL_UNLOCK(hadc);
651 
  else
 651 
 
652 
  {
 652 
  /* Return function status */
653 
    /* Update ADC state machine to error */
 653 
  return tmp_hal_status;
654 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 654 
}
655 
     
 655 
 
656 
    tmp_hal_status = HAL_ERROR;
 656 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
657 
  }
 657 
/**
658 
 
 658 
  * @brief  Enables ADC, starts conversion of regular group and transfers result
659 
  /* Process unlocked */
 659 
  *         through DMA.
660 
  __HAL_UNLOCK(hadc);
 660 
  *         Multimode must have been previously configured using
661 
 
 661 
  *         HAL_ADCEx_MultiModeConfigChannel() function.
662 
  /* Return function status */
 662 
  *         Interruptions enabled in this function:
663 
  return tmp_hal_status;
 663 
  *          - DMA transfer complete
664 
}
 664 
  *          - DMA half transfer
665 
 
 665 
  *         Each of these interruptions has its dedicated callback function.
666 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 666 
  * @note:  On STM32F1 devices, ADC slave regular group must be configured
667 
/**
 667 
  *         with conversion trigger ADC_SOFTWARE_START.
668 
  * @brief  Enables ADC, starts conversion of regular group and transfers result
 668 
  * @note:  ADC slave can be enabled preliminarily using single-mode  
669 
  *         through DMA.
 669 
  *         HAL_ADC_Start() function.
670 
  *         Multimode must have been previously configured using
 670 
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
671 
  *         HAL_ADCEx_MultiModeConfigChannel() function.
 671 
  * @param  pData: The destination Buffer address.
672 
  *         Interruptions enabled in this function:
 672 
  * @param  Length: The length of data to be transferred from ADC peripheral to memory.
673 
  *          - DMA transfer complete
 673 
  * @retval None
674 
  *          - DMA half transfer
 674 
  */
675 
  *         Each of these interruptions has its dedicated callback function.
 675 
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
676 
  * @note:  On STM32F1 devices, ADC slave regular group must be configured
 676 
{
677 
  *         with conversion trigger ADC_SOFTWARE_START.
 677 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
678 
  * @note:  ADC slave can be enabled preliminarily using single-mode  
 678 
  ADC_HandleTypeDef tmphadcSlave={0};
679 
  *         HAL_ADC_Start() function.
 679 
 
680 
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
 680 
  /* Check the parameters */
681 
  * @param  pData: The destination Buffer address.
 681 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
682 
  * @param  Length: The length of data to be transferred from ADC peripheral to memory.
 682 
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
683 
  * @retval None
 683 
 
684 
  */
 684 
  /* Process locked */
685 
HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
 685 
  __HAL_LOCK(hadc);
686 
{
 686 
 
687 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 687 
  /* Set a temporary handle of the ADC slave associated to the ADC master     */
688 
  ADC_HandleTypeDef tmphadcSlave={0};
 688 
  ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
689 
 
 689 
 
690 
  /* Check the parameters */
 690 
  /* On STM32F1 devices, ADC slave regular group must be configured with      */
691 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
 691 
  /* conversion trigger ADC_SOFTWARE_START.                                   */
692 
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
 692 
  /* Note: External trigger of ADC slave must be enabled, it is already done  */
693 
 
 693 
  /*       into function "HAL_ADC_Init()".                                    */
694 
  /* Process locked */
 694 
  if(!ADC_IS_SOFTWARE_START_REGULAR(&tmphadcSlave))  
695 
  __HAL_LOCK(hadc);
 695 
  {
696 
 
 696 
    /* Update ADC state machine to error */
697 
  /* Set a temporary handle of the ADC slave associated to the ADC master     */
 697 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
698 
  ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
 698 
   
699 
 
 699 
    /* Process unlocked */
700 
  /* On STM32F1 devices, ADC slave regular group must be configured with      */
 700 
    __HAL_UNLOCK(hadc);
701 
  /* conversion trigger ADC_SOFTWARE_START.                                   */
 701 
   
702 
  /* Note: External trigger of ADC slave must be enabled, it is already done  */
 702 
    return HAL_ERROR;
703 
  /*       into function "HAL_ADC_Init()".                                    */
 703 
  }
704 
  if(!ADC_IS_SOFTWARE_START_REGULAR(&tmphadcSlave))  
 704 
 
705 
  {
 705 
  /* Enable the ADC peripherals: master and slave (in case if not already     */
706 
    /* Update ADC state machine to error */
 706 
  /* enabled previously)                                                      */
707 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 707 
  tmp_hal_status = ADC_Enable(hadc);
708 
   
 708 
  if (tmp_hal_status == HAL_OK)
709 
    /* Process unlocked */
 709 
  {
710 
    __HAL_UNLOCK(hadc);
 710 
    tmp_hal_status = ADC_Enable(&tmphadcSlave);
711 
   
 711 
  }
712 
    return HAL_ERROR;
 712 
 
713 
  }
 713 
  /* Start conversion if all ADCs of multimode are effectively enabled */
714 
 
 714 
  if (tmp_hal_status == HAL_OK)
715 
  /* Enable the ADC peripherals: master and slave (in case if not already     */
 715 
  {
716 
  /* enabled previously)                                                      */
 716 
    /* Set ADC state (ADC master)                                             */
717 
  tmp_hal_status = ADC_Enable(hadc);
 717 
    /* - Clear state bitfield related to regular group conversion results     */
718 
  if (tmp_hal_status == HAL_OK)
 718 
    /* - Set state bitfield related to regular operation                      */
719 
  {
 719 
    ADC_STATE_CLR_SET(hadc->State,
720 
    tmp_hal_status = ADC_Enable(&tmphadcSlave);
 720 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_MULTIMODE_SLAVE,
721 
  }
 721 
                      HAL_ADC_STATE_REG_BUSY);
722 
 
 722 
     
723 
  /* Start conversion if all ADCs of multimode are effectively enabled */
 723 
    /* If conversions on group regular are also triggering group injected,    */
724 
  if (tmp_hal_status == HAL_OK)
 724 
    /* update ADC state.                                                      */
725 
  {
 725 
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
726 
    /* Set ADC state (ADC master)                                             */
 726 
    {
727 
    /* - Clear state bitfield related to regular group conversion results     */
 727 
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
728 
    /* - Set state bitfield related to regular operation                      */
 728 
    }
729 
    ADC_STATE_CLR_SET(hadc->State,
 729 
   
730 
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_MULTIMODE_SLAVE,
 730 
    /* Process unlocked */
731 
                      HAL_ADC_STATE_REG_BUSY);
 731 
    /* Unlock before starting ADC conversions: in case of potential           */
732 
     
 732 
    /* interruption, to let the process to ADC IRQ Handler.                   */
733 
    /* If conversions on group regular are also triggering group injected,    */
 733 
    __HAL_UNLOCK(hadc);
734 
    /* update ADC state.                                                      */
 734 
   
735 
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
 735 
    /* Set ADC error code to none */
736 
    {
 736 
    ADC_CLEAR_ERRORCODE(hadc);
737 
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
 737 
   
738 
    }
 738 
   
739 
   
 739 
    /* Set the DMA transfer complete callback */
740 
    /* Process unlocked */
 740 
    hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
741 
    /* Unlock before starting ADC conversions: in case of potential           */
 741 
       
742 
    /* interruption, to let the process to ADC IRQ Handler.                   */
 742 
    /* Set the DMA half transfer complete callback */
743 
    __HAL_UNLOCK(hadc);
 743 
    hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
744 
   
 744 
   
745 
    /* Set ADC error code to none */
 745 
    /* Set the DMA error callback */
746 
    ADC_CLEAR_ERRORCODE(hadc);
 746 
    hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
747 
   
 747 
 
748 
   
 748 
   
749 
    /* Set the DMA transfer complete callback */
 749 
    /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC     */
750 
    hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
 750 
    /* start (in case of SW start):                                           */
751 
       
 751 
   
752 
    /* Set the DMA half transfer complete callback */
 752 
    /* Clear regular group conversion flag and overrun flag */
753 
    hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
 753 
    /* (To ensure of no unknown state from potential previous ADC operations) */
754 
   
 754 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
755 
    /* Set the DMA error callback */
 755 
   
756 
    hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
 756 
    /* Enable ADC DMA mode of ADC master */
757 
 
 757 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
758 
   
 758 
   
759 
    /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC     */
 759 
    /* Start the DMA channel */
760 
    /* start (in case of SW start):                                           */
 760 
    HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
761 
   
 761 
   
762 
    /* Clear regular group conversion flag and overrun flag */
 762 
    /* Start conversion of regular group if software start has been selected. */
763 
    /* (To ensure of no unknown state from potential previous ADC operations) */
 763 
    /* If external trigger has been selected, conversion will start at next   */
764 
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
 764 
    /* trigger event.                                                         */
765 
   
 765 
    /* Note: Alternate trigger for single conversion could be to force an     */
766 
    /* Enable ADC DMA mode of ADC master */
 766 
    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
767 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
 767 
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
768 
   
 768 
    {
769 
    /* Start the DMA channel */
 769 
      /* Start ADC conversion on regular group with SW start */
770 
    HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
 770 
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
771 
   
 771 
    }
772 
    /* Start conversion of regular group if software start has been selected. */
 772 
    else
773 
    /* If external trigger has been selected, conversion will start at next   */
 773 
    {
774 
    /* trigger event.                                                         */
 774 
      /* Start ADC conversion on regular group with external trigger */
775 
    /* Note: Alternate trigger for single conversion could be to force an     */
 775 
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
776 
    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
 776 
    }
777 
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
 777 
  }
778 
    {
 778 
  else
779 
      /* Start ADC conversion on regular group with SW start */
 779 
  {
780 
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
 780 
    /* Process unlocked */
781 
    }
 781 
    __HAL_UNLOCK(hadc);
782 
    else
 782 
  }
783 
    {
 783 
 
784 
      /* Start ADC conversion on regular group with external trigger */
 784 
  /* Return function status */
785 
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
 785 
  return tmp_hal_status;
786 
    }
 786 
}
787 
  }
 787 
 
788 
  else
 788 
/**
789 
  {
 789 
  * @brief  Stop ADC conversion of regular group (and injected channels in
790 
    /* Process unlocked */
 790 
  *         case of auto_injection mode), disable ADC DMA transfer, disable
791 
    __HAL_UNLOCK(hadc);
 791 
  *         ADC peripheral.
792 
  }
 792 
  * @note   Multimode is kept enabled after this function. To disable multimode
793 
 
 793 
  *         (set with HAL_ADCEx_MultiModeConfigChannel(), ADC must be
794 
  /* Return function status */
 794 
  *         reinitialized using HAL_ADC_Init() or HAL_ADC_ReInit().
795 
  return tmp_hal_status;
 795 
  * @note   In case of DMA configured in circular mode, function
796 
}
 796 
  *         HAL_ADC_Stop_DMA must be called after this function with handle of
797 
 
 797 
  *         ADC slave, to properly disable the DMA channel.
798 
/**
 798 
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
799 
  * @brief  Stop ADC conversion of regular group (and injected channels in
 799 
  * @retval None
800 
  *         case of auto_injection mode), disable ADC DMA transfer, disable
 800 
  */
801 
  *         ADC peripheral.
 801 
HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
802 
  * @note   Multimode is kept enabled after this function. To disable multimode
 802 
{
803 
  *         (set with HAL_ADCEx_MultiModeConfigChannel(), ADC must be
 803 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
804 
  *         reinitialized using HAL_ADC_Init() or HAL_ADC_ReInit().
 804 
  ADC_HandleTypeDef tmphadcSlave={0};
805 
  * @note   In case of DMA configured in circular mode, function
 805 
 
806 
  *         HAL_ADC_Stop_DMA must be called after this function with handle of
 806 
  /* Check the parameters */
807 
  *         ADC slave, to properly disable the DMA channel.
 807 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
808 
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
 808 
 
809 
  * @retval None
 809 
  /* Process locked */
810 
  */
 810 
  __HAL_LOCK(hadc);
811 
HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
 811 
 
812 
{
 812 
  /* Stop potential conversion on going, on regular and injected groups */
813 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 813 
  /* Disable ADC master peripheral */
814 
  ADC_HandleTypeDef tmphadcSlave={0};
 814 
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
815 
 
 815 
 
816 
  /* Check the parameters */
 816 
  /* Check if ADC is effectively disabled */
817 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
 817 
  if(tmp_hal_status == HAL_OK)
818 
 
 818 
  {
819 
  /* Process locked */
 819 
    /* Set a temporary handle of the ADC slave associated to the ADC master   */
820 
  __HAL_LOCK(hadc);
 820 
    ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
821 
 
 821 
 
822 
  /* Stop potential conversion on going, on regular and injected groups */
 822 
    /* Disable ADC slave peripheral */
823 
  /* Disable ADC master peripheral */
 823 
    tmp_hal_status = ADC_ConversionStop_Disable(&tmphadcSlave);
824 
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
 824 
 
825 
 
 825 
    /* Check if ADC is effectively disabled */
826 
  /* Check if ADC is effectively disabled */
 826 
    if(tmp_hal_status != HAL_OK)
827 
  if(tmp_hal_status == HAL_OK)
 827 
    {
828 
  {
 828 
      /* Update ADC state machine to error */
829 
    /* Set a temporary handle of the ADC slave associated to the ADC master   */
 829 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
830 
    ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
 830 
 
831 
 
 831 
      /* Process unlocked */
832 
    /* Disable ADC slave peripheral */
 832 
      __HAL_UNLOCK(hadc);
833 
    tmp_hal_status = ADC_ConversionStop_Disable(&tmphadcSlave);
 833 
 
834 
 
 834 
      return HAL_ERROR;
835 
    /* Check if ADC is effectively disabled */
 835 
    }
836 
    if(tmp_hal_status != HAL_OK)
 836 
 
837 
    {
 837 
    /* Disable ADC DMA mode */
838 
      /* Update ADC state machine to error */
 838 
    CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
839 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
 839 
   
840 
 
 840 
    /* Reset configuration of ADC DMA continuous request for dual mode */
841 
      /* Process unlocked */
 841 
    CLEAR_BIT(hadc->Instance->CR1, ADC_CR1_DUALMOD);
842 
      __HAL_UNLOCK(hadc);
 842 
       
843 
 
 843 
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
844 
      return HAL_ERROR;
 844 
    /* while DMA transfer is on going)                                        */
845 
    }
 845 
    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
846 
 
 846 
 
847 
    /* Disable ADC DMA mode */
 847 
    /* Change ADC state (ADC master) */
848 
    CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
 848 
    ADC_STATE_CLR_SET(hadc->State,
849 
   
 849 
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
850 
    /* Reset configuration of ADC DMA continuous request for dual mode */
 850 
                      HAL_ADC_STATE_READY);
851 
    CLEAR_BIT(hadc->Instance->CR1, ADC_CR1_DUALMOD);
 851 
  }
852 
       
 852 
 
853 
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
 853 
  /* Process unlocked */
854 
    /* while DMA transfer is on going)                                        */
 854 
  __HAL_UNLOCK(hadc);
855 
    tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
 855 
 
856 
 
 856 
  /* Return function status */
857 
    /* Change ADC state (ADC master) */
 857 
  return tmp_hal_status;
858 
    ADC_STATE_CLR_SET(hadc->State,
 858 
}
859 
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
 859 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
860 
                      HAL_ADC_STATE_READY);
 860 
 
861 
  }
 861 
/**
862 
 
 862 
  * @brief  Get ADC injected group conversion result.
863 
  /* Process unlocked */
 863 
  * @note   Reading register JDRx automatically clears ADC flag JEOC
864 
  __HAL_UNLOCK(hadc);
 864 
  *         (ADC group injected end of unitary conversion).
865 
 
 865 
  * @note   This function does not clear ADC flag JEOS
866 
  /* Return function status */
 866 
  *         (ADC group injected end of sequence conversion)
867 
  return tmp_hal_status;
 867 
  *         Occurrence of flag JEOS rising:
868 
}
 868 
  *          - If sequencer is composed of 1 rank, flag JEOS is equivalent
869 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 869 
  *            to flag JEOC.
870 
 
 870 
  *          - If sequencer is composed of several ranks, during the scan
871 
/**
 871 
  *            sequence flag JEOC only is raised, at the end of the scan sequence
872 
  * @brief  Get ADC injected group conversion result.
 872 
  *            both flags JEOC and EOS are raised.
873 
  * @note   Reading register JDRx automatically clears ADC flag JEOC
 873 
  *         Flag JEOS must not be cleared by this function because
874 
  *         (ADC group injected end of unitary conversion).
 874 
  *         it would not be compliant with low power features
875 
  * @note   This function does not clear ADC flag JEOS
 875 
  *         (feature low power auto-wait, not available on all STM32 families).
876 
  *         (ADC group injected end of sequence conversion)
 876 
  *         To clear this flag, either use function:
877 
  *         Occurrence of flag JEOS rising:
 877 
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
878 
  *          - If sequencer is composed of 1 rank, flag JEOS is equivalent
 878 
  *         model polling: @ref HAL_ADCEx_InjectedPollForConversion()
879 
  *            to flag JEOC.
 879 
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
880 
  *          - If sequencer is composed of several ranks, during the scan
 880 
  * @param  hadc: ADC handle
881 
  *            sequence flag JEOC only is raised, at the end of the scan sequence
 881 
  * @param  InjectedRank: the converted ADC injected rank.
882 
  *            both flags JEOC and EOS are raised.
 882 
  *          This parameter can be one of the following values:
883 
  *         Flag JEOS must not be cleared by this function because
 883 
  *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
884 
  *         it would not be compliant with low power features
 884 
  *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
885 
  *         (feature low power auto-wait, not available on all STM32 families).
 885 
  *            @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
886 
  *         To clear this flag, either use function:
 886 
  *            @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
887 
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
 887 
  * @retval ADC group injected conversion data
888 
  *         model polling: @ref HAL_ADCEx_InjectedPollForConversion()
 888 
  */
889 
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
 889 
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
890 
  * @param  hadc: ADC handle
 890 
{
891 
  * @param  InjectedRank: the converted ADC injected rank.
 891 
  uint32_t tmp_jdr = 0U;
892 
  *          This parameter can be one of the following values:
 892 
 
893 
  *            @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
 893 
  /* Check the parameters */
894 
  *            @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
 894 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
895 
  *            @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
 895 
  assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
896 
  *            @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
 896 
 
897 
  * @retval ADC group injected conversion data
 897 
  /* Get ADC converted value */
898 
  */
 898 
  switch(InjectedRank)
899 
uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
 899 
  {  
900 
{
 900 
    case ADC_INJECTED_RANK_4:
901 
  uint32_t tmp_jdr = 0U;
 901 
      tmp_jdr = hadc->Instance->JDR4;
902 
 
 902 
      break;
903 
  /* Check the parameters */
 903 
    case ADC_INJECTED_RANK_3:
904 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 904 
      tmp_jdr = hadc->Instance->JDR3;
905 
  assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
 905 
      break;
906 
 
 906 
    case ADC_INJECTED_RANK_2:
907 
  /* Get ADC converted value */
 907 
      tmp_jdr = hadc->Instance->JDR2;
908 
  switch(InjectedRank)
 908 
      break;
909 
  {  
 909 
    case ADC_INJECTED_RANK_1:
910 
    case ADC_INJECTED_RANK_4:
 910 
    default:
911 
      tmp_jdr = hadc->Instance->JDR4;
 911 
      tmp_jdr = hadc->Instance->JDR1;
912 
      break;
 912 
      break;
913 
    case ADC_INJECTED_RANK_3:
 913 
  }
914 
      tmp_jdr = hadc->Instance->JDR3;
 914 
 
915 
      break;
 915 
  /* Return ADC converted value */
916 
    case ADC_INJECTED_RANK_2:
 916 
  return tmp_jdr;
917 
      tmp_jdr = hadc->Instance->JDR2;
 917 
}
918 
      break;
 918 
 
919 
    case ADC_INJECTED_RANK_1:
 919 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
920 
    default:
 920 
/**
921 
      tmp_jdr = hadc->Instance->JDR1;
 921 
  * @brief  Returns the last ADC Master&Slave regular conversions results data
922 
      break;
 922 
  *         in the selected multi mode.
923 
  }
 923 
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
924 
 
 924 
  * @retval The converted data value.
925 
  /* Return ADC converted value */
 925 
  */
926 
  return tmp_jdr;
 926 
uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
927 
}
 927 
{
928 
 
 928 
  uint32_t tmpDR = 0U;
929 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 929 
 
930 
/**
 930 
  /* Check the parameters */
931 
  * @brief  Returns the last ADC Master&Slave regular conversions results data
 931 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
932 
  *         in the selected multi mode.
 932 
 
933 
  * @param  hadc: ADC handle of ADC master (handle of ADC slave must not be used)
 933 
  /* Check the parameters */
934 
  * @retval The converted data value.
 934 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
935 
  */
 935 
 
936 
uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
 936 
  /* Note: EOC flag is not cleared here by software because automatically     */
937 
{
 937 
  /*       cleared by hardware when reading register DR.                      */
938 
  uint32_t tmpDR = 0U;
 938 
 
939 
 
 939 
  /* On STM32F1 devices, ADC1 data register DR contains ADC2 conversions      */
940 
  /* Check the parameters */
 940 
  /* only if ADC1 DMA mode is enabled.                                        */
941 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
 941 
  tmpDR = hadc->Instance->DR;
942 
 
 942 
 
943 
  /* Check the parameters */
 943 
  if (HAL_IS_BIT_CLR(ADC1->CR2, ADC_CR2_DMA))
944 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 944 
  {
945 
 
 945 
    tmpDR |= (ADC2->DR << 16U);
946 
  /* Note: EOC flag is not cleared here by software because automatically     */
 946 
  }
947 
  /*       cleared by hardware when reading register DR.                      */
 947 
   
948 
 
 948 
  /* Return ADC converted value */
949 
  /* On STM32F1 devices, ADC1 data register DR contains ADC2 conversions      */
 949 
  return tmpDR;
950 
  /* only if ADC1 DMA mode is enabled.                                        */
 950 
}
951 
  tmpDR = hadc->Instance->DR;
 951 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
952 
 
 952 
 
953 
  if (HAL_IS_BIT_CLR(ADC1->CR2, ADC_CR2_DMA))
 953 
/**
954 
  {
 954 
  * @brief  Injected conversion complete callback in non blocking mode
955 
    tmpDR |= (ADC2->DR << 16U);
 955 
  * @param  hadc: ADC handle
956 
  }
 956 
  * @retval None
957 
   
 957 
  */
958 
  /* Return ADC converted value */
 958 
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
959 
  return tmpDR;
 959 
{
960 
}
 960 
  /* Prevent unused argument(s) compilation warning */
961 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 961 
  UNUSED(hadc);
962 
 
 962 
  /* NOTE : This function Should not be modified, when the callback is needed,
963 
/**
 963 
            the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
964 
  * @brief  Injected conversion complete callback in non blocking mode
 964 
  */
965 
  * @param  hadc: ADC handle
 965 
}
966 
  * @retval None
 966 
 
967 
  */
 967 
/**
968 
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
 968 
  * @}
969 
{
 969 
  */
970 
  /* Prevent unused argument(s) compilation warning */
 970 
 
971 
  UNUSED(hadc);
 971 
/** @defgroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions
972 
  /* NOTE : This function Should not be modified, when the callback is needed,
 972 
  * @brief    Extended Peripheral Control functions
973 
            the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
 973 
  *
974 
  */
 974 
@verbatim  
975 
}
 975 
 ===============================================================================
976 
 
 976 
             ##### Peripheral Control functions #####
977 
/**
 977 
 ===============================================================================  
978 
  * @}
 978 
    [..]  This section provides functions allowing to:
979 
  */
 979 
      (+) Configure channels on injected group
980 
 
 980 
      (+) Configure multimode
981 
/** @defgroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions
 981 
 
982 
  * @brief    Extended Peripheral Control functions
 982 
@endverbatim
983 
  *
 983 
  * @{
984 
@verbatim  
 984 
  */
985 
 ===============================================================================
 985 
 
986 
             ##### Peripheral Control functions #####
 986 
/**
987 
 ===============================================================================  
 987 
  * @brief  Configures the ADC injected group and the selected channel to be
988 
    [..]  This section provides functions allowing to:
 988 
  *         linked to the injected group.
989 
      (+) Configure channels on injected group
 989 
  * @note   Possibility to update parameters on the fly:
990 
      (+) Configure multimode
 990 
  *         This function initializes injected group, following calls to this
991 
 
 991 
  *         function can be used to reconfigure some parameters of structure
992 
@endverbatim
 992 
  *         "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
993 
  * @{
 993 
  *         The setting of these parameters is conditioned to ADC state:
994 
  */
 994 
  *         this function must be called when ADC is not under conversion.
995 
 
 995 
  * @param  hadc: ADC handle
996 
/**
 996 
  * @param  sConfigInjected: Structure of ADC injected group and ADC channel for
997 
  * @brief  Configures the ADC injected group and the selected channel to be
 997 
  *         injected group.
998 
  *         linked to the injected group.
 998 
  * @retval None
999 
  * @note   Possibility to update parameters on the fly:
 999 
  */
1000 
  *         This function initializes injected group, following calls to this
 1000 
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
1001 
  *         function can be used to reconfigure some parameters of structure
 1001 
{
1002 
  *         "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
 1002 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1003 
  *         The setting of these parameters is conditioned to ADC state:
 1003 
  __IO uint32_t wait_loop_index = 0U;
1004 
  *         this function must be called when ADC is not under conversion.
 1004 
 
1005 
  * @param  hadc: ADC handle
 1005 
  /* Check the parameters */
1006 
  * @param  sConfigInjected: Structure of ADC injected group and ADC channel for
 1006 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1007 
  *         injected group.
 1007 
  assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
1008 
  * @retval None
 1008 
  assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
1009 
  */
 1009 
  assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
1010 
HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
 1010 
  assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
1011 
{
 1011 
  assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
1012 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 1012 
 
1013 
  __IO uint32_t wait_loop_index = 0U;
 1013 
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1014 
 
 1014 
  {
1015 
  /* Check the parameters */
 1015 
    assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
1016 
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
 1016 
    assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
1017 
  assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
 1017 
    assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
1018 
  assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
 1018 
  }
1019 
  assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
 1019 
 
1020 
  assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
 1020 
  /* Process locked */
1021 
  assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
 1021 
  __HAL_LOCK(hadc);
1022 
 
 1022 
 
1023 
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
 1023 
  /* Configuration of injected group sequencer:                               */
1024 
  {
 1024 
  /* - if scan mode is disabled, injected channels sequence length is set to  */
1025 
    assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
 1025 
  /*   0x00: 1 channel converted (channel on regular rank 1)                  */
1026 
    assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
 1026 
  /*   Parameter "InjectedNbrOfConversion" is discarded.                      */
1027 
    assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
 1027 
  /*   Note: Scan mode is present by hardware on this device and, if          */
1028 
  }
 1028 
  /*   disabled, discards automatically nb of conversions. Anyway, nb of      */
1029 
 
 1029 
  /*   conversions is forced to 0x00 for alignment over all STM32 devices.    */
1030 
  /* Process locked */
 1030 
  /* - if scan mode is enabled, injected channels sequence length is set to   */
1031 
  __HAL_LOCK(hadc);
 1031 
  /*   parameter "InjectedNbrOfConversion".                                   */
1032 
 
 1032 
  if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
1033 
  /* Configuration of injected group sequencer:                               */
 1033 
  {
1034 
  /* - if scan mode is disabled, injected channels sequence length is set to  */
 1034 
    if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1035 
  /*   0x00: 1 channel converted (channel on regular rank 1)                  */
 1035 
    {
1036 
  /*   Parameter "InjectedNbrOfConversion" is discarded.                      */
 1036 
      /* Clear the old SQx bits for all injected ranks */
1037 
  /*   Note: Scan mode is present by hardware on this device and, if          */
 1037 
      MODIFY_REG(hadc->Instance->JSQR                             ,
1038 
  /*   disabled, discards automatically nb of conversions. Anyway, nb of      */
 1038 
                 ADC_JSQR_JL   |
1039 
  /*   conversions is forced to 0x00 for alignment over all STM32 devices.    */
 1039 
                 ADC_JSQR_JSQ4 |
1040 
  /* - if scan mode is enabled, injected channels sequence length is set to   */
 1040 
                 ADC_JSQR_JSQ3 |
1041 
  /*   parameter "InjectedNbrOfConversion".                                   */
 1041 
                 ADC_JSQR_JSQ2 |
1042 
  if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
 1042 
                 ADC_JSQR_JSQ1                                    ,
1043 
  {
 1043 
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
1044 
    if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
 1044 
                                  ADC_INJECTED_RANK_1,
1045 
    {
 1045 
                                  0x01U));
1046 
      /* Clear the old SQx bits for all injected ranks */
 1046 
    }
1047 
      MODIFY_REG(hadc->Instance->JSQR                             ,
 1047 
    /* If another injected rank than rank1 was intended to be set, and could  */
1048 
                 ADC_JSQR_JL   |
 1048 
    /* not due to ScanConvMode disabled, error is reported.                   */
1049 
                 ADC_JSQR_JSQ4 |
 1049 
    else
1050 
                 ADC_JSQR_JSQ3 |
 1050 
    {
1051 
                 ADC_JSQR_JSQ2 |
 1051 
      /* Update ADC state machine to error */
1052 
                 ADC_JSQR_JSQ1                                    ,
 1052 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1053 
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
 1053 
     
1054 
                                  ADC_INJECTED_RANK_1,
 1054 
      tmp_hal_status = HAL_ERROR;
1055 
                                  0x01U));
 1055 
    }
1056 
    }
 1056 
  }
1057 
    /* If another injected rank than rank1 was intended to be set, and could  */
 1057 
  else
1058 
    /* not due to ScanConvMode disabled, error is reported.                   */
 1058 
  {
1059 
    else
 1059 
    /* Since injected channels rank conv. order depends on total number of   */
1060 
    {
 1060 
    /* injected conversions, selected rank must be below or equal to total   */
1061 
      /* Update ADC state machine to error */
 1061 
    /* number of injected conversions to be updated.                         */
1062 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 1062 
    if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
1063 
     
 1063 
    {
1064 
      tmp_hal_status = HAL_ERROR;
 1064 
      /* Clear the old SQx bits for the selected rank */
1065 
    }
 1065 
      /* Set the SQx bits for the selected rank */
1066 
  }
 1066 
      MODIFY_REG(hadc->Instance->JSQR                                         ,
1067 
  else
 1067 
                 
1068 
  {
 1068 
                 ADC_JSQR_JL                                               |
1069 
    /* Since injected channels rank conv. order depends on total number of   */
 1069 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
1070 
    /* injected conversions, selected rank must be below or equal to total   */
 1070 
                                  sConfigInjected->InjectedRank,        
1071 
    /* number of injected conversions to be updated.                         */
 1071 
                                  sConfigInjected->InjectedNbrOfConversion)   ,
1072 
    if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
 1072 
                 
1073 
    {
 1073 
                 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
1074 
      /* Clear the old SQx bits for the selected rank */
 1074 
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,      
1075 
      /* Set the SQx bits for the selected rank */
 1075 
                                  sConfigInjected->InjectedRank,        
1076 
      MODIFY_REG(hadc->Instance->JSQR                                         ,
 1076 
                                  sConfigInjected->InjectedNbrOfConversion)    );
1077 
                 
 1077 
    }
1078 
                 ADC_JSQR_JL                                               |
 1078 
    else
1079 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
 1079 
    {
1080 
                                  sConfigInjected->InjectedRank,        
 1080 
      /* Clear the old SQx bits for the selected rank */
1081 
                                  sConfigInjected->InjectedNbrOfConversion)   ,
 1081 
      MODIFY_REG(hadc->Instance->JSQR                                       ,
1082 
                 
 1082 
                 
1083 
                 ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
 1083 
                 ADC_JSQR_JL                                               |
1084 
                 ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,      
 1084 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
1085 
                                  sConfigInjected->InjectedRank,        
 1085 
                                  sConfigInjected->InjectedRank,        
1086 
                                  sConfigInjected->InjectedNbrOfConversion)    );
 1086 
                                  sConfigInjected->InjectedNbrOfConversion) ,
1087 
    }
 1087 
                 
1088 
    else
 1088 
                 0x00000000U);
1089 
    {
 1089 
    }
1090 
      /* Clear the old SQx bits for the selected rank */
 1090 
  }
1091 
      MODIFY_REG(hadc->Instance->JSQR                                       ,
 1091 
   
1092 
                 
 1092 
  /* Configuration of injected group                                          */
1093 
                 ADC_JSQR_JL                                               |
 1093 
  /* Parameters update conditioned to ADC state:                              */
1094 
                 ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,                        
 1094 
  /* Parameters that can be updated only when ADC is disabled:                */
1095 
                                  sConfigInjected->InjectedRank,        
 1095 
  /*  - external trigger to start conversion                                  */
1096 
                                  sConfigInjected->InjectedNbrOfConversion) ,
 1096 
  /* Parameters update not conditioned to ADC state:                          */
1097 
                 
 1097 
  /*  - Automatic injected conversion                                         */
1098 
                 0x00000000U);
 1098 
  /*  - Injected discontinuous mode                                           */
1099 
    }
 1099 
  /* Note: In case of ADC already enabled, caution to not launch an unwanted  */
1100 
  }
 1100 
  /*       conversion while modifying register CR2 by writing 1 to bit ADON.  */
1101 
   
 1101 
  if (ADC_IS_ENABLE(hadc) == RESET)
1102 
  /* Configuration of injected group                                          */
 1102 
  {    
1103 
  /* Parameters update conditioned to ADC state:                              */
 1103 
    MODIFY_REG(hadc->Instance->CR2                                           ,
1104 
  /* Parameters that can be updated only when ADC is disabled:                */
 1104 
               ADC_CR2_JEXTSEL |
1105 
  /*  - external trigger to start conversion                                  */
 1105 
               ADC_CR2_ADON                                                  ,
1106 
  /* Parameters update not conditioned to ADC state:                          */
 1106 
               ADC_CFGR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) );
1107 
  /*  - Automatic injected conversion                                         */
 1107 
  }
1108 
  /*  - Injected discontinuous mode                                           */
 1108 
 
1109 
  /* Note: In case of ADC already enabled, caution to not launch an unwanted  */
 1109 
 
1110 
  /*       conversion while modifying register CR2 by writing 1 to bit ADON.  */
 1110 
  /* Configuration of injected group                                          */
1111 
  if (ADC_IS_ENABLE(hadc) == RESET)
 1111 
  /*  - Automatic injected conversion                                         */
1112 
  {    
 1112 
  /*  - Injected discontinuous mode                                           */
1113 
    MODIFY_REG(hadc->Instance->CR2                                           ,
 1113 
 
1114 
               ADC_CR2_JEXTSEL |
 1114 
    /* Automatic injected conversion can be enabled if injected group         */
1115 
               ADC_CR2_ADON                                                  ,
 1115 
    /* external triggers are disabled.                                        */
1116 
               ADC_CFGR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) );
 1116 
    if (sConfigInjected->AutoInjectedConv == ENABLE)
1117 
  }
 1117 
    {
1118 
 
 1118 
      if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1119 
 
 1119 
      {
1120 
  /* Configuration of injected group                                          */
 1120 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
1121 
  /*  - Automatic injected conversion                                         */
 1121 
      }
1122 
  /*  - Injected discontinuous mode                                           */
 1122 
      else
1123 
 
 1123 
      {
1124 
    /* Automatic injected conversion can be enabled if injected group         */
 1124 
        /* Update ADC state machine to error */
1125 
    /* external triggers are disabled.                                        */
 1125 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1126 
    if (sConfigInjected->AutoInjectedConv == ENABLE)
 1126 
       
1127 
    {
 1127 
        tmp_hal_status = HAL_ERROR;
1128 
      if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
 1128 
      }
1129 
      {
 1129 
    }
1130 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
 1130 
   
1131 
      }
 1131 
    /* Injected discontinuous can be enabled only if auto-injected mode is    */
1132 
      else
 1132 
    /* disabled.                                                              */  
1133 
      {
 1133 
    if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
1134 
        /* Update ADC state machine to error */
 1134 
    {
1135 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 1135 
      if (sConfigInjected->AutoInjectedConv == DISABLE)
1136 
       
 1136 
      {
1137 
        tmp_hal_status = HAL_ERROR;
 1137 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
1138 
      }
 1138 
      }
1139 
    }
 1139 
      else
1140 
   
 1140 
      {
1141 
    /* Injected discontinuous can be enabled only if auto-injected mode is    */
 1141 
        /* Update ADC state machine to error */
1142 
    /* disabled.                                                              */  
 1142 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1143 
    if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
 1143 
       
1144 
    {
 1144 
        tmp_hal_status = HAL_ERROR;
1145 
      if (sConfigInjected->AutoInjectedConv == DISABLE)
 1145 
      }
1146 
      {
 1146 
    }
1147 
        SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
 1147 
 
1148 
      }
 1148 
 
1149 
      else
 1149 
  /* InjectedChannel sampling time configuration */
1150 
      {
 1150 
  /* For channels 10 to 17 */
1151 
        /* Update ADC state machine to error */
 1151 
  if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_10)
1152 
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 1152 
  {
1153 
       
 1153 
    MODIFY_REG(hadc->Instance->SMPR1                                                             ,
1154 
        tmp_hal_status = HAL_ERROR;
 1154 
               ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel)                      ,
1155 
      }
 1155 
               ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
1156 
    }
 1156 
  }
1157 
 
 1157 
  else /* For channels 0 to 9 */
1158 
 
 1158 
  {
1159 
  /* InjectedChannel sampling time configuration */
 1159 
    MODIFY_REG(hadc->Instance->SMPR2                                                             ,
1160 
  /* For channels 10 to 17 */
 1160 
               ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel)                       ,
1161 
  if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_10)
 1161 
               ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
1162 
  {
 1162 
  }
1163 
    MODIFY_REG(hadc->Instance->SMPR1                                                             ,
 1163 
 
1164 
               ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel)                      ,
 1164 
  /* If ADC1 InjectedChannel_16 or InjectedChannel_17 is selected, enable Temperature sensor  */
1165 
               ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
 1165 
  /* and VREFINT measurement path.                                            */
1166 
  }
 1166 
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
1167 
  else /* For channels 0 to 9 */
 1167 
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
1168 
  {
 1168 
  {
1169 
    MODIFY_REG(hadc->Instance->SMPR2                                                             ,
 1169 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
1170 
               ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel)                       ,
 1170 
  }
1171 
               ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
 1171 
 
1172 
  }
 1172 
 
1173 
 
 1173 
  /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
1174 
  /* If ADC1 InjectedChannel_16 or InjectedChannel_17 is selected, enable Temperature sensor  */
 1174 
  switch(sConfigInjected->InjectedRank)
1175 
  /* and VREFINT measurement path.                                            */
 1175 
  {
1176 
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
 1176 
    case 1:
1177 
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
 1177 
      /* Set injected channel 1 offset */
1178 
  {
 1178 
      MODIFY_REG(hadc->Instance->JOFR1,
1179 
    SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 1179 
                 ADC_JOFR1_JOFFSET1,
1180 
  }
 1180 
                 sConfigInjected->InjectedOffset);
1181 
 
 1181 
      break;
1182 
 
 1182 
    case 2:
1183 
  /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
 1183 
      /* Set injected channel 2 offset */
1184 
  switch(sConfigInjected->InjectedRank)
 1184 
      MODIFY_REG(hadc->Instance->JOFR2,
1185 
  {
 1185 
                 ADC_JOFR2_JOFFSET2,
1186 
    case 1:
 1186 
                 sConfigInjected->InjectedOffset);
1187 
      /* Set injected channel 1 offset */
 1187 
      break;
1188 
      MODIFY_REG(hadc->Instance->JOFR1,
 1188 
    case 3:
1189 
                 ADC_JOFR1_JOFFSET1,
 1189 
      /* Set injected channel 3 offset */
1190 
                 sConfigInjected->InjectedOffset);
 1190 
      MODIFY_REG(hadc->Instance->JOFR3,
1191 
      break;
 1191 
                 ADC_JOFR3_JOFFSET3,
1192 
    case 2:
 1192 
                 sConfigInjected->InjectedOffset);
1193 
      /* Set injected channel 2 offset */
 1193 
      break;
1194 
      MODIFY_REG(hadc->Instance->JOFR2,
 1194 
    case 4:
1195 
                 ADC_JOFR2_JOFFSET2,
 1195 
    default:
1196 
                 sConfigInjected->InjectedOffset);
 1196 
      MODIFY_REG(hadc->Instance->JOFR4,
1197 
      break;
 1197 
                 ADC_JOFR4_JOFFSET4,
1198 
    case 3:
 1198 
                 sConfigInjected->InjectedOffset);
1199 
      /* Set injected channel 3 offset */
 1199 
      break;
1200 
      MODIFY_REG(hadc->Instance->JOFR3,
 1200 
  }
1201 
                 ADC_JOFR3_JOFFSET3,
 1201 
 
1202 
                 sConfigInjected->InjectedOffset);
 1202 
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
1203 
      break;
 1203 
  /* and VREFINT measurement path.                                            */
1204 
    case 4:
 1204 
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
1205 
    default:
 1205 
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
1206 
      MODIFY_REG(hadc->Instance->JOFR4,
 1206 
  {
1207 
                 ADC_JOFR4_JOFFSET4,
 1207 
    /* For STM32F1 devices with several ADC: Only ADC1 can access internal    */
1208 
                 sConfigInjected->InjectedOffset);
 1208 
    /* measurement channels (VrefInt/TempSensor). If these channels are       */
1209 
      break;
 1209 
    /* intended to be set on other ADC instances, an error is reported.       */
1210 
  }
 1210 
    if (hadc->Instance == ADC1)
1211 
 
 1211 
    {
1212 
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
 1212 
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
1213 
  /* and VREFINT measurement path.                                            */
 1213 
      {
1214 
  if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
 1214 
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
1215 
      (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)      )
 1215 
       
1216 
  {
 1216 
        if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
1217 
    /* For STM32F1 devices with several ADC: Only ADC1 can access internal    */
 1217 
        {
1218 
    /* measurement channels (VrefInt/TempSensor). If these channels are       */
 1218 
          /* Delay for temperature sensor stabilization time */
1219 
    /* intended to be set on other ADC instances, an error is reported.       */
 1219 
          /* Compute number of CPU cycles to wait for */
1220 
    if (hadc->Instance == ADC1)
 1220 
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
1221 
    {
 1221 
          while(wait_loop_index != 0U)
1222 
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
 1222 
          {
1223 
      {
 1223 
            wait_loop_index--;
1224 
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
 1224 
          }
1225 
       
 1225 
        }
1226 
        if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
 1226 
      }
1227 
        {
 1227 
    }
1228 
          /* Delay for temperature sensor stabilization time */
 1228 
    else
1229 
          /* Compute number of CPU cycles to wait for */
 1229 
    {
1230 
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 1230 
      /* Update ADC state machine to error */
1231 
          while(wait_loop_index != 0U)
 1231 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1232 
          {
 1232 
     
1233 
            wait_loop_index--;
 1233 
      tmp_hal_status = HAL_ERROR;
1234 
          }
 1234 
    }
1235 
        }
 1235 
  }
1236 
      }
 1236 
 
1237 
    }
 1237 
  /* Process unlocked */
1238 
    else
 1238 
  __HAL_UNLOCK(hadc);
1239 
    {
 1239 
 
1240 
      /* Update ADC state machine to error */
 1240 
  /* Return function status */
1241 
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 1241 
  return tmp_hal_status;
1242 
     
 1242 
}
1243 
      tmp_hal_status = HAL_ERROR;
 1243 
 
1244 
    }
 1244 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
1245 
  }
 1245 
/**
1246 
 
 1246 
  * @brief  Enable ADC multimode and configure multimode parameters
1247 
  /* Process unlocked */
 1247 
  * @note   Possibility to update parameters on the fly:
1248 
  __HAL_UNLOCK(hadc);
 1248 
  *         This function initializes multimode parameters, following  
1249 
 
 1249 
  *         calls to this function can be used to reconfigure some parameters
1250 
  /* Return function status */
 1250 
  *         of structure "ADC_MultiModeTypeDef" on the fly, without resetting
1251 
  return tmp_hal_status;
 1251 
  *         the ADCs (both ADCs of the common group).
1252 
}
 1252 
  *         The setting of these parameters is conditioned to ADC state.
1253 
 
 1253 
  *         For parameters constraints, see comments of structure
1254 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 1254 
  *         "ADC_MultiModeTypeDef".
1255 
/**
 1255 
  * @note   To change back configuration from multimode to single mode, ADC must
1256 
  * @brief  Enable ADC multimode and configure multimode parameters
 1256 
  *         be reset (using function HAL_ADC_Init() ).
1257 
  * @note   Possibility to update parameters on the fly:
 1257 
  * @param  hadc: ADC handle
1258 
  *         This function initializes multimode parameters, following  
 1258 
  * @param  multimode: Structure of ADC multimode configuration
1259 
  *         calls to this function can be used to reconfigure some parameters
 1259 
  * @retval HAL status
1260 
  *         of structure "ADC_MultiModeTypeDef" on the fly, without reseting
 1260 
  */
1261 
  *         the ADCs (both ADCs of the common group).
 1261 
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
1262 
  *         The setting of these parameters is conditioned to ADC state.
 1262 
{
1263 
  *         For parameters constraints, see comments of structure
 1263 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1264 
  *         "ADC_MultiModeTypeDef".
 1264 
  ADC_HandleTypeDef tmphadcSlave={0};
1265 
  * @note   To change back configuration from multimode to single mode, ADC must
 1265 
 
1266 
  *         be reset (using function HAL_ADC_Init() ).
 1266 
  /* Check the parameters */
1267 
  * @param  hadc: ADC handle
 1267 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1268 
  * @param  multimode: Structure of ADC multimode configuration
 1268 
  assert_param(IS_ADC_MODE(multimode->Mode));
1269 
  * @retval HAL status
 1269 
 
1270 
  */
 1270 
  /* Process locked */
1271 
HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
 1271 
  __HAL_LOCK(hadc);
1272 
{
 1272 
 
1273 
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 1273 
  /* Set a temporary handle of the ADC slave associated to the ADC master     */
1274 
  ADC_HandleTypeDef tmphadcSlave={0};
 1274 
  ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1275 
 
 1275 
 
1276 
  /* Check the parameters */
 1276 
  /* Parameters update conditioned to ADC state:                              */
1277 
  assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
 1277 
  /* Parameters that can be updated when ADC is disabled or enabled without   */
1278 
  assert_param(IS_ADC_MODE(multimode->Mode));
 1278 
  /* conversion on going on regular group:                                    */
1279 
 
 1279 
  /*  - ADC master and ADC slave DMA configuration                            */
1280 
  /* Process locked */
 1280 
  /* Parameters that can be updated only when ADC is disabled:                */
1281 
  __HAL_LOCK(hadc);
 1281 
  /*  - Multimode mode selection                                              */
1282 
 
 1282 
  /* To optimize code, all multimode settings can be set when both ADCs of    */
1283 
  /* Set a temporary handle of the ADC slave associated to the ADC master     */
 1283 
  /* the common group are in state: disabled.                                 */
1284 
  ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
 1284 
  if ((ADC_IS_ENABLE(hadc) == RESET)                     &&
1285 
 
 1285 
      (ADC_IS_ENABLE(&tmphadcSlave) == RESET)            &&
1286 
  /* Parameters update conditioned to ADC state:                              */
 1286 
      (IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance))   )
1287 
  /* Parameters that can be updated when ADC is disabled or enabled without   */
 1287 
  {
1288 
  /* conversion on going on regular group:                                    */
 1288 
    MODIFY_REG(hadc->Instance->CR1,
1289 
  /*  - ADC master and ADC slave DMA configuration                            */
 1289 
               ADC_CR1_DUALMOD    ,
1290 
  /* Parameters that can be updated only when ADC is disabled:                */
 1290 
               multimode->Mode     );
1291 
  /*  - Multimode mode selection                                              */
 1291 
  }
1292 
  /* To optimize code, all multimode settings can be set when both ADCs of    */
 1292 
  /* If one of the ADC sharing the same common group is enabled, no update    */
1293 
  /* the common group are in state: disabled.                                 */
 1293 
  /* could be done on neither of the multimode structure parameters.          */
1294 
  if ((ADC_IS_ENABLE(hadc) == RESET)                     &&
 1294 
  else
1295 
      (ADC_IS_ENABLE(&tmphadcSlave) == RESET)            &&
 1295 
  {
1296 
      (IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance))   )
 1296 
    /* Update ADC state machine to error */
1297 
  {
 1297 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1298 
    MODIFY_REG(hadc->Instance->CR1,
 1298 
   
1299 
               ADC_CR1_DUALMOD    ,
 1299 
    tmp_hal_status = HAL_ERROR;
1300 
               multimode->Mode     );
 1300 
  }
1301 
  }
 1301 
   
1302 
  /* If one of the ADC sharing the same common group is enabled, no update    */
 1302 
   
1303 
  /* could be done on neither of the multimode structure parameters.          */
 1303 
  /* Process unlocked */
1304 
  else
 1304 
  __HAL_UNLOCK(hadc);
1305 
  {
 1305 
 
1306 
    /* Update ADC state machine to error */
 1306 
  /* Return function status */
1307 
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
 1307 
  return tmp_hal_status;
1308 
   
 1308 
}
1309 
    tmp_hal_status = HAL_ERROR;
 1309 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
1310 
  }
 1310 
/**
1311 
   
 1311 
  * @}
1312 
   
 1312 
  */  
1313 
  /* Process unlocked */
 1313 
 
1314 
  __HAL_UNLOCK(hadc);
 1314 
/**
1315 
 
 1315 
  * @}
1316 
  /* Return function status */
 1316 
  */
1317 
  return tmp_hal_status;
 1317 
 
1318 
}
 1318 
#endif /* HAL_ADC_MODULE_ENABLED */
1319 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 1319 
/**
1320 
/**
 1320 
  * @}
1321 
  * @}
 1321 
  */
1322 
  */  
 1322 
 
1323 
 
 1323 
/**
1324 
/**
 1324 
  * @}
1325 
  * @}
 1325 
  */
1326 
  */
 - 
 
1327 
 
 - 
 
1328 
#endif /* HAL_ADC_MODULE_ENABLED */
 - 
 
1329 
/**
 - 
 
1330 
  * @}
 - 
 
1331 
  */
 - 
 
1332 
 
 - 
 
1333 
/**
 - 
 
1334 
  * @}
 - 
 
1335 
  */
 - 
 
1336 
 
 - 
 
1337 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 -