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/**
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/**
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  ******************************************************************************
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  ******************************************************************************
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  * @file    stm32f1xx_hal_adc.c
3
  * @file    stm32f1xx_hal_adc.c
4
  * @author  MCD Application Team
4
  * @author  MCD Application Team
5
  * @brief   This file provides firmware functions to manage the following
5
  * @brief   This file provides firmware functions to manage the following
6
  *          functionalities of the Analog to Digital Convertor (ADC)
6
  *          functionalities of the Analog to Digital Convertor (ADC)
7
  *          peripheral:
7
  *          peripheral:
8
  *           + Initialization and de-initialization functions
8
  *           + Initialization and de-initialization functions
9
  *             ++ Initialization and Configuration of ADC
9
  *           + Peripheral Control functions
10
  *           + Operation functions
10
  *           + Peripheral State functions
11
  *             ++ Start, stop, get result of conversions of regular
11
  *          Other functions (extended functions) are available in file
12
  *                group, using 3 possible modes: polling, interruption or DMA.
12
  *          "stm32f1xx_hal_adc_ex.c".
13
  *           + Control functions
13
  *
14
  *             ++ Channels configuration on regular group
14
  ******************************************************************************
15
  *             ++ Channels configuration on injected group
15
  * @attention
16
  *             ++ Analog Watchdog configuration
16
  *
17
  *           + State functions
17
  * Copyright (c) 2016 STMicroelectronics.
18
  *             ++ ADC state machine management
18
  * All rights reserved.
19
  *             ++ Interrupts and flags management
19
  *
20
  *          Other functions (extended functions) are available in file
20
  * This software is licensed under terms that can be found in the LICENSE file
21
  *          "stm32f1xx_hal_adc_ex.c".
21
  * in the root directory of this software component.
22
  *
22
  * If no LICENSE file comes with this software, it is provided AS-IS.
23
  @verbatim
23
  *
24
  ==============================================================================
24
  ******************************************************************************
25
                     ##### ADC peripheral features #####
25
  @verbatim
26
  ==============================================================================
26
  ==============================================================================
27
  [..]
27
                     ##### ADC peripheral features #####
28
  (+) 12-bit resolution
28
  ==============================================================================
29
 
29
  [..]
30
  (+) Interrupt generation at the end of regular conversion, end of injected
30
  (+) 12-bit resolution
31
      conversion, and in case of analog watchdog or overrun events.
31
 
32
 
32
  (+) Interrupt generation at the end of regular conversion, end of injected
33
  (+) Single and continuous conversion modes.
33
      conversion, and in case of analog watchdog or overrun events.
34
 
34
 
35
  (+) Scan mode for conversion of several channels sequentially.
35
  (+) Single and continuous conversion modes.
36
 
36
 
37
  (+) Data alignment with in-built data coherency.
37
  (+) Scan mode for conversion of several channels sequentially.
38
 
38
 
39
  (+) Programmable sampling time (channel wise)
39
  (+) Data alignment with in-built data coherency.
40
 
40
 
41
  (+) ADC conversion of regular group and injected group.
41
  (+) Programmable sampling time (channel wise)
42
 
42
 
43
  (+) External trigger (timer or EXTI)
43
  (+) ADC conversion of regular group and injected group.
44
      for both regular and injected groups.
44
 
45
 
45
  (+) External trigger (timer or EXTI)
46
  (+) DMA request generation for transfer of conversions data of regular group.
46
      for both regular and injected groups.
47
 
47
 
48
  (+) Multimode Dual mode (available on devices with 2 ADCs or more).
48
  (+) DMA request generation for transfer of conversions data of regular group.
49
 
49
 
50
  (+) Configurable DMA data storage in Multimode Dual mode (available on devices
50
  (+) Multimode Dual mode (available on devices with 2 ADCs or more).
51
      with 2 DCs or more).
51
 
52
 
52
  (+) Configurable DMA data storage in Multimode Dual mode (available on devices
53
  (+) Configurable delay between conversions in Dual interleaved mode (available
53
      with 2 DCs or more).
54
      on devices with 2 DCs or more).
54
 
55
 
55
  (+) Configurable delay between conversions in Dual interleaved mode (available
56
  (+) ADC calibration
56
      on devices with 2 DCs or more).
57
 
57
 
58
  (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
58
  (+) ADC calibration
59
      slower speed.
59
 
60
 
60
  (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
61
  (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
61
      slower speed.
62
      Vdda or to an external voltage reference).
62
 
63
 
63
  (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
64
 
64
      Vdda or to an external voltage reference).
65
                     ##### How to use this driver #####
65
 
66
  ==============================================================================
66
 
67
    [..]
67
                     ##### How to use this driver #####
68
 
68
  ==============================================================================
69
     *** Configuration of top level parameters related to ADC ***
69
    [..]
70
     ============================================================
70
 
71
     [..]
71
     *** Configuration of top level parameters related to ADC ***
72
 
72
     ============================================================
73
    (#) Enable the ADC interface
73
     [..]
74
      (++) As prerequisite, ADC clock must be configured at RCC top level.
74
 
75
           Caution: On STM32F1, ADC clock frequency max is 14MHz (refer
75
    (#) Enable the ADC interface
76
                    to device datasheet).
76
      (++) As prerequisite, ADC clock must be configured at RCC top level.
77
                    Therefore, ADC clock prescaler must be configured in
77
           Caution: On STM32F1, ADC clock frequency max is 14MHz (refer
78
                    function of ADC clock source frequency to remain below
78
                    to device datasheet).
79
                    this maximum frequency.
79
                    Therefore, ADC clock prescaler must be configured in
80
        (++) One clock setting is mandatory:
80
                    function of ADC clock source frequency to remain below
81
             ADC clock (core clock, also possibly conversion clock).
81
                    this maximum frequency.
82
             (+++) Example:
82
        (++) One clock setting is mandatory:
83
                   Into HAL_ADC_MspInit() (recommended code location) or with
83
             ADC clock (core clock, also possibly conversion clock).
84
                   other device clock parameters configuration:
84
             (+++) Example:
85
               (+++) RCC_PeriphCLKInitTypeDef  PeriphClkInit;
85
                   Into HAL_ADC_MspInit() (recommended code location) or with
86
               (+++) __ADC1_CLK_ENABLE();
86
                   other device clock parameters configuration:
87
               (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
87
               (+++) RCC_PeriphCLKInitTypeDef  PeriphClkInit;
88
               (+++) PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2;
88
               (+++) __ADC1_CLK_ENABLE();
89
               (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
89
               (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
90
 
90
               (+++) PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV2;
91
    (#) ADC pins configuration
91
               (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
92
         (++) Enable the clock for the ADC GPIOs
92
 
93
              using macro __HAL_RCC_GPIOx_CLK_ENABLE()
93
    (#) ADC pins configuration
94
         (++) Configure these ADC pins in analog mode
94
         (++) Enable the clock for the ADC GPIOs
95
              using function HAL_GPIO_Init()
95
              using macro __HAL_RCC_GPIOx_CLK_ENABLE()
96
 
96
         (++) Configure these ADC pins in analog mode
97
    (#) Optionally, in case of usage of ADC with interruptions:
97
              using function HAL_GPIO_Init()
98
         (++) Configure the NVIC for ADC
98
 
99
              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
99
    (#) Optionally, in case of usage of ADC with interruptions:
100
         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
100
         (++) Configure the NVIC for ADC
101
              into the function of corresponding ADC interruption vector
101
              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
102
              ADCx_IRQHandler().
102
         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
103
 
103
              into the function of corresponding ADC interruption vector
104
    (#) Optionally, in case of usage of DMA:
104
              ADCx_IRQHandler().
105
         (++) Configure the DMA (DMA channel, mode normal or circular, ...)
105
 
106
              using function HAL_DMA_Init().
106
    (#) Optionally, in case of usage of DMA:
107
         (++) Configure the NVIC for DMA
107
         (++) Configure the DMA (DMA channel, mode normal or circular, ...)
108
              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
108
              using function HAL_DMA_Init().
109
         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
109
         (++) Configure the NVIC for DMA
110
              into the function of corresponding DMA interruption vector
110
              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
111
              DMAx_Channelx_IRQHandler().
111
         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
112
 
112
              into the function of corresponding DMA interruption vector
113
     *** Configuration of ADC, groups regular/injected, channels parameters ***
113
              DMAx_Channelx_IRQHandler().
114
     ==========================================================================
114
 
115
     [..]
115
     *** Configuration of ADC, groups regular/injected, channels parameters ***
116
 
116
     ==========================================================================
117
    (#) Configure the ADC parameters (resolution, data alignment, ...)
117
     [..]
118
        and regular group parameters (conversion trigger, sequencer, ...)
118
 
119
        using function HAL_ADC_Init().
119
    (#) Configure the ADC parameters (resolution, data alignment, ...)
120
 
120
        and regular group parameters (conversion trigger, sequencer, ...)
121
    (#) Configure the channels for regular group parameters (channel number,
121
        using function HAL_ADC_Init().
122
        channel rank into sequencer, ..., into regular group)
122
 
123
        using function HAL_ADC_ConfigChannel().
123
    (#) Configure the channels for regular group parameters (channel number,
124
 
124
        channel rank into sequencer, ..., into regular group)
125
    (#) Optionally, configure the injected group parameters (conversion trigger,
125
        using function HAL_ADC_ConfigChannel().
126
        sequencer, ..., of injected group)
126
 
127
        and the channels for injected group parameters (channel number,
127
    (#) Optionally, configure the injected group parameters (conversion trigger,
128
        channel rank into sequencer, ..., into injected group)
128
        sequencer, ..., of injected group)
129
        using function HAL_ADCEx_InjectedConfigChannel().
129
        and the channels for injected group parameters (channel number,
130
 
130
        channel rank into sequencer, ..., into injected group)
131
    (#) Optionally, configure the analog watchdog parameters (channels
131
        using function HAL_ADCEx_InjectedConfigChannel().
132
        monitored, thresholds, ...)
132
 
133
        using function HAL_ADC_AnalogWDGConfig().
133
    (#) Optionally, configure the analog watchdog parameters (channels
134
 
134
        monitored, thresholds, ...)
135
    (#) Optionally, for devices with several ADC instances: configure the
135
        using function HAL_ADC_AnalogWDGConfig().
136
        multimode parameters
136
 
137
        using function HAL_ADCEx_MultiModeConfigChannel().
137
    (#) Optionally, for devices with several ADC instances: configure the
138
 
138
        multimode parameters
139
     *** Execution of ADC conversions ***
139
        using function HAL_ADCEx_MultiModeConfigChannel().
140
     ====================================
140
 
141
     [..]
141
     *** Execution of ADC conversions ***
142
 
142
     ====================================
143
    (#) Optionally, perform an automatic ADC calibration to improve the
143
     [..]
144
        conversion accuracy
144
 
145
        using function HAL_ADCEx_Calibration_Start().
145
    (#) Optionally, perform an automatic ADC calibration to improve the
146
 
146
        conversion accuracy
147
    (#) ADC driver can be used among three modes: polling, interruption,
147
        using function HAL_ADCEx_Calibration_Start().
148
        transfer by DMA.
148
 
149
 
149
    (#) ADC driver can be used among three modes: polling, interruption,
150
        (++) ADC conversion by polling:
150
        transfer by DMA.
151
          (+++) Activate the ADC peripheral and start conversions
151
 
152
                using function HAL_ADC_Start()
152
        (++) ADC conversion by polling:
153
          (+++) Wait for ADC conversion completion
153
          (+++) Activate the ADC peripheral and start conversions
154
                using function HAL_ADC_PollForConversion()
154
                using function HAL_ADC_Start()
155
                (or for injected group: HAL_ADCEx_InjectedPollForConversion() )
155
          (+++) Wait for ADC conversion completion
156
          (+++) Retrieve conversion results
156
                using function HAL_ADC_PollForConversion()
157
                using function HAL_ADC_GetValue()
157
                (or for injected group: HAL_ADCEx_InjectedPollForConversion() )
158
                (or for injected group: HAL_ADCEx_InjectedGetValue() )
158
          (+++) Retrieve conversion results
159
          (+++) Stop conversion and disable the ADC peripheral
159
                using function HAL_ADC_GetValue()
160
                using function HAL_ADC_Stop()
160
                (or for injected group: HAL_ADCEx_InjectedGetValue() )
161
 
161
          (+++) Stop conversion and disable the ADC peripheral
162
        (++) ADC conversion by interruption:
162
                using function HAL_ADC_Stop()
163
          (+++) Activate the ADC peripheral and start conversions
163
 
164
                using function HAL_ADC_Start_IT()
164
        (++) ADC conversion by interruption:
165
          (+++) Wait for ADC conversion completion by call of function
165
          (+++) Activate the ADC peripheral and start conversions
166
                HAL_ADC_ConvCpltCallback()
166
                using function HAL_ADC_Start_IT()
167
                (this function must be implemented in user program)
167
          (+++) Wait for ADC conversion completion by call of function
168
                (or for injected group: HAL_ADCEx_InjectedConvCpltCallback() )
168
                HAL_ADC_ConvCpltCallback()
169
          (+++) Retrieve conversion results
169
                (this function must be implemented in user program)
170
                using function HAL_ADC_GetValue()
170
                (or for injected group: HAL_ADCEx_InjectedConvCpltCallback() )
171
                (or for injected group: HAL_ADCEx_InjectedGetValue() )
171
          (+++) Retrieve conversion results
172
          (+++) Stop conversion and disable the ADC peripheral
172
                using function HAL_ADC_GetValue()
173
                using function HAL_ADC_Stop_IT()
173
                (or for injected group: HAL_ADCEx_InjectedGetValue() )
174
 
174
          (+++) Stop conversion and disable the ADC peripheral
175
        (++) ADC conversion with transfer by DMA:
175
                using function HAL_ADC_Stop_IT()
176
          (+++) Activate the ADC peripheral and start conversions
176
 
177
                using function HAL_ADC_Start_DMA()
177
        (++) ADC conversion with transfer by DMA:
178
          (+++) Wait for ADC conversion completion by call of function
178
          (+++) Activate the ADC peripheral and start conversions
179
                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
179
                using function HAL_ADC_Start_DMA()
180
                (these functions must be implemented in user program)
180
          (+++) Wait for ADC conversion completion by call of function
181
          (+++) Conversion results are automatically transferred by DMA into
181
                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
182
                destination variable address.
182
                (these functions must be implemented in user program)
183
          (+++) Stop conversion and disable the ADC peripheral
183
          (+++) Conversion results are automatically transferred by DMA into
184
                using function HAL_ADC_Stop_DMA()
184
                destination variable address.
185
 
185
          (+++) Stop conversion and disable the ADC peripheral
186
        (++) For devices with several ADCs: ADC multimode conversion
186
                using function HAL_ADC_Stop_DMA()
187
             with transfer by DMA:
187
 
188
          (+++) Activate the ADC peripheral (slave) and start conversions
188
        (++) For devices with several ADCs: ADC multimode conversion
189
                using function HAL_ADC_Start()
189
             with transfer by DMA:
190
          (+++) Activate the ADC peripheral (master) and start conversions
190
          (+++) Activate the ADC peripheral (slave) and start conversions
191
                using function HAL_ADCEx_MultiModeStart_DMA()
191
                using function HAL_ADC_Start()
192
          (+++) Wait for ADC conversion completion by call of function
192
          (+++) Activate the ADC peripheral (master) and start conversions
193
                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
193
                using function HAL_ADCEx_MultiModeStart_DMA()
194
                (these functions must be implemented in user program)
194
          (+++) Wait for ADC conversion completion by call of function
195
          (+++) Conversion results are automatically transferred by DMA into
195
                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
196
                destination variable address.
196
                (these functions must be implemented in user program)
197
          (+++) Stop conversion and disable the ADC peripheral (master)
197
          (+++) Conversion results are automatically transferred by DMA into
198
                using function HAL_ADCEx_MultiModeStop_DMA()
198
                destination variable address.
199
          (+++) Stop conversion and disable the ADC peripheral (slave)
199
          (+++) Stop conversion and disable the ADC peripheral (master)
200
                using function HAL_ADC_Stop_IT()
200
                using function HAL_ADCEx_MultiModeStop_DMA()
201
 
201
          (+++) Stop conversion and disable the ADC peripheral (slave)
202
     [..]
202
                using function HAL_ADC_Stop_IT()
203
 
203
 
204
    (@) Callback functions must be implemented in user program:
204
     [..]
205
      (+@) HAL_ADC_ErrorCallback()
205
 
206
      (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
206
    (@) Callback functions must be implemented in user program:
207
      (+@) HAL_ADC_ConvCpltCallback()
207
      (+@) HAL_ADC_ErrorCallback()
208
      (+@) HAL_ADC_ConvHalfCpltCallback
208
      (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
209
      (+@) HAL_ADCEx_InjectedConvCpltCallback()
209
      (+@) HAL_ADC_ConvCpltCallback()
210
 
210
      (+@) HAL_ADC_ConvHalfCpltCallback
211
     *** Deinitialization of ADC ***
211
      (+@) HAL_ADCEx_InjectedConvCpltCallback()
212
     ============================================================
212
 
213
     [..]
213
     *** Deinitialization of ADC ***
214
 
214
     ============================================================
215
    (#) Disable the ADC interface
215
     [..]
216
      (++) ADC clock can be hard reset and disabled at RCC top level.
216
 
217
        (++) Hard reset of ADC peripherals
217
    (#) Disable the ADC interface
218
             using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
218
      (++) ADC clock can be hard reset and disabled at RCC top level.
219
        (++) ADC clock disable
219
        (++) Hard reset of ADC peripherals
220
             using the equivalent macro/functions as configuration step.
220
             using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
221
             (+++) Example:
221
        (++) ADC clock disable
222
                   Into HAL_ADC_MspDeInit() (recommended code location) or with
222
             using the equivalent macro/functions as configuration step.
223
                   other device clock parameters configuration:
223
             (+++) Example:
224
               (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC
224
                   Into HAL_ADC_MspDeInit() (recommended code location) or with
225
               (+++) PeriphClkInit.AdcClockSelection = RCC_ADCPLLCLK2_OFF
225
                   other device clock parameters configuration:
226
               (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit)
226
               (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC
227
 
227
               (+++) PeriphClkInit.AdcClockSelection = RCC_ADCPLLCLK2_OFF
228
    (#) ADC pins configuration
228
               (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit)
229
         (++) Disable the clock for the ADC GPIOs
229
 
230
              using macro __HAL_RCC_GPIOx_CLK_DISABLE()
230
    (#) ADC pins configuration
231
 
231
         (++) Disable the clock for the ADC GPIOs
232
    (#) Optionally, in case of usage of ADC with interruptions:
232
              using macro __HAL_RCC_GPIOx_CLK_DISABLE()
233
         (++) Disable the NVIC for ADC
233
 
234
              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
234
    (#) Optionally, in case of usage of ADC with interruptions:
235
 
235
         (++) Disable the NVIC for ADC
236
    (#) Optionally, in case of usage of DMA:
236
              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
237
         (++) Deinitialize the DMA
237
 
238
              using function HAL_DMA_Init().
238
    (#) Optionally, in case of usage of DMA:
239
         (++) Disable the NVIC for DMA
239
         (++) Deinitialize the DMA
240
              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
240
              using function HAL_DMA_Init().
241
 
241
         (++) Disable the NVIC for DMA
242
    [..]
242
              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
243
   
243
 
244
    *** Callback registration ***
244
    [..]
245
    =============================================
245
   
246
    [..]
246
    *** Callback registration ***
247
 
247
    =============================================
248
     The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
248
    [..]
249
     allows the user to configure dynamically the driver callbacks.
249
 
250
     Use Functions @ref HAL_ADC_RegisterCallback()
250
     The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
251
     to register an interrupt callback.
251
     allows the user to configure dynamically the driver callbacks.
252
    [..]
252
     Use Functions HAL_ADC_RegisterCallback()
253
 
253
     to register an interrupt callback.
254
     Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
254
    [..]
255
       (+) ConvCpltCallback               : ADC conversion complete callback
255
 
256
       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
256
     Function HAL_ADC_RegisterCallback() allows to register following callbacks:
257
       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
257
       (+) ConvCpltCallback               : ADC conversion complete callback
258
       (+) ErrorCallback                  : ADC error callback
258
       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
259
       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
259
       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
260
       (+) MspInitCallback                : ADC Msp Init callback
260
       (+) ErrorCallback                  : ADC error callback
261
       (+) MspDeInitCallback              : ADC Msp DeInit callback
261
       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
262
     This function takes as parameters the HAL peripheral handle, the Callback ID
262
       (+) MspInitCallback                : ADC Msp Init callback
263
     and a pointer to the user callback function.
263
       (+) MspDeInitCallback              : ADC Msp DeInit callback
264
    [..]
264
     This function takes as parameters the HAL peripheral handle, the Callback ID
265
 
265
     and a pointer to the user callback function.
266
     Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
266
    [..]
267
     weak function.
267
 
268
    [..]
268
     Use function HAL_ADC_UnRegisterCallback to reset a callback to the default
269
 
269
     weak function.
270
     @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
270
    [..]
271
     and the Callback ID.
271
 
272
     This function allows to reset following callbacks:
272
     HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
273
       (+) ConvCpltCallback               : ADC conversion complete callback
273
     and the Callback ID.
274
       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
274
     This function allows to reset following callbacks:
275
       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
275
       (+) ConvCpltCallback               : ADC conversion complete callback
276
       (+) ErrorCallback                  : ADC error callback
276
       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
277
       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
277
       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
278
       (+) MspInitCallback                : ADC Msp Init callback
278
       (+) ErrorCallback                  : ADC error callback
279
       (+) MspDeInitCallback              : ADC Msp DeInit callback
279
       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
280
     [..]
280
       (+) MspInitCallback                : ADC Msp Init callback
281
 
281
       (+) MspDeInitCallback              : ADC Msp DeInit callback
282
     By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
282
     [..]
283
     all callbacks are set to the corresponding weak functions:
283
 
284
     examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
284
     By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET
285
     Exception done for MspInit and MspDeInit functions that are
285
     all callbacks are set to the corresponding weak functions:
286
     reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
286
     examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback().
287
     these callbacks are null (not registered beforehand).
287
     Exception done for MspInit and MspDeInit functions that are
288
    [..]
288
     reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when
289
 
289
     these callbacks are null (not registered beforehand).
290
     If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
290
    [..]
291
     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
291
 
292
     [..]
292
     If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit()
293
 
293
     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
294
     Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
294
     [..]
295
     Exception done MspInit/MspDeInit functions that can be registered/unregistered
295
 
296
     in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
296
     Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only.
297
     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
297
     Exception done MspInit/MspDeInit functions that can be registered/unregistered
298
    [..]
298
     in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state,
299
 
299
     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
300
     Then, the user first registers the MspInit/MspDeInit user callbacks
300
    [..]
301
     using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
301
 
302
     or @ref HAL_ADC_Init() function.
302
     Then, the user first registers the MspInit/MspDeInit user callbacks
303
     [..]
303
     using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit()
304
 
304
     or HAL_ADC_Init() function.
305
     When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
305
     [..]
306
     not defined, the callback registration feature is not available and all callbacks
306
 
307
     are set to the corresponding weak functions.
307
     When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
308
 
308
     not defined, the callback registration feature is not available and all callbacks
309
  @endverbatim
309
     are set to the corresponding weak functions.
310
  ******************************************************************************
310
 
311
  * @attention
311
  @endverbatim
312
  *
312
  */
313
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
313
 
314
  * All rights reserved.</center></h2>
314
/* Includes ------------------------------------------------------------------*/
315
  *
315
#include "stm32f1xx_hal.h"
316
  * This software component is licensed by ST under BSD 3-Clause license,
316
 
317
  * the "License"; You may not use this file except in compliance with the
317
/** @addtogroup STM32F1xx_HAL_Driver
318
  * License. You may obtain a copy of the License at:
318
  * @{
319
  *                        opensource.org/licenses/BSD-3-Clause
319
  */
320
  *
320
 
321
  ******************************************************************************
321
/** @defgroup ADC ADC
322
  */
322
  * @brief ADC HAL module driver
323
 
323
  * @{
324
/* Includes ------------------------------------------------------------------*/
324
  */
325
#include "stm32f1xx_hal.h"
325
 
326
 
326
#ifdef HAL_ADC_MODULE_ENABLED
327
/** @addtogroup STM32F1xx_HAL_Driver
327
 
328
  * @{
328
/* Private typedef -----------------------------------------------------------*/
329
  */
329
/* Private define ------------------------------------------------------------*/
330
 
330
/** @defgroup ADC_Private_Constants ADC Private Constants
331
/** @defgroup ADC ADC
331
  * @{
332
  * @brief ADC HAL module driver
332
  */
333
  * @{
333
 
334
  */
334
  /* Timeout values for ADC enable and disable settling time.                 */
335
 
335
  /* Values defined to be higher than worst cases: low clocks freq,           */
336
#ifdef HAL_ADC_MODULE_ENABLED
336
  /* maximum prescaler.                                                       */
337
 
337
  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
338
/* Private typedef -----------------------------------------------------------*/
338
  /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits.    */
339
/* Private define ------------------------------------------------------------*/
339
  /* Unit: ms                                                                 */
340
/** @defgroup ADC_Private_Constants ADC Private Constants
340
  #define ADC_ENABLE_TIMEOUT              2U
341
  * @{
341
  #define ADC_DISABLE_TIMEOUT             2U
342
  */
342
 
343
 
343
  /* Delay for ADC stabilization time.                                        */
344
  /* Timeout values for ADC enable and disable settling time.                 */
344
  /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB).       */
345
  /* Values defined to be higher than worst cases: low clocks freq,           */
345
  /* Unit: us                                                                 */
346
  /* maximum prescaler.                                                       */
346
  #define ADC_STAB_DELAY_US               1U
347
  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
347
 
348
  /* prescaler 4, sampling time 12.5 ADC clock cycles, resolution 12 bits.    */
348
  /* Delay for temperature sensor stabilization time.                         */
349
  /* Unit: ms                                                                 */
349
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
350
  #define ADC_ENABLE_TIMEOUT              2U
350
  /* Unit: us                                                                 */
351
  #define ADC_DISABLE_TIMEOUT             2U
351
  #define ADC_TEMPSENSOR_DELAY_US         10U
352
 
352
 
353
  /* Delay for ADC stabilization time.                                        */
353
/**
354
  /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB).       */
354
  * @}
355
  /* Unit: us                                                                 */
355
  */
356
  #define ADC_STAB_DELAY_US               1U
356
 
357
 
357
/* Private macro -------------------------------------------------------------*/
358
  /* Delay for temperature sensor stabilization time.                         */
358
/* Private variables ---------------------------------------------------------*/
359
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
359
/* Private function prototypes -----------------------------------------------*/
360
  /* Unit: us                                                                 */
360
/** @defgroup ADC_Private_Functions ADC Private Functions
361
  #define ADC_TEMPSENSOR_DELAY_US         10U
361
  * @{
362
 
362
  */
363
/**
363
/**
364
  * @}
364
  * @}
365
  */
365
  */
366
 
366
 
367
/* Private macro -------------------------------------------------------------*/
367
/* Exported functions --------------------------------------------------------*/
368
/* Private variables ---------------------------------------------------------*/
368
 
369
/* Private function prototypes -----------------------------------------------*/
369
/** @defgroup ADC_Exported_Functions ADC Exported Functions
370
/** @defgroup ADC_Private_Functions ADC Private Functions
370
  * @{
371
  * @{
371
  */
372
  */
372
 
373
/**
373
/** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
374
  * @}
374
  * @brief    Initialization and Configuration functions
375
  */
375
  *
376
 
376
@verbatim    
377
/* Exported functions --------------------------------------------------------*/
377
 ===============================================================================
378
 
378
              ##### Initialization and de-initialization functions #####
379
/** @defgroup ADC_Exported_Functions ADC Exported Functions
379
 ===============================================================================
380
  * @{
380
    [..]  This section provides functions allowing to:
381
  */
381
      (+) Initialize and configure the ADC.
382
 
382
      (+) De-initialize the ADC.
383
/** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
383
 
384
  * @brief    Initialization and Configuration functions
384
@endverbatim
385
  *
385
  * @{
386
@verbatim    
386
  */
387
 ===============================================================================
387
 
388
              ##### Initialization and de-initialization functions #####
388
/**
389
 ===============================================================================
389
  * @brief  Initializes the ADC peripheral and regular group according to  
390
    [..]  This section provides functions allowing to:
390
  *         parameters specified in structure "ADC_InitTypeDef".
391
      (+) Initialize and configure the ADC.
391
  * @note   As prerequisite, ADC clock must be configured at RCC top level
392
      (+) De-initialize the ADC.
392
  *         (clock source APB2).
393
 
393
  *         See commented example code below that can be copied and uncommented
394
@endverbatim
394
  *         into HAL_ADC_MspInit().
395
  * @{
395
  * @note   Possibility to update parameters on the fly:
396
  */
396
  *         This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
397
 
397
  *         coming from ADC state reset. Following calls to this function can
398
/**
398
  *         be used to reconfigure some parameters of ADC_InitTypeDef  
399
  * @brief  Initializes the ADC peripheral and regular group according to  
399
  *         structure on the fly, without modifying MSP configuration. If ADC  
400
  *         parameters specified in structure "ADC_InitTypeDef".
400
  *         MSP has to be modified again, HAL_ADC_DeInit() must be called
401
  * @note   As prerequisite, ADC clock must be configured at RCC top level
401
  *         before HAL_ADC_Init().
402
  *         (clock source APB2).
402
  *         The setting of these parameters is conditioned to ADC state.
403
  *         See commented example code below that can be copied and uncommented
403
  *         For parameters constraints, see comments of structure
404
  *         into HAL_ADC_MspInit().
404
  *         "ADC_InitTypeDef".
405
  * @note   Possibility to update parameters on the fly:
405
  * @note   This function configures the ADC within 2 scopes: scope of entire
406
  *         This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
406
  *         ADC and scope of regular group. For parameters details, see comments
407
  *         coming from ADC state reset. Following calls to this function can
407
  *         of structure "ADC_InitTypeDef".
408
  *         be used to reconfigure some parameters of ADC_InitTypeDef  
408
  * @param  hadc: ADC handle
409
  *         structure on the fly, without modifying MSP configuration. If ADC  
409
  * @retval HAL status
410
  *         MSP has to be modified again, HAL_ADC_DeInit() must be called
410
  */
411
  *         before HAL_ADC_Init().
411
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
412
  *         The setting of these parameters is conditioned to ADC state.
412
{
413
  *         For parameters constraints, see comments of structure
413
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
414
  *         "ADC_InitTypeDef".
414
  uint32_t tmp_cr1 = 0U;
415
  * @note   This function configures the ADC within 2 scopes: scope of entire
415
  uint32_t tmp_cr2 = 0U;
416
  *         ADC and scope of regular group. For parameters details, see comments
416
  uint32_t tmp_sqr1 = 0U;
417
  *         of structure "ADC_InitTypeDef".
417
 
418
  * @param  hadc: ADC handle
418
  /* Check ADC handle */
419
  * @retval HAL status
419
  if(hadc == NULL)
420
  */
420
  {
421
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
421
    return HAL_ERROR;
422
{
422
  }
423
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
423
 
424
  uint32_t tmp_cr1 = 0U;
424
  /* Check the parameters */
425
  uint32_t tmp_cr2 = 0U;
425
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
426
  uint32_t tmp_sqr1 = 0U;
426
  assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
427
 
427
  assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
428
  /* Check ADC handle */
428
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
429
  if(hadc == NULL)
429
  assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
430
  {
430
 
431
    return HAL_ERROR;
431
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
432
  }
432
  {
433
 
433
    assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
434
  /* Check the parameters */
434
    assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
435
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
435
    if(hadc->Init.DiscontinuousConvMode != DISABLE)
436
  assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
436
    {
437
  assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
437
      assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
438
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
438
    }
439
  assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
439
  }
440
 
440
 
441
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
441
  /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured    */
442
  {
442
  /* at RCC top level.                                                        */
443
    assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
443
  /* Refer to header of this file for more details on clock enabling          */
444
    assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
444
  /* procedure.                                                               */
445
    if(hadc->Init.DiscontinuousConvMode != DISABLE)
445
 
446
    {
446
  /* Actions performed only if ADC is coming from state reset:                */
447
      assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
447
  /* - Initialization of ADC MSP                                              */
448
    }
448
  if (hadc->State == HAL_ADC_STATE_RESET)
449
  }
449
  {
450
 
450
    /* Initialize ADC error code */
451
  /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured    */
451
    ADC_CLEAR_ERRORCODE(hadc);
452
  /* at RCC top level.                                                        */
452
   
453
  /* Refer to header of this file for more details on clock enabling          */
453
    /* Allocate lock resource and initialize it */
454
  /* procedure.                                                               */
454
    hadc->Lock = HAL_UNLOCKED;
455
 
455
   
456
  /* Actions performed only if ADC is coming from state reset:                */
456
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
457
  /* - Initialization of ADC MSP                                              */
457
    /* Init the ADC Callback settings */
458
  if (hadc->State == HAL_ADC_STATE_RESET)
458
    hadc->ConvCpltCallback              = HAL_ADC_ConvCpltCallback;                 /* Legacy weak callback */
459
  {
459
    hadc->ConvHalfCpltCallback          = HAL_ADC_ConvHalfCpltCallback;             /* Legacy weak callback */
460
    /* Initialize ADC error code */
460
    hadc->LevelOutOfWindowCallback      = HAL_ADC_LevelOutOfWindowCallback;         /* Legacy weak callback */
461
    ADC_CLEAR_ERRORCODE(hadc);
461
    hadc->ErrorCallback                 = HAL_ADC_ErrorCallback;                    /* Legacy weak callback */
462
   
462
    hadc->InjectedConvCpltCallback      = HAL_ADCEx_InjectedConvCpltCallback;       /* Legacy weak callback */
463
    /* Allocate lock resource and initialize it */
463
   
464
    hadc->Lock = HAL_UNLOCKED;
464
    if (hadc->MspInitCallback == NULL)
465
   
465
    {
466
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
466
      hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit  */
467
    /* Init the ADC Callback settings */
467
    }
468
    hadc->ConvCpltCallback              = HAL_ADC_ConvCpltCallback;                 /* Legacy weak callback */
468
   
469
    hadc->ConvHalfCpltCallback          = HAL_ADC_ConvHalfCpltCallback;             /* Legacy weak callback */
469
    /* Init the low level hardware */
470
    hadc->LevelOutOfWindowCallback      = HAL_ADC_LevelOutOfWindowCallback;         /* Legacy weak callback */
470
    hadc->MspInitCallback(hadc);
471
    hadc->ErrorCallback                 = HAL_ADC_ErrorCallback;                    /* Legacy weak callback */
471
#else
472
    hadc->InjectedConvCpltCallback      = HAL_ADCEx_InjectedConvCpltCallback;       /* Legacy weak callback */
472
    /* Init the low level hardware */
473
   
473
    HAL_ADC_MspInit(hadc);
474
    if (hadc->MspInitCallback == NULL)
474
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
475
    {
475
  }
476
      hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit  */
476
 
477
    }
477
  /* Stop potential conversion on going, on regular and injected groups */
478
   
478
  /* Disable ADC peripheral */
479
    /* Init the low level hardware */
479
  /* Note: In case of ADC already enabled, precaution to not launch an        */
480
    hadc->MspInitCallback(hadc);
480
  /*       unwanted conversion while modifying register CR2 by writing 1 to   */
481
#else
481
  /*       bit ADON.                                                          */
482
    /* Init the low level hardware */
482
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
483
    HAL_ADC_MspInit(hadc);
483
 
484
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
484
 
485
  }
485
  /* Configuration of ADC parameters if previous preliminary actions are      */
486
 
486
  /* correctly completed.                                                     */
487
  /* Stop potential conversion on going, on regular and injected groups */
487
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
488
  /* Disable ADC peripheral */
488
      (tmp_hal_status == HAL_OK)                                  )
489
  /* Note: In case of ADC already enabled, precaution to not launch an        */
489
  {
490
  /*       unwanted conversion while modifying register CR2 by writing 1 to   */
490
    /* Set ADC state */
491
  /*       bit ADON.                                                          */
491
    ADC_STATE_CLR_SET(hadc->State,
492
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
492
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
493
 
493
                      HAL_ADC_STATE_BUSY_INTERNAL);
494
 
494
   
495
  /* Configuration of ADC parameters if previous preliminary actions are      */
495
    /* Set ADC parameters */
496
  /* correctly completed.                                                     */
496
   
497
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
497
    /* Configuration of ADC:                                                  */
498
      (tmp_hal_status == HAL_OK)                                  )
498
    /*  - data alignment                                                      */
499
  {
499
    /*  - external trigger to start conversion                                */
500
    /* Set ADC state */
500
    /*  - external trigger polarity (always set to 1, because needed for all  */
501
    ADC_STATE_CLR_SET(hadc->State,
501
    /*    triggers: external trigger of SW start)                             */
502
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
502
    /*  - continuous conversion mode                                          */
503
                      HAL_ADC_STATE_BUSY_INTERNAL);
503
    /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into          */
504
   
504
    /*       HAL_ADC_Start_xxx functions because if set in this function,     */
505
    /* Set ADC parameters */
505
    /*       a conversion on injected group would start a conversion also on  */
506
   
506
    /*       regular group after ADC enabling.                                */
507
    /* Configuration of ADC:                                                  */
507
    tmp_cr2 |= (hadc->Init.DataAlign                                          |
508
    /*  - data alignment                                                      */
508
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv)            |
509
    /*  - external trigger to start conversion                                */
509
                ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)   );
510
    /*  - external trigger polarity (always set to 1, because needed for all  */
510
 
511
    /*    triggers: external trigger of SW start)                             */
511
    /* Configuration of ADC:                                                  */
512
    /*  - continuous conversion mode                                          */
512
    /*  - scan mode                                                           */
513
    /* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into          */
513
    /*  - discontinuous mode disable/enable                                   */
514
    /*       HAL_ADC_Start_xxx functions because if set in this function,     */
514
    /*  - discontinuous mode number of conversions                            */
515
    /*       a conversion on injected group would start a conversion also on  */
515
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
516
    /*       regular group after ADC enabling.                                */
516
   
517
    tmp_cr2 |= (hadc->Init.DataAlign                                          |
517
    /* Enable discontinuous mode only if continuous mode is disabled */
518
                ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv)            |
518
    /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter    */
519
                ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)   );
519
    /*       discontinuous is set anyway, but will have no effect on ADC HW.  */
520
 
520
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
521
    /* Configuration of ADC:                                                  */
521
    {
522
    /*  - scan mode                                                           */
522
      if (hadc->Init.ContinuousConvMode == DISABLE)
523
    /*  - discontinuous mode disable/enable                                   */
523
      {
524
    /*  - discontinuous mode number of conversions                            */
524
        /* Enable the selected ADC regular discontinuous mode */
525
    tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
525
        /* Set the number of channels to be converted in discontinuous mode */
526
   
526
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
527
    /* Enable discontinuous mode only if continuous mode is disabled */
527
                         ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion)  );
528
    /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter    */
528
      }
529
    /*       discontinuous is set anyway, but will have no effect on ADC HW.  */
529
      else
530
    if (hadc->Init.DiscontinuousConvMode == ENABLE)
530
      {
531
    {
531
        /* ADC regular group settings continuous and sequencer discontinuous*/
532
      if (hadc->Init.ContinuousConvMode == DISABLE)
532
        /* cannot be enabled simultaneously.                                */
533
      {
533
       
534
        /* Enable the selected ADC regular discontinuous mode */
534
        /* Update ADC state machine to error */
535
        /* Set the number of channels to be converted in discontinuous mode */
535
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
536
        SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
536
       
537
                         ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion)  );
537
        /* Set ADC error code to ADC IP internal error */
538
      }
538
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
539
      else
539
      }
540
      {
540
    }
541
        /* ADC regular group settings continuous and sequencer discontinuous*/
541
   
542
        /* cannot be enabled simultaneously.                                */
542
    /* Update ADC configuration register CR1 with previous settings */
543
       
543
      MODIFY_REG(hadc->Instance->CR1,
544
        /* Update ADC state machine to error */
544
                 ADC_CR1_SCAN    |
545
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
545
                 ADC_CR1_DISCEN  |
546
       
546
                 ADC_CR1_DISCNUM    ,
547
        /* Set ADC error code to ADC IP internal error */
547
                 tmp_cr1             );
548
        SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
548
   
549
      }
549
    /* Update ADC configuration register CR2 with previous settings */
550
    }
550
      MODIFY_REG(hadc->Instance->CR2,
551
   
551
                 ADC_CR2_ALIGN   |
552
    /* Update ADC configuration register CR1 with previous settings */
552
                 ADC_CR2_EXTSEL  |
553
      MODIFY_REG(hadc->Instance->CR1,
553
                 ADC_CR2_EXTTRIG |
554
                 ADC_CR1_SCAN    |
554
                 ADC_CR2_CONT       ,
555
                 ADC_CR1_DISCEN  |
555
                 tmp_cr2             );
556
                 ADC_CR1_DISCNUM    ,
556
 
557
                 tmp_cr1             );
557
    /* Configuration of regular group sequencer:                              */
558
   
558
    /* - if scan mode is disabled, regular channels sequence length is set to */
559
    /* Update ADC configuration register CR2 with previous settings */
559
    /*   0x00: 1 channel converted (channel on regular rank 1)                */
560
      MODIFY_REG(hadc->Instance->CR2,
560
    /*   Parameter "NbrOfConversion" is discarded.                            */
561
                 ADC_CR2_ALIGN   |
561
    /*   Note: Scan mode is present by hardware on this device and, if        */
562
                 ADC_CR2_EXTSEL  |
562
    /*   disabled, discards automatically nb of conversions. Anyway, nb of    */
563
                 ADC_CR2_EXTTRIG |
563
    /*   conversions is forced to 0x00 for alignment over all STM32 devices.  */
564
                 ADC_CR2_CONT       ,
564
    /* - if scan mode is enabled, regular channels sequence length is set to  */
565
                 tmp_cr2             );
565
    /*   parameter "NbrOfConversion"                                          */
566
 
566
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
567
    /* Configuration of regular group sequencer:                              */
567
    {
568
    /* - if scan mode is disabled, regular channels sequence length is set to */
568
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
569
    /*   0x00: 1 channel converted (channel on regular rank 1)                */
569
    }
570
    /*   Parameter "NbrOfConversion" is discarded.                            */
570
     
571
    /*   Note: Scan mode is present by hardware on this device and, if        */
571
    MODIFY_REG(hadc->Instance->SQR1,
572
    /*   disabled, discards automatically nb of conversions. Anyway, nb of    */
572
               ADC_SQR1_L          ,
573
    /*   conversions is forced to 0x00 for alignment over all STM32 devices.  */
573
               tmp_sqr1             );
574
    /* - if scan mode is enabled, regular channels sequence length is set to  */
574
   
575
    /*   parameter "NbrOfConversion"                                          */
575
    /* Check back that ADC registers have effectively been configured to      */
576
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
576
    /* ensure of no potential problem of ADC core IP clocking.                */
577
    {
577
    /* Check through register CR2 (excluding bits set in other functions:     */
578
      tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
578
    /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits   */
579
    }
579
    /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal    */
580
     
580
    /* measurement path bit (TSVREFE).                                        */
581
    MODIFY_REG(hadc->Instance->SQR1,
581
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
582
               ADC_SQR1_L          ,
582
                                        ADC_CR2_SWSTART | ADC_CR2_JSWSTART |
583
               tmp_sqr1             );
583
                                        ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
584
   
584
                                        ADC_CR2_TSVREFE                     ))
585
    /* Check back that ADC registers have effectively been configured to      */
585
         == tmp_cr2)
586
    /* ensure of no potential problem of ADC core IP clocking.                */
586
    {
587
    /* Check through register CR2 (excluding bits set in other functions:     */
587
      /* Set ADC error code to none */
588
    /* execution control bits (ADON, JSWSTART, SWSTART), regular group bits   */
588
      ADC_CLEAR_ERRORCODE(hadc);
589
    /* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal    */
589
     
590
    /* measurement path bit (TSVREFE).                                        */
590
      /* Set the ADC state */
591
    if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
591
      ADC_STATE_CLR_SET(hadc->State,
592
                                        ADC_CR2_SWSTART | ADC_CR2_JSWSTART |
592
                        HAL_ADC_STATE_BUSY_INTERNAL,
593
                                        ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
593
                        HAL_ADC_STATE_READY);
594
                                        ADC_CR2_TSVREFE                     ))
594
    }
595
         == tmp_cr2)
595
    else
596
    {
596
    {
597
      /* Set ADC error code to none */
597
      /* Update ADC state machine to error */
598
      ADC_CLEAR_ERRORCODE(hadc);
598
      ADC_STATE_CLR_SET(hadc->State,
599
     
599
                        HAL_ADC_STATE_BUSY_INTERNAL,
600
      /* Set the ADC state */
600
                        HAL_ADC_STATE_ERROR_INTERNAL);
601
      ADC_STATE_CLR_SET(hadc->State,
601
     
602
                        HAL_ADC_STATE_BUSY_INTERNAL,
602
      /* Set ADC error code to ADC IP internal error */
603
                        HAL_ADC_STATE_READY);
603
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
604
    }
604
     
605
    else
605
      tmp_hal_status = HAL_ERROR;
606
    {
606
    }
607
      /* Update ADC state machine to error */
607
 
608
      ADC_STATE_CLR_SET(hadc->State,
608
  }
609
                        HAL_ADC_STATE_BUSY_INTERNAL,
609
  else
610
                        HAL_ADC_STATE_ERROR_INTERNAL);
610
  {
611
     
611
    /* Update ADC state machine to error */
612
      /* Set ADC error code to ADC IP internal error */
612
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
613
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
613
       
614
     
614
    tmp_hal_status = HAL_ERROR;
615
      tmp_hal_status = HAL_ERROR;
615
  }
616
    }
616
 
617
 
617
  /* Return function status */
618
  }
618
  return tmp_hal_status;
619
  else
619
}
620
  {
620
 
621
    /* Update ADC state machine to error */
621
/**
622
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
622
  * @brief  Deinitialize the ADC peripheral registers to their default reset
623
       
623
  *         values, with deinitialization of the ADC MSP.
624
    tmp_hal_status = HAL_ERROR;
624
  *         If needed, the example code can be copied and uncommented into
625
  }
625
  *         function HAL_ADC_MspDeInit().
626
 
626
  * @param  hadc: ADC handle
627
  /* Return function status */
627
  * @retval HAL status
628
  return tmp_hal_status;
628
  */
629
}
629
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
630
 
630
{
631
/**
631
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
632
  * @brief  Deinitialize the ADC peripheral registers to their default reset
632
 
633
  *         values, with deinitialization of the ADC MSP.
633
  /* Check ADC handle */
634
  *         If needed, the example code can be copied and uncommented into
634
  if(hadc == NULL)
635
  *         function HAL_ADC_MspDeInit().
635
  {
636
  * @param  hadc: ADC handle
636
     return HAL_ERROR;
637
  * @retval HAL status
637
  }
638
  */
638
 
639
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
639
  /* Check the parameters */
640
{
640
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
641
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
641
 
642
 
642
  /* Set ADC state */
643
  /* Check ADC handle */
643
  SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
644
  if(hadc == NULL)
644
 
645
  {
645
  /* Stop potential conversion on going, on regular and injected groups */
646
     return HAL_ERROR;
646
  /* Disable ADC peripheral */
647
  }
647
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
648
 
648
 
649
  /* Check the parameters */
649
 
650
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
650
  /* Configuration of ADC parameters if previous preliminary actions are      */
651
 
651
  /* correctly completed.                                                     */
652
  /* Set ADC state */
652
  if (tmp_hal_status == HAL_OK)
653
  SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
653
  {
654
 
654
    /* ========== Reset ADC registers ========== */
655
  /* Stop potential conversion on going, on regular and injected groups */
655
 
656
  /* Disable ADC peripheral */
656
 
657
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
657
 
658
 
658
 
659
 
659
    /* Reset register SR */
660
  /* Configuration of ADC parameters if previous preliminary actions are      */
660
    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_JEOC | ADC_FLAG_EOC |
661
  /* correctly completed.                                                     */
661
                                ADC_FLAG_JSTRT | ADC_FLAG_STRT));
662
  if (tmp_hal_status == HAL_OK)
662
                         
663
  {
663
    /* Reset register CR1 */
664
    /* ========== Reset ADC registers ========== */
664
    CLEAR_BIT(hadc->Instance->CR1, (ADC_CR1_AWDEN   | ADC_CR1_JAWDEN | ADC_CR1_DISCNUM |
665
 
665
                                    ADC_CR1_JDISCEN | ADC_CR1_DISCEN | ADC_CR1_JAUTO   |
666
 
666
                                    ADC_CR1_AWDSGL  | ADC_CR1_SCAN   | ADC_CR1_JEOCIE  |  
667
 
667
                                    ADC_CR1_AWDIE   | ADC_CR1_EOCIE  | ADC_CR1_AWDCH    ));
668
 
668
   
669
    /* Reset register SR */
669
    /* Reset register CR2 */
670
    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_JEOC | ADC_FLAG_EOC |
670
    CLEAR_BIT(hadc->Instance->CR2, (ADC_CR2_TSVREFE | ADC_CR2_SWSTART | ADC_CR2_JSWSTART |
671
                                ADC_FLAG_JSTRT | ADC_FLAG_STRT));
671
                                    ADC_CR2_EXTTRIG | ADC_CR2_EXTSEL  | ADC_CR2_JEXTTRIG |  
672
                         
672
                                    ADC_CR2_JEXTSEL | ADC_CR2_ALIGN   | ADC_CR2_DMA      |        
673
    /* Reset register CR1 */
673
                                    ADC_CR2_RSTCAL  | ADC_CR2_CAL     | ADC_CR2_CONT     |          
674
    CLEAR_BIT(hadc->Instance->CR1, (ADC_CR1_AWDEN   | ADC_CR1_JAWDEN | ADC_CR1_DISCNUM |
674
                                    ADC_CR2_ADON                                          ));
675
                                    ADC_CR1_JDISCEN | ADC_CR1_DISCEN | ADC_CR1_JAUTO   |
675
   
676
                                    ADC_CR1_AWDSGL  | ADC_CR1_SCAN   | ADC_CR1_JEOCIE  |  
676
    /* Reset register SMPR1 */
677
                                    ADC_CR1_AWDIE   | ADC_CR1_EOCIE  | ADC_CR1_AWDCH    ));
677
    CLEAR_BIT(hadc->Instance->SMPR1, (ADC_SMPR1_SMP17 | ADC_SMPR1_SMP16 | ADC_SMPR1_SMP15 |
678
   
678
                                      ADC_SMPR1_SMP14 | ADC_SMPR1_SMP13 | ADC_SMPR1_SMP12 |
679
    /* Reset register CR2 */
679
                                      ADC_SMPR1_SMP11 | ADC_SMPR1_SMP10                    ));
680
    CLEAR_BIT(hadc->Instance->CR2, (ADC_CR2_TSVREFE | ADC_CR2_SWSTART | ADC_CR2_JSWSTART |
680
   
681
                                    ADC_CR2_EXTTRIG | ADC_CR2_EXTSEL  | ADC_CR2_JEXTTRIG |  
681
    /* Reset register SMPR2 */
682
                                    ADC_CR2_JEXTSEL | ADC_CR2_ALIGN   | ADC_CR2_DMA      |        
682
    CLEAR_BIT(hadc->Instance->SMPR2, (ADC_SMPR2_SMP9 | ADC_SMPR2_SMP8 | ADC_SMPR2_SMP7 |
683
                                    ADC_CR2_RSTCAL  | ADC_CR2_CAL     | ADC_CR2_CONT     |          
683
                                      ADC_SMPR2_SMP6 | ADC_SMPR2_SMP5 | ADC_SMPR2_SMP4 |
684
                                    ADC_CR2_ADON                                          ));
684
                                      ADC_SMPR2_SMP3 | ADC_SMPR2_SMP2 | ADC_SMPR2_SMP1 |
685
   
685
                                      ADC_SMPR2_SMP0                                    ));
686
    /* Reset register SMPR1 */
686
 
687
    CLEAR_BIT(hadc->Instance->SMPR1, (ADC_SMPR1_SMP17 | ADC_SMPR1_SMP16 | ADC_SMPR1_SMP15 |
687
    /* Reset register JOFR1 */
688
                                      ADC_SMPR1_SMP14 | ADC_SMPR1_SMP13 | ADC_SMPR1_SMP12 |
688
    CLEAR_BIT(hadc->Instance->JOFR1, ADC_JOFR1_JOFFSET1);
689
                                      ADC_SMPR1_SMP11 | ADC_SMPR1_SMP10                    ));
689
    /* Reset register JOFR2 */
690
   
690
    CLEAR_BIT(hadc->Instance->JOFR2, ADC_JOFR2_JOFFSET2);
691
    /* Reset register SMPR2 */
691
    /* Reset register JOFR3 */
692
    CLEAR_BIT(hadc->Instance->SMPR2, (ADC_SMPR2_SMP9 | ADC_SMPR2_SMP8 | ADC_SMPR2_SMP7 |
692
    CLEAR_BIT(hadc->Instance->JOFR3, ADC_JOFR3_JOFFSET3);
693
                                      ADC_SMPR2_SMP6 | ADC_SMPR2_SMP5 | ADC_SMPR2_SMP4 |
693
    /* Reset register JOFR4 */
694
                                      ADC_SMPR2_SMP3 | ADC_SMPR2_SMP2 | ADC_SMPR2_SMP1 |
694
    CLEAR_BIT(hadc->Instance->JOFR4, ADC_JOFR4_JOFFSET4);
695
                                      ADC_SMPR2_SMP0                                    ));
695
   
696
 
696
    /* Reset register HTR */
697
    /* Reset register JOFR1 */
697
    CLEAR_BIT(hadc->Instance->HTR, ADC_HTR_HT);
698
    CLEAR_BIT(hadc->Instance->JOFR1, ADC_JOFR1_JOFFSET1);
698
    /* Reset register LTR */
699
    /* Reset register JOFR2 */
699
    CLEAR_BIT(hadc->Instance->LTR, ADC_LTR_LT);
700
    CLEAR_BIT(hadc->Instance->JOFR2, ADC_JOFR2_JOFFSET2);
700
   
701
    /* Reset register JOFR3 */
701
    /* Reset register SQR1 */
702
    CLEAR_BIT(hadc->Instance->JOFR3, ADC_JOFR3_JOFFSET3);
702
    CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L    |
703
    /* Reset register JOFR4 */
703
                                    ADC_SQR1_SQ16 | ADC_SQR1_SQ15 |
704
    CLEAR_BIT(hadc->Instance->JOFR4, ADC_JOFR4_JOFFSET4);
704
                                    ADC_SQR1_SQ14 | ADC_SQR1_SQ13  );
705
   
705
   
706
    /* Reset register HTR */
706
    /* Reset register SQR1 */
707
    CLEAR_BIT(hadc->Instance->HTR, ADC_HTR_HT);
707
    CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L    |
708
    /* Reset register LTR */
708
                                    ADC_SQR1_SQ16 | ADC_SQR1_SQ15 |
709
    CLEAR_BIT(hadc->Instance->LTR, ADC_LTR_LT);
709
                                    ADC_SQR1_SQ14 | ADC_SQR1_SQ13  );
710
   
710
   
711
    /* Reset register SQR1 */
711
    /* Reset register SQR2 */
712
    CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L    |
712
    CLEAR_BIT(hadc->Instance->SQR2, ADC_SQR2_SQ12 | ADC_SQR2_SQ11 | ADC_SQR2_SQ10 |
713
                                    ADC_SQR1_SQ16 | ADC_SQR1_SQ15 |
713
                                    ADC_SQR2_SQ9  | ADC_SQR2_SQ8  | ADC_SQR2_SQ7   );
714
                                    ADC_SQR1_SQ14 | ADC_SQR1_SQ13  );
714
   
715
   
715
    /* Reset register SQR3 */
716
    /* Reset register SQR1 */
716
    CLEAR_BIT(hadc->Instance->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |
717
    CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L    |
717
                                    ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1  );
718
                                    ADC_SQR1_SQ16 | ADC_SQR1_SQ15 |
718
   
719
                                    ADC_SQR1_SQ14 | ADC_SQR1_SQ13  );
719
    /* Reset register JSQR */
720
   
720
    CLEAR_BIT(hadc->Instance->JSQR, ADC_JSQR_JL |
721
    /* Reset register SQR2 */
721
                                    ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
722
    CLEAR_BIT(hadc->Instance->SQR2, ADC_SQR2_SQ12 | ADC_SQR2_SQ11 | ADC_SQR2_SQ10 |
722
                                    ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  );
723
                                    ADC_SQR2_SQ9  | ADC_SQR2_SQ8  | ADC_SQR2_SQ7   );
723
   
724
   
724
    /* Reset register JSQR */
725
    /* Reset register SQR3 */
725
    CLEAR_BIT(hadc->Instance->JSQR, ADC_JSQR_JL |
726
    CLEAR_BIT(hadc->Instance->SQR3, ADC_SQR3_SQ6 | ADC_SQR3_SQ5 | ADC_SQR3_SQ4 |
726
                                    ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
727
                                    ADC_SQR3_SQ3 | ADC_SQR3_SQ2 | ADC_SQR3_SQ1  );
727
                                    ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  );
728
   
728
   
729
    /* Reset register JSQR */
729
    /* Reset register DR */
730
    CLEAR_BIT(hadc->Instance->JSQR, ADC_JSQR_JL |
730
    /* bits in access mode read only, no direct reset applicable*/
731
                                    ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
731
   
732
                                    ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  );
732
    /* Reset registers JDR1, JDR2, JDR3, JDR4 */
733
   
733
    /* bits in access mode read only, no direct reset applicable*/
734
    /* Reset register JSQR */
734
   
735
    CLEAR_BIT(hadc->Instance->JSQR, ADC_JSQR_JL |
735
    /* ========== Hard reset ADC peripheral ========== */
736
                                    ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
736
    /* Performs a global reset of the entire ADC peripheral: ADC state is     */
737
                                    ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  );
737
    /* forced to a similar state after device power-on.                       */
738
   
738
    /* If needed, copy-paste and uncomment the following reset code into      */
739
    /* Reset register DR */
739
    /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)":              */
740
    /* bits in access mode read only, no direct reset applicable*/
740
    /*                                                                        */
741
   
741
    /*  __HAL_RCC_ADC1_FORCE_RESET()                                          */
742
    /* Reset registers JDR1, JDR2, JDR3, JDR4 */
742
    /*  __HAL_RCC_ADC1_RELEASE_RESET()                                        */
743
    /* bits in access mode read only, no direct reset applicable*/
743
   
744
   
744
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
745
    /* ========== Hard reset ADC peripheral ========== */
745
    if (hadc->MspDeInitCallback == NULL)
746
    /* Performs a global reset of the entire ADC peripheral: ADC state is     */
746
    {
747
    /* forced to a similar state after device power-on.                       */
747
      hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit  */
748
    /* If needed, copy-paste and uncomment the following reset code into      */
748
    }
749
    /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)":              */
749
   
750
    /*                                                                        */
750
    /* DeInit the low level hardware */
751
    /*  __HAL_RCC_ADC1_FORCE_RESET()                                          */
751
    hadc->MspDeInitCallback(hadc);
752
    /*  __HAL_RCC_ADC1_RELEASE_RESET()                                        */
752
#else
753
   
753
    /* DeInit the low level hardware */
754
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
754
    HAL_ADC_MspDeInit(hadc);
755
    if (hadc->MspDeInitCallback == NULL)
755
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
756
    {
756
   
757
      hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit  */
757
    /* Set ADC error code to none */
758
    }
758
    ADC_CLEAR_ERRORCODE(hadc);
759
   
759
   
760
    /* DeInit the low level hardware */
760
    /* Set ADC state */
761
    hadc->MspDeInitCallback(hadc);
761
    hadc->State = HAL_ADC_STATE_RESET;
762
#else
762
 
763
    /* DeInit the low level hardware */
763
  }
764
    HAL_ADC_MspDeInit(hadc);
764
 
765
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
765
  /* Process unlocked */
766
   
766
  __HAL_UNLOCK(hadc);
767
    /* Set ADC error code to none */
767
 
768
    ADC_CLEAR_ERRORCODE(hadc);
768
  /* Return function status */
769
   
769
  return tmp_hal_status;
770
    /* Set ADC state */
770
}
771
    hadc->State = HAL_ADC_STATE_RESET;
771
 
772
 
772
/**
773
  }
773
  * @brief  Initializes the ADC MSP.
774
 
774
  * @param  hadc: ADC handle
775
  /* Process unlocked */
775
  * @retval None
776
  __HAL_UNLOCK(hadc);
776
  */
777
 
777
__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
778
  /* Return function status */
778
{
779
  return tmp_hal_status;
779
  /* Prevent unused argument(s) compilation warning */
780
}
780
  UNUSED(hadc);
781
 
781
  /* NOTE : This function should not be modified. When the callback is needed,
782
/**
782
            function HAL_ADC_MspInit must be implemented in the user file.
783
  * @brief  Initializes the ADC MSP.
783
   */
784
  * @param  hadc: ADC handle
784
}
785
  * @retval None
785
 
786
  */
786
/**
787
__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
787
  * @brief  DeInitializes the ADC MSP.
788
{
788
  * @param  hadc: ADC handle
789
  /* Prevent unused argument(s) compilation warning */
789
  * @retval None
790
  UNUSED(hadc);
790
  */
791
  /* NOTE : This function should not be modified. When the callback is needed,
791
__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
792
            function HAL_ADC_MspInit must be implemented in the user file.
792
{
793
   */
793
  /* Prevent unused argument(s) compilation warning */
794
}
794
  UNUSED(hadc);
795
 
795
  /* NOTE : This function should not be modified. When the callback is needed,
796
/**
796
            function HAL_ADC_MspDeInit must be implemented in the user file.
797
  * @brief  DeInitializes the ADC MSP.
797
   */
798
  * @param  hadc: ADC handle
798
}
799
  * @retval None
799
 
800
  */
800
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
801
__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
801
/**
802
{
802
  * @brief  Register a User ADC Callback
803
  /* Prevent unused argument(s) compilation warning */
803
  *         To be used instead of the weak predefined callback
804
  UNUSED(hadc);
804
  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
805
  /* NOTE : This function should not be modified. When the callback is needed,
805
  *                the configuration information for the specified ADC.
806
            function HAL_ADC_MspDeInit must be implemented in the user file.
806
  * @param  CallbackID ID of the callback to be registered
807
   */
807
  *         This parameter can be one of the following values:
808
}
808
  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
809
 
809
  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
810
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
810
  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
811
/**
811
  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
812
  * @brief  Register a User ADC Callback
812
  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
813
  *         To be used instead of the weak predefined callback
813
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
814
  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
814
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
815
  *                the configuration information for the specified ADC.
815
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
816
  * @param  CallbackID ID of the callback to be registered
816
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
817
  *         This parameter can be one of the following values:
817
  * @param  pCallback pointer to the Callback function
818
  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
818
  * @retval HAL status
819
  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
819
  */
820
  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
820
HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
821
  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
821
{
822
  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
822
  HAL_StatusTypeDef status = HAL_OK;
823
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
823
 
824
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
824
  if (pCallback == NULL)
825
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
825
  {
826
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
826
    /* Update the error code */
827
  * @param  pCallback pointer to the Callback function
827
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
828
  * @retval HAL status
828
 
829
  */
829
    return HAL_ERROR;
830
HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
830
  }
831
{
831
 
832
  HAL_StatusTypeDef status = HAL_OK;
832
  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
833
 
833
  {
834
  if (pCallback == NULL)
834
    switch (CallbackID)
835
  {
835
    {
836
    /* Update the error code */
836
      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
837
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
837
        hadc->ConvCpltCallback = pCallback;
838
 
838
        break;
839
    return HAL_ERROR;
839
     
840
  }
840
      case HAL_ADC_CONVERSION_HALF_CB_ID :
841
 
841
        hadc->ConvHalfCpltCallback = pCallback;
842
  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
842
        break;
843
  {
843
     
844
    switch (CallbackID)
844
      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
845
    {
845
        hadc->LevelOutOfWindowCallback = pCallback;
846
      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
846
        break;
847
        hadc->ConvCpltCallback = pCallback;
847
     
848
        break;
848
      case HAL_ADC_ERROR_CB_ID :
849
     
849
        hadc->ErrorCallback = pCallback;
850
      case HAL_ADC_CONVERSION_HALF_CB_ID :
850
        break;
851
        hadc->ConvHalfCpltCallback = pCallback;
851
     
852
        break;
852
      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
853
     
853
        hadc->InjectedConvCpltCallback = pCallback;
854
      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
854
        break;
855
        hadc->LevelOutOfWindowCallback = pCallback;
855
     
856
        break;
856
      case HAL_ADC_MSPINIT_CB_ID :
857
     
857
        hadc->MspInitCallback = pCallback;
858
      case HAL_ADC_ERROR_CB_ID :
858
        break;
859
        hadc->ErrorCallback = pCallback;
859
     
860
        break;
860
      case HAL_ADC_MSPDEINIT_CB_ID :
861
     
861
        hadc->MspDeInitCallback = pCallback;
862
      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
862
        break;
863
        hadc->InjectedConvCpltCallback = pCallback;
863
     
864
        break;
864
      default :
865
     
865
        /* Update the error code */
866
      case HAL_ADC_MSPINIT_CB_ID :
866
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
867
        hadc->MspInitCallback = pCallback;
867
 
868
        break;
868
        /* Return error status */
869
     
869
        status = HAL_ERROR;
870
      case HAL_ADC_MSPDEINIT_CB_ID :
870
        break;
871
        hadc->MspDeInitCallback = pCallback;
871
    }
872
        break;
872
  }
873
     
873
  else if (HAL_ADC_STATE_RESET == hadc->State)
874
      default :
874
  {
875
        /* Update the error code */
875
    switch (CallbackID)
876
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
876
    {
877
 
877
      case HAL_ADC_MSPINIT_CB_ID :
878
        /* Return error status */
878
        hadc->MspInitCallback = pCallback;
879
        status = HAL_ERROR;
879
        break;
880
        break;
880
     
881
    }
881
      case HAL_ADC_MSPDEINIT_CB_ID :
882
  }
882
        hadc->MspDeInitCallback = pCallback;
883
  else if (HAL_ADC_STATE_RESET == hadc->State)
883
        break;
884
  {
884
     
885
    switch (CallbackID)
885
      default :
886
    {
886
        /* Update the error code */
887
      case HAL_ADC_MSPINIT_CB_ID :
887
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
888
        hadc->MspInitCallback = pCallback;
888
     
889
        break;
889
        /* Return error status */
890
     
890
        status = HAL_ERROR;
891
      case HAL_ADC_MSPDEINIT_CB_ID :
891
        break;
892
        hadc->MspDeInitCallback = pCallback;
892
    }
893
        break;
893
  }
894
     
894
  else
895
      default :
895
  {
896
        /* Update the error code */
896
    /* Update the error code */
897
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
897
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
898
     
898
   
899
        /* Return error status */
899
    /* Return error status */
900
        status = HAL_ERROR;
900
    status =  HAL_ERROR;
901
        break;
901
  }
902
    }
902
 
903
  }
903
  return status;
904
  else
904
}
905
  {
905
 
906
    /* Update the error code */
906
/**
907
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
907
  * @brief  Unregister a ADC Callback
908
   
908
  *         ADC callback is redirected to the weak predefined callback
909
    /* Return error status */
909
  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
910
    status =  HAL_ERROR;
910
  *                the configuration information for the specified ADC.
911
  }
911
  * @param  CallbackID ID of the callback to be unregistered
912
 
912
  *         This parameter can be one of the following values:
913
  return status;
913
  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
914
}
914
  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
915
 
915
  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
916
/**
916
  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
917
  * @brief  Unregister a ADC Callback
917
  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
918
  *         ADC callback is redirected to the weak predefined callback
918
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
919
  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
919
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
920
  *                the configuration information for the specified ADC.
920
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
921
  * @param  CallbackID ID of the callback to be unregistered
921
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
922
  *         This parameter can be one of the following values:
922
  * @retval HAL status
923
  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
923
  */
924
  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
924
HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
925
  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
925
{
926
  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
926
  HAL_StatusTypeDef status = HAL_OK;
927
  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
927
 
928
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
928
  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
929
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
929
  {
930
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
930
    switch (CallbackID)
931
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
931
    {
932
  * @retval HAL status
932
      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
933
  */
933
        hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
934
HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
934
        break;
935
{
935
     
936
  HAL_StatusTypeDef status = HAL_OK;
936
      case HAL_ADC_CONVERSION_HALF_CB_ID :
937
 
937
        hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
938
  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
938
        break;
939
  {
939
     
940
    switch (CallbackID)
940
      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
941
    {
941
        hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
942
      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
942
        break;
943
        hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
943
     
944
        break;
944
      case HAL_ADC_ERROR_CB_ID :
945
     
945
        hadc->ErrorCallback = HAL_ADC_ErrorCallback;
946
      case HAL_ADC_CONVERSION_HALF_CB_ID :
946
        break;
947
        hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
947
     
948
        break;
948
      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
949
     
949
        hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback;
950
      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
950
        break;
951
        hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
951
     
952
        break;
952
      case HAL_ADC_MSPINIT_CB_ID :
953
     
953
        hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit              */
954
      case HAL_ADC_ERROR_CB_ID :
954
        break;
955
        hadc->ErrorCallback = HAL_ADC_ErrorCallback;
955
     
956
        break;
956
      case HAL_ADC_MSPDEINIT_CB_ID :
957
     
957
        hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit            */
958
      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
958
        break;
959
        hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback;
959
     
960
        break;
960
      default :
961
     
961
        /* Update the error code */
962
      case HAL_ADC_MSPINIT_CB_ID :
962
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
963
        hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit              */
963
       
964
        break;
964
        /* Return error status */
965
     
965
        status =  HAL_ERROR;
966
      case HAL_ADC_MSPDEINIT_CB_ID :
966
        break;
967
        hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit            */
967
    }
968
        break;
968
  }
969
     
969
  else if (HAL_ADC_STATE_RESET == hadc->State)
970
      default :
970
  {
971
        /* Update the error code */
971
    switch (CallbackID)
972
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
972
    {
973
       
973
      case HAL_ADC_MSPINIT_CB_ID :
974
        /* Return error status */
974
        hadc->MspInitCallback = HAL_ADC_MspInit;                   /* Legacy weak MspInit              */
975
        status =  HAL_ERROR;
975
        break;
976
        break;
976
       
977
    }
977
      case HAL_ADC_MSPDEINIT_CB_ID :
978
  }
978
        hadc->MspDeInitCallback = HAL_ADC_MspDeInit;               /* Legacy weak MspDeInit            */
979
  else if (HAL_ADC_STATE_RESET == hadc->State)
979
        break;
980
  {
980
       
981
    switch (CallbackID)
981
      default :
982
    {
982
        /* Update the error code */
983
      case HAL_ADC_MSPINIT_CB_ID :
983
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
984
        hadc->MspInitCallback = HAL_ADC_MspInit;                   /* Legacy weak MspInit              */
984
       
985
        break;
985
        /* Return error status */
986
       
986
        status =  HAL_ERROR;
987
      case HAL_ADC_MSPDEINIT_CB_ID :
987
        break;
988
        hadc->MspDeInitCallback = HAL_ADC_MspDeInit;               /* Legacy weak MspDeInit            */
988
    }
989
        break;
989
  }
990
       
990
  else
991
      default :
991
  {
992
        /* Update the error code */
992
    /* Update the error code */
993
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
993
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
994
       
994
   
995
        /* Return error status */
995
    /* Return error status */
996
        status =  HAL_ERROR;
996
    status =  HAL_ERROR;
997
        break;
997
  }
998
    }
998
 
999
  }
999
  return status;
1000
  else
1000
}
1001
  {
1001
 
1002
    /* Update the error code */
1002
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1003
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
1003
 
1004
   
1004
/**
1005
    /* Return error status */
1005
  * @}
1006
    status =  HAL_ERROR;
1006
  */
1007
  }
1007
 
1008
 
1008
/** @defgroup ADC_Exported_Functions_Group2 IO operation functions
1009
  return status;
1009
 *  @brief    Input and Output operation functions
1010
}
1010
 *
1011
 
1011
@verbatim  
1012
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1012
 ===============================================================================
1013
 
1013
                      ##### IO operation functions #####
1014
/**
1014
 ===============================================================================
1015
  * @}
1015
    [..]  This section provides functions allowing to:
1016
  */
1016
      (+) Start conversion of regular group.
1017
 
1017
      (+) Stop conversion of regular group.
1018
/** @defgroup ADC_Exported_Functions_Group2 IO operation functions
1018
      (+) Poll for conversion complete on regular group.
1019
 *  @brief    Input and Output operation functions
1019
      (+) Poll for conversion event.
1020
 *
1020
      (+) Get result of regular channel conversion.
1021
@verbatim  
1021
      (+) Start conversion of regular group and enable interruptions.
1022
 ===============================================================================
1022
      (+) Stop conversion of regular group and disable interruptions.
1023
                      ##### IO operation functions #####
1023
      (+) Handle ADC interrupt request
1024
 ===============================================================================
1024
      (+) Start conversion of regular group and enable DMA transfer.
1025
    [..]  This section provides functions allowing to:
1025
      (+) Stop conversion of regular group and disable ADC DMA transfer.
1026
      (+) Start conversion of regular group.
1026
@endverbatim
1027
      (+) Stop conversion of regular group.
1027
  * @{
1028
      (+) Poll for conversion complete on regular group.
1028
  */
1029
      (+) Poll for conversion event.
1029
 
1030
      (+) Get result of regular channel conversion.
1030
/**
1031
      (+) Start conversion of regular group and enable interruptions.
1031
  * @brief  Enables ADC, starts conversion of regular group.
1032
      (+) Stop conversion of regular group and disable interruptions.
1032
  *         Interruptions enabled in this function: None.
1033
      (+) Handle ADC interrupt request
1033
  * @param  hadc: ADC handle
1034
      (+) Start conversion of regular group and enable DMA transfer.
1034
  * @retval HAL status
1035
      (+) Stop conversion of regular group and disable ADC DMA transfer.
1035
  */
1036
@endverbatim
1036
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
1037
  * @{
1037
{
1038
  */
1038
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1039
 
1039
 
1040
/**
1040
  /* Check the parameters */
1041
  * @brief  Enables ADC, starts conversion of regular group.
1041
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1042
  *         Interruptions enabled in this function: None.
1042
 
1043
  * @param  hadc: ADC handle
1043
  /* Process locked */
1044
  * @retval HAL status
1044
  __HAL_LOCK(hadc);
1045
  */
1045
   
1046
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
1046
  /* Enable the ADC peripheral */
1047
{
1047
  tmp_hal_status = ADC_Enable(hadc);
1048
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1048
 
1049
 
1049
  /* Start conversion if ADC is effectively enabled */
1050
  /* Check the parameters */
1050
  if (tmp_hal_status == HAL_OK)
1051
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1051
  {
1052
 
1052
    /* Set ADC state                                                          */
1053
  /* Process locked */
1053
    /* - Clear state bitfield related to regular group conversion results     */
1054
  __HAL_LOCK(hadc);
1054
    /* - Set state bitfield related to regular operation                      */
1055
   
1055
    ADC_STATE_CLR_SET(hadc->State,
1056
  /* Enable the ADC peripheral */
1056
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC,
1057
  tmp_hal_status = ADC_Enable(hadc);
1057
                      HAL_ADC_STATE_REG_BUSY);
1058
 
1058
   
1059
  /* Start conversion if ADC is effectively enabled */
1059
    /* Set group injected state (from auto-injection) and multimode state     */
1060
  if (tmp_hal_status == HAL_OK)
1060
    /* for all cases of multimode: independent mode, multimode ADC master     */
1061
  {
1061
    /* or multimode ADC slave (for devices with several ADCs):                */
1062
    /* Set ADC state                                                          */
1062
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
1063
    /* - Clear state bitfield related to regular group conversion results     */
1063
    {
1064
    /* - Set state bitfield related to regular operation                      */
1064
      /* Set ADC state (ADC independent or master) */
1065
    ADC_STATE_CLR_SET(hadc->State,
1065
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1066
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC,
1066
     
1067
                      HAL_ADC_STATE_REG_BUSY);
1067
      /* If conversions on group regular are also triggering group injected,  */
1068
   
1068
      /* update ADC state.                                                    */
1069
    /* Set group injected state (from auto-injection) and multimode state     */
1069
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1070
    /* for all cases of multimode: independent mode, multimode ADC master     */
1070
      {
1071
    /* or multimode ADC slave (for devices with several ADCs):                */
1071
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1072
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
1072
      }
1073
    {
1073
    }
1074
      /* Set ADC state (ADC independent or master) */
1074
    else
1075
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1075
    {
1076
     
1076
      /* Set ADC state (ADC slave) */
1077
      /* If conversions on group regular are also triggering group injected,  */
1077
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1078
      /* update ADC state.                                                    */
1078
     
1079
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1079
      /* If conversions on group regular are also triggering group injected,  */
1080
      {
1080
      /* update ADC state.                                                    */
1081
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1081
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
1082
      }
1082
      {
1083
    }
1083
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
1084
    else
1084
      }
1085
    {
1085
    }
1086
      /* Set ADC state (ADC slave) */
1086
   
1087
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1087
    /* State machine update: Check if an injected conversion is ongoing */
1088
     
1088
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1089
      /* If conversions on group regular are also triggering group injected,  */
1089
    {
1090
      /* update ADC state.                                                    */
1090
      /* Reset ADC error code fields related to conversions on group regular */
1091
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
1091
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1092
      {
1092
    }
1093
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
1093
    else
1094
      }
1094
    {
1095
    }
1095
      /* Reset ADC all error code fields */
1096
   
1096
      ADC_CLEAR_ERRORCODE(hadc);
1097
    /* State machine update: Check if an injected conversion is ongoing */
1097
    }
1098
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1098
   
1099
    {
1099
    /* Process unlocked */
1100
      /* Reset ADC error code fields related to conversions on group regular */
1100
    /* Unlock before starting ADC conversions: in case of potential           */
1101
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1101
    /* interruption, to let the process to ADC IRQ Handler.                   */
1102
    }
1102
    __HAL_UNLOCK(hadc);
1103
    else
1103
 
1104
    {
1104
    /* Clear regular group conversion flag */
1105
      /* Reset ADC all error code fields */
1105
    /* (To ensure of no unknown state from potential previous ADC operations) */
1106
      ADC_CLEAR_ERRORCODE(hadc);
1106
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1107
    }
1107
   
1108
   
1108
    /* Enable conversion of regular group.                                    */
1109
    /* Process unlocked */
1109
    /* If software start has been selected, conversion starts immediately.    */
1110
    /* Unlock before starting ADC conversions: in case of potential           */
1110
    /* If external trigger has been selected, conversion will start at next   */
1111
    /* interruption, to let the process to ADC IRQ Handler.                   */
1111
    /* trigger event.                                                         */
1112
    __HAL_UNLOCK(hadc);
1112
    /* Case of multimode enabled:                                             */
1113
 
1113
    /*  - if ADC is slave, ADC is enabled only (conversion is not started).   */
1114
    /* Clear regular group conversion flag */
1114
    /*  - if ADC is master, ADC is enabled and conversion is started.         */
1115
    /* (To ensure of no unknown state from potential previous ADC operations) */
1115
    /* If ADC is master, ADC is enabled and conversion is started.            */
1116
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1116
    /* Note: Alternate trigger for single conversion could be to force an     */
1117
   
1117
    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
1118
    /* Enable conversion of regular group.                                    */
1118
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc)      &&
1119
    /* If software start has been selected, conversion starts immediately.    */
1119
        ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
1120
    /* If external trigger has been selected, conversion will start at next   */
1120
    {
1121
    /* trigger event.                                                         */
1121
      /* Start ADC conversion on regular group with SW start */
1122
    /* Case of multimode enabled:                                             */
1122
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
1123
    /*  - if ADC is slave, ADC is enabled only (conversion is not started).   */
1123
    }
1124
    /*  - if ADC is master, ADC is enabled and conversion is started.         */
1124
    else
1125
    /* If ADC is master, ADC is enabled and conversion is started.            */
1125
    {
1126
    /* Note: Alternate trigger for single conversion could be to force an     */
1126
      /* Start ADC conversion on regular group with external trigger */
1127
    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
1127
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
1128
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc)      &&
1128
    }
1129
        ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
1129
  }
1130
    {
1130
  else
1131
      /* Start ADC conversion on regular group with SW start */
1131
  {
1132
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
1132
    /* Process unlocked */
1133
    }
1133
    __HAL_UNLOCK(hadc);
1134
    else
1134
  }
1135
    {
1135
   
1136
      /* Start ADC conversion on regular group with external trigger */
1136
  /* Return function status */
1137
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
1137
  return tmp_hal_status;
1138
    }
1138
}
1139
  }
1139
 
1140
  else
1140
/**
1141
  {
1141
  * @brief  Stop ADC conversion of regular group (and injected channels in
1142
    /* Process unlocked */
1142
  *         case of auto_injection mode), disable ADC peripheral.
1143
    __HAL_UNLOCK(hadc);
1143
  * @note:  ADC peripheral disable is forcing stop of potential
1144
  }
1144
  *         conversion on injected group. If injected group is under use, it
1145
   
1145
  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1146
  /* Return function status */
1146
  * @param  hadc: ADC handle
1147
  return tmp_hal_status;
1147
  * @retval HAL status.
1148
}
1148
  */
1149
 
1149
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
1150
/**
1150
{
1151
  * @brief  Stop ADC conversion of regular group (and injected channels in
1151
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1152
  *         case of auto_injection mode), disable ADC peripheral.
1152
 
1153
  * @note:  ADC peripheral disable is forcing stop of potential
1153
  /* Check the parameters */
1154
  *         conversion on injected group. If injected group is under use, it
1154
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1155
  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1155
     
1156
  * @param  hadc: ADC handle
1156
  /* Process locked */
1157
  * @retval HAL status.
1157
  __HAL_LOCK(hadc);
1158
  */
1158
 
1159
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
1159
  /* Stop potential conversion on going, on regular and injected groups */
1160
{
1160
  /* Disable ADC peripheral */
1161
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1161
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1162
 
1162
 
1163
  /* Check the parameters */
1163
  /* Check if ADC is effectively disabled */
1164
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1164
  if (tmp_hal_status == HAL_OK)
1165
     
1165
  {
1166
  /* Process locked */
1166
    /* Set ADC state */
1167
  __HAL_LOCK(hadc);
1167
    ADC_STATE_CLR_SET(hadc->State,
1168
 
1168
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1169
  /* Stop potential conversion on going, on regular and injected groups */
1169
                      HAL_ADC_STATE_READY);
1170
  /* Disable ADC peripheral */
1170
  }
1171
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1171
 
1172
 
1172
  /* Process unlocked */
1173
  /* Check if ADC is effectively disabled */
1173
  __HAL_UNLOCK(hadc);
1174
  if (tmp_hal_status == HAL_OK)
1174
 
1175
  {
1175
  /* Return function status */
1176
    /* Set ADC state */
1176
  return tmp_hal_status;
1177
    ADC_STATE_CLR_SET(hadc->State,
1177
}
1178
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1178
 
1179
                      HAL_ADC_STATE_READY);
1179
/**
1180
  }
1180
  * @brief  Wait for regular group conversion to be completed.
1181
 
1181
  * @note   This function cannot be used in a particular setup: ADC configured
1182
  /* Process unlocked */
1182
  *         in DMA mode.
1183
  __HAL_UNLOCK(hadc);
1183
  *         In this case, DMA resets the flag EOC and polling cannot be
1184
 
1184
  *         performed on each conversion.
1185
  /* Return function status */
1185
  * @note   On STM32F1 devices, limitation in case of sequencer enabled
1186
  return tmp_hal_status;
1186
  *         (several ranks selected): polling cannot be done on each
1187
}
1187
  *         conversion inside the sequence. In this case, polling is replaced by
1188
 
1188
  *         wait for maximum conversion time.
1189
/**
1189
  * @param  hadc: ADC handle
1190
  * @brief  Wait for regular group conversion to be completed.
1190
  * @param  Timeout: Timeout value in millisecond.
1191
  * @note   This function cannot be used in a particular setup: ADC configured
1191
  * @retval HAL status
1192
  *         in DMA mode.
1192
  */
1193
  *         In this case, DMA resets the flag EOC and polling cannot be
1193
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
1194
  *         performed on each conversion.
1194
{
1195
  * @note   On STM32F1 devices, limitation in case of sequencer enabled
1195
  uint32_t tickstart = 0U;
1196
  *         (several ranks selected): polling cannot be done on each
1196
 
1197
  *         conversion inside the sequence. In this case, polling is replaced by
1197
  /* Variables for polling in case of scan mode enabled and polling for each  */
1198
  *         wait for maximum conversion time.
1198
  /* conversion.                                                              */
1199
  * @param  hadc: ADC handle
1199
  __IO uint32_t Conversion_Timeout_CPU_cycles = 0U;
1200
  * @param  Timeout: Timeout value in millisecond.
1200
  uint32_t Conversion_Timeout_CPU_cycles_max = 0U;
1201
  * @retval HAL status
1201
 
1202
  */
1202
  /* Check the parameters */
1203
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
1203
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1204
{
1204
 
1205
  uint32_t tickstart = 0U;
1205
  /* Get tick count */
1206
 
1206
  tickstart = HAL_GetTick();
1207
  /* Variables for polling in case of scan mode enabled and polling for each  */
1207
 
1208
  /* conversion.                                                              */
1208
  /* Verification that ADC configuration is compliant with polling for        */
1209
  __IO uint32_t Conversion_Timeout_CPU_cycles = 0U;
1209
  /* each conversion:                                                         */
1210
  uint32_t Conversion_Timeout_CPU_cycles_max = 0U;
1210
  /* Particular case is ADC configured in DMA mode                            */
1211
 
1211
  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA))
1212
  /* Check the parameters */
1212
  {
1213
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1213
    /* Update ADC state machine to error */
1214
 
1214
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1215
  /* Get tick count */
1215
   
1216
  tickstart = HAL_GetTick();
1216
    /* Process unlocked */
1217
 
1217
    __HAL_UNLOCK(hadc);
1218
  /* Verification that ADC configuration is compliant with polling for        */
1218
   
1219
  /* each conversion:                                                         */
1219
    return HAL_ERROR;
1220
  /* Particular case is ADC configured in DMA mode                            */
1220
  }
1221
  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA))
1221
 
1222
  {
1222
  /* Polling for end of conversion: differentiation if single/sequence        */
1223
    /* Update ADC state machine to error */
1223
  /* conversion.                                                              */
1224
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1224
  /*  - If single conversion for regular group (Scan mode disabled or enabled */
1225
   
1225
  /*    with NbrOfConversion =1), flag EOC is used to determine the           */
1226
    /* Process unlocked */
1226
  /*    conversion completion.                                                */
1227
    __HAL_UNLOCK(hadc);
1227
  /*  - If sequence conversion for regular group (scan mode enabled and       */
1228
   
1228
  /*    NbrOfConversion >=2), flag EOC is set only at the end of the          */
1229
    return HAL_ERROR;
1229
  /*    sequence.                                                             */
1230
  }
1230
  /*    To poll for each conversion, the maximum conversion time is computed  */
1231
 
1231
  /*    from ADC conversion time (selected sampling time + conversion time of */
1232
  /* Polling for end of conversion: differentiation if single/sequence        */
1232
  /*    12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on    */
1233
  /* conversion.                                                              */
1233
  /*    settings, conversion time range can be from 28 to 32256 CPU cycles).  */
1234
  /*  - If single conversion for regular group (Scan mode disabled or enabled */
1234
  /*    As flag EOC is not set after each conversion, no timeout status can   */
1235
  /*    with NbrOfConversion =1), flag EOC is used to determine the           */
1235
  /*    be set.                                                               */
1236
  /*    conversion completion.                                                */
1236
  if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) &&
1237
  /*  - If sequence conversion for regular group (scan mode enabled and       */
1237
      HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L)    )
1238
  /*    NbrOfConversion >=2), flag EOC is set only at the end of the          */
1238
  {
1239
  /*    sequence.                                                             */
1239
    /* Wait until End of Conversion flag is raised */
1240
  /*    To poll for each conversion, the maximum conversion time is computed  */
1240
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
1241
  /*    from ADC conversion time (selected sampling time + conversion time of */
1241
    {
1242
  /*    12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on    */
1242
      /* Check if timeout is disabled (set to infinite wait) */
1243
  /*    settings, conversion time range can be from 28 to 32256 CPU cycles).  */
1243
      if(Timeout != HAL_MAX_DELAY)
1244
  /*    As flag EOC is not set after each conversion, no timeout status can   */
1244
      {
1245
  /*    be set.                                                               */
1245
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
1246
  if (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN) &&
1246
        {
1247
      HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L)    )
1247
          /* New check to avoid false timeout detection in case of preemption */
1248
  {
1248
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
1249
    /* Wait until End of Conversion flag is raised */
1249
          {
1250
    while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
1250
            /* Update ADC state machine to timeout */
1251
    {
1251
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1252
      /* Check if timeout is disabled (set to infinite wait) */
1252
           
1253
      if(Timeout != HAL_MAX_DELAY)
1253
            /* Process unlocked */
1254
      {
1254
            __HAL_UNLOCK(hadc);
1255
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
1255
           
1256
        {
1256
            return HAL_TIMEOUT;
1257
          /* New check to avoid false timeout detection in case of preemption */
1257
          }
1258
          if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
1258
        }
1259
          {
1259
      }
1260
            /* Update ADC state machine to timeout */
1260
    }
1261
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1261
  }
1262
           
1262
  else
1263
            /* Process unlocked */
1263
  {
1264
            __HAL_UNLOCK(hadc);
1264
    /* Replace polling by wait for maximum conversion time */
1265
           
1265
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles   */
1266
            return HAL_TIMEOUT;
1266
    /*    and ADC maximum conversion cycles on all channels.                  */
1267
          }
1267
    /*  - Wait for the expected ADC clock cycles delay                        */
1268
        }
1268
    Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
1269
      }
1269
                                          / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
1270
    }
1270
                                         * ADC_CONVCYCLES_MAX_RANGE(hadc)                 );
1271
  }
1271
   
1272
  else
1272
    while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
1273
  {
1273
    {
1274
    /* Replace polling by wait for maximum conversion time */
1274
      /* Check if timeout is disabled (set to infinite wait) */
1275
    /*  - Computation of CPU clock cycles corresponding to ADC clock cycles   */
1275
      if(Timeout != HAL_MAX_DELAY)
1276
    /*    and ADC maximum conversion cycles on all channels.                  */
1276
      {
1277
    /*  - Wait for the expected ADC clock cycles delay                        */
1277
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
1278
    Conversion_Timeout_CPU_cycles_max = ((SystemCoreClock
1278
        {
1279
                                          / HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_ADC))
1279
          /* New check to avoid false timeout detection in case of preemption */
1280
                                         * ADC_CONVCYCLES_MAX_RANGE(hadc)                 );
1280
          if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
1281
   
1281
          {
1282
    while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
1282
            /* Update ADC state machine to timeout */
1283
    {
1283
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1284
      /* Check if timeout is disabled (set to infinite wait) */
1284
 
1285
      if(Timeout != HAL_MAX_DELAY)
1285
            /* Process unlocked */
1286
      {
1286
            __HAL_UNLOCK(hadc);
1287
        if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
1287
 
1288
        {
1288
            return HAL_TIMEOUT;
1289
          /* New check to avoid false timeout detection in case of preemption */
1289
          }
1290
          if(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
1290
        }
1291
          {
1291
      }
1292
            /* Update ADC state machine to timeout */
1292
      Conversion_Timeout_CPU_cycles ++;
1293
            SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1293
    }
1294
 
1294
  }
1295
            /* Process unlocked */
1295
 
1296
            __HAL_UNLOCK(hadc);
1296
  /* Clear regular group conversion flag */
1297
 
1297
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1298
            return HAL_TIMEOUT;
1298
 
1299
          }
1299
  /* Update ADC state machine */
1300
        }
1300
  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1301
      }
1301
 
1302
      Conversion_Timeout_CPU_cycles ++;
1302
  /* Determine whether any further conversion upcoming on group regular       */
1303
    }
1303
  /* by external trigger, continuous mode or scan sequence on going.          */
1304
  }
1304
  /* Note: On STM32F1 devices, in case of sequencer enabled                   */
1305
 
1305
  /*       (several ranks selected), end of conversion flag is raised         */
1306
  /* Clear regular group conversion flag */
1306
  /*       at the end of the sequence.                                        */
1307
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1307
  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
1308
 
1308
     (hadc->Init.ContinuousConvMode == DISABLE)   )
1309
  /* Update ADC state machine */
1309
  {  
1310
  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1310
    /* Set ADC state */
1311
 
1311
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
1312
  /* Determine whether any further conversion upcoming on group regular       */
1312
 
1313
  /* by external trigger, continuous mode or scan sequence on going.          */
1313
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1314
  /* Note: On STM32F1 devices, in case of sequencer enabled                   */
1314
    {
1315
  /*       (several ranks selected), end of conversion flag is raised         */
1315
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1316
  /*       at the end of the sequence.                                        */
1316
    }
1317
  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
1317
  }
1318
     (hadc->Init.ContinuousConvMode == DISABLE)   )
1318
 
1319
  {  
1319
  /* Return ADC state */
1320
    /* Set ADC state */
1320
  return HAL_OK;
1321
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
1321
}
1322
 
1322
 
1323
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1323
/**
1324
    {
1324
  * @brief  Poll for conversion event.
1325
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1325
  * @param  hadc: ADC handle
1326
    }
1326
  * @param  EventType: the ADC event type.
1327
  }
1327
  *          This parameter can be one of the following values:
1328
 
1328
  *            @arg ADC_AWD_EVENT: ADC Analog watchdog event.
1329
  /* Return ADC state */
1329
  * @param  Timeout: Timeout value in millisecond.
1330
  return HAL_OK;
1330
  * @retval HAL status
1331
}
1331
  */
1332
 
1332
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
1333
/**
1333
{
1334
  * @brief  Poll for conversion event.
1334
  uint32_t tickstart = 0U;
1335
  * @param  hadc: ADC handle
1335
 
1336
  * @param  EventType: the ADC event type.
1336
  /* Check the parameters */
1337
  *          This parameter can be one of the following values:
1337
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1338
  *            @arg ADC_AWD_EVENT: ADC Analog watchdog event.
1338
  assert_param(IS_ADC_EVENT_TYPE(EventType));
1339
  * @param  Timeout: Timeout value in millisecond.
1339
 
1340
  * @retval HAL status
1340
  /* Get tick count */
1341
  */
1341
  tickstart = HAL_GetTick();
1342
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
1342
 
1343
{
1343
  /* Check selected event flag */
1344
  uint32_t tickstart = 0U;
1344
  while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1345
 
1345
  {
1346
  /* Check the parameters */
1346
    /* Check if timeout is disabled (set to infinite wait) */
1347
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1347
    if(Timeout != HAL_MAX_DELAY)
1348
  assert_param(IS_ADC_EVENT_TYPE(EventType));
1348
    {
1349
 
1349
      if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
1350
  /* Get tick count */
1350
      {
1351
  tickstart = HAL_GetTick();
1351
        /* New check to avoid false timeout detection in case of preemption */
1352
 
1352
        if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1353
  /* Check selected event flag */
1353
        {
1354
  while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1354
          /* Update ADC state machine to timeout */
1355
  {
1355
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1356
    /* Check if timeout is disabled (set to infinite wait) */
1356
 
1357
    if(Timeout != HAL_MAX_DELAY)
1357
          /* Process unlocked */
1358
    {
1358
          __HAL_UNLOCK(hadc);
1359
      if((Timeout == 0U) || ((HAL_GetTick() - tickstart ) > Timeout))
1359
 
1360
      {
1360
          return HAL_TIMEOUT;
1361
        /* New check to avoid false timeout detection in case of preemption */
1361
        }
1362
        if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1362
      }
1363
        {
1363
    }
1364
          /* Update ADC state machine to timeout */
1364
  }
1365
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1365
 
1366
 
1366
  /* Analog watchdog (level out of window) event */
1367
          /* Process unlocked */
1367
  /* Set ADC state */
1368
          __HAL_UNLOCK(hadc);
1368
  SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1369
 
1369
   
1370
          return HAL_TIMEOUT;
1370
  /* Clear ADC analog watchdog flag */
1371
        }
1371
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1372
      }
1372
 
1373
    }
1373
  /* Return ADC state */
1374
  }
1374
  return HAL_OK;
1375
 
1375
}
1376
  /* Analog watchdog (level out of window) event */
1376
 
1377
  /* Set ADC state */
1377
/**
1378
  SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1378
  * @brief  Enables ADC, starts conversion of regular group with interruption.
1379
   
1379
  *         Interruptions enabled in this function:
1380
  /* Clear ADC analog watchdog flag */
1380
  *          - EOC (end of conversion of regular group)
1381
  __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1381
  *         Each of these interruptions has its dedicated callback function.
1382
 
1382
  * @param  hadc: ADC handle
1383
  /* Return ADC state */
1383
  * @retval HAL status
1384
  return HAL_OK;
1384
  */
1385
}
1385
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
1386
 
1386
{
1387
/**
1387
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1388
  * @brief  Enables ADC, starts conversion of regular group with interruption.
1388
 
1389
  *         Interruptions enabled in this function:
1389
  /* Check the parameters */
1390
  *          - EOC (end of conversion of regular group)
1390
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1391
  *         Each of these interruptions has its dedicated callback function.
1391
 
1392
  * @param  hadc: ADC handle
1392
  /* Process locked */
1393
  * @retval HAL status
1393
  __HAL_LOCK(hadc);
1394
  */
1394
   
1395
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
1395
  /* Enable the ADC peripheral */
1396
{
1396
  tmp_hal_status = ADC_Enable(hadc);
1397
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1397
 
1398
 
1398
  /* Start conversion if ADC is effectively enabled */
1399
  /* Check the parameters */
1399
  if (tmp_hal_status == HAL_OK)
1400
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1400
  {
1401
 
1401
    /* Set ADC state                                                          */
1402
  /* Process locked */
1402
    /* - Clear state bitfield related to regular group conversion results     */
1403
  __HAL_LOCK(hadc);
1403
    /* - Set state bitfield related to regular operation                      */
1404
   
1404
    ADC_STATE_CLR_SET(hadc->State,
1405
  /* Enable the ADC peripheral */
1405
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1406
  tmp_hal_status = ADC_Enable(hadc);
1406
                      HAL_ADC_STATE_REG_BUSY);
1407
 
1407
   
1408
  /* Start conversion if ADC is effectively enabled */
1408
    /* Set group injected state (from auto-injection) and multimode state     */
1409
  if (tmp_hal_status == HAL_OK)
1409
    /* for all cases of multimode: independent mode, multimode ADC master     */
1410
  {
1410
    /* or multimode ADC slave (for devices with several ADCs):                */
1411
    /* Set ADC state                                                          */
1411
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
1412
    /* - Clear state bitfield related to regular group conversion results     */
1412
    {
1413
    /* - Set state bitfield related to regular operation                      */
1413
      /* Set ADC state (ADC independent or master) */
1414
    ADC_STATE_CLR_SET(hadc->State,
1414
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1415
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1415
     
1416
                      HAL_ADC_STATE_REG_BUSY);
1416
      /* If conversions on group regular are also triggering group injected,  */
1417
   
1417
      /* update ADC state.                                                    */
1418
    /* Set group injected state (from auto-injection) and multimode state     */
1418
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1419
    /* for all cases of multimode: independent mode, multimode ADC master     */
1419
      {
1420
    /* or multimode ADC slave (for devices with several ADCs):                */
1420
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1421
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
1421
      }
1422
    {
1422
    }
1423
      /* Set ADC state (ADC independent or master) */
1423
    else
1424
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1424
    {
1425
     
1425
      /* Set ADC state (ADC slave) */
1426
      /* If conversions on group regular are also triggering group injected,  */
1426
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1427
      /* update ADC state.                                                    */
1427
     
1428
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1428
      /* If conversions on group regular are also triggering group injected,  */
1429
      {
1429
      /* update ADC state.                                                    */
1430
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1430
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
1431
      }
1431
      {
1432
    }
1432
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
1433
    else
1433
      }
1434
    {
1434
    }
1435
      /* Set ADC state (ADC slave) */
1435
   
1436
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1436
    /* State machine update: Check if an injected conversion is ongoing */
1437
     
1437
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1438
      /* If conversions on group regular are also triggering group injected,  */
1438
    {
1439
      /* update ADC state.                                                    */
1439
      /* Reset ADC error code fields related to conversions on group regular */
1440
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
1440
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1441
      {
1441
    }
1442
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
1442
    else
1443
      }
1443
    {
1444
    }
1444
      /* Reset ADC all error code fields */
1445
   
1445
      ADC_CLEAR_ERRORCODE(hadc);
1446
    /* State machine update: Check if an injected conversion is ongoing */
1446
    }
1447
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1447
   
1448
    {
1448
    /* Process unlocked */
1449
      /* Reset ADC error code fields related to conversions on group regular */
1449
    /* Unlock before starting ADC conversions: in case of potential           */
1450
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1450
    /* interruption, to let the process to ADC IRQ Handler.                   */
1451
    }
1451
    __HAL_UNLOCK(hadc);
1452
    else
1452
   
1453
    {
1453
    /* Clear regular group conversion flag and overrun flag */
1454
      /* Reset ADC all error code fields */
1454
    /* (To ensure of no unknown state from potential previous ADC operations) */
1455
      ADC_CLEAR_ERRORCODE(hadc);
1455
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1456
    }
1456
   
1457
   
1457
    /* Enable end of conversion interrupt for regular group */
1458
    /* Process unlocked */
1458
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
1459
    /* Unlock before starting ADC conversions: in case of potential           */
1459
   
1460
    /* interruption, to let the process to ADC IRQ Handler.                   */
1460
    /* Enable conversion of regular group.                                    */
1461
    __HAL_UNLOCK(hadc);
1461
    /* If software start has been selected, conversion starts immediately.    */
1462
   
1462
    /* If external trigger has been selected, conversion will start at next   */
1463
    /* Clear regular group conversion flag and overrun flag */
1463
    /* trigger event.                                                         */
1464
    /* (To ensure of no unknown state from potential previous ADC operations) */
1464
    /* Case of multimode enabled:                                             */
1465
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1465
    /*  - if ADC is slave, ADC is enabled only (conversion is not started).   */
1466
   
1466
    /*  - if ADC is master, ADC is enabled and conversion is started.         */
1467
    /* Enable end of conversion interrupt for regular group */
1467
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc)      &&
1468
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
1468
        ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
1469
   
1469
    {
1470
    /* Enable conversion of regular group.                                    */
1470
      /* Start ADC conversion on regular group with SW start */
1471
    /* If software start has been selected, conversion starts immediately.    */
1471
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
1472
    /* If external trigger has been selected, conversion will start at next   */
1472
    }
1473
    /* trigger event.                                                         */
1473
    else
1474
    /* Case of multimode enabled:                                             */
1474
    {
1475
    /*  - if ADC is slave, ADC is enabled only (conversion is not started).   */
1475
      /* Start ADC conversion on regular group with external trigger */
1476
    /*  - if ADC is master, ADC is enabled and conversion is started.         */
1476
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
1477
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc)      &&
1477
    }
1478
        ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)  )
1478
  }
1479
    {
1479
  else
1480
      /* Start ADC conversion on regular group with SW start */
1480
  {
1481
      SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
1481
    /* Process unlocked */
1482
    }
1482
    __HAL_UNLOCK(hadc);
1483
    else
1483
  }
1484
    {
1484
 
1485
      /* Start ADC conversion on regular group with external trigger */
1485
  /* Return function status */
1486
      SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
1486
  return tmp_hal_status;
1487
    }
1487
}
1488
  }
1488
 
1489
  else
1489
/**
1490
  {
1490
  * @brief  Stop ADC conversion of regular group (and injected group in
1491
    /* Process unlocked */
1491
  *         case of auto_injection mode), disable interrution of
1492
    __HAL_UNLOCK(hadc);
1492
  *         end-of-conversion, disable ADC peripheral.
1493
  }
1493
  * @param  hadc: ADC handle
1494
 
1494
  * @retval None
1495
  /* Return function status */
1495
  */
1496
  return tmp_hal_status;
1496
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
1497
}
1497
{
1498
 
1498
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1499
/**
1499
 
1500
  * @brief  Stop ADC conversion of regular group (and injected group in
1500
  /* Check the parameters */
1501
  *         case of auto_injection mode), disable interrution of
1501
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1502
  *         end-of-conversion, disable ADC peripheral.
1502
     
1503
  * @param  hadc: ADC handle
1503
  /* Process locked */
1504
  * @retval None
1504
  __HAL_LOCK(hadc);
1505
  */
1505
 
1506
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
1506
  /* Stop potential conversion on going, on regular and injected groups */
1507
{
1507
  /* Disable ADC peripheral */
1508
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1508
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1509
 
1509
 
1510
  /* Check the parameters */
1510
  /* Check if ADC is effectively disabled */
1511
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1511
  if (tmp_hal_status == HAL_OK)
1512
     
1512
  {
1513
  /* Process locked */
1513
    /* Disable ADC end of conversion interrupt for regular group */
1514
  __HAL_LOCK(hadc);
1514
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1515
 
1515
   
1516
  /* Stop potential conversion on going, on regular and injected groups */
1516
    /* Set ADC state */
1517
  /* Disable ADC peripheral */
1517
    ADC_STATE_CLR_SET(hadc->State,
1518
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1518
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1519
 
1519
                      HAL_ADC_STATE_READY);
1520
  /* Check if ADC is effectively disabled */
1520
  }
1521
  if (tmp_hal_status == HAL_OK)
1521
 
1522
  {
1522
  /* Process unlocked */
1523
    /* Disable ADC end of conversion interrupt for regular group */
1523
  __HAL_UNLOCK(hadc);
1524
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1524
 
1525
   
1525
  /* Return function status */
1526
    /* Set ADC state */
1526
  return tmp_hal_status;
1527
    ADC_STATE_CLR_SET(hadc->State,
1527
}
1528
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1528
 
1529
                      HAL_ADC_STATE_READY);
1529
/**
1530
  }
1530
  * @brief  Enables ADC, starts conversion of regular group and transfers result
1531
 
1531
  *         through DMA.
1532
  /* Process unlocked */
1532
  *         Interruptions enabled in this function:
1533
  __HAL_UNLOCK(hadc);
1533
  *          - DMA transfer complete
1534
 
1534
  *          - DMA half transfer
1535
  /* Return function status */
1535
  *         Each of these interruptions has its dedicated callback function.
1536
  return tmp_hal_status;
1536
  * @note   For devices with several ADCs: This function is for single-ADC mode
1537
}
1537
  *         only. For multimode, use the dedicated MultimodeStart function.
1538
 
1538
  * @note   On STM32F1 devices, only ADC1 and ADC3 (ADC availability depending
1539
/**
1539
  *         on devices) have DMA capability.
1540
  * @brief  Enables ADC, starts conversion of regular group and transfers result
1540
  *         ADC2 converted data can be transferred in dual ADC mode using DMA
1541
  *         through DMA.
1541
  *         of ADC1 (ADC master in multimode).
1542
  *         Interruptions enabled in this function:
1542
  *         In case of using ADC1 with DMA on a device featuring 2 ADC
1543
  *          - DMA transfer complete
1543
  *         instances: ADC1 conversion register DR contains ADC1 conversion
1544
  *          - DMA half transfer
1544
  *         result (ADC1 register DR bits 0 to 11) and, additionally, ADC2 last
1545
  *         Each of these interruptions has its dedicated callback function.
1545
  *         conversion result (ADC1 register DR bits 16 to 27). Therefore, to
1546
  * @note   For devices with several ADCs: This function is for single-ADC mode
1546
  *         have DMA transferring the conversion results of ADC1 only, DMA must
1547
  *         only. For multimode, use the dedicated MultimodeStart function.
1547
  *         be configured to transfer size: half word.
1548
  * @note   On STM32F1 devices, only ADC1 and ADC3 (ADC availability depending
1548
  * @param  hadc: ADC handle
1549
  *         on devices) have DMA capability.
1549
  * @param  pData: The destination Buffer address.
1550
  *         ADC2 converted data can be transferred in dual ADC mode using DMA
1550
  * @param  Length: The length of data to be transferred from ADC peripheral to memory.
1551
  *         of ADC1 (ADC master in multimode).
1551
  * @retval None
1552
  *         In case of using ADC1 with DMA on a device featuring 2 ADC
1552
  */
1553
  *         instances: ADC1 conversion register DR contains ADC1 conversion
1553
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
1554
  *         result (ADC1 register DR bits 0 to 11) and, additionally, ADC2 last
1554
{
1555
  *         conversion result (ADC1 register DR bits 16 to 27). Therefore, to
1555
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1556
  *         have DMA transferring the conversion results of ADC1 only, DMA must
1556
 
1557
  *         be configured to transfer size: half word.
1557
  /* Check the parameters */
1558
  * @param  hadc: ADC handle
1558
  assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
1559
  * @param  pData: The destination Buffer address.
1559
   
1560
  * @param  Length: The length of data to be transferred from ADC peripheral to memory.
1560
  /* Verification if multimode is disabled (for devices with several ADC)     */
1561
  * @retval None
1561
  /* If multimode is enabled, dedicated function multimode conversion         */
1562
  */
1562
  /* start DMA must be used.                                                  */
1563
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
1563
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
1564
{
1564
  {
1565
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1565
    /* Process locked */
1566
 
1566
    __HAL_LOCK(hadc);
1567
  /* Check the parameters */
1567
   
1568
  assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
1568
    /* Enable the ADC peripheral */
1569
   
1569
    tmp_hal_status = ADC_Enable(hadc);
1570
  /* Verification if multimode is disabled (for devices with several ADC)     */
1570
   
1571
  /* If multimode is enabled, dedicated function multimode conversion         */
1571
    /* Start conversion if ADC is effectively enabled */
1572
  /* start DMA must be used.                                                  */
1572
    if (tmp_hal_status == HAL_OK)
1573
  if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
1573
    {
1574
  {
1574
      /* Set ADC state                                                        */
1575
    /* Process locked */
1575
      /* - Clear state bitfield related to regular group conversion results   */
1576
    __HAL_LOCK(hadc);
1576
      /* - Set state bitfield related to regular operation                    */
1577
   
1577
      ADC_STATE_CLR_SET(hadc->State,
1578
    /* Enable the ADC peripheral */
1578
                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1579
    tmp_hal_status = ADC_Enable(hadc);
1579
                        HAL_ADC_STATE_REG_BUSY);
1580
   
1580
   
1581
    /* Start conversion if ADC is effectively enabled */
1581
    /* Set group injected state (from auto-injection) and multimode state     */
1582
    if (tmp_hal_status == HAL_OK)
1582
    /* for all cases of multimode: independent mode, multimode ADC master     */
1583
    {
1583
    /* or multimode ADC slave (for devices with several ADCs):                */
1584
      /* Set ADC state                                                        */
1584
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
1585
      /* - Clear state bitfield related to regular group conversion results   */
1585
    {
1586
      /* - Set state bitfield related to regular operation                    */
1586
      /* Set ADC state (ADC independent or master) */
1587
      ADC_STATE_CLR_SET(hadc->State,
1587
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1588
                        HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP,
1588
     
1589
                        HAL_ADC_STATE_REG_BUSY);
1589
      /* If conversions on group regular are also triggering group injected,  */
1590
   
1590
      /* update ADC state.                                                    */
1591
    /* Set group injected state (from auto-injection) and multimode state     */
1591
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1592
    /* for all cases of multimode: independent mode, multimode ADC master     */
1592
      {
1593
    /* or multimode ADC slave (for devices with several ADCs):                */
1593
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1594
    if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
1594
      }
1595
    {
1595
    }
1596
      /* Set ADC state (ADC independent or master) */
1596
    else
1597
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1597
    {
1598
     
1598
      /* Set ADC state (ADC slave) */
1599
      /* If conversions on group regular are also triggering group injected,  */
1599
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1600
      /* update ADC state.                                                    */
1600
     
1601
      if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1601
      /* If conversions on group regular are also triggering group injected,  */
1602
      {
1602
      /* update ADC state.                                                    */
1603
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1603
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
1604
      }
1604
      {
1605
    }
1605
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
1606
    else
1606
      }
1607
    {
1607
    }
1608
      /* Set ADC state (ADC slave) */
1608
     
1609
      SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
1609
      /* State machine update: Check if an injected conversion is ongoing */
1610
     
1610
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1611
      /* If conversions on group regular are also triggering group injected,  */
1611
      {
1612
      /* update ADC state.                                                    */
1612
        /* Reset ADC error code fields related to conversions on group regular */
1613
      if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
1613
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1614
      {
1614
      }
1615
        ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
1615
      else
1616
      }
1616
      {
1617
    }
1617
        /* Reset ADC all error code fields */
1618
     
1618
        ADC_CLEAR_ERRORCODE(hadc);
1619
      /* State machine update: Check if an injected conversion is ongoing */
1619
      }
1620
      if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1620
     
1621
      {
1621
      /* Process unlocked */
1622
        /* Reset ADC error code fields related to conversions on group regular */
1622
      /* Unlock before starting ADC conversions: in case of potential         */
1623
        CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1623
      /* interruption, to let the process to ADC IRQ Handler.                 */
1624
      }
1624
      __HAL_UNLOCK(hadc);
1625
      else
1625
     
1626
      {
1626
      /* Set the DMA transfer complete callback */
1627
        /* Reset ADC all error code fields */
1627
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1628
        ADC_CLEAR_ERRORCODE(hadc);
1628
 
1629
      }
1629
      /* Set the DMA half transfer complete callback */
1630
     
1630
      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1631
      /* Process unlocked */
1631
     
1632
      /* Unlock before starting ADC conversions: in case of potential         */
1632
      /* Set the DMA error callback */
1633
      /* interruption, to let the process to ADC IRQ Handler.                 */
1633
      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1634
      __HAL_UNLOCK(hadc);
1634
 
1635
     
1635
     
1636
      /* Set the DMA transfer complete callback */
1636
      /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC   */
1637
      hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1637
      /* start (in case of SW start):                                         */
1638
 
1638
     
1639
      /* Set the DMA half transfer complete callback */
1639
      /* Clear regular group conversion flag and overrun flag */
1640
      hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1640
      /* (To ensure of no unknown state from potential previous ADC           */
1641
     
1641
      /* operations)                                                          */
1642
      /* Set the DMA error callback */
1642
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1643
      hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1643
     
1644
 
1644
      /* Enable ADC DMA mode */
1645
     
1645
      SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
1646
      /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC   */
1646
     
1647
      /* start (in case of SW start):                                         */
1647
      /* Start the DMA channel */
1648
     
1648
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1649
      /* Clear regular group conversion flag and overrun flag */
1649
     
1650
      /* (To ensure of no unknown state from potential previous ADC           */
1650
      /* Enable conversion of regular group.                                  */
1651
      /* operations)                                                          */
1651
      /* If software start has been selected, conversion starts immediately.  */
1652
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
1652
      /* If external trigger has been selected, conversion will start at next */
1653
     
1653
      /* trigger event.                                                       */
1654
      /* Enable ADC DMA mode */
1654
      if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
1655
      SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
1655
      {
1656
     
1656
        /* Start ADC conversion on regular group with SW start */
1657
      /* Start the DMA channel */
1657
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
1658
      HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1658
      }
1659
     
1659
      else
1660
      /* Enable conversion of regular group.                                  */
1660
      {
1661
      /* If software start has been selected, conversion starts immediately.  */
1661
        /* Start ADC conversion on regular group with external trigger */
1662
      /* If external trigger has been selected, conversion will start at next */
1662
        SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
1663
      /* trigger event.                                                       */
1663
      }
1664
      if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
1664
    }
1665
      {
1665
    else
1666
        /* Start ADC conversion on regular group with SW start */
1666
    {
1667
        SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
1667
      /* Process unlocked */
1668
      }
1668
      __HAL_UNLOCK(hadc);
1669
      else
1669
    }
1670
      {
1670
  }
1671
        /* Start ADC conversion on regular group with external trigger */
1671
  else
1672
        SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
1672
  {
1673
      }
1673
    tmp_hal_status = HAL_ERROR;
1674
    }
1674
  }
1675
    else
1675
 
1676
    {
1676
  /* Return function status */
1677
      /* Process unlocked */
1677
  return tmp_hal_status;
1678
      __HAL_UNLOCK(hadc);
1678
}
1679
    }
1679
 
1680
  }
1680
/**
1681
  else
1681
  * @brief  Stop ADC conversion of regular group (and injected group in
1682
  {
1682
  *         case of auto_injection mode), disable ADC DMA transfer, disable
1683
    tmp_hal_status = HAL_ERROR;
1683
  *         ADC peripheral.
1684
  }
1684
  * @note:  ADC peripheral disable is forcing stop of potential
1685
 
1685
  *         conversion on injected group. If injected group is under use, it
1686
  /* Return function status */
1686
  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1687
  return tmp_hal_status;
1687
  * @note   For devices with several ADCs: This function is for single-ADC mode
1688
}
1688
  *         only. For multimode, use the dedicated MultimodeStop function.
1689
 
1689
  * @note   On STM32F1 devices, only ADC1 and ADC3 (ADC availability depending
1690
/**
1690
  *         on devices) have DMA capability.
1691
  * @brief  Stop ADC conversion of regular group (and injected group in
1691
  * @param  hadc: ADC handle
1692
  *         case of auto_injection mode), disable ADC DMA transfer, disable
1692
  * @retval HAL status.
1693
  *         ADC peripheral.
1693
  */
1694
  * @note:  ADC peripheral disable is forcing stop of potential
1694
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
1695
  *         conversion on injected group. If injected group is under use, it
1695
{
1696
  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1696
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1697
  * @note   For devices with several ADCs: This function is for single-ADC mode
1697
 
1698
  *         only. For multimode, use the dedicated MultimodeStop function.
1698
  /* Check the parameters */
1699
  * @note   On STM32F1 devices, only ADC1 and ADC3 (ADC availability depending
1699
  assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
1700
  *         on devices) have DMA capability.
1700
     
1701
  * @param  hadc: ADC handle
1701
  /* Process locked */
1702
  * @retval HAL status.
1702
  __HAL_LOCK(hadc);
1703
  */
1703
 
1704
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
1704
  /* Stop potential conversion on going, on regular and injected groups */
1705
{
1705
  /* Disable ADC peripheral */
1706
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1706
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1707
 
1707
 
1708
  /* Check the parameters */
1708
  /* Check if ADC is effectively disabled */
1709
  assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
1709
  if (tmp_hal_status == HAL_OK)
1710
     
1710
  {
1711
  /* Process locked */
1711
    /* Disable ADC DMA mode */
1712
  __HAL_LOCK(hadc);
1712
    CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
1713
 
1713
   
1714
  /* Stop potential conversion on going, on regular and injected groups */
1714
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1715
  /* Disable ADC peripheral */
1715
    /* DMA transfer is on going)                                              */
1716
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1716
    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
1717
 
1717
    {
1718
  /* Check if ADC is effectively disabled */
1718
      tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1719
  if (tmp_hal_status == HAL_OK)
1719
     
1720
  {
1720
      /* Check if DMA channel effectively disabled */
1721
    /* Disable ADC DMA mode */
1721
      if (tmp_hal_status == HAL_OK)
1722
    CLEAR_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
1722
      {
1723
   
1723
        /* Set ADC state */
1724
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1724
        ADC_STATE_CLR_SET(hadc->State,
1725
    /* DMA transfer is on going)                                              */
1725
                          HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1726
    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
1726
                          HAL_ADC_STATE_READY);
1727
    {
1727
      }
1728
      tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1728
      else
1729
     
1729
      {
1730
      /* Check if DMA channel effectively disabled */
1730
        /* Update ADC state machine to error */
1731
      if (tmp_hal_status == HAL_OK)
1731
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1732
      {
1732
      }
1733
        /* Set ADC state */
1733
    }
1734
        ADC_STATE_CLR_SET(hadc->State,
1734
  }
1735
                          HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1735
 
1736
                          HAL_ADC_STATE_READY);
1736
  /* Process unlocked */
1737
      }
1737
  __HAL_UNLOCK(hadc);
1738
      else
1738
   
1739
      {
1739
  /* Return function status */
1740
        /* Update ADC state machine to error */
1740
  return tmp_hal_status;
1741
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1741
}
1742
      }
1742
 
1743
    }
1743
/**
1744
  }
1744
  * @brief  Get ADC regular group conversion result.
1745
 
1745
  * @note   Reading register DR automatically clears ADC flag EOC
1746
  /* Process unlocked */
1746
  *         (ADC group regular end of unitary conversion).
1747
  __HAL_UNLOCK(hadc);
1747
  * @note   This function does not clear ADC flag EOS
1748
   
1748
  *         (ADC group regular end of sequence conversion).
1749
  /* Return function status */
1749
  *         Occurrence of flag EOS rising:
1750
  return tmp_hal_status;
1750
  *          - If sequencer is composed of 1 rank, flag EOS is equivalent
1751
}
1751
  *            to flag EOC.
1752
 
1752
  *          - If sequencer is composed of several ranks, during the scan
1753
/**
1753
  *            sequence flag EOC only is raised, at the end of the scan sequence
1754
  * @brief  Get ADC regular group conversion result.
1754
  *            both flags EOC and EOS are raised.
1755
  * @note   Reading register DR automatically clears ADC flag EOC
1755
  *         To clear this flag, either use function:
1756
  *         (ADC group regular end of unitary conversion).
1756
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1757
  * @note   This function does not clear ADC flag EOS
1757
  *         model polling: @ref HAL_ADC_PollForConversion()
1758
  *         (ADC group regular end of sequence conversion).
1758
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
1759
  *         Occurrence of flag EOS rising:
1759
  * @param  hadc: ADC handle
1760
  *          - If sequencer is composed of 1 rank, flag EOS is equivalent
1760
  * @retval ADC group regular conversion data
1761
  *            to flag EOC.
1761
  */
1762
  *          - If sequencer is composed of several ranks, during the scan
1762
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1763
  *            sequence flag EOC only is raised, at the end of the scan sequence
1763
{
1764
  *            both flags EOC and EOS are raised.
1764
  /* Check the parameters */
1765
  *         To clear this flag, either use function:
1765
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1766
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1766
 
1767
  *         model polling: @ref HAL_ADC_PollForConversion()
1767
  /* Note: EOC flag is not cleared here by software because automatically     */
1768
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
1768
  /*       cleared by hardware when reading register DR.                      */
1769
  * @param  hadc: ADC handle
1769
 
1770
  * @retval ADC group regular conversion data
1770
  /* Return ADC converted value */
1771
  */
1771
  return hadc->Instance->DR;
1772
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1772
}
1773
{
1773
 
1774
  /* Check the parameters */
1774
/**
1775
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1775
  * @brief  Handles ADC interrupt request  
1776
 
1776
  * @param  hadc: ADC handle
1777
  /* Note: EOC flag is not cleared here by software because automatically     */
1777
  * @retval None
1778
  /*       cleared by hardware when reading register DR.                      */
1778
  */
1779
 
1779
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
1780
  /* Return ADC converted value */
1780
{
1781
  return hadc->Instance->DR;
1781
  uint32_t tmp_sr = hadc->Instance->SR;
1782
}
1782
  uint32_t tmp_cr1 = hadc->Instance->CR1;
1783
 
1783
 
1784
/**
1784
  /* Check the parameters */
1785
  * @brief  Handles ADC interrupt request  
1785
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1786
  * @param  hadc: ADC handle
1786
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1787
  * @retval None
1787
  assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
1788
  */
1788
 
1789
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
1789
 
1790
{
1790
  /* ========== Check End of Conversion flag for regular group ========== */
1791
  /* Check the parameters */
1791
  if((tmp_cr1 & ADC_IT_EOC) == ADC_IT_EOC)
1792
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1792
  {
1793
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1793
    if((tmp_sr & ADC_FLAG_EOC) == ADC_FLAG_EOC)
1794
  assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
1794
    {
1795
 
1795
      /* Update state machine on conversion status if not in error state */
1796
 
1796
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1797
  /* ========== Check End of Conversion flag for regular group ========== */
1797
      {
1798
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
1798
        /* Set ADC state */
1799
  {
1799
        SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1800
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) )
1800
      }
1801
    {
1801
     
1802
      /* Update state machine on conversion status if not in error state */
1802
      /* Determine whether any further conversion upcoming on group regular   */
1803
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1803
      /* by external trigger, continuous mode or scan sequence on going.      */
1804
      {
1804
      /* Note: On STM32F1 devices, in case of sequencer enabled               */
1805
        /* Set ADC state */
1805
      /*       (several ranks selected), end of conversion flag is raised     */
1806
        SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1806
      /*       at the end of the sequence.                                    */
1807
      }
1807
      if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
1808
     
1808
         (hadc->Init.ContinuousConvMode == DISABLE)   )
1809
      /* Determine whether any further conversion upcoming on group regular   */
1809
      {
1810
      /* by external trigger, continuous mode or scan sequence on going.      */
1810
        /* Disable ADC end of conversion interrupt on group regular */
1811
      /* Note: On STM32F1 devices, in case of sequencer enabled               */
1811
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1812
      /*       (several ranks selected), end of conversion flag is raised     */
1812
       
1813
      /*       at the end of the sequence.                                    */
1813
        /* Set ADC state */
1814
      if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
1814
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
1815
         (hadc->Init.ContinuousConvMode == DISABLE)   )
1815
       
1816
      {
1816
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1817
        /* Disable ADC end of conversion interrupt on group regular */
1817
        {
1818
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1818
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1819
       
1819
        }
1820
        /* Set ADC state */
1820
      }
1821
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
1821
 
1822
       
1822
      /* Conversion complete callback */
1823
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1823
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1824
        {
1824
      hadc->ConvCpltCallback(hadc);
1825
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1825
#else
1826
        }
1826
      HAL_ADC_ConvCpltCallback(hadc);
1827
      }
1827
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1828
 
1828
     
1829
      /* Conversion complete callback */
1829
      /* Clear regular group conversion flag */
1830
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1830
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1831
      hadc->ConvCpltCallback(hadc);
1831
    }
1832
#else
1832
  }
1833
      HAL_ADC_ConvCpltCallback(hadc);
1833
 
1834
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1834
  /* ========== Check End of Conversion flag for injected group ========== */
1835
     
1835
  if((tmp_cr1 & ADC_IT_JEOC) == ADC_IT_JEOC)
1836
      /* Clear regular group conversion flag */
1836
  {
1837
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1837
    if((tmp_sr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC)
1838
    }
1838
    {
1839
  }
1839
      /* Update state machine on conversion status if not in error state */
1840
 
1840
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1841
  /* ========== Check End of Conversion flag for injected group ========== */
1841
      {
1842
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
1842
        /* Set ADC state */
1843
  {
1843
        SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
1844
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))
1844
      }
1845
    {
1845
 
1846
      /* Update state machine on conversion status if not in error state */
1846
      /* Determine whether any further conversion upcoming on group injected  */
1847
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1847
      /* by external trigger, scan sequence on going or by automatic injected */
1848
      {
1848
      /* conversion from group regular (same conditions as group regular      */
1849
        /* Set ADC state */
1849
      /* interruption disabling above).                                       */
1850
        SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
1850
      /* Note: On STM32F1 devices, in case of sequencer enabled               */
1851
      }
1851
      /*       (several ranks selected), end of conversion flag is raised     */
1852
 
1852
      /*       at the end of the sequence.                                    */
1853
      /* Determine whether any further conversion upcoming on group injected  */
1853
      if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     ||
1854
      /* by external trigger, scan sequence on going or by automatic injected */
1854
         (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&    
1855
      /* conversion from group regular (same conditions as group regular      */
1855
         (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
1856
      /* interruption disabling above).                                       */
1856
          (hadc->Init.ContinuousConvMode == DISABLE)   )        )   )
1857
      /* Note: On STM32F1 devices, in case of sequencer enabled               */
1857
      {
1858
      /*       (several ranks selected), end of conversion flag is raised     */
1858
        /* Disable ADC end of conversion interrupt on group injected */
1859
      /*       at the end of the sequence.                                    */
1859
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
1860
      if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                     ||
1860
       
1861
         (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&    
1861
        /* Set ADC state */
1862
         (ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
1862
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);  
1863
          (hadc->Init.ContinuousConvMode == DISABLE)   )        )   )
1863
 
1864
      {
1864
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
1865
        /* Disable ADC end of conversion interrupt on group injected */
1865
        {
1866
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
1866
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1867
       
1867
        }
1868
        /* Set ADC state */
1868
      }
1869
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);  
1869
 
1870
 
1870
      /* Conversion complete callback */
1871
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
1871
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1872
        {
1872
      hadc->InjectedConvCpltCallback(hadc);
1873
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1873
#else
1874
        }
1874
      HAL_ADCEx_InjectedConvCpltCallback(hadc);
1875
      }
1875
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1876
 
1876
     
1877
      /* Conversion complete callback */
1877
      /* Clear injected group conversion flag */
1878
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1878
      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
1879
      hadc->InjectedConvCpltCallback(hadc);
1879
    }
1880
#else
1880
  }
1881
      HAL_ADCEx_InjectedConvCpltCallback(hadc);
1881
   
1882
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1882
  /* ========== Check Analog watchdog flags ========== */
1883
     
1883
  if((tmp_cr1 & ADC_IT_AWD) == ADC_IT_AWD)
1884
      /* Clear injected group conversion flag */
1884
  {
1885
      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
1885
    if((tmp_sr & ADC_FLAG_AWD) == ADC_FLAG_AWD)
1886
    }
1886
    {
1887
  }
1887
      /* Set ADC state */
1888
   
1888
      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1889
  /* ========== Check Analog watchdog flags ========== */
1889
     
1890
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
1890
      /* Level out of window callback */
1891
  {
1891
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1892
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
1892
      hadc->LevelOutOfWindowCallback(hadc);
1893
    {
1893
#else
1894
      /* Set ADC state */
1894
      HAL_ADC_LevelOutOfWindowCallback(hadc);
1895
      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1895
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1896
     
1896
     
1897
      /* Level out of window callback */
1897
      /* Clear the ADC analog watchdog flag */
1898
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1898
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1899
      hadc->LevelOutOfWindowCallback(hadc);
1899
    }
1900
#else
1900
  }
1901
      HAL_ADC_LevelOutOfWindowCallback(hadc);
1901
 
1902
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1902
}
1903
     
1903
 
1904
      /* Clear the ADC analog watchdog flag */
1904
/**
1905
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1905
  * @brief  Conversion complete callback in non blocking mode
1906
    }
1906
  * @param  hadc: ADC handle
1907
  }
1907
  * @retval None
1908
 
1908
  */
1909
}
1909
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
1910
 
1910
{
1911
/**
1911
  /* Prevent unused argument(s) compilation warning */
1912
  * @brief  Conversion complete callback in non blocking mode
1912
  UNUSED(hadc);
1913
  * @param  hadc: ADC handle
1913
  /* NOTE : This function should not be modified. When the callback is needed,
1914
  * @retval None
1914
            function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1915
  */
1915
   */
1916
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
1916
}
1917
{
1917
 
1918
  /* Prevent unused argument(s) compilation warning */
1918
/**
1919
  UNUSED(hadc);
1919
  * @brief  Conversion DMA half-transfer callback in non blocking mode
1920
  /* NOTE : This function should not be modified. When the callback is needed,
1920
  * @param  hadc: ADC handle
1921
            function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1921
  * @retval None
1922
   */
1922
  */
1923
}
1923
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
1924
 
1924
{
1925
/**
1925
  /* Prevent unused argument(s) compilation warning */
1926
  * @brief  Conversion DMA half-transfer callback in non blocking mode
1926
  UNUSED(hadc);
1927
  * @param  hadc: ADC handle
1927
  /* NOTE : This function should not be modified. When the callback is needed,
1928
  * @retval None
1928
            function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1929
  */
1929
  */
1930
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
1930
}
1931
{
1931
 
1932
  /* Prevent unused argument(s) compilation warning */
1932
/**
1933
  UNUSED(hadc);
1933
  * @brief  Analog watchdog callback in non blocking mode.
1934
  /* NOTE : This function should not be modified. When the callback is needed,
1934
  * @param  hadc: ADC handle
1935
            function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1935
  * @retval None
1936
  */
1936
  */
1937
}
1937
__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
1938
 
1938
{
1939
/**
1939
  /* Prevent unused argument(s) compilation warning */
1940
  * @brief  Analog watchdog callback in non blocking mode.
1940
  UNUSED(hadc);
1941
  * @param  hadc: ADC handle
1941
  /* NOTE : This function should not be modified. When the callback is needed,
1942
  * @retval None
1942
            function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
1943
  */
1943
  */
1944
__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
1944
}
1945
{
1945
 
1946
  /* Prevent unused argument(s) compilation warning */
1946
/**
1947
  UNUSED(hadc);
1947
  * @brief  ADC error callback in non blocking mode
1948
  /* NOTE : This function should not be modified. When the callback is needed,
1948
  *        (ADC conversion with interruption or transfer by DMA)
1949
            function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
1949
  * @param  hadc: ADC handle
1950
  */
1950
  * @retval None
1951
}
1951
  */
1952
 
1952
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1953
/**
1953
{
1954
  * @brief  ADC error callback in non blocking mode
1954
  /* Prevent unused argument(s) compilation warning */
1955
  *        (ADC conversion with interruption or transfer by DMA)
1955
  UNUSED(hadc);
1956
  * @param  hadc: ADC handle
1956
  /* NOTE : This function should not be modified. When the callback is needed,
1957
  * @retval None
1957
            function HAL_ADC_ErrorCallback must be implemented in the user file.
1958
  */
1958
  */
1959
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1959
}
1960
{
1960
 
1961
  /* Prevent unused argument(s) compilation warning */
1961
 
1962
  UNUSED(hadc);
1962
/**
1963
  /* NOTE : This function should not be modified. When the callback is needed,
1963
  * @}
1964
            function HAL_ADC_ErrorCallback must be implemented in the user file.
1964
  */
1965
  */
1965
 
1966
}
1966
/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1967
 
1967
 *  @brief    Peripheral Control functions
1968
 
1968
 *
1969
/**
1969
@verbatim  
1970
  * @}
1970
 ===============================================================================
1971
  */
1971
             ##### Peripheral Control functions #####
1972
 
1972
 ===============================================================================  
1973
/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1973
    [..]  This section provides functions allowing to:
1974
 *  @brief    Peripheral Control functions
1974
      (+) Configure channels on regular group
1975
 *
1975
      (+) Configure the analog watchdog
1976
@verbatim  
1976
     
1977
 ===============================================================================
1977
@endverbatim
1978
             ##### Peripheral Control functions #####
1978
  * @{
1979
 ===============================================================================  
1979
  */
1980
    [..]  This section provides functions allowing to:
1980
 
1981
      (+) Configure channels on regular group
1981
/**
1982
      (+) Configure the analog watchdog
1982
  * @brief  Configures the the selected channel to be linked to the regular
1983
     
1983
  *         group.
1984
@endverbatim
1984
  * @note   In case of usage of internal measurement channels:
1985
  * @{
1985
  *         Vbat/VrefInt/TempSensor.
1986
  */
1986
  *         These internal paths can be be disabled using function
1987
 
1987
  *         HAL_ADC_DeInit().
1988
/**
1988
  * @note   Possibility to update parameters on the fly:
1989
  * @brief  Configures the the selected channel to be linked to the regular
1989
  *         This function initializes channel into regular group, following  
1990
  *         group.
1990
  *         calls to this function can be used to reconfigure some parameters
1991
  * @note   In case of usage of internal measurement channels:
1991
  *         of structure "ADC_ChannelConfTypeDef" on the fly, without resetting
1992
  *         Vbat/VrefInt/TempSensor.
1992
  *         the ADC.
1993
  *         These internal paths can be be disabled using function
1993
  *         The setting of these parameters is conditioned to ADC state.
1994
  *         HAL_ADC_DeInit().
1994
  *         For parameters constraints, see comments of structure
1995
  * @note   Possibility to update parameters on the fly:
1995
  *         "ADC_ChannelConfTypeDef".
1996
  *         This function initializes channel into regular group, following  
1996
  * @param  hadc: ADC handle
1997
  *         calls to this function can be used to reconfigure some parameters
1997
  * @param  sConfig: Structure of ADC channel for regular group.
1998
  *         of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
1998
  * @retval HAL status
1999
  *         the ADC.
1999
  */
2000
  *         The setting of these parameters is conditioned to ADC state.
2000
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
2001
  *         For parameters constraints, see comments of structure
2001
{
2002
  *         "ADC_ChannelConfTypeDef".
2002
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2003
  * @param  hadc: ADC handle
2003
  __IO uint32_t wait_loop_index = 0U;
2004
  * @param  sConfig: Structure of ADC channel for regular group.
2004
 
2005
  * @retval HAL status
2005
  /* Check the parameters */
2006
  */
2006
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2007
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
2007
  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
2008
{
2008
  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
2009
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2009
  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
2010
  __IO uint32_t wait_loop_index = 0U;
2010
 
2011
 
2011
  /* Process locked */
2012
  /* Check the parameters */
2012
  __HAL_LOCK(hadc);
2013
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2013
 
2014
  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
2014
 
2015
  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
2015
  /* Regular sequence configuration */
2016
  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
2016
  /* For Rank 1 to 6 */
2017
 
2017
  if (sConfig->Rank < 7U)
2018
  /* Process locked */
2018
  {
2019
  __HAL_LOCK(hadc);
2019
    MODIFY_REG(hadc->Instance->SQR3                        ,
2020
 
2020
               ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank)    ,
2021
 
2021
               ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
2022
  /* Regular sequence configuration */
2022
  }
2023
  /* For Rank 1 to 6 */
2023
  /* For Rank 7 to 12 */
2024
  if (sConfig->Rank < 7U)
2024
  else if (sConfig->Rank < 13U)
2025
  {
2025
  {
2026
    MODIFY_REG(hadc->Instance->SQR3                        ,
2026
    MODIFY_REG(hadc->Instance->SQR2                        ,
2027
               ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank)    ,
2027
               ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank)    ,
2028
               ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
2028
               ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
2029
  }
2029
  }
2030
  /* For Rank 7 to 12 */
2030
  /* For Rank 13 to 16 */
2031
  else if (sConfig->Rank < 13U)
2031
  else
2032
  {
2032
  {
2033
    MODIFY_REG(hadc->Instance->SQR2                        ,
2033
    MODIFY_REG(hadc->Instance->SQR1                        ,
2034
               ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank)    ,
2034
               ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank)   ,
2035
               ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
2035
               ADC_SQR1_RK(sConfig->Channel, sConfig->Rank) );
2036
  }
2036
  }
2037
  /* For Rank 13 to 16 */
2037
 
2038
  else
2038
 
2039
  {
2039
  /* Channel sampling time configuration */
2040
    MODIFY_REG(hadc->Instance->SQR1                        ,
2040
  /* For channels 10 to 17 */
2041
               ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank)   ,
2041
  if (sConfig->Channel >= ADC_CHANNEL_10)
2042
               ADC_SQR1_RK(sConfig->Channel, sConfig->Rank) );
2042
  {
2043
  }
2043
    MODIFY_REG(hadc->Instance->SMPR1                             ,
2044
 
2044
               ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel)      ,
2045
 
2045
               ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
2046
  /* Channel sampling time configuration */
2046
  }
2047
  /* For channels 10 to 17 */
2047
  else /* For channels 0 to 9 */
2048
  if (sConfig->Channel >= ADC_CHANNEL_10)
2048
  {
2049
  {
2049
    MODIFY_REG(hadc->Instance->SMPR2                             ,
2050
    MODIFY_REG(hadc->Instance->SMPR1                             ,
2050
               ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel)       ,
2051
               ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel)      ,
2051
               ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
2052
               ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
2052
  }
2053
  }
2053
 
2054
  else /* For channels 0 to 9 */
2054
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
2055
  {
2055
  /* and VREFINT measurement path.                                            */
2056
    MODIFY_REG(hadc->Instance->SMPR2                             ,
2056
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
2057
               ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel)       ,
2057
      (sConfig->Channel == ADC_CHANNEL_VREFINT)      )
2058
               ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
2058
  {
2059
  }
2059
    /* For STM32F1 devices with several ADC: Only ADC1 can access internal    */
2060
 
2060
    /* measurement channels (VrefInt/TempSensor). If these channels are       */
2061
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
2061
    /* intended to be set on other ADC instances, an error is reported.       */
2062
  /* and VREFINT measurement path.                                            */
2062
    if (hadc->Instance == ADC1)
2063
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
2063
    {
2064
      (sConfig->Channel == ADC_CHANNEL_VREFINT)      )
2064
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
2065
  {
2065
      {
2066
    /* For STM32F1 devices with several ADC: Only ADC1 can access internal    */
2066
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
2067
    /* measurement channels (VrefInt/TempSensor). If these channels are       */
2067
       
2068
    /* intended to be set on other ADC instances, an error is reported.       */
2068
        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
2069
    if (hadc->Instance == ADC1)
2069
        {
2070
    {
2070
          /* Delay for temperature sensor stabilization time */
2071
      if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
2071
          /* Compute number of CPU cycles to wait for */
2072
      {
2072
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
2073
        SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
2073
          while(wait_loop_index != 0U)
2074
       
2074
          {
2075
        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
2075
            wait_loop_index--;
2076
        {
2076
          }
2077
          /* Delay for temperature sensor stabilization time */
2077
        }
2078
          /* Compute number of CPU cycles to wait for */
2078
      }
2079
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
2079
    }
2080
          while(wait_loop_index != 0U)
2080
    else
2081
          {
2081
    {
2082
            wait_loop_index--;
2082
      /* Update ADC state machine to error */
2083
          }
2083
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2084
        }
2084
     
2085
      }
2085
      tmp_hal_status = HAL_ERROR;
2086
    }
2086
    }
2087
    else
2087
  }
2088
    {
2088
 
2089
      /* Update ADC state machine to error */
2089
  /* Process unlocked */
2090
      SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2090
  __HAL_UNLOCK(hadc);
2091
     
2091
 
2092
      tmp_hal_status = HAL_ERROR;
2092
  /* Return function status */
2093
    }
2093
  return tmp_hal_status;
2094
  }
2094
}
2095
 
2095
 
2096
  /* Process unlocked */
2096
/**
2097
  __HAL_UNLOCK(hadc);
2097
  * @brief  Configures the analog watchdog.
2098
 
2098
  * @note   Analog watchdog thresholds can be modified while ADC conversion
2099
  /* Return function status */
2099
  *         is on going.
2100
  return tmp_hal_status;
2100
  *         In this case, some constraints must be taken into account:
2101
}
2101
  *         the programmed threshold values are effective from the next
2102
 
2102
  *         ADC EOC (end of unitary conversion).
2103
/**
2103
  *         Considering that registers write delay may happen due to
2104
  * @brief  Configures the analog watchdog.
2104
  *         bus activity, this might cause an uncertainty on the
2105
  * @note   Analog watchdog thresholds can be modified while ADC conversion
2105
  *         effective timing of the new programmed threshold values.
2106
  *         is on going.
2106
  * @param  hadc: ADC handle
2107
  *         In this case, some constraints must be taken into account:
2107
  * @param  AnalogWDGConfig: Structure of ADC analog watchdog configuration
2108
  *         the programmed threshold values are effective from the next
2108
  * @retval HAL status
2109
  *         ADC EOC (end of unitary conversion).
2109
  */
2110
  *         Considering that registers write delay may happen due to
2110
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
2111
  *         bus activity, this might cause an uncertainty on the
2111
{
2112
  *         effective timing of the new programmed threshold values.
2112
  /* Check the parameters */
2113
  * @param  hadc: ADC handle
2113
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2114
  * @param  AnalogWDGConfig: Structure of ADC analog watchdog configuration
2114
  assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
2115
  * @retval HAL status
2115
  assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
2116
  */
2116
  assert_param(IS_ADC_RANGE(AnalogWDGConfig->HighThreshold));
2117
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
2117
  assert_param(IS_ADC_RANGE(AnalogWDGConfig->LowThreshold));
2118
{
2118
 
2119
  /* Check the parameters */
2119
  if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)     ||
2120
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2120
     (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC)   ||
2121
  assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
2121
     (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC)  )
2122
  assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
2122
  {
2123
  assert_param(IS_ADC_RANGE(AnalogWDGConfig->HighThreshold));
2123
    assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
2124
  assert_param(IS_ADC_RANGE(AnalogWDGConfig->LowThreshold));
2124
  }
2125
 
2125
 
2126
  if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)     ||
2126
  /* Process locked */
2127
     (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC)   ||
2127
  __HAL_LOCK(hadc);
2128
     (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC)  )
2128
 
2129
  {
2129
  /* Analog watchdog configuration */
2130
    assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
2130
 
2131
  }
2131
  /* Configure ADC Analog watchdog interrupt */
2132
 
2132
  if(AnalogWDGConfig->ITMode == ENABLE)
2133
  /* Process locked */
2133
  {
2134
  __HAL_LOCK(hadc);
2134
    /* Enable the ADC Analog watchdog interrupt */
2135
 
2135
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
2136
  /* Analog watchdog configuration */
2136
  }
2137
 
2137
  else
2138
  /* Configure ADC Analog watchdog interrupt */
2138
  {
2139
  if(AnalogWDGConfig->ITMode == ENABLE)
2139
    /* Disable the ADC Analog watchdog interrupt */
2140
  {
2140
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
2141
    /* Enable the ADC Analog watchdog interrupt */
2141
  }
2142
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
2142
 
2143
  }
2143
  /* Configuration of analog watchdog:                                        */
2144
  else
2144
  /*  - Set the analog watchdog enable mode: regular and/or injected groups,  */
2145
  {
2145
  /*    one or all channels.                                                  */
2146
    /* Disable the ADC Analog watchdog interrupt */
2146
  /*  - Set the Analog watchdog channel (is not used if watchdog              */
2147
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
2147
  /*    mode "all channels": ADC_CFGR_AWD1SGL=0).                             */
2148
  }
2148
  MODIFY_REG(hadc->Instance->CR1            ,
2149
 
2149
             ADC_CR1_AWDSGL |
2150
  /* Configuration of analog watchdog:                                        */
2150
             ADC_CR1_JAWDEN |
2151
  /*  - Set the analog watchdog enable mode: regular and/or injected groups,  */
2151
             ADC_CR1_AWDEN  |
2152
  /*    one or all channels.                                                  */
2152
             ADC_CR1_AWDCH                  ,
2153
  /*  - Set the Analog watchdog channel (is not used if watchdog              */
2153
             AnalogWDGConfig->WatchdogMode |
2154
  /*    mode "all channels": ADC_CFGR_AWD1SGL=0).                             */
2154
             AnalogWDGConfig->Channel        );
2155
  MODIFY_REG(hadc->Instance->CR1            ,
2155
 
2156
             ADC_CR1_AWDSGL |
2156
  /* Set the high threshold */
2157
             ADC_CR1_JAWDEN |
2157
  WRITE_REG(hadc->Instance->HTR, AnalogWDGConfig->HighThreshold);
2158
             ADC_CR1_AWDEN  |
2158
 
2159
             ADC_CR1_AWDCH                  ,
2159
  /* Set the low threshold */
2160
             AnalogWDGConfig->WatchdogMode |
2160
  WRITE_REG(hadc->Instance->LTR, AnalogWDGConfig->LowThreshold);
2161
             AnalogWDGConfig->Channel        );
2161
 
2162
 
2162
  /* Process unlocked */
2163
  /* Set the high threshold */
2163
  __HAL_UNLOCK(hadc);
2164
  WRITE_REG(hadc->Instance->HTR, AnalogWDGConfig->HighThreshold);
2164
 
2165
 
2165
  /* Return function status */
2166
  /* Set the low threshold */
2166
  return HAL_OK;
2167
  WRITE_REG(hadc->Instance->LTR, AnalogWDGConfig->LowThreshold);
2167
}
2168
 
2168
 
2169
  /* Process unlocked */
2169
 
2170
  __HAL_UNLOCK(hadc);
2170
/**
2171
 
2171
  * @}
2172
  /* Return function status */
2172
  */
2173
  return HAL_OK;
2173
 
2174
}
2174
 
2175
 
2175
/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
2176
 
2176
 *  @brief    Peripheral State functions
2177
/**
2177
 *
2178
  * @}
2178
@verbatim
2179
  */
2179
 ===============================================================================
2180
 
2180
            ##### Peripheral State and Errors functions #####
2181
 
2181
 ===============================================================================  
2182
/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
2182
    [..]
2183
 *  @brief    Peripheral State functions
2183
    This subsection provides functions to get in run-time the status of the  
2184
 *
2184
    peripheral.
2185
@verbatim
2185
      (+) Check the ADC state
2186
 ===============================================================================
2186
      (+) Check the ADC error code
2187
            ##### Peripheral State and Errors functions #####
2187
 
2188
 ===============================================================================  
2188
@endverbatim
2189
    [..]
2189
  * @{
2190
    This subsection provides functions to get in run-time the status of the  
2190
  */
2191
    peripheral.
2191
 
2192
      (+) Check the ADC state
2192
/**
2193
      (+) Check the ADC error code
2193
  * @brief  return the ADC state
2194
 
2194
  * @param  hadc: ADC handle
2195
@endverbatim
2195
  * @retval HAL state
2196
  * @{
2196
  */
2197
  */
2197
uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
2198
 
2198
{
2199
/**
2199
  /* Return ADC state */
2200
  * @brief  return the ADC state
2200
  return hadc->State;
2201
  * @param  hadc: ADC handle
2201
}
2202
  * @retval HAL state
2202
 
2203
  */
2203
/**
2204
uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
2204
  * @brief  Return the ADC error code
2205
{
2205
  * @param  hadc: ADC handle
2206
  /* Return ADC state */
2206
  * @retval ADC Error Code
2207
  return hadc->State;
2207
  */
2208
}
2208
uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
2209
 
2209
{
2210
/**
2210
  return hadc->ErrorCode;
2211
  * @brief  Return the ADC error code
2211
}
2212
  * @param  hadc: ADC handle
2212
 
2213
  * @retval ADC Error Code
2213
/**
2214
  */
2214
  * @}
2215
uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
2215
  */
2216
{
2216
 
2217
  return hadc->ErrorCode;
2217
/**
2218
}
2218
  * @}
2219
 
2219
  */
2220
/**
2220
 
2221
  * @}
2221
/** @defgroup ADC_Private_Functions ADC Private Functions
2222
  */
2222
  * @{
2223
 
2223
  */
2224
/**
2224
 
2225
  * @}
2225
/**
2226
  */
2226
  * @brief  Enable the selected ADC.
2227
 
2227
  * @note   Prerequisite condition to use this function: ADC must be disabled
2228
/** @defgroup ADC_Private_Functions ADC Private Functions
2228
  *         and voltage regulator must be enabled (done into HAL_ADC_Init()).
2229
  * @{
2229
  * @param  hadc: ADC handle
2230
  */
2230
  * @retval HAL status.
2231
 
2231
  */
2232
/**
2232
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
2233
  * @brief  Enable the selected ADC.
2233
{
2234
  * @note   Prerequisite condition to use this function: ADC must be disabled
2234
  uint32_t tickstart = 0U;
2235
  *         and voltage regulator must be enabled (done into HAL_ADC_Init()).
2235
  __IO uint32_t wait_loop_index = 0U;
2236
  * @param  hadc: ADC handle
2236
 
2237
  * @retval HAL status.
2237
  /* ADC enable and wait for ADC ready (in case of ADC is disabled or         */
2238
  */
2238
  /* enabling phase not yet completed: flag ADC ready not yet set).           */
2239
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
2239
  /* Timeout implemented to not be stuck if ADC cannot be enabled (possible   */
2240
{
2240
  /* causes: ADC clock not running, ...).                                     */
2241
  uint32_t tickstart = 0U;
2241
  if (ADC_IS_ENABLE(hadc) == RESET)
2242
  __IO uint32_t wait_loop_index = 0U;
2242
  {
2243
 
2243
    /* Enable the Peripheral */
2244
  /* ADC enable and wait for ADC ready (in case of ADC is disabled or         */
2244
    __HAL_ADC_ENABLE(hadc);
2245
  /* enabling phase not yet completed: flag ADC ready not yet set).           */
2245
   
2246
  /* Timeout implemented to not be stuck if ADC cannot be enabled (possible   */
2246
    /* Delay for ADC stabilization time */
2247
  /* causes: ADC clock not running, ...).                                     */
2247
    /* Compute number of CPU cycles to wait for */
2248
  if (ADC_IS_ENABLE(hadc) == RESET)
2248
    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
2249
  {
2249
    while(wait_loop_index != 0U)
2250
    /* Enable the Peripheral */
2250
    {
2251
    __HAL_ADC_ENABLE(hadc);
2251
      wait_loop_index--;
2252
   
2252
    }
2253
    /* Delay for ADC stabilization time */
2253
   
2254
    /* Compute number of CPU cycles to wait for */
2254
    /* Get tick count */
2255
    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
2255
    tickstart = HAL_GetTick();
2256
    while(wait_loop_index != 0U)
2256
 
2257
    {
2257
    /* Wait for ADC effectively enabled */
2258
      wait_loop_index--;
2258
    while(ADC_IS_ENABLE(hadc) == RESET)
2259
    }
2259
    {
2260
   
2260
      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
2261
    /* Get tick count */
2261
      {
2262
    tickstart = HAL_GetTick();
2262
        /* New check to avoid false timeout detection in case of preemption */
2263
 
2263
        if(ADC_IS_ENABLE(hadc) == RESET)
2264
    /* Wait for ADC effectively enabled */
2264
        {
2265
    while(ADC_IS_ENABLE(hadc) == RESET)
2265
          /* Update ADC state machine to error */
2266
    {
2266
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2267
      if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
2267
 
2268
      {
2268
          /* Set ADC error code to ADC IP internal error */
2269
        /* New check to avoid false timeout detection in case of preemption */
2269
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2270
        if(ADC_IS_ENABLE(hadc) == RESET)
2270
 
2271
        {
2271
          /* Process unlocked */
2272
          /* Update ADC state machine to error */
2272
          __HAL_UNLOCK(hadc);
2273
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2273
 
2274
 
2274
          return HAL_ERROR;
2275
          /* Set ADC error code to ADC IP internal error */
2275
        }
2276
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2276
      }
2277
 
2277
    }
2278
          /* Process unlocked */
2278
  }
2279
          __HAL_UNLOCK(hadc);
2279
   
2280
 
2280
  /* Return HAL status */
2281
          return HAL_ERROR;
2281
  return HAL_OK;
2282
        }
2282
}
2283
      }
2283
 
2284
    }
2284
/**
2285
  }
2285
  * @brief  Stop ADC conversion and disable the selected ADC
2286
   
2286
  * @note   Prerequisite condition to use this function: ADC conversions must be
2287
  /* Return HAL status */
2287
  *         stopped to disable the ADC.
2288
  return HAL_OK;
2288
  * @param  hadc: ADC handle
2289
}
2289
  * @retval HAL status.
2290
 
2290
  */
2291
/**
2291
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
2292
  * @brief  Stop ADC conversion and disable the selected ADC
2292
{
2293
  * @note   Prerequisite condition to use this function: ADC conversions must be
2293
  uint32_t tickstart = 0U;
2294
  *         stopped to disable the ADC.
2294
 
2295
  * @param  hadc: ADC handle
2295
  /* Verification if ADC is not already disabled */
2296
  * @retval HAL status.
2296
  if (ADC_IS_ENABLE(hadc) != RESET)
2297
  */
2297
  {
2298
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
2298
    /* Disable the ADC peripheral */
2299
{
2299
    __HAL_ADC_DISABLE(hadc);
2300
  uint32_t tickstart = 0U;
2300
     
2301
 
2301
    /* Get tick count */
2302
  /* Verification if ADC is not already disabled */
2302
    tickstart = HAL_GetTick();
2303
  if (ADC_IS_ENABLE(hadc) != RESET)
2303
   
2304
  {
2304
    /* Wait for ADC effectively disabled */
2305
    /* Disable the ADC peripheral */
2305
    while(ADC_IS_ENABLE(hadc) != RESET)
2306
    __HAL_ADC_DISABLE(hadc);
2306
    {
2307
     
2307
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
2308
    /* Get tick count */
2308
      {
2309
    tickstart = HAL_GetTick();
2309
        /* New check to avoid false timeout detection in case of preemption */
2310
   
2310
        if(ADC_IS_ENABLE(hadc) != RESET)
2311
    /* Wait for ADC effectively disabled */
2311
        {
2312
    while(ADC_IS_ENABLE(hadc) != RESET)
2312
          /* Update ADC state machine to error */
2313
    {
2313
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2314
      if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
2314
 
2315
      {
2315
          /* Set ADC error code to ADC IP internal error */
2316
        /* New check to avoid false timeout detection in case of preemption */
2316
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2317
        if(ADC_IS_ENABLE(hadc) != RESET)
2317
 
2318
        {
2318
          return HAL_ERROR;
2319
          /* Update ADC state machine to error */
2319
        }
2320
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2320
      }
2321
 
2321
    }
2322
          /* Set ADC error code to ADC IP internal error */
2322
  }
2323
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2323
 
2324
 
2324
  /* Return HAL status */
2325
          return HAL_ERROR;
2325
  return HAL_OK;
2326
        }
2326
}
2327
      }
2327
 
2328
    }
2328
/**
2329
  }
2329
  * @brief  DMA transfer complete callback.
2330
 
2330
  * @param  hdma: pointer to DMA handle.
2331
  /* Return HAL status */
2331
  * @retval None
2332
  return HAL_OK;
2332
  */
2333
}
2333
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
2334
 
2334
{
2335
/**
2335
  /* Retrieve ADC handle corresponding to current DMA handle */
2336
  * @brief  DMA transfer complete callback.
2336
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2337
  * @param  hdma: pointer to DMA handle.
2337
 
2338
  * @retval None
2338
  /* Update state machine on conversion status if not in error state */
2339
  */
2339
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
2340
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
2340
  {
2341
{
2341
    /* Update ADC state machine */
2342
  /* Retrieve ADC handle corresponding to current DMA handle */
2342
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
2343
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2343
   
2344
 
2344
    /* Determine whether any further conversion upcoming on group regular     */
2345
  /* Update state machine on conversion status if not in error state */
2345
    /* by external trigger, continuous mode or scan sequence on going.        */
2346
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
2346
    /* Note: On STM32F1 devices, in case of sequencer enabled                 */
2347
  {
2347
    /*       (several ranks selected), end of conversion flag is raised       */
2348
    /* Update ADC state machine */
2348
    /*       at the end of the sequence.                                      */
2349
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
2349
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
2350
   
2350
       (hadc->Init.ContinuousConvMode == DISABLE)   )
2351
    /* Determine whether any further conversion upcoming on group regular     */
2351
    {
2352
    /* by external trigger, continuous mode or scan sequence on going.        */
2352
      /* Set ADC state */
2353
    /* Note: On STM32F1 devices, in case of sequencer enabled                 */
2353
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
2354
    /*       (several ranks selected), end of conversion flag is raised       */
2354
     
2355
    /*       at the end of the sequence.                                      */
2355
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
2356
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)        &&
2356
      {
2357
       (hadc->Init.ContinuousConvMode == DISABLE)   )
2357
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
2358
    {
2358
      }
2359
      /* Set ADC state */
2359
    }
2360
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
2360
   
2361
     
2361
    /* Conversion complete callback */
2362
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
2362
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2363
      {
2363
    hadc->ConvCpltCallback(hadc);
2364
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
2364
#else
2365
      }
2365
    HAL_ADC_ConvCpltCallback(hadc);
2366
    }
2366
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2367
   
2367
  }
2368
    /* Conversion complete callback */
2368
  else
2369
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2369
  {
2370
    hadc->ConvCpltCallback(hadc);
2370
    /* Call DMA error callback */
2371
#else
2371
    hadc->DMA_Handle->XferErrorCallback(hdma);
2372
    HAL_ADC_ConvCpltCallback(hadc);
2372
  }
2373
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2373
}
2374
  }
2374
 
2375
  else
2375
/**
2376
  {
2376
  * @brief  DMA half transfer complete callback.
2377
    /* Call DMA error callback */
2377
  * @param  hdma: pointer to DMA handle.
2378
    hadc->DMA_Handle->XferErrorCallback(hdma);
2378
  * @retval None
2379
  }
2379
  */
2380
}
2380
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)  
2381
 
2381
{
2382
/**
2382
  /* Retrieve ADC handle corresponding to current DMA handle */
2383
  * @brief  DMA half transfer complete callback.
2383
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2384
  * @param  hdma: pointer to DMA handle.
2384
 
2385
  * @retval None
2385
  /* Half conversion callback */
2386
  */
2386
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2387
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)  
2387
    hadc->ConvHalfCpltCallback(hadc);
2388
{
2388
#else
2389
  /* Retrieve ADC handle corresponding to current DMA handle */
2389
  HAL_ADC_ConvHalfCpltCallback(hadc);
2390
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2390
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2391
 
2391
}
2392
  /* Half conversion callback */
2392
 
2393
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2393
/**
2394
    hadc->ConvHalfCpltCallback(hadc);
2394
  * @brief  DMA error callback
2395
#else
2395
  * @param  hdma: pointer to DMA handle.
2396
  HAL_ADC_ConvHalfCpltCallback(hadc);
2396
  * @retval None
2397
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2397
  */
2398
}
2398
void ADC_DMAError(DMA_HandleTypeDef *hdma)  
2399
 
2399
{
2400
/**
2400
  /* Retrieve ADC handle corresponding to current DMA handle */
2401
  * @brief  DMA error callback
2401
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2402
  * @param  hdma: pointer to DMA handle.
2402
 
2403
  * @retval None
2403
  /* Set ADC state */
2404
  */
2404
  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
2405
void ADC_DMAError(DMA_HandleTypeDef *hdma)  
2405
 
2406
{
2406
  /* Set ADC error code to DMA error */
2407
  /* Retrieve ADC handle corresponding to current DMA handle */
2407
  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
2408
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2408
 
2409
 
2409
  /* Error callback */
2410
  /* Set ADC state */
2410
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2411
  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
2411
  hadc->ErrorCallback(hadc);
2412
 
2412
#else
2413
  /* Set ADC error code to DMA error */
2413
  HAL_ADC_ErrorCallback(hadc);
2414
  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
2414
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2415
 
2415
}
2416
  /* Error callback */
2416
 
2417
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2417
/**
2418
  hadc->ErrorCallback(hadc);
2418
  * @}
2419
#else
2419
  */
2420
  HAL_ADC_ErrorCallback(hadc);
2420
 
2421
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2421
#endif /* HAL_ADC_MODULE_ENABLED */
2422
}
2422
/**
2423
 
2423
  * @}
2424
/**
2424
  */
2425
  * @}
2425
 
2426
  */
2426
/**
2427
 
2427
  * @}
2428
#endif /* HAL_ADC_MODULE_ENABLED */
2428
  */
2429
/**
-
 
2430
  * @}
-
 
2431
  */
-
 
2432
 
-
 
2433
/**
-
 
2434
  * @}
-
 
2435
  */
-
 
2436
 
-
 
2437
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
-