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  * @author  MCD Application Team
  * @brief   Header file of USART LL module.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
 
 
 
 
  * License. You may obtain a copy of the License at:
 
  *                        opensource.org/licenses/BSD-3-Clause
 
 
 
 
 
 
 
 
 
 
 
 
  *
  ******************************************************************************
  */
 
/* Define to prevent recursive inclusion -------------------------------------*/

  uint32_t HardwareFlowControl;       /*!< Specifies whether the hardware flow control mode is enabled or disabled.
                                           This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
 
                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
 
 
  uint32_t OverSampling;              /*!< Specifies whether USART oversampling mode is 16 or 8.
                                           This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
 
                                           This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
 
 
} LL_USART_InitTypeDef;
 
/**
  * @brief LL USART Clock Init Structure definition
  */

  * @}
  */
 
/** @defgroup USART_LL_EC_PARITY Parity Control
  * @{
  */
#define LL_USART_PARITY_NONE                    0x00000000U                          /*!< Parity control disabled */
#define LL_USART_PARITY_EVEN                    USART_CR1_PCE                        /*!< Parity control enabled and Even Parity is selected */
#define LL_USART_PARITY_ODD                     (USART_CR1_PCE | USART_CR1_PS)       /*!< Parity control enabled and Odd Parity is selected */
/**
  * @}

#define LL_USART_DATAWIDTH_9B                   USART_CR1_M             /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
/**
  * @}
  */
 
 
/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
  * @{
  */
#define LL_USART_OVERSAMPLING_16                0x00000000U            /*!< Oversampling by 16 */
#if  defined(USART_CR1_OVER8)
#define LL_USART_OVERSAMPLING_8                 USART_CR1_OVER8        /*!< Oversampling by 8 */
#endif /* USART_OverSampling_Feature */
/**
  * @}
  */
 
 
#if defined(USE_FULL_LL_DRIVER)
/** @defgroup USART_LL_EC_CLOCK Clock Signal
  * @{
  */
 

  * @param  __BAUDRATE__ Baud rate value to achieve
  * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
  */
#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__)     (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__)     (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__)     ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16) + 50) / 100)
/* USART BRR = mantissa + overflow + fraction
            = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__)            (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
                                                                           (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
                                                                           (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))

  *         @arg @ref LL_USART_OVERSAMPLING_8
  * @retval Baud Rate
  */
__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
{
  uint32_t usartdiv = 0x0U;
  uint32_t brrresult = 0x0U;
 
  usartdiv = USARTx->BRR;
 
  if (OverSampling == LL_USART_OVERSAMPLING_8)
  {

  * @param  BaudRate Baud Rate
  * @retval None
  */
__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)
{
  USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
}
 
/**
  * @brief  Return current Baud Rate value, according to USARTDIV present in BRR register
  *         (full BRR content), and to used Peripheral Clock and Oversampling mode values

  * @param  PeriphClk Peripheral Clock
  * @retval Baud Rate
  */
__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk)
{
  uint32_t usartdiv = 0x0U;
  uint32_t brrresult = 0x0U;
 
  usartdiv = USARTx->BRR;
 
  if ((usartdiv & 0xFFFFU) != 0U)
  {

 
/**
  * @brief  Clear Parity Error Flag
  * @note   Clearing this flag is done by a read access to the USARTx_SR
  *         register followed by a read access to the USARTx_DR register.
  * @note   Please also consider that when clearing this flag, other flags as
  *         NE, FE, ORE, IDLE would also be cleared.
  * @rmtoll SR           PE            LL_USART_ClearFlag_PE
  * @param  USARTx USART Instance
  * @retval None
  */

 
/**
  * @brief  Clear Framing Error Flag
  * @note   Clearing this flag is done by a read access to the USARTx_SR
  *         register followed by a read access to the USARTx_DR register.
  * @note   Please also consider that when clearing this flag, other flags as
  *         PE, NE, ORE, IDLE would also be cleared.
  * @rmtoll SR           FE            LL_USART_ClearFlag_FE
  * @param  USARTx USART Instance
  * @retval None
  */

 
/**
  * @brief  Clear Noise detected Flag
  * @note   Clearing this flag is done by a read access to the USARTx_SR
  *         register followed by a read access to the USARTx_DR register.
  * @note   Please also consider that when clearing this flag, other flags as
  *         PE, FE, ORE, IDLE would also be cleared.
  * @rmtoll SR           NF            LL_USART_ClearFlag_NE
  * @param  USARTx USART Instance
  * @retval None
  */

 
/**
  * @brief  Clear OverRun Error Flag
  * @note   Clearing this flag is done by a read access to the USARTx_SR
  *         register followed by a read access to the USARTx_DR register.
  * @note   Please also consider that when clearing this flag, other flags as
  *         PE, NE, FE, IDLE would also be cleared.
  * @rmtoll SR           ORE           LL_USART_ClearFlag_ORE
  * @param  USARTx USART Instance
  * @retval None
  */

 
/**
  * @brief  Clear IDLE line detected Flag
  * @note   Clearing this flag is done by a read access to the USARTx_SR
  *         register followed by a read access to the USARTx_DR register.
  * @note   Please also consider that when clearing this flag, other flags as
  *         PE, NE, FE, ORE would also be cleared.
  * @rmtoll SR           IDLE          LL_USART_ClearFlag_IDLE
  * @param  USARTx USART Instance
  * @retval None
  */

  * @param  USARTx USART Instance
  * @retval None
  */
__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->SR, ~(USART_SR_TC));
}
 
/**
  * @brief  Clear RX Not Empty Flag
  * @rmtoll SR           RXNE          LL_USART_ClearFlag_RXNE
  * @param  USARTx USART Instance
  * @retval None
  */
__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->SR, ~(USART_SR_RXNE));
}
 
/**
  * @brief  Clear LIN Break Detection Flag
  * @note   Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not

  * @param  USARTx USART Instance
  * @retval None
  */
__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->SR, ~(USART_SR_LBD));
}
 
/**
  * @brief  Clear CTS Interrupt Flag
  * @note   Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not

  * @param  USARTx USART Instance
  * @retval None
  */
__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
{
  WRITE_REG(USARTx->SR, ~(USART_SR_CTS));
}
 
/**
  * @}
  */

  * @retval Address of data register
  */
__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
{
  /* return address of DR register */
  return ((uint32_t) & (USARTx->DR));
}
 
/**
  * @}
  */

Rev 2	Rev 9
Line 4...	Line 4...
4	* @author MCD Application Team	4	* @author MCD Application Team
5	* @brief Header file of USART LL module.	5	* @brief Header file of USART LL module.
6	******************************************************************************	6	******************************************************************************
7	* @attention	7	* @attention
8	*	8	*
9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>	9	* <h2><center>© Copyright (c) 2016 STMicroelectronics.
-		10	* All rights reserved.</center></h2>
10	*	11	*
11	* Redistribution and use in source and binary forms, with or without modification,	12	* This software component is licensed by ST under BSD 3-Clause license,
12	* are permitted provided that the following conditions are met:	13	* the "License"; You may not use this file except in compliance with the
13	* 1. Redistributions of source code must retain the above copyright notice,	-
14	* this list of conditions and the following disclaimer.	-
15	* 2. Redistributions in binary form must reproduce the above copyright notice,	-
16	* this list of conditions and the following disclaimer in the documentation	-
17	* and/or other materials provided with the distribution.	14	* License. You may obtain a copy of the License at:
18	* 3. Neither the name of STMicroelectronics nor the names of its contributors	-
19	* may be used to endorse or promote products derived from this software	15	* opensource.org/licenses/BSD-3-Clause
20	* without specific prior written permission.	-
21	*	-
22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"	-
23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE	-
24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE	-
25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE	-
26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL	-
27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR	-
28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER	-
29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,	-
30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE	-
31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	-
32	*	16	*
33	******************************************************************************	17	******************************************************************************
34	*/	18	*/
35		19
36	/* Define to prevent recursive inclusion -------------------------------------*/	20	/* Define to prevent recursive inclusion -------------------------------------*/
Line 116...	Line 100...
116	uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.	100	uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
117	This parameter can be a value of @ref USART_LL_EC_HWCONTROL.	101	This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
118		102
119	This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/	103	This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
120		104
121	#if defined(USART_CR1_OVER8)	-
122	uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.	105	uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
123	This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.	106	This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
124		107
125	This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/	108	This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
126		109
127	#endif /* USART_OverSampling_Feature */	-
128	} LL_USART_InitTypeDef;	110	} LL_USART_InitTypeDef;
129		111
130	/**	112	/**
131	* @brief LL USART Clock Init Structure definition	113	* @brief LL USART Clock Init Structure definition
132	*/	114	*/
Line 215...	Line 197...
215	* @}	197	* @}
216	*/	198	*/
217		199
218	/** @defgroup USART_LL_EC_PARITY Parity Control	200	/** @defgroup USART_LL_EC_PARITY Parity Control
219	* @{	201	* @{
220	*/	202	*/
221	#define LL_USART_PARITY_NONE 0x00000000U /!< Parity control disabled /	203	#define LL_USART_PARITY_NONE 0x00000000U /!< Parity control disabled /
222	#define LL_USART_PARITY_EVEN USART_CR1_PCE /!< Parity control enabled and Even Parity is selected /	204	#define LL_USART_PARITY_EVEN USART_CR1_PCE /!< Parity control enabled and Even Parity is selected /
223	#define LL_USART_PARITY_ODD (USART_CR1_PCE \| USART_CR1_PS) /!< Parity control enabled and Odd Parity is selected /	205	#define LL_USART_PARITY_ODD (USART_CR1_PCE \| USART_CR1_PS) /!< Parity control enabled and Odd Parity is selected /
224	/**	206	/**
225	* @}	207	* @}
Line 241...	Line 223...
241	#define LL_USART_DATAWIDTH_9B USART_CR1_M /!< 9 bits word length : Start bit, 9 data bits, n stop bits /	223	#define LL_USART_DATAWIDTH_9B USART_CR1_M /!< 9 bits word length : Start bit, 9 data bits, n stop bits /
242	/**	224	/**
243	* @}	225	* @}
244	*/	226	*/
245		227
246	#if defined(USART_CR1_OVER8)	-
247	/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling	228	/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
248	* @{	229	* @{
249	*/	230	*/
250	#define LL_USART_OVERSAMPLING_16 0x00000000U /!< Oversampling by 16 /	231	#define LL_USART_OVERSAMPLING_16 0x00000000U /!< Oversampling by 16 /
-		232	#if defined(USART_CR1_OVER8)
251	#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /!< Oversampling by 8 /	233	#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /!< Oversampling by 8 /
-		234	#endif /* USART_OverSampling_Feature */
252	/**	235	/**
253	* @}	236	* @}
254	*/	237	*/
255		238
256	#endif /* USART_OverSampling_Feature */	-
257	#if defined(USE_FULL_LL_DRIVER)	239	#if defined(USE_FULL_LL_DRIVER)
258	/** @defgroup USART_LL_EC_CLOCK Clock Signal	240	/** @defgroup USART_LL_EC_CLOCK Clock Signal
259	* @{	241	* @{
260	*/	242	*/
261		243
Line 393...	Line 375...
393	* @param __BAUDRATE__ Baud rate value to achieve	375	* @param __BAUDRATE__ Baud rate value to achieve
394	* @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case	376	* @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
395	*/	377	*/
396	#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)25)/(4(__BAUDRATE__)))	378	#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)25)/(4(__BAUDRATE__)))
397	#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)	379	#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
398	#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100)	380	#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16) + 50) / 100)
399	/* USART BRR = mantissa + overflow + fraction	381	/* USART BRR = mantissa + overflow + fraction
400	= (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */	382	= (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
401	#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \	383	#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
402	(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \	384	(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
403	(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))	385	(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
Line 1066...	Line 1048...
1066	* @arg @ref LL_USART_OVERSAMPLING_8	1048	* @arg @ref LL_USART_OVERSAMPLING_8
1067	* @retval Baud Rate	1049	* @retval Baud Rate
1068	*/	1050	*/
1069	__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)	1051	__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
1070	{	1052	{
1071	register uint32_t usartdiv = 0x0U;	1053	uint32_t usartdiv = 0x0U;
1072	register uint32_t brrresult = 0x0U;	1054	uint32_t brrresult = 0x0U;
1073		1055
1074	usartdiv = USARTx->BRR;	1056	usartdiv = USARTx->BRR;
1075		1057
1076	if (OverSampling == LL_USART_OVERSAMPLING_8)	1058	if (OverSampling == LL_USART_OVERSAMPLING_8)
1077	{	1059	{
Line 1103...	Line 1085...
1103	* @param BaudRate Baud Rate	1085	* @param BaudRate Baud Rate
1104	* @retval None	1086	* @retval None
1105	*/	1087	*/
1106	__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)	1088	__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)
1107	{	1089	{
1108	USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));	1090	USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
1109	}	1091	}
1110		1092
1111	/**	1093	/**
1112	* @brief Return current Baud Rate value, according to USARTDIV present in BRR register	1094	* @brief Return current Baud Rate value, according to USARTDIV present in BRR register
1113	* (full BRR content), and to used Peripheral Clock and Oversampling mode values	1095	* (full BRR content), and to used Peripheral Clock and Oversampling mode values
Line 1117...	Line 1099...
1117	* @param PeriphClk Peripheral Clock	1099	* @param PeriphClk Peripheral Clock
1118	* @retval Baud Rate	1100	* @retval Baud Rate
1119	*/	1101	*/
1120	__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk)	1102	__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk)
1121	{	1103	{
1122	register uint32_t usartdiv = 0x0U;	1104	uint32_t usartdiv = 0x0U;
1123	register uint32_t brrresult = 0x0U;	1105	uint32_t brrresult = 0x0U;
1124		1106
1125	usartdiv = USARTx->BRR;	1107	usartdiv = USARTx->BRR;
1126		1108
1127	if ((usartdiv & 0xFFFFU) != 0U)	1109	if ((usartdiv & 0xFFFFU) != 0U)
1128	{	1110	{
Line 1931...	Line 1913...
1931		1913
1932	/**	1914	/**
1933	* @brief Clear Parity Error Flag	1915	* @brief Clear Parity Error Flag
1934	* @note Clearing this flag is done by a read access to the USARTx_SR	1916	* @note Clearing this flag is done by a read access to the USARTx_SR
1935	* register followed by a read access to the USARTx_DR register.	1917	* register followed by a read access to the USARTx_DR register.
1936	* @note Please also consider that when clearing this flag, other flags as	1918	* @note Please also consider that when clearing this flag, other flags as
1937	* NE, FE, ORE, IDLE would also be cleared.	1919	* NE, FE, ORE, IDLE would also be cleared.
1938	* @rmtoll SR PE LL_USART_ClearFlag_PE	1920	* @rmtoll SR PE LL_USART_ClearFlag_PE
1939	* @param USARTx USART Instance	1921	* @param USARTx USART Instance
1940	* @retval None	1922	* @retval None
1941	*/	1923	*/
Line 1950...	Line 1932...
1950		1932
1951	/**	1933	/**
1952	* @brief Clear Framing Error Flag	1934	* @brief Clear Framing Error Flag
1953	* @note Clearing this flag is done by a read access to the USARTx_SR	1935	* @note Clearing this flag is done by a read access to the USARTx_SR
1954	* register followed by a read access to the USARTx_DR register.	1936	* register followed by a read access to the USARTx_DR register.
1955	* @note Please also consider that when clearing this flag, other flags as	1937	* @note Please also consider that when clearing this flag, other flags as
1956	* PE, NE, ORE, IDLE would also be cleared.	1938	* PE, NE, ORE, IDLE would also be cleared.
1957	* @rmtoll SR FE LL_USART_ClearFlag_FE	1939	* @rmtoll SR FE LL_USART_ClearFlag_FE
1958	* @param USARTx USART Instance	1940	* @param USARTx USART Instance
1959	* @retval None	1941	* @retval None
1960	*/	1942	*/
Line 1969...	Line 1951...
1969		1951
1970	/**	1952	/**
1971	* @brief Clear Noise detected Flag	1953	* @brief Clear Noise detected Flag
1972	* @note Clearing this flag is done by a read access to the USARTx_SR	1954	* @note Clearing this flag is done by a read access to the USARTx_SR
1973	* register followed by a read access to the USARTx_DR register.	1955	* register followed by a read access to the USARTx_DR register.
1974	* @note Please also consider that when clearing this flag, other flags as	1956	* @note Please also consider that when clearing this flag, other flags as
1975	* PE, FE, ORE, IDLE would also be cleared.	1957	* PE, FE, ORE, IDLE would also be cleared.
1976	* @rmtoll SR NF LL_USART_ClearFlag_NE	1958	* @rmtoll SR NF LL_USART_ClearFlag_NE
1977	* @param USARTx USART Instance	1959	* @param USARTx USART Instance
1978	* @retval None	1960	* @retval None
1979	*/	1961	*/
Line 1988...	Line 1970...
1988		1970
1989	/**	1971	/**
1990	* @brief Clear OverRun Error Flag	1972	* @brief Clear OverRun Error Flag
1991	* @note Clearing this flag is done by a read access to the USARTx_SR	1973	* @note Clearing this flag is done by a read access to the USARTx_SR
1992	* register followed by a read access to the USARTx_DR register.	1974	* register followed by a read access to the USARTx_DR register.
1993	* @note Please also consider that when clearing this flag, other flags as	1975	* @note Please also consider that when clearing this flag, other flags as
1994	* PE, NE, FE, IDLE would also be cleared.	1976	* PE, NE, FE, IDLE would also be cleared.
1995	* @rmtoll SR ORE LL_USART_ClearFlag_ORE	1977	* @rmtoll SR ORE LL_USART_ClearFlag_ORE
1996	* @param USARTx USART Instance	1978	* @param USARTx USART Instance
1997	* @retval None	1979	* @retval None
1998	*/	1980	*/
Line 2007...	Line 1989...
2007		1989
2008	/**	1990	/**
2009	* @brief Clear IDLE line detected Flag	1991	* @brief Clear IDLE line detected Flag
2010	* @note Clearing this flag is done by a read access to the USARTx_SR	1992	* @note Clearing this flag is done by a read access to the USARTx_SR
2011	* register followed by a read access to the USARTx_DR register.	1993	* register followed by a read access to the USARTx_DR register.
2012	* @note Please also consider that when clearing this flag, other flags as	1994	* @note Please also consider that when clearing this flag, other flags as
2013	* PE, NE, FE, ORE would also be cleared.	1995	* PE, NE, FE, ORE would also be cleared.
2014	* @rmtoll SR IDLE LL_USART_ClearFlag_IDLE	1996	* @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
2015	* @param USARTx USART Instance	1997	* @param USARTx USART Instance
2016	* @retval None	1998	* @retval None
2017	*/	1999	*/
Line 2030...	Line 2012...
2030	* @param USARTx USART Instance	2012	* @param USARTx USART Instance
2031	* @retval None	2013	* @retval None
2032	*/	2014	*/
2033	__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)	2015	__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
2034	{	2016	{
2035	WRITE_REG(USARTx->SR , ~(USART_SR_TC));	2017	WRITE_REG(USARTx->SR, ~(USART_SR_TC));
2036	}	2018	}
2037		2019
2038	/**	2020	/**
2039	* @brief Clear RX Not Empty Flag	2021	* @brief Clear RX Not Empty Flag
2040	* @rmtoll SR RXNE LL_USART_ClearFlag_RXNE	2022	* @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
2041	* @param USARTx USART Instance	2023	* @param USARTx USART Instance
2042	* @retval None	2024	* @retval None
2043	*/	2025	*/
2044	__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)	2026	__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
2045	{	2027	{
2046	WRITE_REG(USARTx->SR , ~(USART_SR_RXNE));	2028	WRITE_REG(USARTx->SR, ~(USART_SR_RXNE));
2047	}	2029	}
2048		2030
2049	/**	2031	/**
2050	* @brief Clear LIN Break Detection Flag	2032	* @brief Clear LIN Break Detection Flag
2051	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not	2033	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
Line 2054...	Line 2036...
2054	* @param USARTx USART Instance	2036	* @param USARTx USART Instance
2055	* @retval None	2037	* @retval None
2056	*/	2038	*/
2057	__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)	2039	__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
2058	{	2040	{
2059	WRITE_REG(USARTx->SR , ~(USART_SR_LBD));	2041	WRITE_REG(USARTx->SR, ~(USART_SR_LBD));
2060	}	2042	}
2061		2043
2062	/**	2044	/**
2063	* @brief Clear CTS Interrupt Flag	2045	* @brief Clear CTS Interrupt Flag
2064	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not	2046	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
Line 2067...	Line 2049...
2067	* @param USARTx USART Instance	2049	* @param USARTx USART Instance
2068	* @retval None	2050	* @retval None
2069	*/	2051	*/
2070	__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)	2052	__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
2071	{	2053	{
2072	WRITE_REG(USARTx->SR , ~(USART_SR_CTS));	2054	WRITE_REG(USARTx->SR, ~(USART_SR_CTS));
2073	}	2055	}
2074		2056
2075	/**	2057	/**
2076	* @}	2058	* @}
2077	*/	2059	*/
Line 2446...	Line 2428...
2446	* @retval Address of data register	2428	* @retval Address of data register
2447	*/	2429	*/
2448	__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)	2430	__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
2449	{	2431	{
2450	/* return address of DR register */	2432	/* return address of DR register */
2451	return ((uint32_t) &(USARTx->DR));	2433	return ((uint32_t) & (USARTx->DR));
2452	}	2434	}
2453		2435
2454	/**	2436	/**
2455	* @}	2437	* @}
2456	*/	2438	*/

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