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  * @author  MCD Application Team
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  * @author  MCD Application Team
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  * @brief   Header file of IWDG LL module.
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  * @brief   Header file of IWDG LL module.
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  ******************************************************************************
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  ******************************************************************************
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  * @attention
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  * @attention
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  *
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  *
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  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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  * All rights reserved.</center></h2>
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  *
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  *
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  * Redistribution and use in source and binary forms, with or without modification,
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  * This software component is licensed by ST under BSD 3-Clause license,
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  * are permitted provided that the following conditions are met:
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  * the "License"; You may not use this file except in compliance with the
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  *   1. Redistributions of source code must retain the above copyright notice,
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  *      this list of conditions and the following disclaimer.
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  *   2. Redistributions in binary form must reproduce the above copyright notice,
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  *      this list of conditions and the following disclaimer in the documentation
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  *      and/or other materials provided with the distribution.
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  * License. You may obtain a copy of the License at:
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  *   3. Neither the name of STMicroelectronics nor the names of its contributors
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  *      may be used to endorse or promote products derived from this software
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  *                        opensource.org/licenses/BSD-3-Clause
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  *      without specific prior written permission.
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  *
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  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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  *
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  *
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  ******************************************************************************
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  ******************************************************************************
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  */
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  */
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/* Define to prevent recursive inclusion -------------------------------------*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_LL_IWDG_H
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#ifndef STM32F1xx_LL_IWDG_H
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#define __STM32F1xx_LL_IWDG_H
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#define STM32F1xx_LL_IWDG_H
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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/* Private constants ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
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/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
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  * @{
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  * @{
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  */
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  */
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#define LL_IWDG_KEY_RELOAD                 0x0000AAAAU               /*!< IWDG Reload Counter Enable   */
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#define LL_IWDG_KEY_RELOAD                 0x0000AAAAU               /*!< IWDG Reload Counter Enable   */
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#define LL_IWDG_KEY_ENABLE                 0x0000CCCCU               /*!< IWDG Peripheral Enable       */
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#define LL_IWDG_KEY_ENABLE                 0x0000CCCCU               /*!< IWDG Peripheral Enable       */
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#define LL_IWDG_KEY_WR_ACCESS_ENABLE       0x00005555U               /*!< IWDG KR Write Access Enable  */
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#define LL_IWDG_KEY_WR_ACCESS_ENABLE       0x00005555U               /*!< IWDG KR Write Access Enable  */
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#define LL_IWDG_KEY_WR_ACCESS_DISABLE      0x00000000U               /*!< IWDG KR Write Access Disable */
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#define LL_IWDG_KEY_WR_ACCESS_DISABLE      0x00000000U               /*!< IWDG KR Write Access Disable */
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/**
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/**
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  * @}
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  * @}
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  */
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  */
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/* Private macros ------------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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  * @brief    Flags defines which can be used with LL_IWDG_ReadReg function
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  * @brief    Flags defines which can be used with LL_IWDG_ReadReg function
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  * @{
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  * @{
85
  */
67
  */
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#define LL_IWDG_SR_PVU                     IWDG_SR_PVU                           /*!< Watchdog prescaler value update */
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#define LL_IWDG_SR_PVU                     IWDG_SR_PVU                           /*!< Watchdog prescaler value update */
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#define LL_IWDG_SR_RVU                     IWDG_SR_RVU                           /*!< Watchdog counter reload value update */
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#define LL_IWDG_SR_RVU                     IWDG_SR_RVU                           /*!< Watchdog counter reload value update */
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/**
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/**
90
  * @}
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  * @}
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  */
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  */
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73
 
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/** @defgroup IWDG_LL_EC_PRESCALER  Prescaler Divider
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/** @defgroup IWDG_LL_EC_PRESCALER  Prescaler Divider
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  * @param  IWDGx IWDG Instance
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  * @param  IWDGx IWDG Instance
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  * @retval None
139
  * @retval None
159
  */
140
  */
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__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
161
{
142
{
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  WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
143
  WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
163
}
144
}
164
 
145
 
165
/**
146
/**
166
  * @brief  Reloads IWDG counter with value defined in the reload register
147
  * @brief  Reloads IWDG counter with value defined in the reload register
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  * @rmtoll KR           KEY           LL_IWDG_ReloadCounter
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  * @rmtoll KR           KEY           LL_IWDG_ReloadCounter
168
  * @param  IWDGx IWDG Instance
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  * @param  IWDGx IWDG Instance
169
  * @retval None
150
  * @retval None
170
  */
151
  */
171
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
172
{
153
{
173
  WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
154
  WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
174
}
155
}
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156
 
176
/**
157
/**
177
  * @brief  Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
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  * @brief  Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
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  * @rmtoll KR           KEY           LL_IWDG_EnableWriteAccess
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  * @rmtoll KR           KEY           LL_IWDG_EnableWriteAccess
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  * @param  IWDGx IWDG Instance
160
  * @param  IWDGx IWDG Instance
180
  * @retval None
161
  * @retval None
181
  */
162
  */
182
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
163
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
183
{
164
{
184
  WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
165
  WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
185
}
166
}
186
 
167
 
187
/**
168
/**
188
  * @brief  Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
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  * @brief  Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
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  * @rmtoll KR           KEY           LL_IWDG_DisableWriteAccess
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  * @rmtoll KR           KEY           LL_IWDG_DisableWriteAccess
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  * @param  IWDGx IWDG Instance
171
  * @param  IWDGx IWDG Instance
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  * @retval None
172
  * @retval None
192
  */
173
  */
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__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
194
{
175
{
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  WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
176
  WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
196
}
177
}
197
 
178
 
198
/**
179
/**
199
  * @brief  Select the prescaler of the IWDG
180
  * @brief  Select the prescaler of the IWDG
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  * @rmtoll PR           PR            LL_IWDG_SetPrescaler
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  * @rmtoll PR           PR            LL_IWDG_SetPrescaler
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  *         @arg @ref LL_IWDG_PRESCALER_128
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  *         @arg @ref LL_IWDG_PRESCALER_128
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  *         @arg @ref LL_IWDG_PRESCALER_256
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  *         @arg @ref LL_IWDG_PRESCALER_256
229
  */
210
  */
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__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
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{
212
{
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  return (uint32_t)(READ_REG(IWDGx->PR));
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  return (READ_REG(IWDGx->PR));
233
}
214
}
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215
 
235
/**
216
/**
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  * @brief  Specify the IWDG down-counter reload value
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  * @brief  Specify the IWDG down-counter reload value
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  * @rmtoll RLR          RL            LL_IWDG_SetReloadCounter
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  * @rmtoll RLR          RL            LL_IWDG_SetReloadCounter
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  * @param  IWDGx IWDG Instance
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  * @param  IWDGx IWDG Instance
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  * @retval Value between Min_Data=0 and Max_Data=0x0FFF
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  * @retval Value between Min_Data=0 and Max_Data=0x0FFF
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  */
233
  */
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__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
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{
235
{
255
  return (uint32_t)(READ_REG(IWDGx->RLR));
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  return (READ_REG(IWDGx->RLR));
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}
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}
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/**
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/**
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  * @}
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  * @}
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  * @param  IWDGx IWDG Instance
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  * @param  IWDGx IWDG Instance
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  * @retval State of bit (1 or 0).
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  * @retval State of bit (1 or 0).
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  */
253
  */
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
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{
255
{
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  return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
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  return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
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}
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}
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258
 
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/**
259
/**
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  * @brief  Check if flag Reload Value Update is set or not
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  * @brief  Check if flag Reload Value Update is set or not
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  * @rmtoll SR           RVU           LL_IWDG_IsActiveFlag_RVU
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  * @rmtoll SR           RVU           LL_IWDG_IsActiveFlag_RVU
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  * @param  IWDGx IWDG Instance
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  * @param  IWDGx IWDG Instance
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  * @retval State of bit (1 or 0).
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  * @retval State of bit (1 or 0).
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  */
264
  */
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
285
{
266
{
286
  return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
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  return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
287
}
268
}
288
 
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-
 
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/**
270
/**
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  * @brief  Check if all flags Prescaler, Reload & Window Value Update are reset or not
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  * @brief  Check if flags Prescaler & Reload Value Update are reset or not
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  * @rmtoll SR           PVU           LL_IWDG_IsReady\n
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  * @rmtoll SR           PVU           LL_IWDG_IsReady\n
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  *         SR           RVU           LL_IWDG_IsReady
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  *         SR           RVU           LL_IWDG_IsReady
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  * @param  IWDGx IWDG Instance
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  * @param  IWDGx IWDG Instance
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  * @retval State of bits (1 or 0).
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  * @retval State of bits (1 or 0).
296
  */
276
  */
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__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
277
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
298
{
278
{
299
  return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U);
279
  return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL);
300
}
280
}
301
 
281
 
302
/**
282
/**
303
  * @}
283
  * @}
304
  */
284
  */
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290
 
311
/**
291
/**
312
  * @}
292
  * @}
313
  */
293
  */
314
 
294
 
315
#endif /* IWDG) */
295
#endif /* IWDG */
316
 
296
 
317
/**
297
/**
318
  * @}
298
  * @}
319
  */
299
  */
320
 
300
 
321
#ifdef __cplusplus
301
#ifdef __cplusplus
322
}
302
}
323
#endif
303
#endif
324
 
304
 
325
#endif /* __STM32F1xx_LL_IWDG_H */
305
#endif /* STM32F1xx_LL_IWDG_H */
326
 
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/