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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_ll_exti.h |
3 | * @file stm32f1xx_ll_exti.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief Header file of EXTI LL module. |
5 | * @brief Header file of EXTI LL module. |
| 6 | ****************************************************************************** |
6 | ****************************************************************************** |
| 7 | * @attention |
7 | * @attention |
| 8 | * |
8 | * |
| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
9 | * Copyright (c) 2016 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
| 11 | * |
11 | * |
| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
| 13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
| 14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
| 16 | * |
16 | ****************************************************************************** |
| 17 | ****************************************************************************** |
17 | */ |
| 18 | */ |
18 | |
| 19 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
|
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | #ifndef STM32F1xx_LL_EXTI_H |
| 21 | #ifndef STM32F1xx_LL_EXTI_H |
21 | #define STM32F1xx_LL_EXTI_H |
| 22 | #define STM32F1xx_LL_EXTI_H |
22 | |
| 23 | 23 | #ifdef __cplusplus |
|
| 24 | #ifdef __cplusplus |
24 | extern "C" { |
| 25 | extern "C" { |
25 | #endif |
| 26 | #endif |
26 | |
| 27 | 27 | /* Includes ------------------------------------------------------------------*/ |
|
| 28 | /* Includes ------------------------------------------------------------------*/ |
28 | #include "stm32f1xx.h" |
| 29 | #include "stm32f1xx.h" |
29 | |
| 30 | 30 | /** @addtogroup STM32F1xx_LL_Driver |
|
| 31 | /** @addtogroup STM32F1xx_LL_Driver |
31 | * @{ |
| 32 | * @{ |
32 | */ |
| 33 | */ |
33 | |
| 34 | 34 | #if defined (EXTI) |
|
| 35 | #if defined (EXTI) |
35 | |
| 36 | 36 | /** @defgroup EXTI_LL EXTI |
|
| 37 | /** @defgroup EXTI_LL EXTI |
37 | * @{ |
| 38 | * @{ |
38 | */ |
| 39 | */ |
39 | |
| 40 | 40 | /* Private types -------------------------------------------------------------*/ |
|
| 41 | /* Private types -------------------------------------------------------------*/ |
41 | /* Private variables ---------------------------------------------------------*/ |
| 42 | /* Private variables ---------------------------------------------------------*/ |
42 | /* Private constants ---------------------------------------------------------*/ |
| 43 | /* Private constants ---------------------------------------------------------*/ |
43 | /* Private Macros ------------------------------------------------------------*/ |
| 44 | /* Private Macros ------------------------------------------------------------*/ |
44 | #if defined(USE_FULL_LL_DRIVER) |
| 45 | #if defined(USE_FULL_LL_DRIVER) |
45 | /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros |
| 46 | /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros |
46 | * @{ |
| 47 | * @{ |
47 | */ |
| 48 | */ |
48 | /** |
| 49 | /** |
49 | * @} |
| 50 | * @} |
50 | */ |
| 51 | */ |
51 | #endif /*USE_FULL_LL_DRIVER*/ |
| 52 | #endif /*USE_FULL_LL_DRIVER*/ |
52 | /* Exported types ------------------------------------------------------------*/ |
| 53 | /* Exported types ------------------------------------------------------------*/ |
53 | #if defined(USE_FULL_LL_DRIVER) |
| 54 | #if defined(USE_FULL_LL_DRIVER) |
54 | /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure |
| 55 | /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure |
55 | * @{ |
| 56 | * @{ |
56 | */ |
| 57 | */ |
57 | typedef struct |
| 58 | typedef struct |
58 | { |
| 59 | { |
59 | |
| 60 | 60 | uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 |
|
| 61 | uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31 |
61 | This parameter can be any combination of @ref EXTI_LL_EC_LINE */ |
| 62 | This parameter can be any combination of @ref EXTI_LL_EC_LINE */ |
62 | |
| 63 | 63 | FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. |
|
| 64 | FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines. |
64 | This parameter can be set either to ENABLE or DISABLE */ |
| 65 | This parameter can be set either to ENABLE or DISABLE */ |
65 | |
| 66 | 66 | uint8_t Mode; /*!< Specifies the mode for the EXTI lines. |
|
| 67 | uint8_t Mode; /*!< Specifies the mode for the EXTI lines. |
67 | This parameter can be a value of @ref EXTI_LL_EC_MODE. */ |
| 68 | This parameter can be a value of @ref EXTI_LL_EC_MODE. */ |
68 | |
| 69 | 69 | uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. |
|
| 70 | uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. |
70 | This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ |
| 71 | This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */ |
71 | } LL_EXTI_InitTypeDef; |
| 72 | } LL_EXTI_InitTypeDef; |
72 | |
| 73 | 73 | /** |
|
| 74 | /** |
74 | * @} |
| 75 | * @} |
75 | */ |
| 76 | */ |
76 | #endif /*USE_FULL_LL_DRIVER*/ |
| 77 | #endif /*USE_FULL_LL_DRIVER*/ |
77 | |
| 78 | 78 | /* Exported constants --------------------------------------------------------*/ |
|
| 79 | /* Exported constants --------------------------------------------------------*/ |
79 | /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants |
| 80 | /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants |
80 | * @{ |
| 81 | * @{ |
81 | */ |
| 82 | */ |
82 | |
| 83 | 83 | /** @defgroup EXTI_LL_EC_LINE LINE |
|
| 84 | /** @defgroup EXTI_LL_EC_LINE LINE |
84 | * @{ |
| 85 | * @{ |
85 | */ |
| 86 | */ |
86 | #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */ |
| 87 | #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */ |
87 | #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */ |
| 88 | #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */ |
88 | #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */ |
| 89 | #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */ |
89 | #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */ |
| 90 | #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */ |
90 | #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */ |
| 91 | #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */ |
91 | #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */ |
| 92 | #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */ |
92 | #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */ |
| 93 | #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */ |
93 | #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */ |
| 94 | #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */ |
94 | #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */ |
| 95 | #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */ |
95 | #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */ |
| 96 | #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */ |
96 | #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */ |
| 97 | #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */ |
97 | #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */ |
| 98 | #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */ |
98 | #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */ |
| 99 | #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */ |
99 | #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */ |
| 100 | #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */ |
100 | #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */ |
| 101 | #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */ |
101 | #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */ |
| 102 | #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */ |
102 | #if defined(EXTI_IMR_IM16) |
| 103 | #if defined(EXTI_IMR_IM16) |
103 | #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */ |
| 104 | #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */ |
104 | #endif |
| 105 | #endif |
105 | #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */ |
| 106 | #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */ |
106 | #if defined(EXTI_IMR_IM18) |
| 107 | #if defined(EXTI_IMR_IM18) |
107 | #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */ |
| 108 | #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */ |
108 | #endif |
| 109 | #endif |
109 | #if defined(EXTI_IMR_IM19) |
| 110 | #if defined(EXTI_IMR_IM19) |
110 | #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */ |
| 111 | #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */ |
111 | #endif |
| 112 | #endif |
112 | #if defined(EXTI_IMR_IM20) |
| 113 | #if defined(EXTI_IMR_IM20) |
113 | #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */ |
| 114 | #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */ |
114 | #endif |
| 115 | #endif |
115 | #if defined(EXTI_IMR_IM21) |
| 116 | #if defined(EXTI_IMR_IM21) |
116 | #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */ |
| 117 | #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */ |
117 | #endif |
| 118 | #endif |
118 | #if defined(EXTI_IMR_IM22) |
| 119 | #if defined(EXTI_IMR_IM22) |
119 | #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */ |
| 120 | #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */ |
120 | #endif |
| 121 | #endif |
121 | #if defined(EXTI_IMR_IM23) |
| 122 | #if defined(EXTI_IMR_IM23) |
122 | #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */ |
| 123 | #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */ |
123 | #endif |
| 124 | #endif |
124 | #if defined(EXTI_IMR_IM24) |
| 125 | #if defined(EXTI_IMR_IM24) |
125 | #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */ |
| 126 | #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */ |
126 | #endif |
| 127 | #endif |
127 | #if defined(EXTI_IMR_IM25) |
| 128 | #if defined(EXTI_IMR_IM25) |
128 | #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */ |
| 129 | #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */ |
129 | #endif |
| 130 | #endif |
130 | #if defined(EXTI_IMR_IM26) |
| 131 | #if defined(EXTI_IMR_IM26) |
131 | #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */ |
| 132 | #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */ |
132 | #endif |
| 133 | #endif |
133 | #if defined(EXTI_IMR_IM27) |
| 134 | #if defined(EXTI_IMR_IM27) |
134 | #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */ |
| 135 | #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */ |
135 | #endif |
| 136 | #endif |
136 | #if defined(EXTI_IMR_IM28) |
| 137 | #if defined(EXTI_IMR_IM28) |
137 | #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */ |
| 138 | #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */ |
138 | #endif |
| 139 | #endif |
139 | #if defined(EXTI_IMR_IM29) |
| 140 | #if defined(EXTI_IMR_IM29) |
140 | #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */ |
| 141 | #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */ |
141 | #endif |
| 142 | #endif |
142 | #if defined(EXTI_IMR_IM30) |
| 143 | #if defined(EXTI_IMR_IM30) |
143 | #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */ |
| 144 | #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */ |
144 | #endif |
| 145 | #endif |
145 | #if defined(EXTI_IMR_IM31) |
| 146 | #if defined(EXTI_IMR_IM31) |
146 | #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */ |
| 147 | #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */ |
147 | #endif |
| 148 | #endif |
148 | #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/ |
| 149 | #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/ |
149 | |
| 150 | 150 | ||
| 151 | 151 | #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ |
|
| 152 | #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */ |
152 | |
| 153 | 153 | #if defined(USE_FULL_LL_DRIVER) |
|
| 154 | #if defined(USE_FULL_LL_DRIVER) |
154 | #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ |
| 155 | #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */ |
155 | #endif /*USE_FULL_LL_DRIVER*/ |
| 156 | #endif /*USE_FULL_LL_DRIVER*/ |
156 | |
| 157 | 157 | /** |
|
| 158 | /** |
158 | * @} |
| 159 | * @} |
159 | */ |
| 160 | */ |
160 | #if defined(USE_FULL_LL_DRIVER) |
| 161 | #if defined(USE_FULL_LL_DRIVER) |
161 | |
| 162 | 162 | /** @defgroup EXTI_LL_EC_MODE Mode |
|
| 163 | /** @defgroup EXTI_LL_EC_MODE Mode |
163 | * @{ |
| 164 | * @{ |
164 | */ |
| 165 | */ |
165 | #define LL_EXTI_MODE_IT ((uint8_t)0x00) /*!< Interrupt Mode */ |
| 166 | #define LL_EXTI_MODE_IT ((uint8_t)0x00) /*!< Interrupt Mode */ |
166 | #define LL_EXTI_MODE_EVENT ((uint8_t)0x01) /*!< Event Mode */ |
| 167 | #define LL_EXTI_MODE_EVENT ((uint8_t)0x01) /*!< Event Mode */ |
167 | #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02) /*!< Interrupt & Event Mode */ |
| 168 | #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02) /*!< Interrupt & Event Mode */ |
168 | /** |
| 169 | /** |
169 | * @} |
| 170 | * @} |
170 | */ |
| 171 | */ |
171 | |
| 172 | 172 | /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger |
|
| 173 | /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger |
173 | * @{ |
| 174 | * @{ |
174 | */ |
| 175 | */ |
175 | #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00) /*!< No Trigger Mode */ |
| 176 | #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00) /*!< No Trigger Mode */ |
176 | #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01) /*!< Trigger Rising Mode */ |
| 177 | #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01) /*!< Trigger Rising Mode */ |
177 | #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02) /*!< Trigger Falling Mode */ |
| 178 | #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02) /*!< Trigger Falling Mode */ |
178 | #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03) /*!< Trigger Rising & Falling Mode */ |
| 179 | #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03) /*!< Trigger Rising & Falling Mode */ |
179 | |
| 180 | 180 | /** |
|
| 181 | /** |
181 | * @} |
| 182 | * @} |
182 | */ |
| 183 | */ |
183 | |
| 184 | 184 | ||
| 185 | 185 | #endif /*USE_FULL_LL_DRIVER*/ |
|
| 186 | #endif /*USE_FULL_LL_DRIVER*/ |
186 | |
| 187 | 187 | ||
| 188 | 188 | /** |
|
| 189 | /** |
189 | * @} |
| 190 | * @} |
190 | */ |
| 191 | */ |
191 | |
| 192 | 192 | /* Exported macro ------------------------------------------------------------*/ |
|
| 193 | /* Exported macro ------------------------------------------------------------*/ |
193 | /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros |
| 194 | /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros |
194 | * @{ |
| 195 | * @{ |
195 | */ |
| 196 | */ |
196 | |
| 197 | 197 | /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros |
|
| 198 | /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros |
198 | * @{ |
| 199 | * @{ |
199 | */ |
| 200 | */ |
200 | |
| 201 | 201 | /** |
|
| 202 | /** |
202 | * @brief Write a value in EXTI register |
| 203 | * @brief Write a value in EXTI register |
203 | * @param __REG__ Register to be written |
| 204 | * @param __REG__ Register to be written |
204 | * @param __VALUE__ Value to be written in the register |
| 205 | * @param __VALUE__ Value to be written in the register |
205 | * @retval None |
| 206 | * @retval None |
206 | */ |
| 207 | */ |
207 | #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) |
| 208 | #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__)) |
208 | |
| 209 | 209 | /** |
|
| 210 | /** |
210 | * @brief Read a value in EXTI register |
| 211 | * @brief Read a value in EXTI register |
211 | * @param __REG__ Register to be read |
| 212 | * @param __REG__ Register to be read |
212 | * @retval Register value |
| 213 | * @retval Register value |
213 | */ |
| 214 | */ |
214 | #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) |
| 215 | #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__) |
215 | /** |
| 216 | /** |
216 | * @} |
| 217 | * @} |
217 | */ |
| 218 | */ |
218 | |
| 219 | 219 | ||
| 220 | 220 | /** |
|
| 221 | /** |
221 | * @} |
| 222 | * @} |
222 | */ |
| 223 | */ |
223 | |
| 224 | 224 | ||
| 225 | 225 | ||
| 226 | 226 | /* Exported functions --------------------------------------------------------*/ |
|
| 227 | /* Exported functions --------------------------------------------------------*/ |
227 | /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions |
| 228 | /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions |
228 | * @{ |
| 229 | * @{ |
229 | */ |
| 230 | */ |
230 | /** @defgroup EXTI_LL_EF_IT_Management IT_Management |
| 231 | /** @defgroup EXTI_LL_EF_IT_Management IT_Management |
231 | * @{ |
| 232 | * @{ |
232 | */ |
| 233 | */ |
233 | |
| 234 | 234 | /** |
|
| 235 | /** |
235 | * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 |
| 236 | * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 |
236 | * @note The reset value for the direct or internal lines (see RM) |
| 237 | * @note The reset value for the direct or internal lines (see RM) |
237 | * is set to 1 in order to enable the interrupt by default. |
| 238 | * is set to 1 in order to enable the interrupt by default. |
238 | * Bits are set automatically at Power on. |
| 239 | * Bits are set automatically at Power on. |
239 | * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31 |
| 240 | * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31 |
240 | * @param ExtiLine This parameter can be one of the following values: |
| 241 | * @param ExtiLine This parameter can be one of the following values: |
241 | * @arg @ref LL_EXTI_LINE_0 |
| 242 | * @arg @ref LL_EXTI_LINE_0 |
242 | * @arg @ref LL_EXTI_LINE_1 |
| 243 | * @arg @ref LL_EXTI_LINE_1 |
243 | * @arg @ref LL_EXTI_LINE_2 |
| 244 | * @arg @ref LL_EXTI_LINE_2 |
244 | * @arg @ref LL_EXTI_LINE_3 |
| 245 | * @arg @ref LL_EXTI_LINE_3 |
245 | * @arg @ref LL_EXTI_LINE_4 |
| 246 | * @arg @ref LL_EXTI_LINE_4 |
246 | * @arg @ref LL_EXTI_LINE_5 |
| 247 | * @arg @ref LL_EXTI_LINE_5 |
247 | * @arg @ref LL_EXTI_LINE_6 |
| 248 | * @arg @ref LL_EXTI_LINE_6 |
248 | * @arg @ref LL_EXTI_LINE_7 |
| 249 | * @arg @ref LL_EXTI_LINE_7 |
249 | * @arg @ref LL_EXTI_LINE_8 |
| 250 | * @arg @ref LL_EXTI_LINE_8 |
250 | * @arg @ref LL_EXTI_LINE_9 |
| 251 | * @arg @ref LL_EXTI_LINE_9 |
251 | * @arg @ref LL_EXTI_LINE_10 |
| 252 | * @arg @ref LL_EXTI_LINE_10 |
252 | * @arg @ref LL_EXTI_LINE_11 |
| 253 | * @arg @ref LL_EXTI_LINE_11 |
253 | * @arg @ref LL_EXTI_LINE_12 |
| 254 | * @arg @ref LL_EXTI_LINE_12 |
254 | * @arg @ref LL_EXTI_LINE_13 |
| 255 | * @arg @ref LL_EXTI_LINE_13 |
255 | * @arg @ref LL_EXTI_LINE_14 |
| 256 | * @arg @ref LL_EXTI_LINE_14 |
256 | * @arg @ref LL_EXTI_LINE_15 |
| 257 | * @arg @ref LL_EXTI_LINE_15 |
257 | * @arg @ref LL_EXTI_LINE_16 |
| 258 | * @arg @ref LL_EXTI_LINE_16 |
258 | * @arg @ref LL_EXTI_LINE_17 |
| 259 | * @arg @ref LL_EXTI_LINE_17 |
259 | * @arg @ref LL_EXTI_LINE_18 |
| 260 | * @arg @ref LL_EXTI_LINE_18 |
260 | * @arg @ref LL_EXTI_LINE_19 |
| 261 | * @arg @ref LL_EXTI_LINE_19 |
261 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
| 262 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
262 | * @note Please check each device line mapping for EXTI Line availability |
| 263 | * @note Please check each device line mapping for EXTI Line availability |
263 | * @retval None |
| 264 | * @retval None |
264 | */ |
| 265 | */ |
265 | __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) |
| 266 | __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine) |
266 | { |
| 267 | { |
267 | SET_BIT(EXTI->IMR, ExtiLine); |
| 268 | SET_BIT(EXTI->IMR, ExtiLine); |
268 | } |
| 269 | } |
269 | |
| 270 | 270 | /** |
|
| 271 | /** |
271 | * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 |
| 272 | * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 |
272 | * @note The reset value for the direct or internal lines (see RM) |
| 273 | * @note The reset value for the direct or internal lines (see RM) |
273 | * is set to 1 in order to enable the interrupt by default. |
| 274 | * is set to 1 in order to enable the interrupt by default. |
274 | * Bits are set automatically at Power on. |
| 275 | * Bits are set automatically at Power on. |
275 | * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31 |
| 276 | * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31 |
276 | * @param ExtiLine This parameter can be one of the following values: |
| 277 | * @param ExtiLine This parameter can be one of the following values: |
277 | * @arg @ref LL_EXTI_LINE_0 |
| 278 | * @arg @ref LL_EXTI_LINE_0 |
278 | * @arg @ref LL_EXTI_LINE_1 |
| 279 | * @arg @ref LL_EXTI_LINE_1 |
279 | * @arg @ref LL_EXTI_LINE_2 |
| 280 | * @arg @ref LL_EXTI_LINE_2 |
280 | * @arg @ref LL_EXTI_LINE_3 |
| 281 | * @arg @ref LL_EXTI_LINE_3 |
281 | * @arg @ref LL_EXTI_LINE_4 |
| 282 | * @arg @ref LL_EXTI_LINE_4 |
282 | * @arg @ref LL_EXTI_LINE_5 |
| 283 | * @arg @ref LL_EXTI_LINE_5 |
283 | * @arg @ref LL_EXTI_LINE_6 |
| 284 | * @arg @ref LL_EXTI_LINE_6 |
284 | * @arg @ref LL_EXTI_LINE_7 |
| 285 | * @arg @ref LL_EXTI_LINE_7 |
285 | * @arg @ref LL_EXTI_LINE_8 |
| 286 | * @arg @ref LL_EXTI_LINE_8 |
286 | * @arg @ref LL_EXTI_LINE_9 |
| 287 | * @arg @ref LL_EXTI_LINE_9 |
287 | * @arg @ref LL_EXTI_LINE_10 |
| 288 | * @arg @ref LL_EXTI_LINE_10 |
288 | * @arg @ref LL_EXTI_LINE_11 |
| 289 | * @arg @ref LL_EXTI_LINE_11 |
289 | * @arg @ref LL_EXTI_LINE_12 |
| 290 | * @arg @ref LL_EXTI_LINE_12 |
290 | * @arg @ref LL_EXTI_LINE_13 |
| 291 | * @arg @ref LL_EXTI_LINE_13 |
291 | * @arg @ref LL_EXTI_LINE_14 |
| 292 | * @arg @ref LL_EXTI_LINE_14 |
292 | * @arg @ref LL_EXTI_LINE_15 |
| 293 | * @arg @ref LL_EXTI_LINE_15 |
293 | * @arg @ref LL_EXTI_LINE_16 |
| 294 | * @arg @ref LL_EXTI_LINE_16 |
294 | * @arg @ref LL_EXTI_LINE_17 |
| 295 | * @arg @ref LL_EXTI_LINE_17 |
295 | * @arg @ref LL_EXTI_LINE_18 |
| 296 | * @arg @ref LL_EXTI_LINE_18 |
296 | * @arg @ref LL_EXTI_LINE_19 |
| 297 | * @arg @ref LL_EXTI_LINE_19 |
297 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
| 298 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
298 | * @note Please check each device line mapping for EXTI Line availability |
| 299 | * @note Please check each device line mapping for EXTI Line availability |
299 | * @retval None |
| 300 | * @retval None |
300 | */ |
| 301 | */ |
301 | __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) |
| 302 | __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine) |
302 | { |
| 303 | { |
303 | CLEAR_BIT(EXTI->IMR, ExtiLine); |
| 304 | CLEAR_BIT(EXTI->IMR, ExtiLine); |
304 | } |
| 305 | } |
305 | |
| 306 | 306 | ||
| 307 | 307 | /** |
|
| 308 | /** |
308 | * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 |
| 309 | * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 |
309 | * @note The reset value for the direct or internal lines (see RM) |
| 310 | * @note The reset value for the direct or internal lines (see RM) |
310 | * is set to 1 in order to enable the interrupt by default. |
| 311 | * is set to 1 in order to enable the interrupt by default. |
311 | * Bits are set automatically at Power on. |
| 312 | * Bits are set automatically at Power on. |
312 | * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31 |
| 313 | * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31 |
313 | * @param ExtiLine This parameter can be one of the following values: |
| 314 | * @param ExtiLine This parameter can be one of the following values: |
314 | * @arg @ref LL_EXTI_LINE_0 |
| 315 | * @arg @ref LL_EXTI_LINE_0 |
315 | * @arg @ref LL_EXTI_LINE_1 |
| 316 | * @arg @ref LL_EXTI_LINE_1 |
316 | * @arg @ref LL_EXTI_LINE_2 |
| 317 | * @arg @ref LL_EXTI_LINE_2 |
317 | * @arg @ref LL_EXTI_LINE_3 |
| 318 | * @arg @ref LL_EXTI_LINE_3 |
318 | * @arg @ref LL_EXTI_LINE_4 |
| 319 | * @arg @ref LL_EXTI_LINE_4 |
319 | * @arg @ref LL_EXTI_LINE_5 |
| 320 | * @arg @ref LL_EXTI_LINE_5 |
320 | * @arg @ref LL_EXTI_LINE_6 |
| 321 | * @arg @ref LL_EXTI_LINE_6 |
321 | * @arg @ref LL_EXTI_LINE_7 |
| 322 | * @arg @ref LL_EXTI_LINE_7 |
322 | * @arg @ref LL_EXTI_LINE_8 |
| 323 | * @arg @ref LL_EXTI_LINE_8 |
323 | * @arg @ref LL_EXTI_LINE_9 |
| 324 | * @arg @ref LL_EXTI_LINE_9 |
324 | * @arg @ref LL_EXTI_LINE_10 |
| 325 | * @arg @ref LL_EXTI_LINE_10 |
325 | * @arg @ref LL_EXTI_LINE_11 |
| 326 | * @arg @ref LL_EXTI_LINE_11 |
326 | * @arg @ref LL_EXTI_LINE_12 |
| 327 | * @arg @ref LL_EXTI_LINE_12 |
327 | * @arg @ref LL_EXTI_LINE_13 |
| 328 | * @arg @ref LL_EXTI_LINE_13 |
328 | * @arg @ref LL_EXTI_LINE_14 |
| 329 | * @arg @ref LL_EXTI_LINE_14 |
329 | * @arg @ref LL_EXTI_LINE_15 |
| 330 | * @arg @ref LL_EXTI_LINE_15 |
330 | * @arg @ref LL_EXTI_LINE_16 |
| 331 | * @arg @ref LL_EXTI_LINE_16 |
331 | * @arg @ref LL_EXTI_LINE_17 |
| 332 | * @arg @ref LL_EXTI_LINE_17 |
332 | * @arg @ref LL_EXTI_LINE_18 |
| 333 | * @arg @ref LL_EXTI_LINE_18 |
333 | * @arg @ref LL_EXTI_LINE_19 |
| 334 | * @arg @ref LL_EXTI_LINE_19 |
334 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
| 335 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
335 | * @note Please check each device line mapping for EXTI Line availability |
| 336 | * @note Please check each device line mapping for EXTI Line availability |
336 | * @retval State of bit (1 or 0). |
| 337 | * @retval State of bit (1 or 0). |
337 | */ |
| 338 | */ |
338 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) |
| 339 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine) |
339 | { |
| 340 | { |
340 | return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine)); |
| 341 | return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine)); |
341 | } |
| 342 | } |
342 | |
| 343 | 343 | ||
| 344 | 344 | /** |
|
| 345 | /** |
345 | * @} |
| 346 | * @} |
346 | */ |
| 347 | */ |
347 | |
| 348 | 348 | /** @defgroup EXTI_LL_EF_Event_Management Event_Management |
|
| 349 | /** @defgroup EXTI_LL_EF_Event_Management Event_Management |
349 | * @{ |
| 350 | * @{ |
350 | */ |
| 351 | */ |
351 | |
| 352 | 352 | /** |
|
| 353 | /** |
353 | * @brief Enable ExtiLine Event request for Lines in range 0 to 31 |
| 354 | * @brief Enable ExtiLine Event request for Lines in range 0 to 31 |
354 | * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31 |
| 355 | * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31 |
355 | * @param ExtiLine This parameter can be one of the following values: |
| 356 | * @param ExtiLine This parameter can be one of the following values: |
356 | * @arg @ref LL_EXTI_LINE_0 |
| 357 | * @arg @ref LL_EXTI_LINE_0 |
357 | * @arg @ref LL_EXTI_LINE_1 |
| 358 | * @arg @ref LL_EXTI_LINE_1 |
358 | * @arg @ref LL_EXTI_LINE_2 |
| 359 | * @arg @ref LL_EXTI_LINE_2 |
359 | * @arg @ref LL_EXTI_LINE_3 |
| 360 | * @arg @ref LL_EXTI_LINE_3 |
360 | * @arg @ref LL_EXTI_LINE_4 |
| 361 | * @arg @ref LL_EXTI_LINE_4 |
361 | * @arg @ref LL_EXTI_LINE_5 |
| 362 | * @arg @ref LL_EXTI_LINE_5 |
362 | * @arg @ref LL_EXTI_LINE_6 |
| 363 | * @arg @ref LL_EXTI_LINE_6 |
363 | * @arg @ref LL_EXTI_LINE_7 |
| 364 | * @arg @ref LL_EXTI_LINE_7 |
364 | * @arg @ref LL_EXTI_LINE_8 |
| 365 | * @arg @ref LL_EXTI_LINE_8 |
365 | * @arg @ref LL_EXTI_LINE_9 |
| 366 | * @arg @ref LL_EXTI_LINE_9 |
366 | * @arg @ref LL_EXTI_LINE_10 |
| 367 | * @arg @ref LL_EXTI_LINE_10 |
367 | * @arg @ref LL_EXTI_LINE_11 |
| 368 | * @arg @ref LL_EXTI_LINE_11 |
368 | * @arg @ref LL_EXTI_LINE_12 |
| 369 | * @arg @ref LL_EXTI_LINE_12 |
369 | * @arg @ref LL_EXTI_LINE_13 |
| 370 | * @arg @ref LL_EXTI_LINE_13 |
370 | * @arg @ref LL_EXTI_LINE_14 |
| 371 | * @arg @ref LL_EXTI_LINE_14 |
371 | * @arg @ref LL_EXTI_LINE_15 |
| 372 | * @arg @ref LL_EXTI_LINE_15 |
372 | * @arg @ref LL_EXTI_LINE_16 |
| 373 | * @arg @ref LL_EXTI_LINE_16 |
373 | * @arg @ref LL_EXTI_LINE_17 |
| 374 | * @arg @ref LL_EXTI_LINE_17 |
374 | * @arg @ref LL_EXTI_LINE_18 |
| 375 | * @arg @ref LL_EXTI_LINE_18 |
375 | * @arg @ref LL_EXTI_LINE_19 |
| 376 | * @arg @ref LL_EXTI_LINE_19 |
376 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
| 377 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
377 | * @note Please check each device line mapping for EXTI Line availability |
| 378 | * @note Please check each device line mapping for EXTI Line availability |
378 | * @retval None |
| 379 | * @retval None |
379 | */ |
| 380 | */ |
380 | __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) |
| 381 | __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine) |
381 | { |
| 382 | { |
382 | SET_BIT(EXTI->EMR, ExtiLine); |
| 383 | SET_BIT(EXTI->EMR, ExtiLine); |
383 | |
| 384 | 384 | } |
|
| 385 | } |
385 | |
| 386 | 386 | ||
| 387 | 387 | /** |
|
| 388 | /** |
388 | * @brief Disable ExtiLine Event request for Lines in range 0 to 31 |
| 389 | * @brief Disable ExtiLine Event request for Lines in range 0 to 31 |
389 | * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31 |
| 390 | * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31 |
390 | * @param ExtiLine This parameter can be one of the following values: |
| 391 | * @param ExtiLine This parameter can be one of the following values: |
391 | * @arg @ref LL_EXTI_LINE_0 |
| 392 | * @arg @ref LL_EXTI_LINE_0 |
392 | * @arg @ref LL_EXTI_LINE_1 |
| 393 | * @arg @ref LL_EXTI_LINE_1 |
393 | * @arg @ref LL_EXTI_LINE_2 |
| 394 | * @arg @ref LL_EXTI_LINE_2 |
394 | * @arg @ref LL_EXTI_LINE_3 |
| 395 | * @arg @ref LL_EXTI_LINE_3 |
395 | * @arg @ref LL_EXTI_LINE_4 |
| 396 | * @arg @ref LL_EXTI_LINE_4 |
396 | * @arg @ref LL_EXTI_LINE_5 |
| 397 | * @arg @ref LL_EXTI_LINE_5 |
397 | * @arg @ref LL_EXTI_LINE_6 |
| 398 | * @arg @ref LL_EXTI_LINE_6 |
398 | * @arg @ref LL_EXTI_LINE_7 |
| 399 | * @arg @ref LL_EXTI_LINE_7 |
399 | * @arg @ref LL_EXTI_LINE_8 |
| 400 | * @arg @ref LL_EXTI_LINE_8 |
400 | * @arg @ref LL_EXTI_LINE_9 |
| 401 | * @arg @ref LL_EXTI_LINE_9 |
401 | * @arg @ref LL_EXTI_LINE_10 |
| 402 | * @arg @ref LL_EXTI_LINE_10 |
402 | * @arg @ref LL_EXTI_LINE_11 |
| 403 | * @arg @ref LL_EXTI_LINE_11 |
403 | * @arg @ref LL_EXTI_LINE_12 |
| 404 | * @arg @ref LL_EXTI_LINE_12 |
404 | * @arg @ref LL_EXTI_LINE_13 |
| 405 | * @arg @ref LL_EXTI_LINE_13 |
405 | * @arg @ref LL_EXTI_LINE_14 |
| 406 | * @arg @ref LL_EXTI_LINE_14 |
406 | * @arg @ref LL_EXTI_LINE_15 |
| 407 | * @arg @ref LL_EXTI_LINE_15 |
407 | * @arg @ref LL_EXTI_LINE_16 |
| 408 | * @arg @ref LL_EXTI_LINE_16 |
408 | * @arg @ref LL_EXTI_LINE_17 |
| 409 | * @arg @ref LL_EXTI_LINE_17 |
409 | * @arg @ref LL_EXTI_LINE_18 |
| 410 | * @arg @ref LL_EXTI_LINE_18 |
410 | * @arg @ref LL_EXTI_LINE_19 |
| 411 | * @arg @ref LL_EXTI_LINE_19 |
411 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
| 412 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
412 | * @note Please check each device line mapping for EXTI Line availability |
| 413 | * @note Please check each device line mapping for EXTI Line availability |
413 | * @retval None |
| 414 | * @retval None |
414 | */ |
| 415 | */ |
415 | __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) |
| 416 | __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine) |
416 | { |
| 417 | { |
417 | CLEAR_BIT(EXTI->EMR, ExtiLine); |
| 418 | CLEAR_BIT(EXTI->EMR, ExtiLine); |
418 | } |
| 419 | } |
419 | |
| 420 | 420 | ||
| 421 | 421 | /** |
|
| 422 | /** |
422 | * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 |
| 423 | * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 |
423 | * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31 |
| 424 | * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31 |
424 | * @param ExtiLine This parameter can be one of the following values: |
| 425 | * @param ExtiLine This parameter can be one of the following values: |
425 | * @arg @ref LL_EXTI_LINE_0 |
| 426 | * @arg @ref LL_EXTI_LINE_0 |
426 | * @arg @ref LL_EXTI_LINE_1 |
| 427 | * @arg @ref LL_EXTI_LINE_1 |
427 | * @arg @ref LL_EXTI_LINE_2 |
| 428 | * @arg @ref LL_EXTI_LINE_2 |
428 | * @arg @ref LL_EXTI_LINE_3 |
| 429 | * @arg @ref LL_EXTI_LINE_3 |
429 | * @arg @ref LL_EXTI_LINE_4 |
| 430 | * @arg @ref LL_EXTI_LINE_4 |
430 | * @arg @ref LL_EXTI_LINE_5 |
| 431 | * @arg @ref LL_EXTI_LINE_5 |
431 | * @arg @ref LL_EXTI_LINE_6 |
| 432 | * @arg @ref LL_EXTI_LINE_6 |
432 | * @arg @ref LL_EXTI_LINE_7 |
| 433 | * @arg @ref LL_EXTI_LINE_7 |
433 | * @arg @ref LL_EXTI_LINE_8 |
| 434 | * @arg @ref LL_EXTI_LINE_8 |
434 | * @arg @ref LL_EXTI_LINE_9 |
| 435 | * @arg @ref LL_EXTI_LINE_9 |
435 | * @arg @ref LL_EXTI_LINE_10 |
| 436 | * @arg @ref LL_EXTI_LINE_10 |
436 | * @arg @ref LL_EXTI_LINE_11 |
| 437 | * @arg @ref LL_EXTI_LINE_11 |
437 | * @arg @ref LL_EXTI_LINE_12 |
| 438 | * @arg @ref LL_EXTI_LINE_12 |
438 | * @arg @ref LL_EXTI_LINE_13 |
| 439 | * @arg @ref LL_EXTI_LINE_13 |
439 | * @arg @ref LL_EXTI_LINE_14 |
| 440 | * @arg @ref LL_EXTI_LINE_14 |
440 | * @arg @ref LL_EXTI_LINE_15 |
| 441 | * @arg @ref LL_EXTI_LINE_15 |
441 | * @arg @ref LL_EXTI_LINE_16 |
| 442 | * @arg @ref LL_EXTI_LINE_16 |
442 | * @arg @ref LL_EXTI_LINE_17 |
| 443 | * @arg @ref LL_EXTI_LINE_17 |
443 | * @arg @ref LL_EXTI_LINE_18 |
| 444 | * @arg @ref LL_EXTI_LINE_18 |
444 | * @arg @ref LL_EXTI_LINE_19 |
| 445 | * @arg @ref LL_EXTI_LINE_19 |
445 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
| 446 | * @arg @ref LL_EXTI_LINE_ALL_0_31 |
446 | * @note Please check each device line mapping for EXTI Line availability |
| 447 | * @note Please check each device line mapping for EXTI Line availability |
447 | * @retval State of bit (1 or 0). |
| 448 | * @retval State of bit (1 or 0). |
448 | */ |
| 449 | */ |
449 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) |
| 450 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine) |
450 | { |
| 451 | { |
451 | return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine)); |
| 452 | return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine)); |
452 | |
| 453 | 453 | } |
|
| 454 | } |
454 | |
| 455 | 455 | ||
| 456 | 456 | /** |
|
| 457 | /** |
457 | * @} |
| 458 | * @} |
458 | */ |
| 459 | */ |
459 | |
| 460 | 460 | /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management |
|
| 461 | /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management |
461 | * @{ |
| 462 | * @{ |
462 | */ |
| 463 | */ |
463 | |
| 464 | 464 | /** |
|
| 465 | /** |
465 | * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
| 466 | * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
466 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
| 467 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
467 | * generated on these lines. If a rising edge on a configurable interrupt |
| 468 | * generated on these lines. If a rising edge on a configurable interrupt |
468 | * line occurs during a write operation in the EXTI_RTSR register, the |
| 469 | * line occurs during a write operation in the EXTI_RTSR register, the |
469 | * pending bit is not set. |
| 470 | * pending bit is not set. |
470 | * Rising and falling edge triggers can be set for |
| 471 | * Rising and falling edge triggers can be set for |
471 | * the same interrupt line. In this case, both generate a trigger |
| 472 | * the same interrupt line. In this case, both generate a trigger |
472 | * condition. |
| 473 | * condition. |
473 | * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31 |
| 474 | * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31 |
474 | * @param ExtiLine This parameter can be a combination of the following values: |
| 475 | * @param ExtiLine This parameter can be a combination of the following values: |
475 | * @arg @ref LL_EXTI_LINE_0 |
| 476 | * @arg @ref LL_EXTI_LINE_0 |
476 | * @arg @ref LL_EXTI_LINE_1 |
| 477 | * @arg @ref LL_EXTI_LINE_1 |
477 | * @arg @ref LL_EXTI_LINE_2 |
| 478 | * @arg @ref LL_EXTI_LINE_2 |
478 | * @arg @ref LL_EXTI_LINE_3 |
| 479 | * @arg @ref LL_EXTI_LINE_3 |
479 | * @arg @ref LL_EXTI_LINE_4 |
| 480 | * @arg @ref LL_EXTI_LINE_4 |
480 | * @arg @ref LL_EXTI_LINE_5 |
| 481 | * @arg @ref LL_EXTI_LINE_5 |
481 | * @arg @ref LL_EXTI_LINE_6 |
| 482 | * @arg @ref LL_EXTI_LINE_6 |
482 | * @arg @ref LL_EXTI_LINE_7 |
| 483 | * @arg @ref LL_EXTI_LINE_7 |
483 | * @arg @ref LL_EXTI_LINE_8 |
| 484 | * @arg @ref LL_EXTI_LINE_8 |
484 | * @arg @ref LL_EXTI_LINE_9 |
| 485 | * @arg @ref LL_EXTI_LINE_9 |
485 | * @arg @ref LL_EXTI_LINE_10 |
| 486 | * @arg @ref LL_EXTI_LINE_10 |
486 | * @arg @ref LL_EXTI_LINE_11 |
| 487 | * @arg @ref LL_EXTI_LINE_11 |
487 | * @arg @ref LL_EXTI_LINE_12 |
| 488 | * @arg @ref LL_EXTI_LINE_12 |
488 | * @arg @ref LL_EXTI_LINE_13 |
| 489 | * @arg @ref LL_EXTI_LINE_13 |
489 | * @arg @ref LL_EXTI_LINE_14 |
| 490 | * @arg @ref LL_EXTI_LINE_14 |
490 | * @arg @ref LL_EXTI_LINE_15 |
| 491 | * @arg @ref LL_EXTI_LINE_15 |
491 | * @arg @ref LL_EXTI_LINE_16 |
| 492 | * @arg @ref LL_EXTI_LINE_16 |
492 | * @arg @ref LL_EXTI_LINE_18 |
| 493 | * @arg @ref LL_EXTI_LINE_18 |
493 | * @arg @ref LL_EXTI_LINE_19 |
| 494 | * @arg @ref LL_EXTI_LINE_19 |
494 | * @note Please check each device line mapping for EXTI Line availability |
| 495 | * @note Please check each device line mapping for EXTI Line availability |
495 | * @retval None |
| 496 | * @retval None |
496 | */ |
| 497 | */ |
497 | __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) |
| 498 | __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine) |
498 | { |
| 499 | { |
499 | SET_BIT(EXTI->RTSR, ExtiLine); |
| 500 | SET_BIT(EXTI->RTSR, ExtiLine); |
500 | |
| 501 | 501 | } |
|
| 502 | } |
502 | |
| 503 | 503 | ||
| 504 | 504 | /** |
|
| 505 | /** |
505 | * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
| 506 | * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31 |
506 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
| 507 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
507 | * generated on these lines. If a rising edge on a configurable interrupt |
| 508 | * generated on these lines. If a rising edge on a configurable interrupt |
508 | * line occurs during a write operation in the EXTI_RTSR register, the |
| 509 | * line occurs during a write operation in the EXTI_RTSR register, the |
509 | * pending bit is not set. |
| 510 | * pending bit is not set. |
510 | * Rising and falling edge triggers can be set for |
| 511 | * Rising and falling edge triggers can be set for |
511 | * the same interrupt line. In this case, both generate a trigger |
| 512 | * the same interrupt line. In this case, both generate a trigger |
512 | * condition. |
| 513 | * condition. |
513 | * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31 |
| 514 | * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31 |
514 | * @param ExtiLine This parameter can be a combination of the following values: |
| 515 | * @param ExtiLine This parameter can be a combination of the following values: |
515 | * @arg @ref LL_EXTI_LINE_0 |
| 516 | * @arg @ref LL_EXTI_LINE_0 |
516 | * @arg @ref LL_EXTI_LINE_1 |
| 517 | * @arg @ref LL_EXTI_LINE_1 |
517 | * @arg @ref LL_EXTI_LINE_2 |
| 518 | * @arg @ref LL_EXTI_LINE_2 |
518 | * @arg @ref LL_EXTI_LINE_3 |
| 519 | * @arg @ref LL_EXTI_LINE_3 |
519 | * @arg @ref LL_EXTI_LINE_4 |
| 520 | * @arg @ref LL_EXTI_LINE_4 |
520 | * @arg @ref LL_EXTI_LINE_5 |
| 521 | * @arg @ref LL_EXTI_LINE_5 |
521 | * @arg @ref LL_EXTI_LINE_6 |
| 522 | * @arg @ref LL_EXTI_LINE_6 |
522 | * @arg @ref LL_EXTI_LINE_7 |
| 523 | * @arg @ref LL_EXTI_LINE_7 |
523 | * @arg @ref LL_EXTI_LINE_8 |
| 524 | * @arg @ref LL_EXTI_LINE_8 |
524 | * @arg @ref LL_EXTI_LINE_9 |
| 525 | * @arg @ref LL_EXTI_LINE_9 |
525 | * @arg @ref LL_EXTI_LINE_10 |
| 526 | * @arg @ref LL_EXTI_LINE_10 |
526 | * @arg @ref LL_EXTI_LINE_11 |
| 527 | * @arg @ref LL_EXTI_LINE_11 |
527 | * @arg @ref LL_EXTI_LINE_12 |
| 528 | * @arg @ref LL_EXTI_LINE_12 |
528 | * @arg @ref LL_EXTI_LINE_13 |
| 529 | * @arg @ref LL_EXTI_LINE_13 |
529 | * @arg @ref LL_EXTI_LINE_14 |
| 530 | * @arg @ref LL_EXTI_LINE_14 |
530 | * @arg @ref LL_EXTI_LINE_15 |
| 531 | * @arg @ref LL_EXTI_LINE_15 |
531 | * @arg @ref LL_EXTI_LINE_16 |
| 532 | * @arg @ref LL_EXTI_LINE_16 |
532 | * @arg @ref LL_EXTI_LINE_18 |
| 533 | * @arg @ref LL_EXTI_LINE_18 |
533 | * @arg @ref LL_EXTI_LINE_19 |
| 534 | * @arg @ref LL_EXTI_LINE_19 |
534 | * @note Please check each device line mapping for EXTI Line availability |
| 535 | * @note Please check each device line mapping for EXTI Line availability |
535 | * @retval None |
| 536 | * @retval None |
536 | */ |
| 537 | */ |
537 | __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) |
| 538 | __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine) |
538 | { |
| 539 | { |
539 | CLEAR_BIT(EXTI->RTSR, ExtiLine); |
| 540 | CLEAR_BIT(EXTI->RTSR, ExtiLine); |
540 | |
| 541 | 541 | } |
|
| 542 | } |
542 | |
| 543 | 543 | ||
| 544 | 544 | /** |
|
| 545 | /** |
545 | * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 |
| 546 | * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31 |
546 | * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31 |
| 547 | * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31 |
547 | * @param ExtiLine This parameter can be a combination of the following values: |
| 548 | * @param ExtiLine This parameter can be a combination of the following values: |
548 | * @arg @ref LL_EXTI_LINE_0 |
| 549 | * @arg @ref LL_EXTI_LINE_0 |
549 | * @arg @ref LL_EXTI_LINE_1 |
| 550 | * @arg @ref LL_EXTI_LINE_1 |
550 | * @arg @ref LL_EXTI_LINE_2 |
| 551 | * @arg @ref LL_EXTI_LINE_2 |
551 | * @arg @ref LL_EXTI_LINE_3 |
| 552 | * @arg @ref LL_EXTI_LINE_3 |
552 | * @arg @ref LL_EXTI_LINE_4 |
| 553 | * @arg @ref LL_EXTI_LINE_4 |
553 | * @arg @ref LL_EXTI_LINE_5 |
| 554 | * @arg @ref LL_EXTI_LINE_5 |
554 | * @arg @ref LL_EXTI_LINE_6 |
| 555 | * @arg @ref LL_EXTI_LINE_6 |
555 | * @arg @ref LL_EXTI_LINE_7 |
| 556 | * @arg @ref LL_EXTI_LINE_7 |
556 | * @arg @ref LL_EXTI_LINE_8 |
| 557 | * @arg @ref LL_EXTI_LINE_8 |
557 | * @arg @ref LL_EXTI_LINE_9 |
| 558 | * @arg @ref LL_EXTI_LINE_9 |
558 | * @arg @ref LL_EXTI_LINE_10 |
| 559 | * @arg @ref LL_EXTI_LINE_10 |
559 | * @arg @ref LL_EXTI_LINE_11 |
| 560 | * @arg @ref LL_EXTI_LINE_11 |
560 | * @arg @ref LL_EXTI_LINE_12 |
| 561 | * @arg @ref LL_EXTI_LINE_12 |
561 | * @arg @ref LL_EXTI_LINE_13 |
| 562 | * @arg @ref LL_EXTI_LINE_13 |
562 | * @arg @ref LL_EXTI_LINE_14 |
| 563 | * @arg @ref LL_EXTI_LINE_14 |
563 | * @arg @ref LL_EXTI_LINE_15 |
| 564 | * @arg @ref LL_EXTI_LINE_15 |
564 | * @arg @ref LL_EXTI_LINE_16 |
| 565 | * @arg @ref LL_EXTI_LINE_16 |
565 | * @arg @ref LL_EXTI_LINE_18 |
| 566 | * @arg @ref LL_EXTI_LINE_18 |
566 | * @arg @ref LL_EXTI_LINE_19 |
| 567 | * @arg @ref LL_EXTI_LINE_19 |
567 | * @note Please check each device line mapping for EXTI Line availability |
| 568 | * @note Please check each device line mapping for EXTI Line availability |
568 | * @retval State of bit (1 or 0). |
| 569 | * @retval State of bit (1 or 0). |
569 | */ |
| 570 | */ |
570 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) |
| 571 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine) |
571 | { |
| 572 | { |
572 | return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine)); |
| 573 | return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine)); |
573 | } |
| 574 | } |
574 | |
| 575 | 575 | ||
| 576 | 576 | /** |
|
| 577 | /** |
577 | * @} |
| 578 | * @} |
578 | */ |
| 579 | */ |
579 | |
| 580 | 580 | /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management |
|
| 581 | /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management |
581 | * @{ |
| 582 | * @{ |
582 | */ |
| 583 | */ |
583 | |
| 584 | 584 | /** |
|
| 585 | /** |
585 | * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
| 586 | * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
586 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
| 587 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
587 | * generated on these lines. If a falling edge on a configurable interrupt |
| 588 | * generated on these lines. If a falling edge on a configurable interrupt |
588 | * line occurs during a write operation in the EXTI_FTSR register, the |
| 589 | * line occurs during a write operation in the EXTI_FTSR register, the |
589 | * pending bit is not set. |
| 590 | * pending bit is not set. |
590 | * Rising and falling edge triggers can be set for |
| 591 | * Rising and falling edge triggers can be set for |
591 | * the same interrupt line. In this case, both generate a trigger |
| 592 | * the same interrupt line. In this case, both generate a trigger |
592 | * condition. |
| 593 | * condition. |
593 | * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31 |
| 594 | * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31 |
594 | * @param ExtiLine This parameter can be a combination of the following values: |
| 595 | * @param ExtiLine This parameter can be a combination of the following values: |
595 | * @arg @ref LL_EXTI_LINE_0 |
| 596 | * @arg @ref LL_EXTI_LINE_0 |
596 | * @arg @ref LL_EXTI_LINE_1 |
| 597 | * @arg @ref LL_EXTI_LINE_1 |
597 | * @arg @ref LL_EXTI_LINE_2 |
| 598 | * @arg @ref LL_EXTI_LINE_2 |
598 | * @arg @ref LL_EXTI_LINE_3 |
| 599 | * @arg @ref LL_EXTI_LINE_3 |
599 | * @arg @ref LL_EXTI_LINE_4 |
| 600 | * @arg @ref LL_EXTI_LINE_4 |
600 | * @arg @ref LL_EXTI_LINE_5 |
| 601 | * @arg @ref LL_EXTI_LINE_5 |
601 | * @arg @ref LL_EXTI_LINE_6 |
| 602 | * @arg @ref LL_EXTI_LINE_6 |
602 | * @arg @ref LL_EXTI_LINE_7 |
| 603 | * @arg @ref LL_EXTI_LINE_7 |
603 | * @arg @ref LL_EXTI_LINE_8 |
| 604 | * @arg @ref LL_EXTI_LINE_8 |
604 | * @arg @ref LL_EXTI_LINE_9 |
| 605 | * @arg @ref LL_EXTI_LINE_9 |
605 | * @arg @ref LL_EXTI_LINE_10 |
| 606 | * @arg @ref LL_EXTI_LINE_10 |
606 | * @arg @ref LL_EXTI_LINE_11 |
| 607 | * @arg @ref LL_EXTI_LINE_11 |
607 | * @arg @ref LL_EXTI_LINE_12 |
| 608 | * @arg @ref LL_EXTI_LINE_12 |
608 | * @arg @ref LL_EXTI_LINE_13 |
| 609 | * @arg @ref LL_EXTI_LINE_13 |
609 | * @arg @ref LL_EXTI_LINE_14 |
| 610 | * @arg @ref LL_EXTI_LINE_14 |
610 | * @arg @ref LL_EXTI_LINE_15 |
| 611 | * @arg @ref LL_EXTI_LINE_15 |
611 | * @arg @ref LL_EXTI_LINE_16 |
| 612 | * @arg @ref LL_EXTI_LINE_16 |
612 | * @arg @ref LL_EXTI_LINE_18 |
| 613 | * @arg @ref LL_EXTI_LINE_18 |
613 | * @arg @ref LL_EXTI_LINE_19 |
| 614 | * @arg @ref LL_EXTI_LINE_19 |
614 | * @note Please check each device line mapping for EXTI Line availability |
| 615 | * @note Please check each device line mapping for EXTI Line availability |
615 | * @retval None |
| 616 | * @retval None |
616 | */ |
| 617 | */ |
617 | __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) |
| 618 | __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine) |
618 | { |
| 619 | { |
619 | SET_BIT(EXTI->FTSR, ExtiLine); |
| 620 | SET_BIT(EXTI->FTSR, ExtiLine); |
620 | } |
| 621 | } |
621 | |
| 622 | 622 | ||
| 623 | 623 | /** |
|
| 624 | /** |
624 | * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
| 625 | * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31 |
625 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
| 626 | * @note The configurable wakeup lines are edge-triggered. No glitch must be |
626 | * generated on these lines. If a Falling edge on a configurable interrupt |
| 627 | * generated on these lines. If a Falling edge on a configurable interrupt |
627 | * line occurs during a write operation in the EXTI_FTSR register, the |
| 628 | * line occurs during a write operation in the EXTI_FTSR register, the |
628 | * pending bit is not set. |
| 629 | * pending bit is not set. |
629 | * Rising and falling edge triggers can be set for the same interrupt line. |
| 630 | * Rising and falling edge triggers can be set for the same interrupt line. |
630 | * In this case, both generate a trigger condition. |
| 631 | * In this case, both generate a trigger condition. |
631 | * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31 |
| 632 | * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31 |
632 | * @param ExtiLine This parameter can be a combination of the following values: |
| 633 | * @param ExtiLine This parameter can be a combination of the following values: |
633 | * @arg @ref LL_EXTI_LINE_0 |
| 634 | * @arg @ref LL_EXTI_LINE_0 |
634 | * @arg @ref LL_EXTI_LINE_1 |
| 635 | * @arg @ref LL_EXTI_LINE_1 |
635 | * @arg @ref LL_EXTI_LINE_2 |
| 636 | * @arg @ref LL_EXTI_LINE_2 |
636 | * @arg @ref LL_EXTI_LINE_3 |
| 637 | * @arg @ref LL_EXTI_LINE_3 |
637 | * @arg @ref LL_EXTI_LINE_4 |
| 638 | * @arg @ref LL_EXTI_LINE_4 |
638 | * @arg @ref LL_EXTI_LINE_5 |
| 639 | * @arg @ref LL_EXTI_LINE_5 |
639 | * @arg @ref LL_EXTI_LINE_6 |
| 640 | * @arg @ref LL_EXTI_LINE_6 |
640 | * @arg @ref LL_EXTI_LINE_7 |
| 641 | * @arg @ref LL_EXTI_LINE_7 |
641 | * @arg @ref LL_EXTI_LINE_8 |
| 642 | * @arg @ref LL_EXTI_LINE_8 |
642 | * @arg @ref LL_EXTI_LINE_9 |
| 643 | * @arg @ref LL_EXTI_LINE_9 |
643 | * @arg @ref LL_EXTI_LINE_10 |
| 644 | * @arg @ref LL_EXTI_LINE_10 |
644 | * @arg @ref LL_EXTI_LINE_11 |
| 645 | * @arg @ref LL_EXTI_LINE_11 |
645 | * @arg @ref LL_EXTI_LINE_12 |
| 646 | * @arg @ref LL_EXTI_LINE_12 |
646 | * @arg @ref LL_EXTI_LINE_13 |
| 647 | * @arg @ref LL_EXTI_LINE_13 |
647 | * @arg @ref LL_EXTI_LINE_14 |
| 648 | * @arg @ref LL_EXTI_LINE_14 |
648 | * @arg @ref LL_EXTI_LINE_15 |
| 649 | * @arg @ref LL_EXTI_LINE_15 |
649 | * @arg @ref LL_EXTI_LINE_16 |
| 650 | * @arg @ref LL_EXTI_LINE_16 |
650 | * @arg @ref LL_EXTI_LINE_18 |
| 651 | * @arg @ref LL_EXTI_LINE_18 |
651 | * @arg @ref LL_EXTI_LINE_19 |
| 652 | * @arg @ref LL_EXTI_LINE_19 |
652 | * @note Please check each device line mapping for EXTI Line availability |
| 653 | * @note Please check each device line mapping for EXTI Line availability |
653 | * @retval None |
| 654 | * @retval None |
654 | */ |
| 655 | */ |
655 | __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) |
| 656 | __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine) |
656 | { |
| 657 | { |
657 | CLEAR_BIT(EXTI->FTSR, ExtiLine); |
| 658 | CLEAR_BIT(EXTI->FTSR, ExtiLine); |
658 | } |
| 659 | } |
659 | |
| 660 | 660 | ||
| 661 | 661 | /** |
|
| 662 | /** |
662 | * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 |
| 663 | * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31 |
663 | * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31 |
| 664 | * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31 |
664 | * @param ExtiLine This parameter can be a combination of the following values: |
| 665 | * @param ExtiLine This parameter can be a combination of the following values: |
665 | * @arg @ref LL_EXTI_LINE_0 |
| 666 | * @arg @ref LL_EXTI_LINE_0 |
666 | * @arg @ref LL_EXTI_LINE_1 |
| 667 | * @arg @ref LL_EXTI_LINE_1 |
667 | * @arg @ref LL_EXTI_LINE_2 |
| 668 | * @arg @ref LL_EXTI_LINE_2 |
668 | * @arg @ref LL_EXTI_LINE_3 |
| 669 | * @arg @ref LL_EXTI_LINE_3 |
669 | * @arg @ref LL_EXTI_LINE_4 |
| 670 | * @arg @ref LL_EXTI_LINE_4 |
670 | * @arg @ref LL_EXTI_LINE_5 |
| 671 | * @arg @ref LL_EXTI_LINE_5 |
671 | * @arg @ref LL_EXTI_LINE_6 |
| 672 | * @arg @ref LL_EXTI_LINE_6 |
672 | * @arg @ref LL_EXTI_LINE_7 |
| 673 | * @arg @ref LL_EXTI_LINE_7 |
673 | * @arg @ref LL_EXTI_LINE_8 |
| 674 | * @arg @ref LL_EXTI_LINE_8 |
674 | * @arg @ref LL_EXTI_LINE_9 |
| 675 | * @arg @ref LL_EXTI_LINE_9 |
675 | * @arg @ref LL_EXTI_LINE_10 |
| 676 | * @arg @ref LL_EXTI_LINE_10 |
676 | * @arg @ref LL_EXTI_LINE_11 |
| 677 | * @arg @ref LL_EXTI_LINE_11 |
677 | * @arg @ref LL_EXTI_LINE_12 |
| 678 | * @arg @ref LL_EXTI_LINE_12 |
678 | * @arg @ref LL_EXTI_LINE_13 |
| 679 | * @arg @ref LL_EXTI_LINE_13 |
679 | * @arg @ref LL_EXTI_LINE_14 |
| 680 | * @arg @ref LL_EXTI_LINE_14 |
680 | * @arg @ref LL_EXTI_LINE_15 |
| 681 | * @arg @ref LL_EXTI_LINE_15 |
681 | * @arg @ref LL_EXTI_LINE_16 |
| 682 | * @arg @ref LL_EXTI_LINE_16 |
682 | * @arg @ref LL_EXTI_LINE_18 |
| 683 | * @arg @ref LL_EXTI_LINE_18 |
683 | * @arg @ref LL_EXTI_LINE_19 |
| 684 | * @arg @ref LL_EXTI_LINE_19 |
684 | * @note Please check each device line mapping for EXTI Line availability |
| 685 | * @note Please check each device line mapping for EXTI Line availability |
685 | * @retval State of bit (1 or 0). |
| 686 | * @retval State of bit (1 or 0). |
686 | */ |
| 687 | */ |
687 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) |
| 688 | __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine) |
688 | { |
| 689 | { |
689 | return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine)); |
| 690 | return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine)); |
690 | } |
| 691 | } |
691 | |
| 692 | 692 | ||
| 693 | 693 | /** |
|
| 694 | /** |
694 | * @} |
| 695 | * @} |
695 | */ |
| 696 | */ |
696 | |
| 697 | 697 | /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management |
|
| 698 | /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management |
698 | * @{ |
| 699 | * @{ |
699 | */ |
| 700 | */ |
700 | |
| 701 | 701 | /** |
|
| 702 | /** |
702 | * @brief Generate a software Interrupt Event for Lines in range 0 to 31 |
| 703 | * @brief Generate a software Interrupt Event for Lines in range 0 to 31 |
703 | * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to |
| 704 | * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to |
704 | * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR |
| 705 | * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR |
705 | * resulting in an interrupt request generation. |
| 706 | * resulting in an interrupt request generation. |
706 | * This bit is cleared by clearing the corresponding bit in the EXTI_PR |
| 707 | * This bit is cleared by clearing the corresponding bit in the EXTI_PR |
707 | * register (by writing a 1 into the bit) |
| 708 | * register (by writing a 1 into the bit) |
708 | * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31 |
| 709 | * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31 |
709 | * @param ExtiLine This parameter can be a combination of the following values: |
| 710 | * @param ExtiLine This parameter can be a combination of the following values: |
710 | * @arg @ref LL_EXTI_LINE_0 |
| 711 | * @arg @ref LL_EXTI_LINE_0 |
711 | * @arg @ref LL_EXTI_LINE_1 |
| 712 | * @arg @ref LL_EXTI_LINE_1 |
712 | * @arg @ref LL_EXTI_LINE_2 |
| 713 | * @arg @ref LL_EXTI_LINE_2 |
713 | * @arg @ref LL_EXTI_LINE_3 |
| 714 | * @arg @ref LL_EXTI_LINE_3 |
714 | * @arg @ref LL_EXTI_LINE_4 |
| 715 | * @arg @ref LL_EXTI_LINE_4 |
715 | * @arg @ref LL_EXTI_LINE_5 |
| 716 | * @arg @ref LL_EXTI_LINE_5 |
716 | * @arg @ref LL_EXTI_LINE_6 |
| 717 | * @arg @ref LL_EXTI_LINE_6 |
717 | * @arg @ref LL_EXTI_LINE_7 |
| 718 | * @arg @ref LL_EXTI_LINE_7 |
718 | * @arg @ref LL_EXTI_LINE_8 |
| 719 | * @arg @ref LL_EXTI_LINE_8 |
719 | * @arg @ref LL_EXTI_LINE_9 |
| 720 | * @arg @ref LL_EXTI_LINE_9 |
720 | * @arg @ref LL_EXTI_LINE_10 |
| 721 | * @arg @ref LL_EXTI_LINE_10 |
721 | * @arg @ref LL_EXTI_LINE_11 |
| 722 | * @arg @ref LL_EXTI_LINE_11 |
722 | * @arg @ref LL_EXTI_LINE_12 |
| 723 | * @arg @ref LL_EXTI_LINE_12 |
723 | * @arg @ref LL_EXTI_LINE_13 |
| 724 | * @arg @ref LL_EXTI_LINE_13 |
724 | * @arg @ref LL_EXTI_LINE_14 |
| 725 | * @arg @ref LL_EXTI_LINE_14 |
725 | * @arg @ref LL_EXTI_LINE_15 |
| 726 | * @arg @ref LL_EXTI_LINE_15 |
726 | * @arg @ref LL_EXTI_LINE_16 |
| 727 | * @arg @ref LL_EXTI_LINE_16 |
727 | * @arg @ref LL_EXTI_LINE_18 |
| 728 | * @arg @ref LL_EXTI_LINE_18 |
728 | * @arg @ref LL_EXTI_LINE_19 |
| 729 | * @arg @ref LL_EXTI_LINE_19 |
729 | * @note Please check each device line mapping for EXTI Line availability |
| 730 | * @note Please check each device line mapping for EXTI Line availability |
730 | * @retval None |
| 731 | * @retval None |
731 | */ |
| 732 | */ |
732 | __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) |
| 733 | __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine) |
733 | { |
| 734 | { |
734 | SET_BIT(EXTI->SWIER, ExtiLine); |
| 735 | SET_BIT(EXTI->SWIER, ExtiLine); |
735 | } |
| 736 | } |
736 | |
| 737 | 737 | ||
| 738 | 738 | /** |
|
| 739 | /** |
739 | * @} |
| 740 | * @} |
740 | */ |
| 741 | */ |
741 | |
| 742 | 742 | /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management |
|
| 743 | /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management |
743 | * @{ |
| 744 | * @{ |
744 | */ |
| 745 | */ |
745 | |
| 746 | 746 | /** |
|
| 747 | /** |
747 | * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 |
| 748 | * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31 |
748 | * @note This bit is set when the selected edge event arrives on the interrupt |
| 749 | * @note This bit is set when the selected edge event arrives on the interrupt |
749 | * line. This bit is cleared by writing a 1 to the bit. |
| 750 | * line. This bit is cleared by writing a 1 to the bit. |
750 | * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31 |
| 751 | * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31 |
751 | * @param ExtiLine This parameter can be a combination of the following values: |
| 752 | * @param ExtiLine This parameter can be a combination of the following values: |
752 | * @arg @ref LL_EXTI_LINE_0 |
| 753 | * @arg @ref LL_EXTI_LINE_0 |
753 | * @arg @ref LL_EXTI_LINE_1 |
| 754 | * @arg @ref LL_EXTI_LINE_1 |
754 | * @arg @ref LL_EXTI_LINE_2 |
| 755 | * @arg @ref LL_EXTI_LINE_2 |
755 | * @arg @ref LL_EXTI_LINE_3 |
| 756 | * @arg @ref LL_EXTI_LINE_3 |
756 | * @arg @ref LL_EXTI_LINE_4 |
| 757 | * @arg @ref LL_EXTI_LINE_4 |
757 | * @arg @ref LL_EXTI_LINE_5 |
| 758 | * @arg @ref LL_EXTI_LINE_5 |
758 | * @arg @ref LL_EXTI_LINE_6 |
| 759 | * @arg @ref LL_EXTI_LINE_6 |
759 | * @arg @ref LL_EXTI_LINE_7 |
| 760 | * @arg @ref LL_EXTI_LINE_7 |
760 | * @arg @ref LL_EXTI_LINE_8 |
| 761 | * @arg @ref LL_EXTI_LINE_8 |
761 | * @arg @ref LL_EXTI_LINE_9 |
| 762 | * @arg @ref LL_EXTI_LINE_9 |
762 | * @arg @ref LL_EXTI_LINE_10 |
| 763 | * @arg @ref LL_EXTI_LINE_10 |
763 | * @arg @ref LL_EXTI_LINE_11 |
| 764 | * @arg @ref LL_EXTI_LINE_11 |
764 | * @arg @ref LL_EXTI_LINE_12 |
| 765 | * @arg @ref LL_EXTI_LINE_12 |
765 | * @arg @ref LL_EXTI_LINE_13 |
| 766 | * @arg @ref LL_EXTI_LINE_13 |
766 | * @arg @ref LL_EXTI_LINE_14 |
| 767 | * @arg @ref LL_EXTI_LINE_14 |
767 | * @arg @ref LL_EXTI_LINE_15 |
| 768 | * @arg @ref LL_EXTI_LINE_15 |
768 | * @arg @ref LL_EXTI_LINE_16 |
| 769 | * @arg @ref LL_EXTI_LINE_16 |
769 | * @arg @ref LL_EXTI_LINE_18 |
| 770 | * @arg @ref LL_EXTI_LINE_18 |
770 | * @arg @ref LL_EXTI_LINE_19 |
| 771 | * @arg @ref LL_EXTI_LINE_19 |
771 | * @note Please check each device line mapping for EXTI Line availability |
| 772 | * @note Please check each device line mapping for EXTI Line availability |
772 | * @retval State of bit (1 or 0). |
| 773 | * @retval State of bit (1 or 0). |
773 | */ |
| 774 | */ |
774 | __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) |
| 775 | __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine) |
775 | { |
| 776 | { |
776 | return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine)); |
| 777 | return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine)); |
777 | } |
| 778 | } |
778 | |
| 779 | 779 | ||
| 780 | 780 | /** |
|
| 781 | /** |
781 | * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 |
| 782 | * @brief Read ExtLine Combination Flag for Lines in range 0 to 31 |
782 | * @note This bit is set when the selected edge event arrives on the interrupt |
| 783 | * @note This bit is set when the selected edge event arrives on the interrupt |
783 | * line. This bit is cleared by writing a 1 to the bit. |
| 784 | * line. This bit is cleared by writing a 1 to the bit. |
784 | * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31 |
| 785 | * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31 |
785 | * @param ExtiLine This parameter can be a combination of the following values: |
| 786 | * @param ExtiLine This parameter can be a combination of the following values: |
786 | * @arg @ref LL_EXTI_LINE_0 |
| 787 | * @arg @ref LL_EXTI_LINE_0 |
787 | * @arg @ref LL_EXTI_LINE_1 |
| 788 | * @arg @ref LL_EXTI_LINE_1 |
788 | * @arg @ref LL_EXTI_LINE_2 |
| 789 | * @arg @ref LL_EXTI_LINE_2 |
789 | * @arg @ref LL_EXTI_LINE_3 |
| 790 | * @arg @ref LL_EXTI_LINE_3 |
790 | * @arg @ref LL_EXTI_LINE_4 |
| 791 | * @arg @ref LL_EXTI_LINE_4 |
791 | * @arg @ref LL_EXTI_LINE_5 |
| 792 | * @arg @ref LL_EXTI_LINE_5 |
792 | * @arg @ref LL_EXTI_LINE_6 |
| 793 | * @arg @ref LL_EXTI_LINE_6 |
793 | * @arg @ref LL_EXTI_LINE_7 |
| 794 | * @arg @ref LL_EXTI_LINE_7 |
794 | * @arg @ref LL_EXTI_LINE_8 |
| 795 | * @arg @ref LL_EXTI_LINE_8 |
795 | * @arg @ref LL_EXTI_LINE_9 |
| 796 | * @arg @ref LL_EXTI_LINE_9 |
796 | * @arg @ref LL_EXTI_LINE_10 |
| 797 | * @arg @ref LL_EXTI_LINE_10 |
797 | * @arg @ref LL_EXTI_LINE_11 |
| 798 | * @arg @ref LL_EXTI_LINE_11 |
798 | * @arg @ref LL_EXTI_LINE_12 |
| 799 | * @arg @ref LL_EXTI_LINE_12 |
799 | * @arg @ref LL_EXTI_LINE_13 |
| 800 | * @arg @ref LL_EXTI_LINE_13 |
800 | * @arg @ref LL_EXTI_LINE_14 |
| 801 | * @arg @ref LL_EXTI_LINE_14 |
801 | * @arg @ref LL_EXTI_LINE_15 |
| 802 | * @arg @ref LL_EXTI_LINE_15 |
802 | * @arg @ref LL_EXTI_LINE_16 |
| 803 | * @arg @ref LL_EXTI_LINE_16 |
803 | * @arg @ref LL_EXTI_LINE_18 |
| 804 | * @arg @ref LL_EXTI_LINE_18 |
804 | * @arg @ref LL_EXTI_LINE_19 |
| 805 | * @arg @ref LL_EXTI_LINE_19 |
805 | * @note Please check each device line mapping for EXTI Line availability |
| 806 | * @note Please check each device line mapping for EXTI Line availability |
806 | * @retval @note This bit is set when the selected edge event arrives on the interrupt |
| 807 | * @retval @note This bit is set when the selected edge event arrives on the interrupt |
807 | */ |
| 808 | */ |
808 | __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) |
| 809 | __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine) |
809 | { |
| 810 | { |
810 | return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine)); |
| 811 | return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine)); |
811 | } |
| 812 | } |
812 | |
| 813 | 813 | ||
| 814 | 814 | /** |
|
| 815 | /** |
815 | * @brief Clear ExtLine Flags for Lines in range 0 to 31 |
| 816 | * @brief Clear ExtLine Flags for Lines in range 0 to 31 |
816 | * @note This bit is set when the selected edge event arrives on the interrupt |
| 817 | * @note This bit is set when the selected edge event arrives on the interrupt |
817 | * line. This bit is cleared by writing a 1 to the bit. |
| 818 | * line. This bit is cleared by writing a 1 to the bit. |
818 | * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31 |
| 819 | * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31 |
819 | * @param ExtiLine This parameter can be a combination of the following values: |
| 820 | * @param ExtiLine This parameter can be a combination of the following values: |
820 | * @arg @ref LL_EXTI_LINE_0 |
| 821 | * @arg @ref LL_EXTI_LINE_0 |
821 | * @arg @ref LL_EXTI_LINE_1 |
| 822 | * @arg @ref LL_EXTI_LINE_1 |
822 | * @arg @ref LL_EXTI_LINE_2 |
| 823 | * @arg @ref LL_EXTI_LINE_2 |
823 | * @arg @ref LL_EXTI_LINE_3 |
| 824 | * @arg @ref LL_EXTI_LINE_3 |
824 | * @arg @ref LL_EXTI_LINE_4 |
| 825 | * @arg @ref LL_EXTI_LINE_4 |
825 | * @arg @ref LL_EXTI_LINE_5 |
| 826 | * @arg @ref LL_EXTI_LINE_5 |
826 | * @arg @ref LL_EXTI_LINE_6 |
| 827 | * @arg @ref LL_EXTI_LINE_6 |
827 | * @arg @ref LL_EXTI_LINE_7 |
| 828 | * @arg @ref LL_EXTI_LINE_7 |
828 | * @arg @ref LL_EXTI_LINE_8 |
| 829 | * @arg @ref LL_EXTI_LINE_8 |
829 | * @arg @ref LL_EXTI_LINE_9 |
| 830 | * @arg @ref LL_EXTI_LINE_9 |
830 | * @arg @ref LL_EXTI_LINE_10 |
| 831 | * @arg @ref LL_EXTI_LINE_10 |
831 | * @arg @ref LL_EXTI_LINE_11 |
| 832 | * @arg @ref LL_EXTI_LINE_11 |
832 | * @arg @ref LL_EXTI_LINE_12 |
| 833 | * @arg @ref LL_EXTI_LINE_12 |
833 | * @arg @ref LL_EXTI_LINE_13 |
| 834 | * @arg @ref LL_EXTI_LINE_13 |
834 | * @arg @ref LL_EXTI_LINE_14 |
| 835 | * @arg @ref LL_EXTI_LINE_14 |
835 | * @arg @ref LL_EXTI_LINE_15 |
| 836 | * @arg @ref LL_EXTI_LINE_15 |
836 | * @arg @ref LL_EXTI_LINE_16 |
| 837 | * @arg @ref LL_EXTI_LINE_16 |
837 | * @arg @ref LL_EXTI_LINE_18 |
| 838 | * @arg @ref LL_EXTI_LINE_18 |
838 | * @arg @ref LL_EXTI_LINE_19 |
| 839 | * @arg @ref LL_EXTI_LINE_19 |
839 | * @note Please check each device line mapping for EXTI Line availability |
| 840 | * @note Please check each device line mapping for EXTI Line availability |
840 | * @retval None |
| 841 | * @retval None |
841 | */ |
| 842 | */ |
842 | __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) |
| 843 | __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine) |
843 | { |
| 844 | { |
844 | WRITE_REG(EXTI->PR, ExtiLine); |
| 845 | WRITE_REG(EXTI->PR, ExtiLine); |
845 | } |
| 846 | } |
846 | |
| 847 | 847 | ||
| 848 | 848 | /** |
|
| 849 | /** |
849 | * @} |
| 850 | * @} |
850 | */ |
| 851 | */ |
851 | |
| 852 | 852 | #if defined(USE_FULL_LL_DRIVER) |
|
| 853 | #if defined(USE_FULL_LL_DRIVER) |
853 | /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions |
| 854 | /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions |
854 | * @{ |
| 855 | * @{ |
855 | */ |
| 856 | */ |
856 | |
| 857 | 857 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
|
| 858 | uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
858 | uint32_t LL_EXTI_DeInit(void); |
| 859 | uint32_t LL_EXTI_DeInit(void); |
859 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
| 860 | void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); |
860 | |
| 861 | 861 | ||
| 862 | 862 | /** |
|
| 863 | /** |
863 | * @} |
| 864 | * @} |
864 | */ |
| 865 | */ |
865 | #endif /* USE_FULL_LL_DRIVER */ |
| 866 | #endif /* USE_FULL_LL_DRIVER */ |
866 | |
| 867 | 867 | /** |
|
| 868 | /** |
868 | * @} |
| 869 | * @} |
869 | */ |
| 870 | */ |
870 | |
| 871 | 871 | /** |
|
| 872 | /** |
872 | * @} |
| 873 | * @} |
873 | */ |
| 874 | */ |
874 | |
| 875 | 875 | #endif /* EXTI */ |
|
| 876 | #endif /* EXTI */ |
876 | |
| 877 | 877 | /** |
|
| 878 | /** |
878 | * @} |
| 879 | * @} |
879 | */ |
| 880 | */ |
880 | |
| 881 | 881 | #ifdef __cplusplus |
|
| 882 | #ifdef __cplusplus |
882 | } |
| 883 | } |
883 | #endif |
| 884 | #endif |
884 | |
| 885 | 885 | #endif /* STM32F1xx_LL_EXTI_H */ |
|
| 886 | #endif /* STM32F1xx_LL_EXTI_H */ |
886 | |
| 887 | - | ||
| 888 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
- | |