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4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @brief   Header file of SRAM HAL module.
 5 
  * @brief   Header file of SRAM HAL module.
6 
  ******************************************************************************
 6 
  ******************************************************************************
7 
  * @attention
 7 
  * @attention
8 
  *
 8 
  *
9 
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
 9 
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
- 
 
 10 
  * All rights reserved.</center></h2>
10 
  *
 11 
  *
11 
  * Redistribution and use in source and binary forms, with or without modification,
 12 
  * This software component is licensed by ST under BSD 3-Clause license,
12 
  * are permitted provided that the following conditions are met:
 13 
  * the "License"; You may not use this file except in compliance with the
13 
  *   1. Redistributions of source code must retain the above copyright notice,
 - 
 
14 
  *      this list of conditions and the following disclaimer.
 14 
  * License. You may obtain a copy of the License at:
15 
  *   2. Redistributions in binary form must reproduce the above copyright notice,
 - 
 
16 
  *      this list of conditions and the following disclaimer in the documentation
 - 
 
17 
  *      and/or other materials provided with the distribution.
 15 
  *                       opensource.org/licenses/BSD-3-Clause
18 
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
 - 
 
19 
  *      may be used to endorse or promote products derived from this software
 - 
 
20 
  *      without specific prior written permission.
 - 
 
21 
  *
 - 
 
22 
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 - 
 
23 
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 - 
 
24 
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 - 
 
25 
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 - 
 
26 
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 - 
 
27 
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 - 
 
28 
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 - 
 
29 
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 - 
 
30 
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 - 
 
31 
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 - 
 
32 
  *
 16 
  *
33 
  ******************************************************************************
 17 
  ******************************************************************************
34 
  */
 18 
  */
35 
 
 19 
 
36 
/* Define to prevent recursive inclusion -------------------------------------*/
 20 
/* Define to prevent recursive inclusion -------------------------------------*/
37 
#ifndef __STM32F1xx_HAL_SRAM_H
 21 
#ifndef STM32F1xx_HAL_SRAM_H
38 
#define __STM32F1xx_HAL_SRAM_H
 22 
#define STM32F1xx_HAL_SRAM_H
39 
 
 23 
 
40 
#ifdef __cplusplus
 24 
#ifdef __cplusplus
41 
 extern "C" {
 25 
extern "C" {
42 
#endif
 26 
#endif
43 
 
 27 
 
- 
 
 28 
#if defined FSMC_BANK1
- 
 
 29 
 
44 
/* Includes ------------------------------------------------------------------*/
 30 
/* Includes ------------------------------------------------------------------*/
45 
#include "stm32f1xx_ll_fsmc.h"
 31 
#include "stm32f1xx_ll_fsmc.h"
46 
 
 32 
 
47 
/** @addtogroup STM32F1xx_HAL_Driver
 33 
/** @addtogroup STM32F1xx_HAL_Driver
48 
  * @{
 34 
  * @{
49 
  */
 35 
  */
50 
 
 - 
 
51 
#if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
 - 
 
52 
 
 - 
 
53 
/** @addtogroup SRAM
 36 
/** @addtogroup SRAM
54 
  * @{
 37 
  * @{
55 
  */
 38 
  */
56 
 
 39 
 
57 
/* Exported typedef ----------------------------------------------------------*/
 40 
/* Exported typedef ----------------------------------------------------------*/
58 
 
 41 
 
59 
/** @defgroup SRAM_Exported_Types SRAM Exported Types
 42 
/** @defgroup SRAM_Exported_Types SRAM Exported Types
60 
  * @{
 43 
  * @{
61 
  */
 44 
  */
62 
/**
 45 
/**
63 
  * @brief  HAL SRAM State structures definition  
 46 
  * @brief  HAL SRAM State structures definition
64 
  */
 47 
  */
65 
typedef enum
 48 
typedef enum
66 
{
 49 
{
67 
  HAL_SRAM_STATE_RESET     = 0x00U,  /*!< SRAM not yet initialized or disabled           */
 50 
  HAL_SRAM_STATE_RESET     = 0x00U,  /*!< SRAM not yet initialized or disabled           */
68 
  HAL_SRAM_STATE_READY     = 0x01U,  /*!< SRAM initialized and ready for use             */
 51 
  HAL_SRAM_STATE_READY     = 0x01U,  /*!< SRAM initialized and ready for use             */
69 
  HAL_SRAM_STATE_BUSY      = 0x02U,  /*!< SRAM internal process is ongoing               */
 52 
  HAL_SRAM_STATE_BUSY      = 0x02U,  /*!< SRAM internal process is ongoing               */
70 
  HAL_SRAM_STATE_ERROR     = 0x03U,  /*!< SRAM error state                               */
 53 
  HAL_SRAM_STATE_ERROR     = 0x03U,  /*!< SRAM error state                               */
71 
  HAL_SRAM_STATE_PROTECTED = 0x04U   /*!< SRAM peripheral NORSRAM device write protected */
 54 
  HAL_SRAM_STATE_PROTECTED = 0x04U   /*!< SRAM peripheral NORSRAM device write protected */
72 
 
 - 
 
73 
}HAL_SRAM_StateTypeDef;
 - 
 
74 
 
 55 
 
- 
 
 56 
} HAL_SRAM_StateTypeDef;
- 
 
 57 
 
75 
/**
 58 
/**
76 
  * @brief  SRAM handle Structure definition  
 59 
  * @brief  SRAM handle Structure definition
77 
  */
 60 
  */
- 
 
 61 
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
- 
 
 62 
typedef struct __SRAM_HandleTypeDef
- 
 
 63 
#else
78 
typedef struct
 64 
typedef struct
- 
 
 65 
#endif /* USE_HAL_SRAM_REGISTER_CALLBACKS  */
79 
{
 66 
{
80 
  FSMC_NORSRAM_TypeDef           *Instance;  /*!< Register base address                        */
 67 
  FSMC_NORSRAM_TypeDef           *Instance;  /*!< Register base address                        */
81 
 
 68 
 
82 
  FSMC_NORSRAM_EXTENDED_TypeDef  *Extended;  /*!< Extended mode register base address          */
 69 
  FSMC_NORSRAM_EXTENDED_TypeDef  *Extended;  /*!< Extended mode register base address          */
83 
 
 70 
 
84 
  FSMC_NORSRAM_InitTypeDef       Init;       /*!< SRAM device control configuration parameters */
 71 
  FSMC_NORSRAM_InitTypeDef       Init;       /*!< SRAM device control configuration parameters */
85 
 
 72 
 
86 
  HAL_LockTypeDef               Lock;       /*!< SRAM locking object                          */
 73 
  HAL_LockTypeDef               Lock;       /*!< SRAM locking object                          */
87 
 
 74 
 
88 
  __IO HAL_SRAM_StateTypeDef    State;      /*!< SRAM device access state                     */
 75 
  __IO HAL_SRAM_StateTypeDef    State;      /*!< SRAM device access state                     */
89 
 
 76 
 
90 
  DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                          */
 77 
  DMA_HandleTypeDef             *hdma;      /*!< Pointer DMA handler                          */
91 
 
 78 
 
- 
 
 79 
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
- 
 
 80 
  void (* MspInitCallback)(struct __SRAM_HandleTypeDef *hsram);               /*!< SRAM Msp Init callback              */
- 
 
 81 
  void (* MspDeInitCallback)(struct __SRAM_HandleTypeDef *hsram);             /*!< SRAM Msp DeInit callback            */
- 
 
 82 
  void (* DmaXferCpltCallback)(DMA_HandleTypeDef *hdma);                      /*!< SRAM DMA Xfer Complete callback     */
- 
 
 83 
  void (* DmaXferErrorCallback)(DMA_HandleTypeDef *hdma);                     /*!< SRAM DMA Xfer Error callback        */
- 
 
 84 
#endif
92 
}SRAM_HandleTypeDef;
 85 
} SRAM_HandleTypeDef;
- 
 
 86 
 
- 
 
 87 
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
- 
 
 88 
/**
- 
 
 89 
  * @brief  HAL SRAM Callback ID enumeration definition
- 
 
 90 
  */
- 
 
 91 
typedef enum
- 
 
 92 
{
- 
 
 93 
  HAL_SRAM_MSP_INIT_CB_ID       = 0x00U,  /*!< SRAM MspInit Callback ID           */
- 
 
 94 
  HAL_SRAM_MSP_DEINIT_CB_ID     = 0x01U,  /*!< SRAM MspDeInit Callback ID         */
- 
 
 95 
  HAL_SRAM_DMA_XFER_CPLT_CB_ID  = 0x02U,  /*!< SRAM DMA Xfer Complete Callback ID */
- 
 
 96 
  HAL_SRAM_DMA_XFER_ERR_CB_ID   = 0x03U   /*!< SRAM DMA Xfer Complete Callback ID */
- 
 
 97 
} HAL_SRAM_CallbackIDTypeDef;
93 
 
 98 
 
94 
/**
 99 
/**
- 
 
 100 
  * @brief  HAL SRAM Callback pointer definition
- 
 
 101 
  */
- 
 
 102 
typedef void (*pSRAM_CallbackTypeDef)(SRAM_HandleTypeDef *hsram);
- 
 
 103 
typedef void (*pSRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma);
- 
 
 104 
#endif
- 
 
 105 
/**
95 
  * @}
 106 
  * @}
96 
  */
 107 
  */
97 
 
 108 
 
98 
/* Exported constants --------------------------------------------------------*/
 109 
/* Exported constants --------------------------------------------------------*/
99 
/* Exported macro ------------------------------------------------------------*/
 110 
/* Exported macro ------------------------------------------------------------*/
100 
 
 111 
 
101 
/** @defgroup SRAM_Exported_Macros SRAM Exported Macros
 112 
/** @defgroup SRAM_Exported_Macros SRAM Exported Macros
102 
  * @{
 113 
  * @{
103 
  */
 114 
  */
104 
 
 115 
 
105 
/** @brief Reset SRAM handle state
 116 
/** @brief Reset SRAM handle state
106 
  * @param  __HANDLE__: SRAM handle
 117 
  * @param  __HANDLE__ SRAM handle
107 
  * @retval None
 118 
  * @retval None
108 
  */
 119 
  */
- 
 
 120 
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
- 
 
 121 
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__)         do {                                             \
- 
 
 122 
                                                               (__HANDLE__)->State = HAL_SRAM_STATE_RESET; \
- 
 
 123 
                                                               (__HANDLE__)->MspInitCallback = NULL;       \
- 
 
 124 
                                                               (__HANDLE__)->MspDeInitCallback = NULL;     \
- 
 
 125 
                                                             } while(0)
- 
 
 126 
#else
109 
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
 127 
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
- 
 
 128 
#endif
110 
 
 129 
 
111 
/**
 130 
/**
112 
  * @}
 131 
  * @}
113 
  */
 132 
  */
114 
 
 133 
 
115 
/* Exported functions --------------------------------------------------------*/
 134 
/* Exported functions --------------------------------------------------------*/
- 
 
 135 
/** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
- 
 
 136 
  * @{
- 
 
 137 
  */
116 
 
 138 
 
117 
/** @addtogroup SRAM_Exported_Functions
 - 
 
118 
 *  @{
 - 
 
119 
 */
 - 
 
120 
 
 - 
 
121 
/** @addtogroup SRAM_Exported_Functions_Group1
 139 
/** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
122 
 *  @{
 140 
  * @{
123 
 */
 141 
  */
124 
 
 - 
 
125 
/* Initialization/de-initialization functions  **********************************/
 - 
 
126 
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
 - 
 
127 
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
 - 
 
128 
void              HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
 - 
 
129 
void              HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
 - 
 
130 
 
 142 
 
- 
 
 143 
/* Initialization/de-initialization functions  ********************************/
- 
 
 144 
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing,
- 
 
 145 
                                FSMC_NORSRAM_TimingTypeDef *ExtTiming);
131 
void              HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
 146 
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
- 
 
 147 
void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
132 
void              HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
 148 
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
133 
 
 149 
 
134 
/**
 150 
/**
135 
  * @}
 151 
  * @}
136 
  */
 152 
  */
137 
 
 153 
 
138 
/** @addtogroup SRAM_Exported_Functions_Group2
 154 
/** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
139 
 *  @{
 155 
  * @{
140 
 */
 156 
  */
141 
 
 157 
 
142 
/* I/O operation functions  *****************************************************/
 158 
/* I/O operation functions  ***************************************************/
143 
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
 159 
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer,
- 
 
 160 
                                   uint32_t BufferSize);
144 
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
 161 
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer,
- 
 
 162 
                                    uint32_t BufferSize);
145 
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
 163 
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer,
- 
 
 164 
                                    uint32_t BufferSize);
146 
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
 165 
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer,
- 
 
 166 
                                     uint32_t BufferSize);
147 
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 167 
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
- 
 
 168 
                                    uint32_t BufferSize);
148 
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
 169 
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
- 
 
 170 
                                     uint32_t BufferSize);
149 
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
 171 
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer,
- 
 
 172 
                                    uint32_t BufferSize);
150 
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
 173 
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer,
- 
 
 174 
                                     uint32_t BufferSize);
- 
 
 175 
 
- 
 
 176 
void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
- 
 
 177 
void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
- 
 
 178 
 
- 
 
 179 
#if (USE_HAL_SRAM_REGISTER_CALLBACKS == 1)
- 
 
 180 
/* SRAM callback registering/unregistering */
- 
 
 181 
HAL_StatusTypeDef HAL_SRAM_RegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId,
- 
 
 182 
                                            pSRAM_CallbackTypeDef pCallback);
- 
 
 183 
HAL_StatusTypeDef HAL_SRAM_UnRegisterCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId);
- 
 
 184 
HAL_StatusTypeDef HAL_SRAM_RegisterDmaCallback(SRAM_HandleTypeDef *hsram, HAL_SRAM_CallbackIDTypeDef CallbackId,
- 
 
 185 
                                               pSRAM_DmaCallbackTypeDef pCallback);
- 
 
 186 
#endif
151 
 
 187 
 
152 
/**
 188 
/**
153 
  * @}
 189 
  * @}
154 
  */
 190 
  */
155 
 
 191 
 
156 
/** @addtogroup SRAM_Exported_Functions_Group3
 192 
/** @addtogroup SRAM_Exported_Functions_Group3 Control functions
157 
 *  @{
 193 
  * @{
158 
 */
 194 
  */
159 
 
 195 
 
160 
/* SRAM Control functions  ******************************************************/
 196 
/* SRAM Control functions  ****************************************************/
161 
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
 197 
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
162 
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
 198 
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
163 
 
 199 
 
164 
/**
 200 
/**
165 
  * @}
 201 
  * @}
166 
  */
 202 
  */
- 
 
 203 
 
- 
 
 204 
/** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
- 
 
 205 
  * @{
- 
 
 206 
  */
167 
 
 207 
 
168 
/** @addtogroup SRAM_Exported_Functions_Group4
 - 
 
169 
 *  @{
 - 
 
170 
 */
 - 
 
171 
 
 - 
 
172 
/* SRAM State functions *********************************************************/
 208 
/* SRAM  State functions ******************************************************/
173 
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
 209 
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
174 
 
 210 
 
175 
/**
 211 
/**
176 
  * @}
 212 
  * @}
177 
  */
 213 
  */
178 
 
 214 
 
179 
/**
 215 
/**
180 
  * @}
 216 
  * @}
181 
  */
 217 
  */
182 
 
 218 
 
183 
/**
 219 
/**
184 
  * @}
 220 
  * @}
185 
  */
 221 
  */
186 
 
 - 
 
187 
#endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
 - 
 
188 
 
 222 
 
189 
/**
 223 
/**
190 
  * @}
 224 
  * @}
191 
  */
 225 
  */
- 
 
 226 
 
- 
 
 227 
#endif /* FSMC_BANK1 */
192 
 
 228 
 
193 
#ifdef __cplusplus
 229 
#ifdef __cplusplus
194 
}
 230 
}
195 
#endif
 231 
#endif
196 
 
 232 
 
197 
#endif /* __STM32F1xx_HAL_SRAM_H */
 233 
#endif /* STM32F1xx_HAL_SRAM_H */
198 
 
 234 
 
199 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 235 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/