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4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief Header file of SD HAL module. |
5 | * @brief Header file of SD HAL module. |
6 | ****************************************************************************** |
6 | ****************************************************************************** |
7 | * @attention |
7 | * @attention |
8 | * |
8 | * |
9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
9 | * <h2><center>© Copyright (c) 2018 STMicroelectronics. |
- | 10 | * All rights reserved.</center></h2> |
|
10 | * |
11 | * |
11 | * Redistribution and use in source and binary forms, with or without modification, |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * are permitted provided that the following conditions are met: |
13 | * the "License"; You may not use this file except in compliance with the |
13 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
14 | * this list of conditions and the following disclaimer. |
14 | * License. You may obtain a copy of the License at: |
15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
16 | * this list of conditions and the following disclaimer in the documentation |
- | |
17 | * and/or other materials provided with the distribution. |
15 | * opensource.org/licenses/BSD-3-Clause |
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
19 | * may be used to endorse or promote products derived from this software |
- | |
20 | * without specific prior written permission. |
- | |
21 | * |
- | |
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
32 | * |
16 | * |
33 | ****************************************************************************** |
17 | ****************************************************************************** |
34 | */ |
18 | */ |
35 | 19 | ||
36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
37 | #ifndef __STM32F1xx_HAL_SD_H |
21 | #ifndef STM32F1xx_HAL_SD_H |
38 | #define __STM32F1xx_HAL_SD_H |
22 | #define STM32F1xx_HAL_SD_H |
39 | - | ||
40 | #if defined(STM32F103xE) || defined(STM32F103xG) |
- | |
41 | 23 | ||
42 | #ifdef __cplusplus |
24 | #ifdef __cplusplus |
43 | extern "C" { |
25 | extern "C" { |
44 | #endif |
26 | #endif |
45 | 27 | ||
- | 28 | #if defined(SDIO) |
|
- | 29 | ||
46 | /* Includes ------------------------------------------------------------------*/ |
30 | /* Includes ------------------------------------------------------------------*/ |
47 | #include "stm32f1xx_ll_sdmmc.h" |
31 | #include "stm32f1xx_ll_sdmmc.h" |
48 | 32 | ||
49 | /** @addtogroup STM32F1xx_HAL_Driver |
33 | /** @addtogroup STM32F1xx_HAL_Driver |
50 | * @{ |
34 | * @{ |
Line 63... | Line 47... | ||
63 | /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure |
47 | /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure |
64 | * @{ |
48 | * @{ |
65 | */ |
49 | */ |
66 | typedef enum |
50 | typedef enum |
67 | { |
51 | { |
68 | HAL_SD_STATE_RESET = 0x00000000U, /*!< SD not yet initialized or disabled */ |
52 | HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */ |
69 | HAL_SD_STATE_READY = 0x00000001U, /*!< SD initialized and ready for use */ |
53 | HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */ |
70 | HAL_SD_STATE_TIMEOUT = 0x00000002U, /*!< SD Timeout state */ |
54 | HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */ |
71 | HAL_SD_STATE_BUSY = 0x00000003U, /*!< SD process ongoing */ |
55 | HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */ |
72 | HAL_SD_STATE_PROGRAMMING = 0x00000004U, /*!< SD Programming State */ |
56 | HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */ |
73 | HAL_SD_STATE_RECEIVING = 0x00000005U, /*!< SD Receinving State */ |
57 | HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */ |
74 | HAL_SD_STATE_TRANSFER = 0x00000006U, /*!< SD Transfert State */ |
58 | HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfert State */ |
75 | HAL_SD_STATE_ERROR = 0x0000000FU /*!< SD is in error state */ |
59 | HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */ |
76 | }HAL_SD_StateTypeDef; |
60 | }HAL_SD_StateTypeDef; |
77 | /** |
61 | /** |
78 | * @} |
62 | * @} |
79 | */ |
63 | */ |
80 | 64 | ||
81 | /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure |
65 | /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure |
82 | * @{ |
66 | * @{ |
83 | */ |
67 | */ |
84 | typedef enum |
68 | typedef uint32_t HAL_SD_CardStateTypeDef; |
85 | { |
69 | |
86 | HAL_SD_CARD_READY = 0x00000001U, /*!< Card state is ready */ |
70 | #define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */ |
87 | HAL_SD_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */ |
71 | #define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ |
88 | HAL_SD_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */ |
72 | #define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ |
89 | HAL_SD_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */ |
73 | #define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ |
90 | HAL_SD_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */ |
74 | #define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ |
91 | HAL_SD_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */ |
75 | #define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ |
92 | HAL_SD_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */ |
76 | #define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ |
93 | HAL_SD_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */ |
77 | #define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ |
94 | HAL_SD_CARD_ERROR = 0x000000FFU /*!< Card response Error */ |
78 | #define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */ |
95 | }HAL_SD_CardStateTypeDef; |
- | |
96 | /** |
79 | /** |
97 | * @} |
80 | * @} |
98 | */ |
81 | */ |
99 | 82 | ||
100 | /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition |
83 | /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition |
Line 127... | Line 110... | ||
127 | }HAL_SD_CardInfoTypeDef; |
110 | }HAL_SD_CardInfoTypeDef; |
128 | 111 | ||
129 | /** |
112 | /** |
130 | * @brief SD handle Structure definition |
113 | * @brief SD handle Structure definition |
131 | */ |
114 | */ |
- | 115 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
|
- | 116 | typedef struct __SD_HandleTypeDef |
|
- | 117 | #else |
|
132 | typedef struct |
118 | typedef struct |
- | 119 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
|
133 | { |
120 | { |
134 | SD_TypeDef *Instance; /*!< SD registers base address */ |
121 | SD_TypeDef *Instance; /*!< SD registers base address */ |
135 | 122 | ||
136 | SD_InitTypeDef Init; /*!< SD required parameters */ |
123 | SD_InitTypeDef Init; /*!< SD required parameters */ |
137 | 124 | ||
138 | HAL_LockTypeDef Lock; /*!< SD locking object */ |
125 | HAL_LockTypeDef Lock; /*!< SD locking object */ |
139 | 126 | ||
140 | uint32_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ |
127 | uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ |
141 | 128 | ||
142 | uint32_t TxXferSize; /*!< SD Tx Transfer size */ |
129 | uint32_t TxXferSize; /*!< SD Tx Transfer size */ |
143 | 130 | ||
144 | uint32_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ |
131 | uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ |
145 | 132 | ||
146 | uint32_t RxXferSize; /*!< SD Rx Transfer size */ |
133 | uint32_t RxXferSize; /*!< SD Rx Transfer size */ |
147 | 134 | ||
148 | __IO uint32_t Context; /*!< SD transfer context */ |
135 | __IO uint32_t Context; /*!< SD transfer context */ |
149 | 136 | ||
150 | __IO HAL_SD_StateTypeDef State; /*!< SD card State */ |
137 | __IO HAL_SD_StateTypeDef State; /*!< SD card State */ |
151 | 138 | ||
152 | __IO uint32_t ErrorCode; /*!< SD Card Error codes */ |
139 | __IO uint32_t ErrorCode; /*!< SD Card Error codes */ |
153 | 140 | ||
154 | DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ |
- | |
155 | - | ||
156 | DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ |
141 | DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ |
- | 142 | ||
- | 143 | DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ |
|
157 | 144 | ||
158 | HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ |
145 | HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ |
159 | 146 | ||
160 | uint32_t CSD[4]; /*!< SD card specific data table */ |
147 | uint32_t CSD[4]; /*!< SD card specific data table */ |
161 | 148 | ||
162 | uint32_t CID[4]; /*!< SD card identification number table */ |
149 | uint32_t CID[4]; /*!< SD card identification number table */ |
163 | 150 | ||
- | 151 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
|
- | 152 | void (* TxCpltCallback) (struct __SD_HandleTypeDef *hsd); |
|
- | 153 | void (* RxCpltCallback) (struct __SD_HandleTypeDef *hsd); |
|
- | 154 | void (* ErrorCallback) (struct __SD_HandleTypeDef *hsd); |
|
- | 155 | void (* AbortCpltCallback) (struct __SD_HandleTypeDef *hsd); |
|
- | 156 | ||
- | 157 | void (* MspInitCallback) (struct __SD_HandleTypeDef *hsd); |
|
- | 158 | void (* MspDeInitCallback) (struct __SD_HandleTypeDef *hsd); |
|
- | 159 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
|
164 | }SD_HandleTypeDef; |
160 | }SD_HandleTypeDef; |
165 | 161 | ||
166 | /** |
162 | /** |
167 | * @} |
163 | * @} |
168 | */ |
164 | */ |
Line 199... | Line 195... | ||
199 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
195 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
200 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
196 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
201 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
197 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
202 | __IO uint8_t Reserved3; /*!< Reserved */ |
198 | __IO uint8_t Reserved3; /*!< Reserved */ |
203 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
199 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
204 | __IO uint8_t FileFormatGrouop; /*!< File format group */ |
200 | __IO uint8_t FileFormatGroup; /*!< File format group */ |
205 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
201 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
206 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
202 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
207 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
203 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
208 | __IO uint8_t FileFormat; /*!< File format */ |
204 | __IO uint8_t FileFormat; /*!< File format */ |
209 | __IO uint8_t ECC; /*!< ECC code */ |
205 | __IO uint8_t ECC; /*!< ECC code */ |
210 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
206 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
211 | __IO uint8_t Reserved4; /*!< Always 1 */ |
207 | __IO uint8_t Reserved4; /*!< Always 1 */ |
212 | - | ||
213 | }HAL_SD_CardCSDTypeDef; |
208 | }HAL_SD_CardCSDTypeDef; |
214 | /** |
209 | /** |
215 | * @} |
210 | * @} |
216 | */ |
211 | */ |
217 | 212 | ||
Line 255... | Line 250... | ||
255 | }HAL_SD_CardStatusTypeDef; |
250 | }HAL_SD_CardStatusTypeDef; |
256 | /** |
251 | /** |
257 | * @} |
252 | * @} |
258 | */ |
253 | */ |
259 | 254 | ||
- | 255 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
|
- | 256 | /** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition |
|
- | 257 | * @{ |
|
- | 258 | */ |
|
- | 259 | typedef enum |
|
- | 260 | { |
|
- | 261 | HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */ |
|
- | 262 | HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */ |
|
- | 263 | HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */ |
|
- | 264 | HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */ |
|
- | 265 | ||
- | 266 | HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */ |
|
- | 267 | HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */ |
|
- | 268 | }HAL_SD_CallbackIDTypeDef; |
|
- | 269 | /** |
|
- | 270 | * @} |
|
- | 271 | */ |
|
- | 272 | ||
- | 273 | /** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition |
|
- | 274 | * @{ |
|
- | 275 | */ |
|
- | 276 | typedef void (*pSD_CallbackTypeDef) (SD_HandleTypeDef *hsd); |
|
- | 277 | /** |
|
- | 278 | * @} |
|
- | 279 | */ |
|
- | 280 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
|
260 | /** |
281 | /** |
261 | * @} |
282 | * @} |
262 | */ |
283 | */ |
263 | 284 | ||
264 | /* Exported constants --------------------------------------------------------*/ |
285 | /* Exported constants --------------------------------------------------------*/ |
265 | /** @defgroup SD_Exported_Constants Exported Constants |
286 | /** @defgroup SD_Exported_Constants Exported Constants |
266 | * @{ |
287 | * @{ |
267 | */ |
288 | */ |
268 | 289 | ||
269 | #define BLOCKSIZE 512U /*!< Block size is 512 bytes */ |
290 | #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ |
270 | 291 | ||
271 | /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition |
292 | /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition |
272 | * @{ |
293 | * @{ |
273 | */ |
294 | */ |
274 | #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
295 | #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
Line 306... | Line 327... | ||
306 | #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
327 | #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
307 | #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
328 | #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
308 | #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
329 | #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
309 | #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
330 | #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
310 | 331 | ||
- | 332 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
|
- | 333 | #define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ |
|
- | 334 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
|
311 | /** |
335 | /** |
312 | * @} |
336 | * @} |
313 | */ |
337 | */ |
314 | 338 | ||
315 | /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration |
339 | /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration |
316 | * @{ |
340 | * @{ |
317 | */ |
341 | */ |
318 | #define SD_CONTEXT_NONE 0x00000000U /*!< None */ |
342 | #define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ |
319 | #define SD_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ |
343 | #define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ |
320 | #define SD_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ |
344 | #define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ |
321 | #define SD_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ |
345 | #define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ |
322 | #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ |
346 | #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ |
323 | #define SD_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ |
347 | #define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ |
324 | #define SD_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ |
348 | #define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ |
325 | 349 | ||
326 | /** |
350 | /** |
327 | * @} |
351 | * @} |
328 | */ |
352 | */ |
329 | 353 | ||
330 | /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards |
354 | /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards |
331 | * @{ |
355 | * @{ |
332 | */ |
356 | */ |
333 | #define CARD_SDSC 0x00000000U |
357 | #define CARD_SDSC ((uint32_t)0x00000000U) /*!< SD Standard Capacity <2Go */ |
334 | #define CARD_SDHC_SDXC 0x00000001U |
358 | #define CARD_SDHC_SDXC ((uint32_t)0x00000001U) /*!< SD High Capacity <32Go, SD Extended Capacity <2To */ |
335 | #define CARD_SECURED 0x00000003U |
359 | #define CARD_SECURED ((uint32_t)0x00000003U) |
336 | 360 | ||
337 | /** |
361 | /** |
338 | * @} |
362 | * @} |
339 | */ |
363 | */ |
340 | 364 | ||
341 | /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version |
365 | /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version |
342 | * @{ |
366 | * @{ |
343 | */ |
367 | */ |
344 | #define CARD_V1_X 0x00000000U |
368 | #define CARD_V1_X ((uint32_t)0x00000000U) |
345 | #define CARD_V2_X 0x00000001U |
369 | #define CARD_V2_X ((uint32_t)0x00000001U) |
346 | /** |
370 | /** |
347 | * @} |
371 | * @} |
348 | */ |
372 | */ |
349 | 373 | ||
350 | /** |
374 | /** |
Line 354... | Line 378... | ||
354 | /* Exported macro ------------------------------------------------------------*/ |
378 | /* Exported macro ------------------------------------------------------------*/ |
355 | /** @defgroup SD_Exported_macros SD Exported Macros |
379 | /** @defgroup SD_Exported_macros SD Exported Macros |
356 | * @brief macros to handle interrupts and specific clock configurations |
380 | * @brief macros to handle interrupts and specific clock configurations |
357 | * @{ |
381 | * @{ |
358 | */ |
382 | */ |
- | 383 | /** @brief Reset SD handle state. |
|
- | 384 | * @param __HANDLE__ : SD handle. |
|
- | 385 | * @retval None |
|
- | 386 | */ |
|
- | 387 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
|
- | 388 | #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \ |
|
- | 389 | (__HANDLE__)->State = HAL_SD_STATE_RESET; \ |
|
- | 390 | (__HANDLE__)->MspInitCallback = NULL; \ |
|
- | 391 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
|
- | 392 | } while(0) |
|
- | 393 | #else |
|
- | 394 | #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET) |
|
- | 395 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
|
359 | 396 | ||
360 | /** |
397 | /** |
361 | * @brief Enable the SD device. |
398 | * @brief Enable the SD device. |
362 | * @retval None |
399 | * @retval None |
363 | */ |
400 | */ |
Line 392... | Line 429... | ||
392 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
429 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
393 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
430 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
394 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
431 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
395 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
432 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
396 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
433 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
397 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
434 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
398 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
435 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
399 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
436 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
400 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
437 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
401 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
438 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
402 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
439 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
Line 405... | Line 442... | ||
405 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
442 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
406 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
443 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
407 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
444 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
408 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
445 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
409 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
446 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
410 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
447 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
411 | * @retval None |
448 | * @retval None |
412 | */ |
449 | */ |
413 | #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
450 | #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
414 | 451 | ||
415 | /** |
452 | /** |
Line 423... | Line 460... | ||
423 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
460 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
424 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
461 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
425 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
462 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
426 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
463 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
427 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
464 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
428 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
465 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
429 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
466 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
430 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
467 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
431 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
468 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
432 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
469 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
433 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
470 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
Line 436... | Line 473... | ||
436 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
473 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
437 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
474 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
438 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
475 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
439 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
476 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
440 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
477 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
441 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
478 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
442 | * @retval None |
479 | * @retval None |
443 | */ |
480 | */ |
444 | #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
481 | #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
445 | 482 | ||
446 | /** |
483 | /** |
Line 454... | Line 491... | ||
454 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
491 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
455 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
492 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
456 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
493 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
457 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
494 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
458 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
495 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
459 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
496 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
460 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
497 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
461 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
498 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
462 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
499 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
463 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
500 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
464 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
501 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
Line 467... | Line 504... | ||
467 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
504 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
468 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
505 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
469 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
506 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
470 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
507 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
471 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
508 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
472 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
509 | * @arg SDIO_FLAG_SDIOIT: SDIO interrupt received |
473 | * @retval The new state of SD FLAG (SET or RESET). |
510 | * @retval The new state of SD FLAG (SET or RESET). |
474 | */ |
511 | */ |
475 | #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
512 | #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
476 | 513 | ||
477 | /** |
514 | /** |
Line 485... | Line 522... | ||
485 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
522 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
486 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
523 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
487 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
524 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
488 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
525 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
489 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
526 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
490 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
527 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
491 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
528 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
492 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
529 | * @arg SDIO_FLAG_SDIOIT: SDIO interrupt received |
493 | * @retval None |
530 | * @retval None |
494 | */ |
531 | */ |
495 | #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
532 | #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
496 | 533 | ||
497 | /** |
534 | /** |
Line 505... | Line 542... | ||
505 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
542 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
506 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
543 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
507 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
544 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
508 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
545 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
509 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
546 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
510 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
547 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
511 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
548 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
512 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
549 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
513 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
550 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
514 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
551 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
515 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
552 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
Line 518... | Line 555... | ||
518 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
555 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
519 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
556 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
520 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
557 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
521 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
558 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
522 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
559 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
523 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
560 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
524 | * @retval The new state of SD IT (SET or RESET). |
561 | * @retval The new state of SD IT (SET or RESET). |
525 | */ |
562 | */ |
526 | #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
563 | #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
527 | 564 | ||
528 | /** |
565 | /** |
Line 536... | Line 573... | ||
536 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
573 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
537 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
574 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
538 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
575 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
539 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
576 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
540 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
577 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
541 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt |
578 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
542 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
579 | * @arg SDIO_IT_SDIOIT: SDIO interrupt received interrupt |
543 | * @retval None |
580 | * @retval None |
544 | */ |
581 | */ |
545 | #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
582 | #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
546 | 583 | ||
547 | /** |
584 | /** |
Line 584... | Line 621... | ||
584 | /* Callback in non blocking modes (DMA) */ |
621 | /* Callback in non blocking modes (DMA) */ |
585 | void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd); |
622 | void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd); |
586 | void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd); |
623 | void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd); |
587 | void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd); |
624 | void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd); |
588 | void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd); |
625 | void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd); |
- | 626 | ||
- | 627 | #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) |
|
- | 628 | /* SD callback registering/unregistering */ |
|
- | 629 | HAL_StatusTypeDef HAL_SD_RegisterCallback (SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackId, pSD_CallbackTypeDef pCallback); |
|
- | 630 | HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackId); |
|
- | 631 | #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ |
|
- | 632 | ||
589 | /** |
633 | /** |
590 | * @} |
634 | * @} |
591 | */ |
635 | */ |
592 | 636 | ||
593 | /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions |
637 | /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions |
594 | * @{ |
638 | * @{ |
595 | */ |
639 | */ |
596 | HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); |
640 | HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); |
- | 641 | HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode); |
|
597 | /** |
642 | /** |
598 | * @} |
643 | * @} |
599 | */ |
644 | */ |
600 | 645 | ||
601 | /** @defgroup SD_Exported_Functions_Group4 SD card related functions |
646 | /** @defgroup SD_Exported_Functions_Group4 SD card related functions |
Line 702... | Line 747... | ||
702 | */ |
747 | */ |
703 | 748 | ||
704 | /** |
749 | /** |
705 | * @} |
750 | * @} |
706 | */ |
751 | */ |
- | 752 | ||
- | 753 | #endif /* SDIO */ |
|
- | 754 | ||
707 | #ifdef __cplusplus |
755 | #ifdef __cplusplus |
708 | } |
756 | } |
709 | #endif |
757 | #endif |
710 | 758 | ||
711 | #endif /* STM32F103xE || STM32F103xG */ |
- | |
712 | 759 | ||
713 | #endif /* __STM32F1xx_HAL_SD_H */ |
760 | #endif /* STM32F1xx_HAL_SD_H */ |
714 | 761 | ||
715 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
762 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |