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/**
 1 
/**
2 
  ******************************************************************************
 2 
  ******************************************************************************
3 
  * @file    stm32f1xx_hal_pcd.h
 3 
  * @file    stm32f1xx_hal_pcd.h
4 
  * @author  MCD Application Team
 4 
  * @author  MCD Application Team
5 
  * @brief   Header file of PCD HAL module.
 5 
  * @brief   Header file of PCD HAL module.
6 
  ******************************************************************************
 6 
  ******************************************************************************
7 
  * @attention
 7 
  * @attention
8 
  *
 8 
  *
9 
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
 9 
  * Copyright (c) 2016 STMicroelectronics.
10 
  * All rights reserved.</center></h2>
 10 
  * All rights reserved.
11 
  *
 11 
  *
12 
  * This software component is licensed by ST under BSD 3-Clause license,
 12 
  * This software is licensed under terms that can be found in the LICENSE file
13 
  * the "License"; You may not use this file except in compliance with the
 13 
  * in the root directory of this software component.
14 
  * License. You may obtain a copy of the License at:
 14 
  * If no LICENSE file comes with this software, it is provided AS-IS.
15 
  *                        opensource.org/licenses/BSD-3-Clause
 15 
  *
16 
  *
 16 
  ******************************************************************************
17 
  ******************************************************************************
 17 
  */
18 
  */
 18 
 
19 
 
 19 
/* Define to prevent recursive inclusion -------------------------------------*/
20 
/* Define to prevent recursive inclusion -------------------------------------*/
 20 
#ifndef STM32F1xx_HAL_PCD_H
21 
#ifndef STM32F1xx_HAL_PCD_H
 21 
#define STM32F1xx_HAL_PCD_H
22 
#define STM32F1xx_HAL_PCD_H
 22 
 
23 
 
 23 
#ifdef __cplusplus
24 
#ifdef __cplusplus
 24 
extern "C" {
25 
extern "C" {
 25 
#endif
26 
#endif
 26 
 
27 
 
 27 
/* Includes ------------------------------------------------------------------*/
28 
/* Includes ------------------------------------------------------------------*/
 28 
#include "stm32f1xx_ll_usb.h"
29 
#include "stm32f1xx_ll_usb.h"
 29 
 
30 
 
 30 
#if defined (USB) || defined (USB_OTG_FS)
31 
#if defined (USB) || defined (USB_OTG_FS)
 31 
 
32 
 
 32 
/** @addtogroup STM32F1xx_HAL_Driver
33 
/** @addtogroup STM32F1xx_HAL_Driver
 33 
  * @{
34 
  * @{
 34 
  */
35 
  */
 35 
 
36 
 
 36 
/** @addtogroup PCD
37 
/** @addtogroup PCD
 37 
  * @{
38 
  * @{
 38 
  */
39 
  */
 39 
 
40 
 
 40 
/* Exported types ------------------------------------------------------------*/
41 
/* Exported types ------------------------------------------------------------*/
 41 
/** @defgroup PCD_Exported_Types PCD Exported Types
42 
/** @defgroup PCD_Exported_Types PCD Exported Types
 42 
  * @{
43 
  * @{
 43 
  */
44 
  */
 44 
 
45 
 
 45 
/**
46 
/**
 46 
  * @brief  PCD State structure definition
47 
  * @brief  PCD State structure definition
 47 
  */
48 
  */
 48 
typedef enum
49 
typedef enum
 49 
{
50 
{
 50 
  HAL_PCD_STATE_RESET   = 0x00,
51 
  HAL_PCD_STATE_RESET   = 0x00,
 51 
  HAL_PCD_STATE_READY   = 0x01,
52 
  HAL_PCD_STATE_READY   = 0x01,
 52 
  HAL_PCD_STATE_ERROR   = 0x02,
53 
  HAL_PCD_STATE_ERROR   = 0x02,
 53 
  HAL_PCD_STATE_BUSY    = 0x03,
54 
  HAL_PCD_STATE_BUSY    = 0x03,
 54 
  HAL_PCD_STATE_TIMEOUT = 0x04
55 
  HAL_PCD_STATE_TIMEOUT = 0x04
 55 
} PCD_StateTypeDef;
56 
} PCD_StateTypeDef;
 56 
 
57 
 
 57 
/* Device LPM suspend state */
58 
/* Device LPM suspend state */
 58 
typedef enum
59 
typedef enum
 59 
{
60 
{
 60 
  LPM_L0 = 0x00, /* on */
61 
  LPM_L0 = 0x00, /* on */
 61 
  LPM_L1 = 0x01, /* LPM L1 sleep */
62 
  LPM_L1 = 0x01, /* LPM L1 sleep */
 62 
  LPM_L2 = 0x02, /* suspend */
63 
  LPM_L2 = 0x02, /* suspend */
 63 
  LPM_L3 = 0x03, /* off */
64 
  LPM_L3 = 0x03, /* off */
 64 
} PCD_LPM_StateTypeDef;
65 
} PCD_LPM_StateTypeDef;
 65 
 
66 
 
 66 
typedef enum
67 
typedef enum
 67 
{
68 
{
 68 
  PCD_LPM_L0_ACTIVE = 0x00, /* on */
69 
  PCD_LPM_L0_ACTIVE = 0x00, /* on */
 69 
  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70 
  PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
 70 
} PCD_LPM_MsgTypeDef;
71 
} PCD_LPM_MsgTypeDef;
 71 
 
72 
 
 72 
typedef enum
73 
typedef enum
 73 
{
74 
{
 74 
  PCD_BCD_ERROR                     = 0xFF,
75 
  PCD_BCD_ERROR                     = 0xFF,
 75 
  PCD_BCD_CONTACT_DETECTION         = 0xFE,
76 
  PCD_BCD_CONTACT_DETECTION         = 0xFE,
 76 
  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
77 
  PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
 77 
  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
78 
  PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
 78 
  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
79 
  PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
 79 
  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
80 
  PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
 80 
 
81 
 
 81 
} PCD_BCD_MsgTypeDef;
82 
} PCD_BCD_MsgTypeDef;
 82 
 
83 
 
 83 
#if defined (USB)
84 
#if defined (USB)
 84 
 
85 
 
 85 
#endif /* defined (USB) */
86 
#endif /* defined (USB) */
 86 
#if defined (USB_OTG_FS)
87 
#if defined (USB_OTG_FS)
 87 
typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
88 
typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
 88 
typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
89 
typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
 89 
typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
90 
typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
 90 
#endif /* defined (USB_OTG_FS) */
91 
#endif /* defined (USB_OTG_FS) */
 91 
#if defined (USB)
92 
#if defined (USB)
 92 
typedef USB_TypeDef        PCD_TypeDef;
93 
typedef USB_TypeDef        PCD_TypeDef;
 93 
typedef USB_CfgTypeDef     PCD_InitTypeDef;
94 
typedef USB_CfgTypeDef     PCD_InitTypeDef;
 94 
typedef USB_EPTypeDef      PCD_EPTypeDef;
95 
typedef USB_EPTypeDef      PCD_EPTypeDef;
 95 
#endif /* defined (USB) */
96 
#endif /* defined (USB) */
 96 
 
97 
 
 97 
/**
98 
/**
 98 
  * @brief  PCD Handle Structure definition
99 
  * @brief  PCD Handle Structure definition
 99 
  */
100 
  */
 100 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
101 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
 101 
typedef struct __PCD_HandleTypeDef
102 
typedef struct __PCD_HandleTypeDef
 102 
#else
103 
#else
 103 
typedef struct
104 
typedef struct
 104 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
105 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
 105 
{
106 
{
 106 
  PCD_TypeDef             *Instance;   /*!< Register base address             */
107 
  PCD_TypeDef             *Instance;   /*!< Register base address             */
 107 
  PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
108 
  PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
 108 
  __IO uint8_t            USB_Address; /*!< USB Address                       */
109 
  __IO uint8_t            USB_Address; /*!< USB Address                       */
 109 
#if defined (USB_OTG_FS)
110 
#if defined (USB_OTG_FS)
 110 
  PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters            */
111 
  PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters            */
 111 
  PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters           */
112 
  PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters           */
 112 
#endif /* defined (USB_OTG_FS) */
113 
#endif /* defined (USB_OTG_FS) */
 113 
#if defined (USB)
114 
#if defined (USB)
 114 
  PCD_EPTypeDef           IN_ep[8];    /*!< IN endpoint parameters            */
115 
  PCD_EPTypeDef           IN_ep[8];   /*!< IN endpoint parameters             */
 115 
  PCD_EPTypeDef           OUT_ep[8];   /*!< OUT endpoint parameters           */
116 
  PCD_EPTypeDef           OUT_ep[8];  /*!< OUT endpoint parameters            */
 116 
#endif /* defined (USB) */
117 
#endif /* defined (USB) */
 117 
  HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
118 
  HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
 118 
  __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
119 
  __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
 119 
  __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
120 
  __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
 120 
  uint32_t                Setup[12];   /*!< Setup packet buffer               */
121 
  uint32_t                Setup[12];   /*!< Setup packet buffer               */
 121 
  PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
122 
  PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
 122 
  uint32_t                BESL;
123 
  uint32_t                BESL;
 123 
  uint32_t                FrameNumber; /*!< Store Current Frame number        */
124 
 
 124 
 
125 
  void                    *pData;      /*!< Pointer to upper stack Handler */
 125 
  void                    *pData;      /*!< Pointer to upper stack Handler */
126 
 
 126 
 
127 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
 127 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
128 
  void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
 128 
  void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
129 
  void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
 129 
  void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
130 
  void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
 130 
  void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
131 
  void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
 131 
  void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
132 
  void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
 132 
  void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
133 
  void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
 133 
  void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
134 
  void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
 134 
  void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
135 
 
 135 
 
136 
  void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
 136 
  void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
137 
  void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
 137 
  void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
138 
  void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
 138 
  void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
139 
  void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
 139 
  void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
140 
 
 140 
 
141 
  void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
 141 
  void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
142 
  void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
 142 
  void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
143 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
 143 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
144 
} PCD_HandleTypeDef;
 144 
} PCD_HandleTypeDef;
145 
 
 145 
 
146 
/**
 146 
/**
147 
  * @}
 147 
  * @}
148 
  */
 148 
  */
149 
 
 149 
 
150 
/* Include PCD HAL Extended module */
 150 
/* Include PCD HAL Extended module */
151 
#include "stm32f1xx_hal_pcd_ex.h"
 151 
#include "stm32f1xx_hal_pcd_ex.h"
152 
 
 152 
 
153 
/* Exported constants --------------------------------------------------------*/
 153 
/* Exported constants --------------------------------------------------------*/
154 
/** @defgroup PCD_Exported_Constants PCD Exported Constants
 154 
/** @defgroup PCD_Exported_Constants PCD Exported Constants
155 
  * @{
 155 
  * @{
156 
  */
 156 
  */
157 
 
 157 
 
158 
/** @defgroup PCD_Speed PCD Speed
 158 
/** @defgroup PCD_Speed PCD Speed
159 
  * @{
 159 
  * @{
160 
  */
 160 
  */
161 
#define PCD_SPEED_FULL               USBD_FS_SPEED
 161 
#define PCD_SPEED_FULL               USBD_FS_SPEED
162 
/**
 162 
/**
163 
  * @}
 163 
  * @}
164 
  */
 164 
  */
165 
 
 165 
 
166 
/** @defgroup PCD_PHY_Module PCD PHY Module
 166 
/** @defgroup PCD_PHY_Module PCD PHY Module
167 
  * @{
 167 
  * @{
168 
  */
 168 
  */
169 
#define PCD_PHY_ULPI                 1U
 169 
#define PCD_PHY_ULPI                 1U
170 
#define PCD_PHY_EMBEDDED             2U
 170 
#define PCD_PHY_EMBEDDED             2U
171 
#define PCD_PHY_UTMI                 3U
 171 
#define PCD_PHY_UTMI                 3U
172 
/**
 172 
/**
173 
  * @}
 173 
  * @}
174 
  */
 174 
  */
175 
 
 175 
 
176 
/** @defgroup PCD_Error_Code_definition PCD Error Code definition
 176 
/** @defgroup PCD_Error_Code_definition PCD Error Code definition
177 
  * @brief  PCD Error Code definition
 177 
  * @brief  PCD Error Code definition
178 
  * @{
 178 
  * @{
179 
  */
 179 
  */
180 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
 180 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
181 
#define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
 181 
#define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
182 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
 182 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
183 
 
 183 
 
184 
/**
 184 
/**
185 
  * @}
 185 
  * @}
186 
  */
 186 
  */
187 
 
 187 
 
188 
/**
 188 
/**
189 
  * @}
 189 
  * @}
190 
  */
 190 
  */
191 
 
 191 
 
192 
/* Exported macros -----------------------------------------------------------*/
 192 
/* Exported macros -----------------------------------------------------------*/
193 
/** @defgroup PCD_Exported_Macros PCD Exported Macros
 193 
/** @defgroup PCD_Exported_Macros PCD Exported Macros
194 
  *  @brief macros to handle interrupts and specific clock configurations
 194 
  *  @brief macros to handle interrupts and specific clock configurations
195 
  * @{
 195 
  * @{
196 
  */
 196 
  */
197 
#if defined (USB_OTG_FS)
 197 
#define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
198 
#define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
 198 
#define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
199 
#define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
 199 
 
200 
 
 200 
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
201 
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
 201 
  ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
202 
  ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
 202 
 
203 
 
 203 
#if defined (USB_OTG_FS)
204 
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &=  (__INTERRUPT__))
 204 
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
205 
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
 205 
#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
206 
 
 206 
 
207 
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
 207 
#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
208 
  *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
 208 
  *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
209 
 
 209 
 
210 
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
 210 
#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
211 
  *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
 211 
  *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
212 
 
 212 
 
213 
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
 213 
#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
214 
  ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
 214 
  ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
215 
 
 215 
 
216 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
 216 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT()    EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
217 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
 217 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT()   EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
218 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
 218 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG()     EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
219 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
 219 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG()   EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
220 
 
 220 
 
221 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
 221 
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
222 
  do { \
 222 
  do { \
223 
    EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
 223 
    EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
224 
    EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
 224 
    EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
225 
  } while(0U)
 225 
  } while(0U)
226 
#endif /* defined (USB_OTG_FS) */
 226 
#endif /* defined (USB_OTG_FS) */
227 
 
 227 
 
228 
#if defined (USB)
 228 
#if defined (USB)
229 
#define __HAL_PCD_ENABLE(__HANDLE__)                                  (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
 229 
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)           (((__HANDLE__)->Instance->ISTR)\
230 
#define __HAL_PCD_DISABLE(__HANDLE__)                                 (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
 230 
                                                                   &= (uint16_t)(~(__INTERRUPT__)))
231 
#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)                 ((USB_ReadInterrupts((__HANDLE__)->Instance)\
 231 
 
232 
                                                                        & (__INTERRUPT__)) == (__INTERRUPT__))
 232 
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                         EXTI->IMR |= USB_WAKEUP_EXTI_LINE
233 
 
 233 
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                        EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
234 
#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)               (((__HANDLE__)->Instance->ISTR)\
 234 
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                          EXTI->PR & (USB_WAKEUP_EXTI_LINE)
235 
                                                                       &= (uint16_t)(~(__INTERRUPT__)))
 235 
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                        EXTI->PR = USB_WAKEUP_EXTI_LINE
236 
 
 236 
 
237 
#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                             EXTI->IMR |= USB_WAKEUP_EXTI_LINE
 237 
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
238 
#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                            EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
 238 
  do { \
239 
#define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                              EXTI->PR & (USB_WAKEUP_EXTI_LINE)
 239 
    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
240 
#define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                            EXTI->PR = USB_WAKEUP_EXTI_LINE
 240 
    EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
241 
 
 241 
  } while(0U)
242 
#define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
 242 
 
243 
  do { \
 243 
#endif /* defined (USB) */
244 
    EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
 244 
 
245 
    EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
 245 
/**
246 
  } while(0U)
 246 
  * @}
247 
 
 247 
  */
248 
#endif /* defined (USB) */
 248 
 
249 
 
 249 
/* Exported functions --------------------------------------------------------*/
250 
/**
 250 
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
251 
  * @}
 251 
  * @{
252 
  */
 252 
  */
253 
 
 253 
 
254 
/* Exported functions --------------------------------------------------------*/
 254 
/* Initialization/de-initialization functions  ********************************/
255 
/** @addtogroup PCD_Exported_Functions PCD Exported Functions
 255 
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
256 
  * @{
 256 
  * @{
257 
  */
 257 
  */
258 
 
 258 
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
259 
/* Initialization/de-initialization functions  ********************************/
 259 
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
260 
/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
 260 
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
261 
  * @{
 261 
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
262 
  */
 262 
 
263 
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
 263 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
264 
HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
 264 
/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
265 
void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
 265 
  * @brief  HAL USB OTG PCD Callback ID enumeration definition
266 
void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
 266 
  * @{
267 
 
 267 
  */
268 
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
 268 
typedef enum
269 
/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
 269 
{
270 
  * @brief  HAL USB OTG PCD Callback ID enumeration definition
 270 
  HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
271 
  * @{
 271 
  HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
272 
  */
 272 
  HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
273 
typedef enum
 273 
  HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
274 
{
 274 
  HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
275 
  HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
 275 
  HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
276 
  HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
 276 
  HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
277 
  HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
 277 
 
278 
  HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
 278 
  HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
279 
  HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
 279 
  HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
280 
  HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
 280 
 
281 
  HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
 281 
} HAL_PCD_CallbackIDTypeDef;
282 
 
 282 
/**
283 
  HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
 283 
  * @}
284 
  HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
 284 
  */
285 
 
 285 
 
286 
} HAL_PCD_CallbackIDTypeDef;
 286 
/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
287 
/**
 287 
  * @brief  HAL USB OTG PCD Callback pointer definition
288 
  * @}
 288 
  * @{
289 
  */
 289 
  */
290 
 
 290 
 
291 
/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
 291 
typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
292 
  * @brief  HAL USB OTG PCD Callback pointer definition
 292 
typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
293 
  * @{
 293 
typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
294 
  */
 294 
typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
295 
 
 295 
typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
296 
typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
 296 
 
297 
typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
 297 
/**
298 
typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
 298 
  * @}
299 
typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
 299 
  */
300 
typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
 300 
 
301 
 
 301 
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
302 
/**
 302 
                                           pPCD_CallbackTypeDef pCallback);
303 
  * @}
 303 
 
304 
  */
 304 
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
305 
 
 305 
 
306 
HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd,
 306 
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
307 
                                           HAL_PCD_CallbackIDTypeDef CallbackID,
 307 
                                                       pPCD_DataOutStageCallbackTypeDef pCallback);
308 
                                           pPCD_CallbackTypeDef pCallback);
 308 
 
309 
 
 309 
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
310 
HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd,
 310 
 
311 
                                             HAL_PCD_CallbackIDTypeDef CallbackID);
 311 
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
312 
 
 312 
                                                      pPCD_DataInStageCallbackTypeDef pCallback);
313 
HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
 313 
 
314 
                                                       pPCD_DataOutStageCallbackTypeDef pCallback);
 314 
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
315 
 
 315 
 
316 
HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
 316 
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
317 
 
 317 
                                                       pPCD_IsoOutIncpltCallbackTypeDef pCallback);
318 
HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
 318 
 
319 
                                                      pPCD_DataInStageCallbackTypeDef pCallback);
 319 
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
320 
 
 320 
 
321 
HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
 321 
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
322 
 
 322 
                                                      pPCD_IsoInIncpltCallbackTypeDef pCallback);
323 
HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
 323 
 
324 
                                                       pPCD_IsoOutIncpltCallbackTypeDef pCallback);
 324 
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
325 
 
 325 
 
326 
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
 326 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
327 
 
 327 
/**
328 
HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
 328 
  * @}
329 
                                                      pPCD_IsoInIncpltCallbackTypeDef pCallback);
 329 
  */
330 
 
 330 
 
331 
HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
 331 
/* I/O operation functions  ***************************************************/
332 
 
 332 
/* Non-Blocking mode: Interrupt */
333 
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
 333 
/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
334 
/**
 334 
  * @{
335 
  * @}
 335 
  */
336 
  */
 336 
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
337 
 
 337 
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
338 
/* I/O operation functions  ***************************************************/
 338 
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
339 
/* Non-Blocking mode: Interrupt */
 339 
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
340 
/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
 340 
 
341 
  * @{
 341 
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
342 
  */
 342 
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
343 
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
 343 
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
344 
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
 344 
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
345 
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
 345 
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
346 
void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd);
 346 
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
347 
 
 347 
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
348 
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
 348 
 
349 
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
 349 
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
350 
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
 350 
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
351 
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
 351 
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
352 
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
 352 
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
353 
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
 353 
/**
354 
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
 354 
  * @}
355 
 
 355 
  */
356 
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 356 
 
357 
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 357 
/* Peripheral Control functions  **********************************************/
358 
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 358 
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
359 
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 359 
  * @{
360 
/**
 360 
  */
361 
  * @}
 361 
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
362 
  */
 362 
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
363 
 
 363 
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
364 
/* Peripheral Control functions  **********************************************/
 364 
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
365 
/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
 365 
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
366 
  * @{
 366 
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
367 
  */
 367 
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
368 
HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 368 
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
369 
HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 369 
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
370 
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 370 
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
371 
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
 371 
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
372 
                                  uint16_t ep_mps, uint8_t ep_type);
 372 
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
373 
 
 373 
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
374 
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 374 
uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
375 
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
 375 
/**
376 
                                     uint8_t *pBuf, uint32_t len);
 376 
  * @}
377 
 
 377 
  */
378 
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
 378 
 
379 
                                      uint8_t *pBuf, uint32_t len);
 379 
/* Peripheral State functions  ************************************************/
380 
 
 380 
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
381 
 
 381 
  * @{
382 
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 382 
  */
383 
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 383 
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
384 
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 384 
/**
385 
HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 385 
  * @}
386 
HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 386 
  */
387 
 
 387 
 
388 
uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 388 
/**
389 
/**
 389 
  * @}
390 
  * @}
 390 
  */
391 
  */
 391 
 
392 
 
 392 
/* Private constants ---------------------------------------------------------*/
393 
/* Peripheral State functions  ************************************************/
 393 
/** @defgroup PCD_Private_Constants PCD Private Constants
394 
/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
 394 
  * @{
395 
  * @{
 395 
  */
396 
  */
 396 
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
397 
PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 397 
  * @{
398 
/**
 398 
  */
399 
  * @}
 399 
#if defined (USB_OTG_FS)
400 
  */
 400 
#define USB_OTG_FS_WAKEUP_EXTI_LINE                                   (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
401 
 
 401 
#endif /* defined (USB_OTG_FS) */
402 
/**
 402 
 
403 
  * @}
 403 
#if defined (USB)
404 
  */
 404 
#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
405 
 
 405 
#endif /* defined (USB) */
406 
/* Private constants ---------------------------------------------------------*/
 406 
 
407 
/** @defgroup PCD_Private_Constants PCD Private Constants
 407 
/**
408 
  * @{
 408 
  * @}
409 
  */
 409 
  */
410 
/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
 410 
#if defined (USB)
411 
  * @{
 411 
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
412 
  */
 412 
  * @{
413 
#if defined (USB_OTG_FS)
 413 
  */
414 
#define USB_OTG_FS_WAKEUP_EXTI_LINE                                   (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
 414 
#define PCD_EP0MPS_64                                                 EP_MPS_64
415 
#endif /* defined (USB_OTG_FS) */
 415 
#define PCD_EP0MPS_32                                                 EP_MPS_32
416 
 
 416 
#define PCD_EP0MPS_16                                                 EP_MPS_16
417 
#if defined (USB)
 417 
#define PCD_EP0MPS_08                                                 EP_MPS_8
418 
#define USB_WAKEUP_EXTI_LINE                                          (0x1U << 18)  /*!< USB FS EXTI Line WakeUp Interrupt */
 418 
/**
419 
#endif /* defined (USB) */
 419 
  * @}
420 
 
 420 
  */
421 
/**
 421 
 
422 
  * @}
 422 
/** @defgroup PCD_ENDP PCD ENDP
423 
  */
 423 
  * @{
424 
#if defined (USB)
 424 
  */
425 
/** @defgroup PCD_EP0_MPS PCD EP0 MPS
 425 
#define PCD_ENDP0                                                     0U
426 
  * @{
 426 
#define PCD_ENDP1                                                     1U
427 
  */
 427 
#define PCD_ENDP2                                                     2U
428 
#define PCD_EP0MPS_64                                                 EP_MPS_64
 428 
#define PCD_ENDP3                                                     3U
429 
#define PCD_EP0MPS_32                                                 EP_MPS_32
 429 
#define PCD_ENDP4                                                     4U
430 
#define PCD_EP0MPS_16                                                 EP_MPS_16
 430 
#define PCD_ENDP5                                                     5U
431 
#define PCD_EP0MPS_08                                                 EP_MPS_8
 431 
#define PCD_ENDP6                                                     6U
432 
/**
 432 
#define PCD_ENDP7                                                     7U
433 
  * @}
 433 
/**
434 
  */
 434 
  * @}
435 
 
 435 
  */
436 
/** @defgroup PCD_ENDP PCD ENDP
 436 
 
437 
  * @{
 437 
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
438 
  */
 438 
  * @{
439 
#define PCD_ENDP0                                                     0U
 439 
  */
440 
#define PCD_ENDP1                                                     1U
 440 
#define PCD_SNG_BUF                                                   0U
441 
#define PCD_ENDP2                                                     2U
 441 
#define PCD_DBL_BUF                                                   1U
442 
#define PCD_ENDP3                                                     3U
 442 
/**
443 
#define PCD_ENDP4                                                     4U
 443 
  * @}
444 
#define PCD_ENDP5                                                     5U
 444 
  */
445 
#define PCD_ENDP6                                                     6U
 445 
#endif /* defined (USB) */
446 
#define PCD_ENDP7                                                     7U
 446 
/**
447 
/**
 447 
  * @}
448 
  * @}
 448 
  */
449 
  */
 449 
 
450 
 
 450 
#if defined (USB_OTG_FS)
451 
/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
 451 
#ifndef USB_OTG_DOEPINT_OTEPSPR
452 
  * @{
 452 
#define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
453 
  */
 453 
#endif /* defined USB_OTG_DOEPINT_OTEPSPR */
454 
#define PCD_SNG_BUF                                                   0U
 454 
 
455 
#define PCD_DBL_BUF                                                   1U
 455 
#ifndef USB_OTG_DOEPMSK_OTEPSPRM
456 
/**
 456 
#define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
457 
  * @}
 457 
#endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
458 
  */
 458 
 
459 
#endif /* defined (USB) */
 459 
#ifndef USB_OTG_DOEPINT_NAK
460 
/**
 460 
#define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
461 
  * @}
 461 
#endif /* defined USB_OTG_DOEPINT_NAK */
462 
  */
 462 
 
463 
 
 463 
#ifndef USB_OTG_DOEPMSK_NAKM
464 
#if defined (USB_OTG_FS)
 464 
#define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
465 
#ifndef USB_OTG_DOEPINT_OTEPSPR
 465 
#endif /* defined USB_OTG_DOEPMSK_NAKM */
466 
#define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
 466 
 
467 
#endif /* defined USB_OTG_DOEPINT_OTEPSPR */
 467 
#ifndef USB_OTG_DOEPINT_STPKTRX
468 
 
 468 
#define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
469 
#ifndef USB_OTG_DOEPMSK_OTEPSPRM
 469 
#endif /* defined USB_OTG_DOEPINT_STPKTRX */
470 
#define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
 470 
 
471 
#endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
 471 
#ifndef USB_OTG_DOEPMSK_NYETM
472 
 
 472 
#define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
473 
#ifndef USB_OTG_DOEPINT_NAK
 473 
#endif /* defined USB_OTG_DOEPMSK_NYETM */
474 
#define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
 474 
#endif /* defined (USB_OTG_FS) */
475 
#endif /* defined USB_OTG_DOEPINT_NAK */
 475 
 
476 
 
 476 
/* Private macros ------------------------------------------------------------*/
477 
#ifndef USB_OTG_DOEPMSK_NAKM
 477 
/** @defgroup PCD_Private_Macros PCD Private Macros
478 
#define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
 478 
  * @{
479 
#endif /* defined USB_OTG_DOEPMSK_NAKM */
 479 
  */
480 
 
 480 
#if defined (USB)
481 
#ifndef USB_OTG_DOEPINT_STPKTRX
 481 
/********************  Bit definition for USB_COUNTn_RX register  *************/
482 
#define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
 482 
#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
483 
#endif /* defined USB_OTG_DOEPINT_STPKTRX */
 483 
#define USB_CNTRX_BLSIZE                      (0x1U << 15)
484 
 
 484 
 
485 
#ifndef USB_OTG_DOEPMSK_NYETM
 485 
/* SetENDPOINT */
486 
#define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
 486 
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \
487 
#endif /* defined USB_OTG_DOEPMSK_NYETM */
 487 
  (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
488 
#endif /* defined (USB_OTG_FS) */
 488 
 
489 
 
 489 
/* GetENDPOINT */
490 
/* Private macros ------------------------------------------------------------*/
 490 
#define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
491 
/** @defgroup PCD_Private_Macros PCD Private Macros
 491 
 
492 
  * @{
 492 
 
493 
  */
 493 
/**
494 
#if defined (USB)
 494 
  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
495 
/********************  Bit definition for USB_COUNTn_RX register  *************/
 495 
  * @param  USBx USB peripheral instance register address.
496 
#define USB_CNTRX_NBLK_MSK                    (0x1FU << 10)
 496 
  * @param  bEpNum Endpoint Number.
497 
#define USB_CNTRX_BLSIZE                      (0x1U << 15)
 497 
  * @param  wType Endpoint Type.
498 
 
 498 
  * @retval None
499 
/* SetENDPOINT */
 499 
  */
500 
#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue)  (*(__IO uint16_t *)\
 500 
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) \
501 
                                                    (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
 501 
  (PCD_SET_ENDPOINT((USBx), (bEpNum), \
502 
 
 502 
                    ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
503 
/* GetENDPOINT */
 503 
 
504 
#define PCD_GET_ENDPOINT(USBx, bEpNum)             (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
 504 
 
505 
 
 505 
/**
506 
/* ENDPOINT transfer */
 506 
  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
507 
#define USB_EP0StartXfer                           USB_EPStartXfer
 507 
  * @param  USBx USB peripheral instance register address.
508 
 
 508 
  * @param  bEpNum Endpoint Number.
509 
/**
 509 
  * @retval Endpoint Type
510 
  * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
 510 
  */
511 
  * @param  USBx USB peripheral instance register address.
 511 
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
512 
  * @param  bEpNum Endpoint Number.
 512 
 
513 
  * @param  wType Endpoint Type.
 513 
/**
514 
  * @retval None
 514 
  * @brief free buffer used from the application realizing it to the line
515 
  */
 515 
  *         toggles bit SW_BUF in the double buffered endpoint register
516 
#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\
 516 
  * @param USBx USB device.
517 
                                                              & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
 517 
  * @param   bEpNum, bDir
518 
 
 518 
  * @retval None
519 
 
 519 
  */
520 
/**
 520 
#define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \
521 
  * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
 521 
  do { \
522 
  * @param  USBx USB peripheral instance register address.
 522 
    if ((bDir) == 0U) \
523 
  * @param  bEpNum Endpoint Number.
 523 
    { \
524 
  * @retval Endpoint Type
 524 
      /* OUT double buffered endpoint */ \
525 
  */
 525 
      PCD_TX_DTOG((USBx), (bEpNum)); \
526 
#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
 526 
    } \
527 
 
 527 
    else if ((bDir) == 1U) \
528 
/**
 528 
    { \
529 
  * @brief free buffer used from the application realizing it to the line
 529 
      /* IN double buffered endpoint */ \
530 
  *         toggles bit SW_BUF in the double buffered endpoint register
 530 
      PCD_RX_DTOG((USBx), (bEpNum)); \
531 
  * @param USBx USB device.
 531 
    } \
532 
  * @param   bEpNum, bDir
 532 
  } while(0)
533 
  * @retval None
 533 
 
534 
  */
 534 
/**
535 
#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \
 535 
  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
536 
  do { \
 536 
  * @param  USBx USB peripheral instance register address.
537 
    if ((bDir) == 0U) \
 537 
  * @param  bEpNum Endpoint Number.
538 
    { \
 538 
  * @param  wState new state
539 
      /* OUT double buffered endpoint */ \
 539 
  * @retval None
540 
      PCD_TX_DTOG((USBx), (bEpNum)); \
 540 
  */
541 
    } \
 541 
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
542 
    else if ((bDir) == 1U) \
 542 
  do { \
543 
    { \
 543 
    uint16_t _wRegVal; \
544 
      /* IN double buffered endpoint */ \
 544 
    \
545 
      PCD_RX_DTOG((USBx), (bEpNum)); \
 545 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
546 
    } \
 546 
    /* toggle first bit ? */ \
547 
  } while(0)
 547 
    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
548 
 
 548 
    { \
549 
/**
 549 
      _wRegVal ^= USB_EPTX_DTOG1; \
550 
  * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
 550 
    } \
551 
  * @param  USBx USB peripheral instance register address.
 551 
    /* toggle second bit ?  */ \
552 
  * @param  bEpNum Endpoint Number.
 552 
    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
553 
  * @param  wState new state
 553 
    { \
554 
  * @retval None
 554 
      _wRegVal ^= USB_EPTX_DTOG2; \
555 
  */
 555 
    } \
556 
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \
 556 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
557 
  do { \
 557 
  } while(0) /* PCD_SET_EP_TX_STATUS */
558 
    uint16_t _wRegVal; \
 558 
 
559 
    \
 559 
/**
560 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
 560 
  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
561 
    /* toggle first bit ? */ \
 561 
  * @param  USBx USB peripheral instance register address.
562 
    if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
 562 
  * @param  bEpNum Endpoint Number.
563 
    { \
 563 
  * @param  wState new state
564 
      _wRegVal ^= USB_EPTX_DTOG1; \
 564 
  * @retval None
565 
    } \
 565 
  */
566 
    /* toggle second bit ?  */ \
 566 
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
567 
    if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
 567 
  do { \
568 
    { \
 568 
    uint16_t _wRegVal; \
569 
      _wRegVal ^= USB_EPTX_DTOG2; \
 569 
    \
570 
    } \
 570 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
571 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
 571 
    /* toggle first bit ? */ \
572 
  } while(0) /* PCD_SET_EP_TX_STATUS */
 572 
    if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
573 
 
 573 
    { \
574 
/**
 574 
      _wRegVal ^= USB_EPRX_DTOG1; \
575 
  * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
 575 
    } \
576 
  * @param  USBx USB peripheral instance register address.
 576 
    /* toggle second bit ? */ \
577 
  * @param  bEpNum Endpoint Number.
 577 
    if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
578 
  * @param  wState new state
 578 
    { \
579 
  * @retval None
 579 
      _wRegVal ^= USB_EPRX_DTOG2; \
580 
  */
 580 
    } \
581 
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \
 581 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
582 
  do { \
 582 
  } while(0) /* PCD_SET_EP_RX_STATUS */
583 
    uint16_t _wRegVal; \
 583 
 
584 
    \
 584 
/**
585 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
 585 
  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
586 
    /* toggle first bit ? */ \
 586 
  * @param  USBx USB peripheral instance register address.
587 
    if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
 587 
  * @param  bEpNum Endpoint Number.
588 
    { \
 588 
  * @param  wStaterx new state.
589 
      _wRegVal ^= USB_EPRX_DTOG1; \
 589 
  * @param  wStatetx new state.
590 
    } \
 590 
  * @retval None
591 
    /* toggle second bit ? */ \
 591 
  */
592 
    if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
 592 
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
593 
    { \
 593 
  do { \
594 
      _wRegVal ^= USB_EPRX_DTOG2; \
 594 
    uint16_t _wRegVal; \
595 
    } \
 595 
    \
596 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
 596 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
597 
  } while(0) /* PCD_SET_EP_RX_STATUS */
 597 
    /* toggle first bit ? */ \
598 
 
 598 
    if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
599 
/**
 599 
    { \
600 
  * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 600 
      _wRegVal ^= USB_EPRX_DTOG1; \
601 
  * @param  USBx USB peripheral instance register address.
 601 
    } \
602 
  * @param  bEpNum Endpoint Number.
 602 
    /* toggle second bit ? */ \
603 
  * @param  wStaterx new state.
 603 
    if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
604 
  * @param  wStatetx new state.
 604 
    { \
605 
  * @retval None
 605 
      _wRegVal ^= USB_EPRX_DTOG2; \
606 
  */
 606 
    } \
607 
#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \
 607 
    /* toggle first bit ? */ \
608 
  do { \
 608 
    if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
609 
    uint16_t _wRegVal; \
 609 
    { \
610 
    \
 610 
      _wRegVal ^= USB_EPTX_DTOG1; \
611 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
 611 
    } \
612 
    /* toggle first bit ? */ \
 612 
    /* toggle second bit ?  */ \
613 
    if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
 613 
    if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
614 
    { \
 614 
    { \
615 
      _wRegVal ^= USB_EPRX_DTOG1; \
 615 
      _wRegVal ^= USB_EPTX_DTOG2; \
616 
    } \
 616 
    } \
617 
    /* toggle second bit ? */ \
 617 
    \
618 
    if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
 618 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
619 
    { \
 619 
  } while(0) /* PCD_SET_EP_TXRX_STATUS */
620 
      _wRegVal ^= USB_EPRX_DTOG2; \
 620 
 
621 
    } \
 621 
/**
622 
    /* toggle first bit ? */ \
 622 
  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
623 
    if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
 623 
  *         /STAT_RX[1:0])
624 
    { \
 624 
  * @param  USBx USB peripheral instance register address.
625 
      _wRegVal ^= USB_EPTX_DTOG1; \
 625 
  * @param  bEpNum Endpoint Number.
626 
    } \
 626 
  * @retval status
627 
    /* toggle second bit ?  */ \
 627 
  */
628 
    if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
 628 
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
629 
    { \
 629 
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
630 
      _wRegVal ^= USB_EPTX_DTOG2; \
 630 
 
631 
    } \
 631 
/**
632 
    \
 632 
  * @brief  sets directly the VALID tx/rx-status into the endpoint register
633 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
 633 
  * @param  USBx USB peripheral instance register address.
634 
  } while(0) /* PCD_SET_EP_TXRX_STATUS */
 634 
  * @param  bEpNum Endpoint Number.
635 
 
 635 
  * @retval None
636 
/**
 636 
  */
637 
  * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
 637 
#define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
638 
  *         /STAT_RX[1:0])
 638 
#define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
639 
  * @param  USBx USB peripheral instance register address.
 639 
 
640 
  * @param  bEpNum Endpoint Number.
 640 
/**
641 
  * @retval status
 641 
  * @brief  checks stall condition in an endpoint.
642 
  */
 642 
  * @param  USBx USB peripheral instance register address.
643 
#define PCD_GET_EP_TX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
 643 
  * @param  bEpNum Endpoint Number.
644 
#define PCD_GET_EP_RX_STATUS(USBx, bEpNum)     ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
 644 
  * @retval TRUE = endpoint in stall condition.
645 
 
 645 
  */
646 
/**
 646 
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
647 
  * @brief  sets directly the VALID tx/rx-status into the endpoint register
 647 
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
648 
  * @param  USBx USB peripheral instance register address.
 648 
 
649 
  * @param  bEpNum Endpoint Number.
 649 
/**
650 
  * @retval None
 650 
  * @brief  set & clear EP_KIND bit.
651 
  */
 651 
  * @param  USBx USB peripheral instance register address.
652 
#define PCD_SET_EP_TX_VALID(USBx, bEpNum)      (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
 652 
  * @param  bEpNum Endpoint Number.
653 
#define PCD_SET_EP_RX_VALID(USBx, bEpNum)      (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
 653 
  * @retval None
654 
 
 654 
  */
655 
/**
 655 
#define PCD_SET_EP_KIND(USBx, bEpNum) \
656 
  * @brief  checks stall condition in an endpoint.
 656 
  do { \
657 
  * @param  USBx USB peripheral instance register address.
 657 
    uint16_t _wRegVal; \
658 
  * @param  bEpNum Endpoint Number.
 658 
    \
659 
  * @retval TRUE = endpoint in stall condition.
 659 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
660 
  */
 660 
    \
661 
#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL)
 661 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
662 
#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL)
 662 
  } while(0) /* PCD_SET_EP_KIND */
663 
 
 663 
 
664 
/**
 664 
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
665 
  * @brief  set & clear EP_KIND bit.
 665 
  do { \
666 
  * @param  USBx USB peripheral instance register address.
 666 
    uint16_t _wRegVal; \
667 
  * @param  bEpNum Endpoint Number.
 667 
    \
668 
  * @retval None
 668 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
669 
  */
 669 
    \
670 
#define PCD_SET_EP_KIND(USBx, bEpNum) \
 670 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
671 
  do { \
 671 
  } while(0) /* PCD_CLEAR_EP_KIND */
672 
    uint16_t _wRegVal; \
 672 
 
673 
    \
 673 
/**
674 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
 674 
  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
675 
    \
 675 
  * @param  USBx USB peripheral instance register address.
676 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
 676 
  * @param  bEpNum Endpoint Number.
677 
  } while(0) /* PCD_SET_EP_KIND */
 677 
  * @retval None
678 
 
 678 
  */
679 
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \
 679 
#define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
680 
  do { \
 680 
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
681 
    uint16_t _wRegVal; \
 681 
 
682 
    \
 682 
/**
683 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
 683 
  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
684 
    \
 684 
  * @param  USBx USB peripheral instance register address.
685 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
 685 
  * @param  bEpNum Endpoint Number.
686 
  } while(0) /* PCD_CLEAR_EP_KIND */
 686 
  * @retval None
687 
 
 687 
  */
688 
/**
 688 
#define PCD_SET_BULK_EP_DBUF(USBx, bEpNum)     PCD_SET_EP_KIND((USBx), (bEpNum))
689 
  * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
 689 
#define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum)   PCD_CLEAR_EP_KIND((USBx), (bEpNum))
690 
  * @param  USBx USB peripheral instance register address.
 690 
 
691 
  * @param  bEpNum Endpoint Number.
 691 
/**
692 
  * @retval None
 692 
  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
693 
  */
 693 
  * @param  USBx USB peripheral instance register address.
694 
#define PCD_SET_OUT_STATUS(USBx, bEpNum)       PCD_SET_EP_KIND((USBx), (bEpNum))
 694 
  * @param  bEpNum Endpoint Number.
695 
#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)     PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 695 
  * @retval None
696 
 
 696 
  */
697 
/**
 697 
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
698 
  * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
 698 
  do { \
699 
  * @param  USBx USB peripheral instance register address.
 699 
    uint16_t _wRegVal; \
700 
  * @param  bEpNum Endpoint Number.
 700 
    \
701 
  * @retval None
 701 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
702 
  */
 702 
    \
703 
#define PCD_SET_EP_DBUF(USBx, bEpNum)          PCD_SET_EP_KIND((USBx), (bEpNum))
 703 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
704 
#define PCD_CLEAR_EP_DBUF(USBx, bEpNum)        PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 704 
  } while(0) /* PCD_CLEAR_RX_EP_CTR */
705 
 
 705 
 
706 
/**
 706 
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
707 
  * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
 707 
  do { \
708 
  * @param  USBx USB peripheral instance register address.
 708 
    uint16_t _wRegVal; \
709 
  * @param  bEpNum Endpoint Number.
 709 
    \
710 
  * @retval None
 710 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
711 
  */
 711 
    \
712 
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \
 712 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
713 
  do { \
 713 
  } while(0) /* PCD_CLEAR_TX_EP_CTR */
714 
    uint16_t _wRegVal; \
 714 
 
715 
    \
 715 
/**
716 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
 716 
  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
717 
    \
 717 
  * @param  USBx USB peripheral instance register address.
718 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
 718 
  * @param  bEpNum Endpoint Number.
719 
  } while(0) /* PCD_CLEAR_RX_EP_CTR */
 719 
  * @retval None
720 
 
 720 
  */
721 
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \
 721 
#define PCD_RX_DTOG(USBx, bEpNum) \
722 
  do { \
 722 
  do { \
723 
    uint16_t _wRegVal; \
 723 
    uint16_t _wEPVal; \
724 
    \
 724 
    \
725 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
 725 
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
726 
    \
 726 
    \
727 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
 727 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
728 
  } while(0) /* PCD_CLEAR_TX_EP_CTR */
 728 
  } while(0) /* PCD_RX_DTOG */
729 
 
 729 
 
730 
/**
 730 
#define PCD_TX_DTOG(USBx, bEpNum) \
731 
  * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 731 
  do { \
732 
  * @param  USBx USB peripheral instance register address.
 732 
    uint16_t _wEPVal; \
733 
  * @param  bEpNum Endpoint Number.
 733 
    \
734 
  * @retval None
 734 
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
735 
  */
 735 
    \
736 
#define PCD_RX_DTOG(USBx, bEpNum) \
 736 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
737 
  do { \
 737 
  } while(0) /* PCD_TX_DTOG */
738 
    uint16_t _wEPVal; \
 738 
/**
739 
    \
 739 
  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
740 
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
 740 
  * @param  USBx USB peripheral instance register address.
741 
    \
 741 
  * @param  bEpNum Endpoint Number.
742 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
 742 
  * @retval None
743 
  } while(0) /* PCD_RX_DTOG */
 743 
  */
744 
 
 744 
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
745 
#define PCD_TX_DTOG(USBx, bEpNum) \
 745 
  do { \
746 
  do { \
 746 
    uint16_t _wRegVal; \
747 
    uint16_t _wEPVal; \
 747 
    \
748 
    \
 748 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
749 
    _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
 749 
    \
750 
    \
 750 
    if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
751 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
 751 
    { \
752 
  } while(0) /* PCD_TX_DTOG */
 752 
      PCD_RX_DTOG((USBx), (bEpNum)); \
753 
/**
 753 
    } \
754 
  * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 754 
  } while(0) /* PCD_CLEAR_RX_DTOG */
755 
  * @param  USBx USB peripheral instance register address.
 755 
 
756 
  * @param  bEpNum Endpoint Number.
 756 
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
757 
  * @retval None
 757 
  do { \
758 
  */
 758 
    uint16_t _wRegVal; \
759 
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \
 759 
    \
760 
  do { \
 760 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
761 
    uint16_t _wRegVal; \
 761 
    \
762 
    \
 762 
    if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
763 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
 763 
    { \
764 
    \
 764 
      PCD_TX_DTOG((USBx), (bEpNum)); \
765 
    if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
 765 
    } \
766 
    { \
 766 
  } while(0) /* PCD_CLEAR_TX_DTOG */
767 
      PCD_RX_DTOG((USBx), (bEpNum)); \
 767 
 
768 
    } \
 768 
/**
769 
  } while(0) /* PCD_CLEAR_RX_DTOG */
 769 
  * @brief  Sets address in an endpoint register.
770 
 
 770 
  * @param  USBx USB peripheral instance register address.
771 
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \
 771 
  * @param  bEpNum Endpoint Number.
772 
  do { \
 772 
  * @param  bAddr Address.
773 
    uint16_t _wRegVal; \
 773 
  * @retval None
774 
    \
 774 
  */
775 
    _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
 775 
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
776 
    \
 776 
  do { \
777 
    if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
 777 
    uint16_t _wRegVal; \
778 
    { \
 778 
    \
779 
      PCD_TX_DTOG((USBx), (bEpNum)); \
 779 
    _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
780 
    } \
 780 
    \
781 
  } while(0) /* PCD_CLEAR_TX_DTOG */
 781 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
782 
 
 782 
  } while(0) /* PCD_SET_EP_ADDRESS */
783 
/**
 783 
 
784 
  * @brief  Sets address in an endpoint register.
 784 
/**
785 
  * @param  USBx USB peripheral instance register address.
 785 
  * @brief  Gets address in an endpoint register.
786 
  * @param  bEpNum Endpoint Number.
 786 
  * @param  USBx USB peripheral instance register address.
787 
  * @param  bAddr Address.
 787 
  * @param  bEpNum Endpoint Number.
788 
  * @retval None
 788 
  * @retval None
789 
  */
 789 
  */
790 
#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \
 790 
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
791 
  do { \
 791 
 
792 
    uint16_t _wRegVal; \
 792 
#define PCD_EP_TX_CNT(USBx, bEpNum) \
793 
    \
 793 
  ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
794 
    _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
 794 
                  ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
795 
    \
 795 
 
796 
    PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
 796 
#define PCD_EP_RX_CNT(USBx, bEpNum) \
797 
  } while(0) /* PCD_SET_EP_ADDRESS */
 797 
  ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \
798 
 
 798 
                  ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
799 
/**
 799 
 
800 
  * @brief  Gets address in an endpoint register.
 800 
 
801 
  * @param  USBx USB peripheral instance register address.
 801 
/**
802 
  * @param  bEpNum Endpoint Number.
 802 
  * @brief  sets address of the tx/rx buffer.
803 
  * @retval None
 803 
  * @param  USBx USB peripheral instance register address.
804 
  */
 804 
  * @param  bEpNum Endpoint Number.
805 
#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
 805 
  * @param  wAddr address to be set (must be word aligned).
806 
 
 806 
  * @retval None
807 
#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
 807 
  */
808 
                                                    + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
 808 
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
809 
 
 809 
  do { \
810 
#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\
 810 
    __IO uint16_t *_wRegVal; \
811 
                                                    + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
 811 
    uint32_t _wRegBase = (uint32_t)USBx; \
812 
 
 812 
    \
813 
 
 813 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
814 
/**
 814 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
815 
  * @brief  sets address of the tx/rx buffer.
 815 
    *_wRegVal = ((wAddr) >> 1) << 1; \
816 
  * @param  USBx USB peripheral instance register address.
 816 
  } while(0) /* PCD_SET_EP_TX_ADDRESS */
817 
  * @param  bEpNum Endpoint Number.
 817 
 
818 
  * @param  wAddr address to be set (must be word aligned).
 818 
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
819 
  * @retval None
 819 
  do { \
820 
  */
 820 
    __IO uint16_t *_wRegVal; \
821 
#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \
 821 
    uint32_t _wRegBase = (uint32_t)USBx; \
822 
  do { \
 822 
    \
823 
    __IO uint16_t *_wRegVal; \
 823 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
824 
    uint32_t _wRegBase = (uint32_t)USBx; \
 824 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
825 
    \
 825 
    *_wRegVal = ((wAddr) >> 1) << 1; \
826 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
 826 
  } while(0) /* PCD_SET_EP_RX_ADDRESS */
827 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
 827 
 
828 
    *_wRegVal = ((wAddr) >> 1) << 1; \
 828 
/**
829 
  } while(0) /* PCD_SET_EP_TX_ADDRESS */
 829 
  * @brief  Gets address of the tx/rx buffer.
830 
 
 830 
  * @param  USBx USB peripheral instance register address.
831 
#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \
 831 
  * @param  bEpNum Endpoint Number.
832 
  do { \
 832 
  * @retval address of the buffer.
833 
    __IO uint16_t *_wRegVal; \
 833 
  */
834 
    uint32_t _wRegBase = (uint32_t)USBx; \
 834 
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
835 
    \
 835 
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
836 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
 836 
 
837 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
 837 
/**
838 
    *_wRegVal = ((wAddr) >> 1) << 1; \
 838 
  * @brief  Sets counter of rx buffer with no. of blocks.
839 
  } while(0) /* PCD_SET_EP_RX_ADDRESS */
 839 
  * @param  pdwReg Register pointer
840 
 
 840 
  * @param  wCount Counter.
841 
/**
 841 
  * @param  wNBlocks no. of Blocks.
842 
  * @brief  Gets address of the tx/rx buffer.
 842 
  * @retval None
843 
  * @param  USBx USB peripheral instance register address.
 843 
  */
844 
  * @param  bEpNum Endpoint Number.
 844 
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
845 
  * @retval address of the buffer.
 845 
  do { \
846 
  */
 846 
    (wNBlocks) = (wCount) >> 5; \
847 
#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
 847 
    if (((wCount) & 0x1fU) == 0U) \
848 
#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
 848 
    { \
849 
 
 849 
      (wNBlocks)--; \
850 
/**
 850 
    } \
851 
  * @brief  Sets counter of rx buffer with no. of blocks.
 851 
    *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
852 
  * @param  pdwReg Register pointer
 852 
  } while(0) /* PCD_CALC_BLK32 */
853 
  * @param  wCount Counter.
 853 
 
854 
  * @param  wNBlocks no. of Blocks.
 854 
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
855 
  * @retval None
 855 
  do { \
856 
  */
 856 
    (wNBlocks) = (wCount) >> 1; \
857 
#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \
 857 
    if (((wCount) & 0x1U) != 0U) \
858 
  do { \
 858 
    { \
859 
    (wNBlocks) = (wCount) >> 5; \
 859 
      (wNBlocks)++; \
860 
    if (((wCount) & 0x1fU) == 0U) \
 860 
    } \
861 
    { \
 861 
    *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \
862 
      (wNBlocks)--; \
 862 
  } while(0) /* PCD_CALC_BLK2 */
863 
    } \
 863 
 
864 
    *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
 864 
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
865 
  } while(0) /* PCD_CALC_BLK32 */
 865 
  do { \
866 
 
 866 
    uint32_t wNBlocks; \
867 
#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \
 867 
    \
868 
  do { \
 868 
    *(pdwReg) &= 0x3FFU; \
869 
    (wNBlocks) = (wCount) >> 1; \
 869 
    \
870 
    if (((wCount) & 0x1U) != 0U) \
 870 
    if ((wCount) > 62U) \
871 
    { \
 871 
    { \
872 
      (wNBlocks)++; \
 872 
      PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
873 
    } \
 873 
    } \
874 
    *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
 874 
    else \
875 
  } while(0) /* PCD_CALC_BLK2 */
 875 
    { \
876 
 
 876 
      if ((wCount) == 0U) \
877 
#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \
 877 
      { \
878 
  do { \
 878 
        *(pdwReg) |= USB_CNTRX_BLSIZE; \
879 
    uint32_t wNBlocks; \
 879 
      } \
880 
    if ((wCount) == 0U) \
 880 
      else \
881 
    { \
 881 
      { \
882 
      *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
 882 
        PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
883 
      *(pdwReg) |= USB_CNTRX_BLSIZE; \
 883 
      } \
884 
    } \
 884 
    } \
885 
    else if((wCount) <= 62U) \
 885 
  } while(0) /* PCD_SET_EP_CNT_RX_REG */
886 
    { \
 886 
 
887 
      PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
 887 
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
888 
    } \
 888 
  do { \
889 
    else \
 889 
    uint32_t _wRegBase = (uint32_t)(USBx); \
890 
    { \
 890 
    __IO uint16_t *pdwReg; \
891 
      PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \
 891 
    \
892 
    } \
 892 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
893 
  } while(0) /* PCD_SET_EP_CNT_RX_REG */
 893 
    pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
894 
 
 894 
    PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
895 
#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \
 895 
  } while(0)
896 
  do { \
 896 
 
897 
    uint32_t _wRegBase = (uint32_t)(USBx); \
 897 
/**
898 
    __IO uint16_t *pdwReg; \
 898 
  * @brief  sets counter for the tx/rx buffer.
899 
    \
 899 
  * @param  USBx USB peripheral instance register address.
900 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
 900 
  * @param  bEpNum Endpoint Number.
901 
    pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
 901 
  * @param  wCount Counter value.
902 
    PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
 902 
  * @retval None
903 
  } while(0)
 903 
  */
904 
 
 904 
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
905 
/**
 905 
  do { \
906 
  * @brief  sets counter for the tx/rx buffer.
 906 
    uint32_t _wRegBase = (uint32_t)(USBx); \
907 
  * @param  USBx USB peripheral instance register address.
 907 
    __IO uint16_t *_wRegVal; \
908 
  * @param  bEpNum Endpoint Number.
 908 
    \
909 
  * @param  wCount Counter value.
 909 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
910 
  * @retval None
 910 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
911 
  */
 911 
    *_wRegVal = (uint16_t)(wCount); \
912 
#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \
 912 
  } while(0)
913 
  do { \
 913 
 
914 
    uint32_t _wRegBase = (uint32_t)(USBx); \
 914 
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
915 
    __IO uint16_t *_wRegVal; \
 915 
  do { \
916 
    \
 916 
    uint32_t _wRegBase = (uint32_t)(USBx); \
917 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
 917 
    __IO uint16_t *_wRegVal; \
918 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
 918 
    \
919 
    *_wRegVal = (uint16_t)(wCount); \
 919 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
920 
  } while(0)
 920 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
921 
 
 921 
    PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
922 
#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \
 922 
  } while(0)
923 
  do { \
 923 
 
924 
    uint32_t _wRegBase = (uint32_t)(USBx); \
 924 
/**
925 
    __IO uint16_t *_wRegVal; \
 925 
  * @brief  gets counter of the tx buffer.
926 
    \
 926 
  * @param  USBx USB peripheral instance register address.
927 
    _wRegBase += (uint32_t)(USBx)->BTABLE; \
 927 
  * @param  bEpNum Endpoint Number.
928 
    _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
 928 
  * @retval Counter value
929 
    PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
 929 
  */
930 
  } while(0)
 930 
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
931 
 
 931 
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
932 
/**
 932 
 
933 
  * @brief  gets counter of the tx buffer.
 933 
/**
934 
  * @param  USBx USB peripheral instance register address.
 934 
  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
935 
  * @param  bEpNum Endpoint Number.
 935 
  * @param  USBx USB peripheral instance register address.
936 
  * @retval Counter value
 936 
  * @param  bEpNum Endpoint Number.
937 
  */
 937 
  * @param  wBuf0Addr buffer 0 address.
938 
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
 938 
  * @retval Counter value
939 
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)        ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
 939 
  */
940 
 
 940 
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
941 
/**
 941 
  do { \
942 
  * @brief  Sets buffer 0/1 address in a double buffer endpoint.
 942 
    PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
943 
  * @param  USBx USB peripheral instance register address.
 943 
  } while(0) /* PCD_SET_EP_DBUF0_ADDR */
944 
  * @param  bEpNum Endpoint Number.
 944 
 
945 
  * @param  wBuf0Addr buffer 0 address.
 945 
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
946 
  * @retval Counter value
 946 
  do { \
947 
  */
 947 
    PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
948 
#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \
 948 
  } while(0) /* PCD_SET_EP_DBUF1_ADDR */
949 
  do { \
 949 
 
950 
    PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
 950 
/**
951 
  } while(0) /* PCD_SET_EP_DBUF0_ADDR */
 951 
  * @brief  Sets addresses in a double buffer endpoint.
952 
 
 952 
  * @param  USBx USB peripheral instance register address.
953 
#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \
 953 
  * @param  bEpNum Endpoint Number.
954 
  do { \
 954 
  * @param  wBuf0Addr: buffer 0 address.
955 
    PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
 955 
  * @param  wBuf1Addr = buffer 1 address.
956 
  } while(0) /* PCD_SET_EP_DBUF1_ADDR */
 956 
  * @retval None
957 
 
 957 
  */
958 
/**
 958 
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
959 
  * @brief  Sets addresses in a double buffer endpoint.
 959 
  do { \
960 
  * @param  USBx USB peripheral instance register address.
 960 
    PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
961 
  * @param  bEpNum Endpoint Number.
 961 
    PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
962 
  * @param  wBuf0Addr: buffer 0 address.
 962 
  } while(0) /* PCD_SET_EP_DBUF_ADDR */
963 
  * @param  wBuf1Addr = buffer 1 address.
 963 
 
964 
  * @retval None
 964 
/**
965 
  */
 965 
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
966 
#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \
 966 
  * @param  USBx USB peripheral instance register address.
967 
  do { \
 967 
  * @param  bEpNum Endpoint Number.
968 
    PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
 968 
  * @retval None
969 
    PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
 969 
  */
970 
  } while(0) /* PCD_SET_EP_DBUF_ADDR */
 970 
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
971 
 
 971 
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
972 
/**
 972 
 
973 
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 973 
/**
974 
  * @param  USBx USB peripheral instance register address.
 974 
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
975 
  * @param  bEpNum Endpoint Number.
 975 
  * @param  USBx USB peripheral instance register address.
976 
  * @retval None
 976 
  * @param  bEpNum Endpoint Number.
977 
  */
 977 
  * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
978 
#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum)    (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
 978 
  *         EP_DBUF_IN  = IN
979 
#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum)    (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
 979 
  * @param  wCount: Counter value
980 
 
 980 
  * @retval None
981 
/**
 981 
  */
982 
  * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 982 
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
983 
  * @param  USBx USB peripheral instance register address.
 983 
  do { \
984 
  * @param  bEpNum Endpoint Number.
 984 
    if ((bDir) == 0U) \
985 
  * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
 985 
      /* OUT endpoint */ \
986 
  *         EP_DBUF_IN  = IN
 986 
    { \
987 
  * @param  wCount: Counter value
 987 
      PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
988 
  * @retval None
 988 
    } \
989 
  */
 989 
    else \
990 
#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \
 990 
    { \
991 
  do { \
 991 
      if ((bDir) == 1U) \
992 
    if ((bDir) == 0U) \
 992 
      { \
993 
      /* OUT endpoint */ \
 993 
        /* IN endpoint */ \
994 
    { \
 994 
        PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
995 
      PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
 995 
      } \
996 
    } \
 996 
    } \
997 
    else \
 997 
  } while(0) /* SetEPDblBuf0Count*/
998 
    { \
 998 
 
999 
      if ((bDir) == 1U) \
 999 
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
1000 
      { \
 1000 
  do { \
1001 
        /* IN endpoint */ \
 1001 
    uint32_t _wBase = (uint32_t)(USBx); \
1002 
        PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
 1002 
    __IO uint16_t *_wEPRegVal; \
1003 
      } \
 1003 
    \
1004 
    } \
 1004 
    if ((bDir) == 0U) \
1005 
  } while(0) /* SetEPDblBuf0Count*/
 1005 
    { \
1006 
 
 1006 
      /* OUT endpoint */ \
1007 
#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \
 1007 
      PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
1008 
  do { \
 1008 
    } \
1009 
    uint32_t _wBase = (uint32_t)(USBx); \
 1009 
    else \
1010 
    __IO uint16_t *_wEPRegVal; \
 1010 
    { \
1011 
    \
 1011 
      if ((bDir) == 1U) \
1012 
    if ((bDir) == 0U) \
 1012 
      { \
1013 
    { \
 1013 
        /* IN endpoint */ \
1014 
      /* OUT endpoint */ \
 1014 
        _wBase += (uint32_t)(USBx)->BTABLE; \
1015 
      PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
 1015 
        _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
1016 
    } \
 1016 
        *_wEPRegVal = (uint16_t)(wCount); \
1017 
    else \
 1017 
      } \
1018 
    { \
 1018 
    } \
1019 
      if ((bDir) == 1U) \
 1019 
  } while(0) /* SetEPDblBuf1Count */
1020 
      { \
 1020 
 
1021 
        /* IN endpoint */ \
 1021 
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
1022 
        _wBase += (uint32_t)(USBx)->BTABLE; \
 1022 
  do { \
1023 
        _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
 1023 
    PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
1024 
        *_wEPRegVal = (uint16_t)(wCount); \
 1024 
    PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
1025 
      } \
 1025 
  } while(0) /* PCD_SET_EP_DBUF_CNT */
1026 
    } \
 1026 
 
1027 
  } while(0) /* SetEPDblBuf1Count */
 1027 
/**
1028 
 
 1028 
  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
1029 
#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \
 1029 
  * @param  USBx USB peripheral instance register address.
1030 
  do { \
 1030 
  * @param  bEpNum Endpoint Number.
1031 
    PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
 1031 
  * @retval None
1032 
    PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
 1032 
  */
1033 
  } while(0) /* PCD_SET_EP_DBUF_CNT */
 1033 
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
1034 
 
 1034 
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
1035 
/**
 1035 
 
1036 
  * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
 1036 
#endif /* defined (USB) */
1037 
  * @param  USBx USB peripheral instance register address.
 1037 
 
1038 
  * @param  bEpNum Endpoint Number.
 1038 
/**
1039 
  * @retval None
 1039 
  * @}
1040 
  */
 1040 
  */
1041 
#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum)     (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
 1041 
 
1042 
#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum)     (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
 1042 
/**
1043 
 
 1043 
  * @}
1044 
#endif /* defined (USB) */
 1044 
  */
1045 
 
 1045 
 
1046 
/**
 1046 
/**
1047 
  * @}
 1047 
  * @}
1048 
  */
 1048 
  */
1049 
 
 1049 
#endif /* defined (USB) || defined (USB_OTG_FS) */
1050 
/**
 1050 
 
1051 
  * @}
 1051 
#ifdef __cplusplus
1052 
  */
 1052 
}
1053 
 
 1053 
#endif
1054 
/**
 1054 
 
1055 
  * @}
 1055 
#endif /* STM32F1xx_HAL_PCD_H */
1056 
  */
 - 
 
1057 
#endif /* defined (USB) || defined (USB_OTG_FS) */
 - 
 
1058 
 
 - 
 
1059 
#ifdef __cplusplus
 - 
 
1060 
}
 - 
 
1061 
#endif
 - 
 
1062 
 
 - 
 
1063 
#endif /* STM32F1xx_HAL_PCD_H */
 - 
 
1064 
 
 - 
 
1065 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 -