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4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief Header file of PCD HAL module. |
5 | * @brief Header file of PCD HAL module. |
6 | ****************************************************************************** |
6 | ****************************************************************************** |
7 | * @attention |
7 | * @attention |
8 | * |
8 | * |
9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
- | 10 | * All rights reserved.</center></h2> |
|
10 | * |
11 | * |
11 | * Redistribution and use in source and binary forms, with or without modification, |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * are permitted provided that the following conditions are met: |
13 | * the "License"; You may not use this file except in compliance with the |
13 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
14 | * this list of conditions and the following disclaimer. |
- | |
15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
16 | * this list of conditions and the following disclaimer in the documentation |
- | |
17 | * and/or other materials provided with the distribution. |
14 | * License. You may obtain a copy of the License at: |
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
19 | * may be used to endorse or promote products derived from this software |
15 | * opensource.org/licenses/BSD-3-Clause |
20 | * without specific prior written permission. |
- | |
21 | * |
- | |
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
32 | * |
16 | * |
33 | ****************************************************************************** |
17 | ****************************************************************************** |
34 | */ |
18 | */ |
35 | 19 | ||
36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
37 | #ifndef __STM32F1xx_HAL_PCD_H |
21 | #ifndef STM32F1xx_HAL_PCD_H |
38 | #define __STM32F1xx_HAL_PCD_H |
22 | #define STM32F1xx_HAL_PCD_H |
39 | 23 | ||
40 | #ifdef __cplusplus |
24 | #ifdef __cplusplus |
41 | extern "C" { |
25 | extern "C" { |
42 | #endif |
26 | #endif |
43 | 27 | ||
44 | #if defined(STM32F102x6) || defined(STM32F102xB) || \ |
- | |
45 | defined(STM32F103x6) || defined(STM32F103xB) || \ |
- | |
46 | defined(STM32F103xE) || defined(STM32F103xG) || \ |
- | |
47 | defined(STM32F105xC) || defined(STM32F107xC) |
- | |
48 | - | ||
49 | /* Includes ------------------------------------------------------------------*/ |
28 | /* Includes ------------------------------------------------------------------*/ |
50 | #include "stm32f1xx_ll_usb.h" |
29 | #include "stm32f1xx_ll_usb.h" |
51 | 30 | ||
- | 31 | #if defined (USB) || defined (USB_OTG_FS) |
|
- | 32 | ||
52 | /** @addtogroup STM32F1xx_HAL_Driver |
33 | /** @addtogroup STM32F1xx_HAL_Driver |
53 | * @{ |
34 | * @{ |
54 | */ |
35 | */ |
55 | 36 | ||
56 | /** @addtogroup PCD |
37 | /** @addtogroup PCD |
57 | * @{ |
38 | * @{ |
58 | */ |
39 | */ |
59 | 40 | ||
60 | /* Exported types ------------------------------------------------------------*/ |
41 | /* Exported types ------------------------------------------------------------*/ |
61 | /** @defgroup PCD_Exported_Types PCD Exported Types |
42 | /** @defgroup PCD_Exported_Types PCD Exported Types |
62 | * @{ |
43 | * @{ |
63 | */ |
44 | */ |
64 | 45 | ||
65 | /** |
46 | /** |
66 | * @brief PCD State structure definition |
47 | * @brief PCD State structure definition |
67 | */ |
48 | */ |
68 | typedef enum |
49 | typedef enum |
69 | { |
50 | { |
70 | HAL_PCD_STATE_RESET = 0x00U, |
51 | HAL_PCD_STATE_RESET = 0x00, |
71 | HAL_PCD_STATE_READY = 0x01U, |
52 | HAL_PCD_STATE_READY = 0x01, |
72 | HAL_PCD_STATE_ERROR = 0x02U, |
53 | HAL_PCD_STATE_ERROR = 0x02, |
73 | HAL_PCD_STATE_BUSY = 0x03U, |
54 | HAL_PCD_STATE_BUSY = 0x03, |
74 | HAL_PCD_STATE_TIMEOUT = 0x04U |
55 | HAL_PCD_STATE_TIMEOUT = 0x04 |
75 | } PCD_StateTypeDef; |
56 | } PCD_StateTypeDef; |
76 | 57 | ||
77 | #if defined (USB) |
- | |
78 | /** |
- | |
79 | * @brief PCD double buffered endpoint direction |
58 | /* Device LPM suspend state */ |
80 | */ |
- | |
81 | typedef enum |
59 | typedef enum |
82 | { |
60 | { |
83 | PCD_EP_DBUF_OUT, |
61 | LPM_L0 = 0x00, /* on */ |
- | 62 | LPM_L1 = 0x01, /* LPM L1 sleep */ |
|
84 | PCD_EP_DBUF_IN, |
63 | LPM_L2 = 0x02, /* suspend */ |
85 | PCD_EP_DBUF_ERR, |
64 | LPM_L3 = 0x03, /* off */ |
86 | }PCD_EP_DBUF_DIR; |
65 | } PCD_LPM_StateTypeDef; |
87 | 66 | ||
88 | /** |
- | |
89 | * @brief PCD endpoint buffer number |
- | |
90 | */ |
- | |
91 | typedef enum |
67 | typedef enum |
92 | { |
68 | { |
93 | PCD_EP_NOBUF, |
69 | PCD_LPM_L0_ACTIVE = 0x00, /* on */ |
- | 70 | PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ |
|
94 | PCD_EP_BUF0, |
71 | } PCD_LPM_MsgTypeDef; |
- | 72 | ||
95 | PCD_EP_BUF1 |
73 | typedef enum |
- | 74 | { |
|
- | 75 | PCD_BCD_ERROR = 0xFF, |
|
- | 76 | PCD_BCD_CONTACT_DETECTION = 0xFE, |
|
- | 77 | PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, |
|
96 | }PCD_EP_BUF_NUM; |
78 | PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, |
- | 79 | PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, |
|
- | 80 | PCD_BCD_DISCOVERY_COMPLETED = 0x00, |
|
- | 81 | ||
97 | #endif /* USB */ |
82 | } PCD_BCD_MsgTypeDef; |
98 | 83 | ||
- | 84 | #if defined (USB) |
|
- | 85 | ||
- | 86 | #endif /* defined (USB) */ |
|
99 | #if defined (USB_OTG_FS) |
87 | #if defined (USB_OTG_FS) |
100 | typedef USB_OTG_GlobalTypeDef PCD_TypeDef; |
88 | typedef USB_OTG_GlobalTypeDef PCD_TypeDef; |
101 | typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; |
89 | typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; |
102 | typedef USB_OTG_EPTypeDef PCD_EPTypeDef; |
90 | typedef USB_OTG_EPTypeDef PCD_EPTypeDef; |
103 | #endif /* USB_OTG_FS */ |
91 | #endif /* defined (USB_OTG_FS) */ |
104 | - | ||
105 | #if defined (USB) |
92 | #if defined (USB) |
106 | typedef USB_TypeDef PCD_TypeDef; |
93 | typedef USB_TypeDef PCD_TypeDef; |
107 | typedef USB_CfgTypeDef PCD_InitTypeDef; |
94 | typedef USB_CfgTypeDef PCD_InitTypeDef; |
108 | typedef USB_EPTypeDef PCD_EPTypeDef; |
95 | typedef USB_EPTypeDef PCD_EPTypeDef; |
109 | #endif /* USB */ |
96 | #endif /* defined (USB) */ |
110 | 97 | ||
111 | /** |
98 | /** |
112 | * @brief PCD Handle Structure definition |
99 | * @brief PCD Handle Structure definition |
113 | */ |
100 | */ |
- | 101 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|
- | 102 | typedef struct __PCD_HandleTypeDef |
|
- | 103 | #else |
|
114 | typedef struct |
104 | typedef struct |
- | 105 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|
115 | { |
106 | { |
116 | PCD_TypeDef *Instance; /*!< Register base address */ |
107 | PCD_TypeDef *Instance; /*!< Register base address */ |
117 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
108 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
118 | __IO uint8_t USB_Address; /*!< USB Address: not used by USB OTG FS */ |
109 | __IO uint8_t USB_Address; /*!< USB Address */ |
- | 110 | #if defined (USB_OTG_FS) |
|
119 | PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ |
111 | PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ |
120 | PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ |
112 | PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ |
- | 113 | #endif /* defined (USB_OTG_FS) */ |
|
- | 114 | #if defined (USB) |
|
- | 115 | PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
|
- | 116 | PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
|
- | 117 | #endif /* defined (USB) */ |
|
121 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
118 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
122 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
119 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
- | 120 | __IO uint32_t ErrorCode; /*!< PCD Error code */ |
|
123 | uint32_t Setup[12U]; /*!< Setup packet buffer */ |
121 | uint32_t Setup[12]; /*!< Setup packet buffer */ |
- | 122 | PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
|
- | 123 | uint32_t BESL; |
|
- | 124 | ||
124 | void *pData; /*!< Pointer to upper stack Handler */ |
125 | void *pData; /*!< Pointer to upper stack Handler */ |
- | 126 | ||
- | 127 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|
- | 128 | void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ |
|
- | 129 | void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ |
|
- | 130 | void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ |
|
- | 131 | void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ |
|
- | 132 | void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ |
|
- | 133 | void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ |
|
- | 134 | void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ |
|
- | 135 | ||
- | 136 | void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ |
|
- | 137 | void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ |
|
- | 138 | void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ |
|
- | 139 | void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ |
|
- | 140 | ||
- | 141 | void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ |
|
- | 142 | void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ |
|
- | 143 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|
125 | } PCD_HandleTypeDef; |
144 | } PCD_HandleTypeDef; |
126 | 145 | ||
127 | /** |
146 | /** |
128 | * @} |
147 | * @} |
129 | */ |
148 | */ |
130 | 149 | ||
131 | /* Include PCD HAL Extension module */ |
150 | /* Include PCD HAL Extended module */ |
132 | #include "stm32f1xx_hal_pcd_ex.h" |
151 | #include "stm32f1xx_hal_pcd_ex.h" |
133 | 152 | ||
134 | /* Exported constants --------------------------------------------------------*/ |
153 | /* Exported constants --------------------------------------------------------*/ |
135 | /** @defgroup PCD_Exported_Constants PCD Exported Constants |
154 | /** @defgroup PCD_Exported_Constants PCD Exported Constants |
136 | * @{ |
155 | * @{ |
137 | */ |
156 | */ |
138 | 157 | ||
139 | /** @defgroup PCD_Speed PCD Speed |
158 | /** @defgroup PCD_Speed PCD Speed |
140 | * @{ |
159 | * @{ |
141 | */ |
160 | */ |
142 | #define PCD_SPEED_HIGH 0U /* Not Supported */ |
- | |
143 | #define PCD_SPEED_HIGH_IN_FULL 1U /* Not Supported */ |
- | |
144 | #define PCD_SPEED_FULL 2U |
161 | #define PCD_SPEED_FULL USBD_FS_SPEED |
145 | /** |
162 | /** |
146 | * @} |
163 | * @} |
147 | */ |
164 | */ |
148 | 165 | ||
149 | /** @defgroup PCD_PHY_Module PCD PHY Module |
166 | /** @defgroup PCD_PHY_Module PCD PHY Module |
150 | * @{ |
167 | * @{ |
151 | */ |
168 | */ |
- | 169 | #define PCD_PHY_ULPI 1U |
|
152 | #define PCD_PHY_EMBEDDED 2U |
170 | #define PCD_PHY_EMBEDDED 2U |
- | 171 | #define PCD_PHY_UTMI 3U |
|
153 | /** |
172 | /** |
154 | * @} |
173 | * @} |
155 | */ |
174 | */ |
156 | 175 | ||
157 | /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value |
176 | /** @defgroup PCD_Error_Code_definition PCD Error Code definition |
- | 177 | * @brief PCD Error Code definition |
|
158 | * @{ |
178 | * @{ |
159 | */ |
179 | */ |
160 | #ifndef USBD_FS_TRDT_VALUE |
180 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
161 | #define USBD_FS_TRDT_VALUE 5U |
181 | #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ |
162 | #endif /* USBD_FS_TRDT_VALUE */ |
182 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
- | 183 | ||
163 | /** |
184 | /** |
164 | * @} |
185 | * @} |
165 | */ |
186 | */ |
166 | 187 | ||
167 | /** |
188 | /** |
168 | * @} |
189 | * @} |
169 | */ |
190 | */ |
170 | 191 | ||
171 | /* Exported macros -----------------------------------------------------------*/ |
192 | /* Exported macros -----------------------------------------------------------*/ |
172 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
193 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
173 | * @brief macros to handle interrupts and specific clock configurations |
194 | * @brief macros to handle interrupts and specific clock configurations |
174 | * @{ |
195 | * @{ |
175 | */ |
196 | */ |
176 | #if defined (USB_OTG_FS) |
197 | #if defined (USB_OTG_FS) |
- | 198 | #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
|
- | 199 | #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
|
177 | 200 | ||
- | 201 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
|
178 | #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) |
202 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) |
179 | #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) |
203 | #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) |
180 | 204 | ||
181 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
- | |
182 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__)) |
- | |
183 | #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) |
- | |
184 | 205 | ||
185 | #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ |
206 | #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK) |
- | 207 | ||
186 | ~(USB_OTG_PCGCCTL_STOPCLK) |
208 | #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK |
187 | 209 | ||
188 | #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK |
210 | #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) |
189 | 211 | ||
190 | #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) |
- | |
191 | - | ||
192 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE |
212 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE |
193 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) |
213 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) |
194 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) |
214 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) |
195 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE |
215 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE |
196 | - | ||
197 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
- | |
198 | do{ \ |
- | |
199 | EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
- | |
200 | EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
- | |
201 | } while(0U) |
- | |
202 | - | ||
203 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \ |
- | |
204 | do{ \ |
- | |
205 | EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
- | |
206 | EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
- | |
207 | } while(0U) |
- | |
208 | - | ||
209 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
- | |
210 | do{ \ |
- | |
211 | EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
- | |
212 | EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
- | |
213 | EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
- | |
214 | EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
- | |
215 | } while(0U) |
- | |
216 | 216 | ||
217 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE) |
217 | #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
- | 218 | do { \ |
|
- | 219 | EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ |
|
- | 220 | EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ |
|
- | 221 | } while(0U) |
|
218 | #endif /* USB_OTG_FS */ |
222 | #endif /* defined (USB_OTG_FS) */ |
219 | 223 | ||
220 | #if defined (USB) |
224 | #if defined (USB) |
221 | #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) |
225 | #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
222 | #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) |
226 | #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
223 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
227 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
224 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) |
228 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))) |
225 | 229 | ||
226 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
230 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
227 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
231 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
228 | #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) |
232 | #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE) |
229 | #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE |
233 | #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE |
230 | 234 | ||
231 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
235 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ |
232 | do{ \ |
- | |
233 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
- | |
234 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
- | |
235 | } while(0U) |
- | |
236 | 236 | do { \ |
|
237 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE() \ |
- | |
238 | do{ \ |
- | |
239 | EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE); \ |
237 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
240 | EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
238 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
241 | } while(0U) |
239 | } while(0U) |
242 | 240 | ||
243 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() \ |
- | |
244 | do{ \ |
- | |
245 | EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
- | |
246 | EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \ |
- | |
247 | EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \ |
- | |
248 | EXTI->FTSR |= USB_WAKEUP_EXTI_LINE; \ |
- | |
249 | } while(0U) |
- | |
250 | #endif /* USB */ |
241 | #endif /* defined (USB) */ |
251 | 242 | ||
252 | /** |
243 | /** |
253 | * @} |
244 | * @} |
254 | */ |
245 | */ |
255 | 246 | ||
Line 261... | Line 252... | ||
261 | /* Initialization/de-initialization functions ********************************/ |
252 | /* Initialization/de-initialization functions ********************************/ |
262 | /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
253 | /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions |
263 | * @{ |
254 | * @{ |
264 | */ |
255 | */ |
265 | HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
256 | HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); |
266 | HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); |
257 | HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); |
267 | void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
258 | void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); |
268 | void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
259 | void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); |
- | 260 | ||
- | 261 | #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) |
|
- | 262 | /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition |
|
- | 263 | * @brief HAL USB OTG PCD Callback ID enumeration definition |
|
- | 264 | * @{ |
|
- | 265 | */ |
|
- | 266 | typedef enum |
|
- | 267 | { |
|
- | 268 | HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ |
|
- | 269 | HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ |
|
- | 270 | HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ |
|
- | 271 | HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ |
|
- | 272 | HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ |
|
- | 273 | HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ |
|
- | 274 | HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ |
|
- | 275 | ||
- | 276 | HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ |
|
- | 277 | HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ |
|
- | 278 | ||
- | 279 | } HAL_PCD_CallbackIDTypeDef; |
|
- | 280 | /** |
|
- | 281 | * @} |
|
- | 282 | */ |
|
- | 283 | ||
- | 284 | /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition |
|
- | 285 | * @brief HAL USB OTG PCD Callback pointer definition |
|
- | 286 | * @{ |
|
- | 287 | */ |
|
- | 288 | ||
- | 289 | typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ |
|
- | 290 | typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ |
|
- | 291 | typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ |
|
- | 292 | typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ |
|
- | 293 | typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ |
|
- | 294 | ||
- | 295 | /** |
|
- | 296 | * @} |
|
- | 297 | */ |
|
- | 298 | ||
- | 299 | HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, |
|
- | 300 | HAL_PCD_CallbackIDTypeDef CallbackID, |
|
- | 301 | pPCD_CallbackTypeDef pCallback); |
|
- | 302 | ||
- | 303 | HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, |
|
- | 304 | HAL_PCD_CallbackIDTypeDef CallbackID); |
|
- | 305 | ||
- | 306 | HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, |
|
- | 307 | pPCD_DataOutStageCallbackTypeDef pCallback); |
|
- | 308 | ||
- | 309 | HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); |
|
- | 310 | ||
- | 311 | HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, |
|
- | 312 | pPCD_DataInStageCallbackTypeDef pCallback); |
|
- | 313 | ||
- | 314 | HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); |
|
- | 315 | ||
- | 316 | HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, |
|
- | 317 | pPCD_IsoOutIncpltCallbackTypeDef pCallback); |
|
- | 318 | ||
- | 319 | HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); |
|
- | 320 | ||
- | 321 | HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, |
|
- | 322 | pPCD_IsoInIncpltCallbackTypeDef pCallback); |
|
- | 323 | ||
- | 324 | HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); |
|
- | 325 | ||
- | 326 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
|
269 | /** |
327 | /** |
270 | * @} |
328 | * @} |
271 | */ |
329 | */ |
272 | 330 | ||
273 | /* I/O operation functions ***************************************************/ |
331 | /* I/O operation functions ***************************************************/ |
274 | /* Non-Blocking mode: Interrupt */ |
332 | /* Non-Blocking mode: Interrupt */ |
275 | /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions |
333 | /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions |
276 | * @{ |
334 | * @{ |
277 | */ |
335 | */ |
278 | HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
336 | HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); |
279 | HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
337 | HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); |
280 | void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
338 | void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); |
- | 339 | void HAL_PCD_WKUP_IRQHandler(PCD_HandleTypeDef *hpcd); |
|
281 | 340 | ||
282 | void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
- | |
283 | void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
- | |
284 | void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
- | |
285 | void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
341 | void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); |
- | 342 | void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); |
|
286 | void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
343 | void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); |
287 | void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
344 | void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); |
288 | void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
345 | void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); |
289 | void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
- | |
290 | void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
- | |
291 | void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
346 | void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); |
292 | void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
347 | void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); |
- | 348 | ||
- | 349 | void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|
- | 350 | void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|
- | 351 | void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|
- | 352 | void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); |
|
293 | /** |
353 | /** |
294 | * @} |
354 | * @} |
295 | */ |
355 | */ |
296 | 356 | ||
297 | /* Peripheral Control functions **********************************************/ |
357 | /* Peripheral Control functions **********************************************/ |
Line 299... | Line 359... | ||
299 | * @{ |
359 | * @{ |
300 | */ |
360 | */ |
301 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
361 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
302 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
362 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
303 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
363 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
304 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
364 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
- | 365 | uint16_t ep_mps, uint8_t ep_type); |
|
- | 366 | ||
305 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
367 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
306 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
368 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
- | 369 | uint8_t *pBuf, uint32_t len); |
|
- | 370 | ||
307 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
371 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
308 | uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
372 | uint8_t *pBuf, uint32_t len); |
- | 373 | ||
- | 374 | ||
309 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
375 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
310 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
376 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
311 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
377 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
312 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
378 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
313 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
379 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
- | 380 | ||
- | 381 | uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|
314 | /** |
382 | /** |
315 | * @} |
383 | * @} |
316 | */ |
384 | */ |
317 | 385 | ||
318 | /* Peripheral State functions ************************************************/ |
386 | /* Peripheral State functions ************************************************/ |
Line 334... | Line 402... | ||
334 | */ |
402 | */ |
335 | /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
403 | /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
336 | * @{ |
404 | * @{ |
337 | */ |
405 | */ |
338 | #if defined (USB_OTG_FS) |
406 | #if defined (USB_OTG_FS) |
339 | #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U |
- | |
340 | #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU |
- | |
341 | #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U |
- | |
342 | - | ||
343 | #define USB_OTG_FS_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */ |
407 | #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ |
344 | #endif /* USB_OTG_FS */ |
408 | #endif /* defined (USB_OTG_FS) */ |
345 | 409 | ||
346 | #if defined (USB) |
410 | #if defined (USB) |
347 | #define USB_WAKEUP_EXTI_LINE 0x00040000U /*!< External interrupt line 18 Connected to the USB EXTI Line */ |
411 | #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ |
348 | #endif /* USB */ |
412 | #endif /* defined (USB) */ |
- | 413 | ||
349 | /** |
414 | /** |
350 | * @} |
415 | * @} |
351 | */ |
416 | */ |
352 | - | ||
353 | #if defined (USB) |
417 | #if defined (USB) |
354 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
418 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
355 | * @{ |
419 | * @{ |
356 | */ |
420 | */ |
357 | #define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
421 | #define PCD_EP0MPS_64 EP_MPS_64 |
358 | #define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
422 | #define PCD_EP0MPS_32 EP_MPS_32 |
359 | #define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
423 | #define PCD_EP0MPS_16 EP_MPS_16 |
360 | #define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
424 | #define PCD_EP0MPS_08 EP_MPS_8 |
361 | /** |
425 | /** |
362 | * @} |
426 | * @} |
363 | */ |
427 | */ |
364 | 428 | ||
365 | /** @defgroup PCD_ENDP PCD ENDP |
429 | /** @defgroup PCD_ENDP PCD ENDP |
366 | * @{ |
430 | * @{ |
367 | */ |
431 | */ |
368 | #define PCD_ENDP0 ((uint8_t)0) |
432 | #define PCD_ENDP0 0U |
369 | #define PCD_ENDP1 ((uint8_t)1) |
433 | #define PCD_ENDP1 1U |
370 | #define PCD_ENDP2 ((uint8_t)2) |
434 | #define PCD_ENDP2 2U |
371 | #define PCD_ENDP3 ((uint8_t)3) |
435 | #define PCD_ENDP3 3U |
372 | #define PCD_ENDP4 ((uint8_t)4) |
436 | #define PCD_ENDP4 4U |
373 | #define PCD_ENDP5 ((uint8_t)5) |
437 | #define PCD_ENDP5 5U |
374 | #define PCD_ENDP6 ((uint8_t)6) |
438 | #define PCD_ENDP6 6U |
375 | #define PCD_ENDP7 ((uint8_t)7) |
439 | #define PCD_ENDP7 7U |
376 | /** |
440 | /** |
377 | * @} |
441 | * @} |
378 | */ |
442 | */ |
379 | 443 | ||
380 | /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
444 | /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind |
Line 383... | Line 447... | ||
383 | #define PCD_SNG_BUF 0U |
447 | #define PCD_SNG_BUF 0U |
384 | #define PCD_DBL_BUF 1U |
448 | #define PCD_DBL_BUF 1U |
385 | /** |
449 | /** |
386 | * @} |
450 | * @} |
387 | */ |
451 | */ |
388 | #endif /* USB */ |
452 | #endif /* defined (USB) */ |
389 | /** |
453 | /** |
390 | * @} |
454 | * @} |
391 | */ |
455 | */ |
392 | 456 | ||
- | 457 | #if defined (USB_OTG_FS) |
|
- | 458 | #ifndef USB_OTG_DOEPINT_OTEPSPR |
|
- | 459 | #define USB_OTG_DOEPINT_OTEPSPR (0x1UL << 5) /*!< Status Phase Received interrupt */ |
|
- | 460 | #endif |
|
- | 461 | ||
- | 462 | #ifndef USB_OTG_DOEPMSK_OTEPSPRM |
|
- | 463 | #define USB_OTG_DOEPMSK_OTEPSPRM (0x1UL << 5) /*!< Setup Packet Received interrupt mask */ |
|
- | 464 | #endif |
|
- | 465 | ||
- | 466 | #ifndef USB_OTG_DOEPINT_NAK |
|
- | 467 | #define USB_OTG_DOEPINT_NAK (0x1UL << 13) /*!< NAK interrupt */ |
|
- | 468 | #endif |
|
- | 469 | ||
- | 470 | #ifndef USB_OTG_DOEPMSK_NAKM |
|
- | 471 | #define USB_OTG_DOEPMSK_NAKM (0x1UL << 13) /*!< OUT Packet NAK interrupt mask */ |
|
- | 472 | #endif |
|
- | 473 | ||
- | 474 | #ifndef USB_OTG_DOEPINT_STPKTRX |
|
- | 475 | #define USB_OTG_DOEPINT_STPKTRX (0x1UL << 15) /*!< Setup Packet Received interrupt */ |
|
- | 476 | #endif |
|
- | 477 | ||
- | 478 | #ifndef USB_OTG_DOEPMSK_NYETM |
|
- | 479 | #define USB_OTG_DOEPMSK_NYETM (0x1UL << 14) /*!< Setup Packet Received interrupt mask */ |
|
- | 480 | #endif |
|
- | 481 | #endif /* defined (USB_OTG_FS) */ |
|
- | 482 | ||
393 | /* Private macros ------------------------------------------------------------*/ |
483 | /* Private macros ------------------------------------------------------------*/ |
394 | /** @addtogroup PCD_Private_Macros PCD Private Macros |
484 | /** @defgroup PCD_Private_Macros PCD Private Macros |
395 | * @{ |
485 | * @{ |
396 | */ |
486 | */ |
397 | #if defined (USB) |
487 | #if defined (USB) |
- | 488 | /******************** Bit definition for USB_COUNTn_RX register *************/ |
|
- | 489 | #define USB_CNTRX_NBLK_MSK (0x1FU << 10) |
|
- | 490 | #define USB_CNTRX_BLSIZE (0x1U << 15) |
|
- | 491 | ||
398 | /* SetENDPOINT */ |
492 | /* SetENDPOINT */ |
399 | #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*(&(USBx)->EP0R + (bEpNum) * 2U)= (uint16_t)(wRegValue)) |
493 | #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) |
400 | 494 | ||
401 | /* GetENDPOINT */ |
495 | /* GetENDPOINT */ |
402 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + (bEpNum) * 2U)) |
496 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) |
403 | 497 | ||
404 | /* ENDPOINT transfer */ |
498 | /* ENDPOINT transfer */ |
405 | #define USB_EP0StartXfer USB_EPStartXfer |
499 | #define USB_EP0StartXfer USB_EPStartXfer |
406 | 500 | ||
407 | /** |
501 | /** |
408 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
502 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
409 | * @param USBx: USB peripheral instance register address. |
503 | * @param USBx USB peripheral instance register address. |
410 | * @param bEpNum: Endpoint Number. |
504 | * @param bEpNum Endpoint Number. |
411 | * @param wType: Endpoint Type. |
505 | * @param wType Endpoint Type. |
412 | * @retval None |
506 | * @retval None |
413 | */ |
507 | */ |
414 | #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
- | |
415 | ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) ))) |
508 | #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) |
416 | 509 | ||
417 | /** |
510 | /** |
418 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
511 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
419 | * @param USBx: USB peripheral instance register address. |
512 | * @param USBx USB peripheral instance register address. |
420 | * @param bEpNum: Endpoint Number. |
513 | * @param bEpNum Endpoint Number. |
421 | * @retval Endpoint Type |
514 | * @retval Endpoint Type |
422 | */ |
515 | */ |
423 | #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
516 | #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) |
424 | 517 | ||
425 | /** |
518 | /** |
426 | * @brief free buffer used from the application realizing it to the line |
519 | * @brief free buffer used from the application realizing it to the line |
427 | toggles bit SW_BUF in the double buffered endpoint register |
520 | * toggles bit SW_BUF in the double buffered endpoint register |
428 | * @param USBx: USB peripheral instance register address. |
- | |
429 | * @param bEpNum: Endpoint Number. |
521 | * @param USBx USB device. |
430 | * @param bDir: Direction |
522 | * @param bEpNum, bDir |
431 | * @retval None |
523 | * @retval None |
432 | */ |
524 | */ |
433 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\ |
525 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ |
434 | {\ |
526 | do { \ |
435 | if ((bDir) == PCD_EP_DBUF_OUT)\ |
527 | if ((bDir) == 0U) \ |
- | 528 | { \ |
|
436 | { /* OUT double buffered endpoint */\ |
529 | /* OUT double buffered endpoint */ \ |
437 | PCD_TX_DTOG((USBx), (bEpNum));\ |
530 | PCD_TX_DTOG((USBx), (bEpNum)); \ |
438 | }\ |
531 | } \ |
439 | else if ((bDir) == PCD_EP_DBUF_IN)\ |
532 | else if ((bDir) == 1U) \ |
- | 533 | { \ |
|
440 | { /* IN double buffered endpoint */\ |
534 | /* IN double buffered endpoint */ \ |
441 | PCD_RX_DTOG((USBx), (bEpNum));\ |
535 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
442 | }\ |
536 | } \ |
443 | } |
- | |
444 | - | ||
445 | /** |
- | |
446 | * @brief gets direction of the double buffered endpoint |
- | |
447 | * @param USBx: USB peripheral instance register address. |
- | |
448 | * @param bEpNum: Endpoint Number. |
- | |
449 | * @retval EP_DBUF_OUT, EP_DBUF_IN, |
- | |
450 | * EP_DBUF_ERR if the endpoint counter not yet programmed. |
- | |
451 | */ |
- | |
452 | #define PCD_GET_DB_DIR(USBx, bEpNum)\ |
- | |
453 | {\ |
- | |
454 | if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00) != 0)\ |
- | |
455 | return(PCD_EP_DBUF_OUT);\ |
- | |
456 | else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FF) != 0)\ |
- | |
457 | return(PCD_EP_DBUF_IN);\ |
- | |
458 | else\ |
537 | } while(0) |
459 | return(PCD_EP_DBUF_ERR);\ |
- | |
460 | } |
- | |
461 | 538 | ||
462 | /** |
539 | /** |
463 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
540 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
464 | * @param USBx: USB peripheral instance register address. |
541 | * @param USBx USB peripheral instance register address. |
465 | * @param bEpNum: Endpoint Number. |
542 | * @param bEpNum Endpoint Number. |
466 | * @param wState: new state |
543 | * @param wState new state |
467 | * @retval None |
544 | * @retval None |
468 | */ |
545 | */ |
469 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\ |
546 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ |
- | 547 | do { \ |
|
- | 548 | uint16_t _wRegVal; \ |
|
470 | \ |
549 | \ |
471 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK;\ |
550 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ |
472 | /* toggle first bit ? */ \ |
551 | /* toggle first bit ? */ \ |
473 | if((USB_EPTX_DTOG1 & (wState))!= 0U)\ |
552 | if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ |
474 | { \ |
- | |
- | 553 | { \ |
|
475 | _wRegVal ^= USB_EPTX_DTOG1; \ |
554 | _wRegVal ^= USB_EPTX_DTOG1; \ |
476 | } \ |
- | |
- | 555 | } \ |
|
477 | /* toggle second bit ? */ \ |
556 | /* toggle second bit ? */ \ |
478 | if((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
557 | if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
479 | { \ |
- | |
- | 558 | { \ |
|
480 | _wRegVal ^= USB_EPTX_DTOG2; \ |
559 | _wRegVal ^= USB_EPTX_DTOG2; \ |
481 | } \ |
- | |
- | 560 | } \ |
|
482 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX));\ |
561 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
483 | } /* PCD_SET_EP_TX_STATUS */ |
562 | } while(0) /* PCD_SET_EP_TX_STATUS */ |
484 | 563 | ||
485 | /** |
564 | /** |
486 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
565 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
487 | * @param USBx: USB peripheral instance register address. |
566 | * @param USBx USB peripheral instance register address. |
488 | * @param bEpNum: Endpoint Number. |
567 | * @param bEpNum Endpoint Number. |
489 | * @param wState: new state |
568 | * @param wState new state |
490 | * @retval None |
569 | * @retval None |
491 | */ |
570 | */ |
492 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\ |
571 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ |
- | 572 | do { \ |
|
493 | register uint16_t _wRegVal; \ |
573 | uint16_t _wRegVal; \ |
494 | \ |
574 | \ |
495 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK;\ |
575 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ |
496 | /* toggle first bit ? */ \ |
576 | /* toggle first bit ? */ \ |
497 | if((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
577 | if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
498 | { \ |
- | |
- | 578 | { \ |
|
499 | _wRegVal ^= USB_EPRX_DTOG1; \ |
579 | _wRegVal ^= USB_EPRX_DTOG1; \ |
500 | } \ |
- | |
- | 580 | } \ |
|
501 | /* toggle second bit ? */ \ |
581 | /* toggle second bit ? */ \ |
502 | if((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
582 | if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
503 | { \ |
- | |
- | 583 | { \ |
|
504 | _wRegVal ^= USB_EPRX_DTOG2; \ |
584 | _wRegVal ^= USB_EPRX_DTOG2; \ |
505 | } \ |
- | |
- | 585 | } \ |
|
506 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX)); \ |
586 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
507 | } /* PCD_SET_EP_RX_STATUS */ |
587 | } while(0) /* PCD_SET_EP_RX_STATUS */ |
508 | 588 | ||
509 | /** |
589 | /** |
510 | * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
590 | * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) |
511 | * @param USBx: USB peripheral instance register address. |
591 | * @param USBx USB peripheral instance register address. |
512 | * @param bEpNum: Endpoint Number. |
592 | * @param bEpNum Endpoint Number. |
513 | * @param wStaterx: new state. |
593 | * @param wStaterx new state. |
514 | * @param wStatetx: new state. |
594 | * @param wStatetx new state. |
515 | * @retval None |
595 | * @retval None |
516 | */ |
596 | */ |
517 | #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\ |
597 | #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ |
- | 598 | do { \ |
|
518 | register uint32_t _wRegVal; \ |
599 | uint16_t _wRegVal; \ |
519 | \ |
600 | \ |
520 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\ |
601 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ |
521 | /* toggle first bit ? */ \ |
602 | /* toggle first bit ? */ \ |
522 | if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \ |
603 | if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ |
523 | { \ |
- | |
- | 604 | { \ |
|
524 | _wRegVal ^= USB_EPRX_DTOG1; \ |
605 | _wRegVal ^= USB_EPRX_DTOG1; \ |
525 | } \ |
- | |
- | 606 | } \ |
|
526 | /* toggle second bit ? */ \ |
607 | /* toggle second bit ? */ \ |
527 | if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ |
608 | if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ |
528 | { \ |
- | |
- | 609 | { \ |
|
529 | _wRegVal ^= USB_EPRX_DTOG2; \ |
610 | _wRegVal ^= USB_EPRX_DTOG2; \ |
530 | } \ |
- | |
- | 611 | } \ |
|
531 | /* toggle first bit ? */ \ |
612 | /* toggle first bit ? */ \ |
532 | if((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ |
613 | if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ |
533 | { \ |
- | |
- | 614 | { \ |
|
534 | _wRegVal ^= USB_EPTX_DTOG1; \ |
615 | _wRegVal ^= USB_EPTX_DTOG1; \ |
535 | } \ |
- | |
- | 616 | } \ |
|
536 | /* toggle second bit ? */ \ |
617 | /* toggle second bit ? */ \ |
537 | if((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ |
618 | if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ |
538 | { \ |
- | |
- | 619 | { \ |
|
539 | _wRegVal ^= USB_EPTX_DTOG2; \ |
620 | _wRegVal ^= USB_EPTX_DTOG2; \ |
540 | } \ |
- | |
- | 621 | } \ |
|
- | 622 | \ |
|
541 | PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ |
623 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
542 | } /* PCD_SET_EP_TXRX_STATUS */ |
624 | } while(0) /* PCD_SET_EP_TXRX_STATUS */ |
543 | 625 | ||
544 | /** |
626 | /** |
545 | * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
627 | * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] |
546 | * /STAT_RX[1:0]) |
628 | * /STAT_RX[1:0]) |
547 | * @param USBx: USB peripheral instance register address. |
629 | * @param USBx USB peripheral instance register address. |
548 | * @param bEpNum: Endpoint Number. |
630 | * @param bEpNum Endpoint Number. |
549 | * @retval status |
631 | * @retval status |
550 | */ |
632 | */ |
551 | #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
633 | #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) |
552 | #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
634 | #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) |
553 | 635 | ||
554 | /** |
636 | /** |
555 | * @brief sets directly the VALID tx/rx-status into the endpoint register |
637 | * @brief sets directly the VALID tx/rx-status into the endpoint register |
556 | * @param USBx: USB peripheral instance register address. |
638 | * @param USBx USB peripheral instance register address. |
557 | * @param bEpNum: Endpoint Number. |
639 | * @param bEpNum Endpoint Number. |
558 | * @retval None |
640 | * @retval None |
559 | */ |
641 | */ |
560 | #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
642 | #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) |
561 | #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
643 | #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) |
562 | 644 | ||
563 | /** |
645 | /** |
564 | * @brief checks stall condition in an endpoint. |
646 | * @brief checks stall condition in an endpoint. |
565 | * @param USBx: USB peripheral instance register address. |
647 | * @param USBx USB peripheral instance register address. |
566 | * @param bEpNum: Endpoint Number. |
648 | * @param bEpNum Endpoint Number. |
567 | * @retval TRUE = endpoint in stall condition. |
649 | * @retval TRUE = endpoint in stall condition. |
568 | */ |
650 | */ |
569 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
651 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) |
570 | == USB_EP_TX_STALL) |
- | |
571 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
652 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) |
572 | == USB_EP_RX_STALL) |
- | |
573 | 653 | ||
574 | /** |
654 | /** |
575 | * @brief set & clear EP_KIND bit. |
655 | * @brief set & clear EP_KIND bit. |
576 | * @param USBx: USB peripheral instance register address. |
656 | * @param USBx USB peripheral instance register address. |
577 | * @param bEpNum: Endpoint Number. |
657 | * @param bEpNum Endpoint Number. |
578 | * @retval None |
658 | * @retval None |
579 | */ |
659 | */ |
580 | #define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
660 | #define PCD_SET_EP_KIND(USBx, bEpNum) \ |
- | 661 | do { \ |
|
- | 662 | uint16_t _wRegVal; \ |
|
- | 663 | \ |
|
581 | (USB_EP_CTR_RX|USB_EP_CTR_TX|((PCD_GET_ENDPOINT((USBx), (bEpNum)) | USB_EP_KIND) & USB_EPREG_MASK)))) |
664 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
- | 665 | \ |
|
- | 666 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ |
|
- | 667 | } while(0) /* PCD_SET_EP_KIND */ |
|
- | 668 | ||
582 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
669 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ |
- | 670 | do { \ |
|
- | 671 | uint16_t _wRegVal; \ |
|
- | 672 | \ |
|
583 | (USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK)))) |
673 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ |
- | 674 | \ |
|
- | 675 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|
- | 676 | } while(0) /* PCD_CLEAR_EP_KIND */ |
|
584 | 677 | ||
585 | /** |
678 | /** |
586 | * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
679 | * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. |
587 | * @param USBx: USB peripheral instance register address. |
680 | * @param USBx USB peripheral instance register address. |
588 | * @param bEpNum: Endpoint Number. |
681 | * @param bEpNum Endpoint Number. |
589 | * @retval None |
682 | * @retval None |
590 | */ |
683 | */ |
591 | #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
684 | #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
592 | #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
685 | #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
593 | 686 | ||
594 | /** |
687 | /** |
595 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
688 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
596 | * @param USBx: USB peripheral instance register address. |
689 | * @param USBx USB peripheral instance register address. |
597 | * @param bEpNum: Endpoint Number. |
690 | * @param bEpNum Endpoint Number. |
598 | * @retval None |
691 | * @retval None |
599 | */ |
692 | */ |
600 | #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
693 | #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
601 | #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
694 | #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
602 | 695 | ||
603 | /** |
696 | /** |
604 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
697 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
605 | * @param USBx: USB peripheral instance register address. |
698 | * @param USBx USB peripheral instance register address. |
606 | * @param bEpNum: Endpoint Number. |
699 | * @param bEpNum Endpoint Number. |
607 | * @retval None |
700 | * @retval None |
608 | */ |
701 | */ |
609 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
702 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ |
- | 703 | do { \ |
|
- | 704 | uint16_t _wRegVal; \ |
|
- | 705 | \ |
|
610 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK)) |
706 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ |
- | 707 | \ |
|
- | 708 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ |
|
- | 709 | } while(0) /* PCD_CLEAR_RX_EP_CTR */ |
|
- | 710 | ||
611 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
711 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ |
- | 712 | do { \ |
|
- | 713 | uint16_t _wRegVal; \ |
|
- | 714 | \ |
|
612 | PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK)) |
715 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ |
- | 716 | \ |
|
- | 717 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ |
|
- | 718 | } while(0) /* PCD_CLEAR_TX_EP_CTR */ |
|
613 | 719 | ||
614 | /** |
720 | /** |
615 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
721 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
616 | * @param USBx: USB peripheral instance register address. |
722 | * @param USBx USB peripheral instance register address. |
617 | * @param bEpNum: Endpoint Number. |
723 | * @param bEpNum Endpoint Number. |
618 | * @retval None |
724 | * @retval None |
619 | */ |
725 | */ |
620 | #define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
726 | #define PCD_RX_DTOG(USBx, bEpNum) \ |
- | 727 | do { \ |
|
- | 728 | uint16_t _wEPVal; \ |
|
- | 729 | \ |
|
621 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
730 | _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
- | 731 | \ |
|
622 | #define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
732 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ |
623 | USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK))) |
733 | } while(0) /* PCD_RX_DTOG */ |
624 | 734 | ||
- | 735 | #define PCD_TX_DTOG(USBx, bEpNum) \ |
|
- | 736 | do { \ |
|
- | 737 | uint16_t _wEPVal; \ |
|
- | 738 | \ |
|
- | 739 | _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
|
- | 740 | \ |
|
- | 741 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ |
|
- | 742 | } while(0) /* PCD_TX_DTOG */ |
|
625 | /** |
743 | /** |
626 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
744 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
627 | * @param USBx: USB peripheral instance register address. |
745 | * @param USBx USB peripheral instance register address. |
628 | * @param bEpNum: Endpoint Number. |
746 | * @param bEpNum Endpoint Number. |
629 | * @retval None |
747 | * @retval None |
630 | */ |
748 | */ |
- | 749 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ |
|
- | 750 | do { \ |
|
- | 751 | uint16_t _wRegVal; \ |
|
- | 752 | \ |
|
631 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_RX) != 0U)\ |
753 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
- | 754 | \ |
|
632 | { \ |
755 | if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ |
- | 756 | { \ |
|
633 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
757 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
- | 758 | } \ |
|
634 | } |
759 | } while(0) /* PCD_CLEAR_RX_DTOG */ |
- | 760 | ||
635 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_DTOG_TX) != 0U)\ |
761 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ |
- | 762 | do { \ |
|
- | 763 | uint16_t _wRegVal; \ |
|
- | 764 | \ |
|
636 | { \ |
765 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
- | 766 | \ |
|
637 | PCD_TX_DTOG((USBx), (bEpNum)); \ |
767 | if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ |
- | 768 | { \ |
|
638 | } |
769 | PCD_TX_DTOG((USBx), (bEpNum)); \ |
639 | 770 | } \ |
|
- | 771 | } while(0) /* PCD_CLEAR_TX_DTOG */ |
|
- | 772 | ||
640 | /** |
773 | /** |
641 | * @brief Sets address in an endpoint register. |
774 | * @brief Sets address in an endpoint register. |
642 | * @param USBx: USB peripheral instance register address. |
775 | * @param USBx USB peripheral instance register address. |
643 | * @param bEpNum: Endpoint Number. |
776 | * @param bEpNum Endpoint Number. |
644 | * @param bAddr: Address. |
777 | * @param bAddr Address. |
645 | * @retval None |
778 | * @retval None |
646 | */ |
779 | */ |
647 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\ |
780 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ |
- | 781 | do { \ |
|
- | 782 | uint16_t _wRegVal; \ |
|
- | 783 | \ |
|
648 | USB_EP_CTR_RX|USB_EP_CTR_TX|(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr)) |
784 | _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ |
- | 785 | \ |
|
- | 786 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
|
- | 787 | } while(0) /* PCD_SET_EP_ADDRESS */ |
|
649 | 788 | ||
- | 789 | /** |
|
- | 790 | * @brief Gets address in an endpoint register. |
|
- | 791 | * @param USBx USB peripheral instance register address. |
|
- | 792 | * @param bEpNum Endpoint Number. |
|
- | 793 | * @retval None |
|
- | 794 | */ |
|
650 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
795 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
651 | 796 | ||
652 | #define PCD_EP_TX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
- | |
653 | #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+2U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
797 | #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
654 | #define PCD_EP_RX_ADDRESS(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+4U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
- | |
655 | #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint32_t *)(((USBx)->BTABLE+(bEpNum)*8U+6U)*2U+ ((uint32_t)(USBx) + 0x400U))) |
798 | #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
656 | - | ||
657 | #define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) {\ |
- | |
658 | uint32_t *pdwReg = PCD_EP_RX_CNT((USBx), (bEpNum)); \ |
- | |
659 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ |
- | |
660 | } |
- | |
661 | 799 | ||
662 | /** |
800 | /** |
663 | * @brief sets address of the tx/rx buffer. |
801 | * @brief sets address of the tx/rx buffer. |
664 | * @param USBx: USB peripheral instance register address. |
802 | * @param USBx USB peripheral instance register address. |
665 | * @param bEpNum: Endpoint Number. |
803 | * @param bEpNum Endpoint Number. |
666 | * @param wAddr: address to be set (must be word aligned). |
804 | * @param wAddr address to be set (must be word aligned). |
667 | * @retval None |
805 | * @retval None |
668 | */ |
806 | */ |
669 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U)) |
807 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ |
- | 808 | do { \ |
|
- | 809 | __IO uint16_t *_wRegVal; \ |
|
- | 810 | uint32_t _wRegBase = (uint32_t)USBx; \ |
|
- | 811 | \ |
|
- | 812 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|
- | 813 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ |
|
- | 814 | *_wRegVal = ((wAddr) >> 1) << 1; \ |
|
- | 815 | } while(0) /* PCD_SET_EP_TX_ADDRESS */ |
|
- | 816 | ||
670 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U)) |
817 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ |
- | 818 | do { \ |
|
- | 819 | __IO uint16_t *_wRegVal; \ |
|
- | 820 | uint32_t _wRegBase = (uint32_t)USBx; \ |
|
- | 821 | \ |
|
- | 822 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|
- | 823 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ |
|
- | 824 | *_wRegVal = ((wAddr) >> 1) << 1; \ |
|
- | 825 | } while(0) /* PCD_SET_EP_RX_ADDRESS */ |
|
671 | 826 | ||
672 | /** |
827 | /** |
673 | * @brief Gets address of the tx/rx buffer. |
828 | * @brief Gets address of the tx/rx buffer. |
674 | * @param USBx: USB peripheral instance register address. |
829 | * @param USBx USB peripheral instance register address. |
675 | * @param bEpNum: Endpoint Number. |
830 | * @param bEpNum Endpoint Number. |
676 | * @retval address of the buffer. |
831 | * @retval address of the buffer. |
677 | */ |
832 | */ |
678 | #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
833 | #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) |
679 | #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
834 | #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) |
680 | 835 | ||
681 | /** |
836 | /** |
682 | * @brief Sets counter of rx buffer with no. of blocks. |
837 | * @brief Sets counter of rx buffer with no. of blocks. |
683 | * @param dwReg: Register |
838 | * @param pdwReg Register pointer |
684 | * @param wCount: Counter. |
839 | * @param wCount Counter. |
685 | * @param wNBlocks: no. of Blocks. |
840 | * @param wNBlocks no. of Blocks. |
686 | * @retval None |
841 | * @retval None |
687 | */ |
842 | */ |
688 | #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\ |
843 | #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ |
- | 844 | do { \ |
|
689 | (wNBlocks) = (wCount) >> 5U;\ |
845 | (wNBlocks) = (wCount) >> 5; \ |
690 | if(((wCount) & 0x1FU) == 0U)\ |
846 | if (((wCount) & 0x1fU) == 0U) \ |
691 | { \ |
847 | { \ |
692 | (wNBlocks)--;\ |
848 | (wNBlocks)--; \ |
693 | } \ |
849 | } \ |
694 | *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | 0x8000U); \ |
850 | *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ |
695 | }/* PCD_CALC_BLK32 */ |
851 | } while(0) /* PCD_CALC_BLK32 */ |
696 | 852 | ||
697 | #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\ |
853 | #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ |
- | 854 | do { \ |
|
698 | (wNBlocks) = (wCount) >> 1U;\ |
855 | (wNBlocks) = (wCount) >> 1; \ |
699 | if(((wCount) & 0x01U) != 0U)\ |
856 | if (((wCount) & 0x1U) != 0U) \ |
700 | { \ |
857 | { \ |
701 | (wNBlocks)++;\ |
858 | (wNBlocks)++; \ |
702 | } \ |
859 | } \ |
703 | *pdwReg = (uint16_t)((wNBlocks) << 10U);\ |
860 | *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ |
704 | }/* PCD_CALC_BLK2 */ |
861 | } while(0) /* PCD_CALC_BLK2 */ |
705 | 862 | ||
706 | #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\ |
863 | #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ |
- | 864 | do { \ |
|
707 | uint16_t wNBlocks;\ |
865 | uint32_t wNBlocks; \ |
708 | if((wCount) > 62U) \ |
866 | if ((wCount) == 0U) \ |
- | 867 | { \ |
|
709 | { \ |
868 | *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ |
710 | PCD_CALC_BLK32((dwReg),(wCount),wNBlocks); \ |
869 | *(pdwReg) |= USB_CNTRX_BLSIZE; \ |
711 | } \ |
870 | } \ |
712 | else \ |
871 | else if((wCount) <= 62U) \ |
713 | { \ |
872 | { \ |
714 | PCD_CALC_BLK2((dwReg),(wCount),wNBlocks); \ |
873 | PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ |
- | 874 | } \ |
|
- | 875 | else \ |
|
- | 876 | { \ |
|
715 | } \ |
877 | PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ |
- | 878 | } \ |
|
716 | }/* PCD_SET_EP_CNT_RX_REG */ |
879 | } while(0) /* PCD_SET_EP_CNT_RX_REG */ |
717 | 880 | ||
718 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\ |
881 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ |
- | 882 | do { \ |
|
719 | uint32_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \ |
883 | uint32_t _wRegBase = (uint32_t)(USBx); \ |
- | 884 | __IO uint16_t *pdwReg; \ |
|
- | 885 | \ |
|
- | 886 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|
- | 887 | pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
|
720 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount));\ |
888 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ |
721 | } |
889 | } while(0) |
722 | 890 | ||
723 | /** |
891 | /** |
724 | * @brief sets counter for the tx/rx buffer. |
892 | * @brief sets counter for the tx/rx buffer. |
725 | * @param USBx: USB peripheral instance register address. |
893 | * @param USBx USB peripheral instance register address. |
726 | * @param bEpNum: Endpoint Number. |
894 | * @param bEpNum Endpoint Number. |
727 | * @param wCount: Counter value. |
895 | * @param wCount Counter value. |
728 | * @retval None |
896 | * @retval None |
729 | */ |
897 | */ |
730 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount)) |
898 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ |
- | 899 | do { \ |
|
- | 900 | uint32_t _wRegBase = (uint32_t)(USBx); \ |
|
- | 901 | __IO uint16_t *_wRegVal; \ |
|
- | 902 | \ |
|
- | 903 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|
- | 904 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
|
- | 905 | *_wRegVal = (uint16_t)(wCount); \ |
|
- | 906 | } while(0) |
|
731 | 907 | ||
- | 908 | #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ |
|
- | 909 | do { \ |
|
- | 910 | uint32_t _wRegBase = (uint32_t)(USBx); \ |
|
- | 911 | __IO uint16_t *_wRegVal; \ |
|
- | 912 | \ |
|
- | 913 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
|
- | 914 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
|
- | 915 | PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ |
|
- | 916 | } while(0) |
|
732 | 917 | ||
733 | /** |
918 | /** |
734 | * @brief gets counter of the tx buffer. |
919 | * @brief gets counter of the tx buffer. |
735 | * @param USBx: USB peripheral instance register address. |
920 | * @param USBx USB peripheral instance register address. |
736 | * @param bEpNum: Endpoint Number. |
921 | * @param bEpNum Endpoint Number. |
737 | * @retval Counter value |
922 | * @retval Counter value |
738 | */ |
923 | */ |
739 | #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3FFU) |
924 | #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) |
740 | #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3FFU) |
925 | #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) |
741 | 926 | ||
742 | /** |
927 | /** |
743 | * @brief Sets buffer 0/1 address in a double buffer endpoint. |
928 | * @brief Sets buffer 0/1 address in a double buffer endpoint. |
744 | * @param USBx: USB peripheral instance register address. |
929 | * @param USBx USB peripheral instance register address. |
745 | * @param bEpNum: Endpoint Number. |
930 | * @param bEpNum Endpoint Number. |
746 | * @param wBuf0Addr: buffer 0 address. |
931 | * @param wBuf0Addr buffer 0 address. |
747 | * @retval Counter value |
932 | * @retval Counter value |
748 | */ |
933 | */ |
- | 934 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ |
|
- | 935 | do { \ |
|
749 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) {PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr));} |
936 | PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ |
- | 937 | } while(0) /* PCD_SET_EP_DBUF0_ADDR */ |
|
- | 938 | ||
- | 939 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ |
|
- | 940 | do { \ |
|
750 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) {PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr));} |
941 | PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ |
- | 942 | } while(0) /* PCD_SET_EP_DBUF1_ADDR */ |
|
751 | 943 | ||
752 | /** |
944 | /** |
753 | * @brief Sets addresses in a double buffer endpoint. |
945 | * @brief Sets addresses in a double buffer endpoint. |
754 | * @param USBx: USB peripheral instance register address. |
946 | * @param USBx USB peripheral instance register address. |
755 | * @param bEpNum: Endpoint Number. |
947 | * @param bEpNum Endpoint Number. |
756 | * @param wBuf0Addr: buffer 0 address. |
948 | * @param wBuf0Addr: buffer 0 address. |
757 | * @param wBuf1Addr = buffer 1 address. |
949 | * @param wBuf1Addr = buffer 1 address. |
758 | * @retval None |
950 | * @retval None |
759 | */ |
951 | */ |
760 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \ |
952 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ |
- | 953 | do { \ |
|
761 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\ |
954 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ |
762 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\ |
955 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ |
763 | } /* PCD_SET_EP_DBUF_ADDR */ |
956 | } while(0) /* PCD_SET_EP_DBUF_ADDR */ |
764 | 957 | ||
765 | /** |
958 | /** |
766 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
959 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
767 | * @param USBx: USB peripheral instance register address. |
960 | * @param USBx USB peripheral instance register address. |
768 | * @param bEpNum: Endpoint Number. |
961 | * @param bEpNum Endpoint Number. |
769 | * @retval None |
962 | * @retval None |
770 | */ |
963 | */ |
771 | #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
964 | #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) |
772 | #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
965 | #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) |
773 | 966 | ||
774 | /** |
967 | /** |
775 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
968 | * @brief Gets buffer 0/1 address of a double buffer endpoint. |
776 | * @param USBx: USB peripheral instance register address. |
969 | * @param USBx USB peripheral instance register address. |
777 | * @param bEpNum: Endpoint Number. |
970 | * @param bEpNum Endpoint Number. |
778 | * @param bDir: endpoint dir EP_DBUF_OUT = OUT |
971 | * @param bDir endpoint dir EP_DBUF_OUT = OUT |
779 | * EP_DBUF_IN = IN |
972 | * EP_DBUF_IN = IN |
780 | * @param wCount: Counter value |
973 | * @param wCount: Counter value |
781 | * @retval None |
974 | * @retval None |
782 | */ |
975 | */ |
783 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) { \ |
976 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ |
- | 977 | do { \ |
|
784 | if((bDir) == PCD_EP_DBUF_OUT)\ |
978 | if ((bDir) == 0U) \ |
785 | /* OUT endpoint */ \ |
979 | /* OUT endpoint */ \ |
- | 980 | { \ |
|
786 | {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount));} \ |
981 | PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ |
- | 982 | } \ |
|
- | 983 | else \ |
|
- | 984 | { \ |
|
787 | else if((bDir) == PCD_EP_DBUF_IN)\ |
985 | if ((bDir) == 1U) \ |
- | 986 | { \ |
|
788 | /* IN endpoint */ \ |
987 | /* IN endpoint */ \ |
789 | *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
988 | PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ |
- | 989 | } \ |
|
- | 990 | } \ |
|
790 | } /* SetEPDblBuf0Count*/ |
991 | } while(0) /* SetEPDblBuf0Count*/ |
791 | 992 | ||
792 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) { \ |
993 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ |
- | 994 | do { \ |
|
- | 995 | uint32_t _wBase = (uint32_t)(USBx); \ |
|
- | 996 | __IO uint16_t *_wEPRegVal; \ |
|
- | 997 | \ |
|
793 | if((bDir) == PCD_EP_DBUF_OUT)\ |
998 | if ((bDir) == 0U) \ |
- | 999 | { \ |
|
794 | {/* OUT endpoint */ \ |
1000 | /* OUT endpoint */ \ |
795 | PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount)); \ |
1001 | PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ |
- | 1002 | } \ |
|
796 | } \ |
1003 | else \ |
- | 1004 | { \ |
|
797 | else if((bDir) == PCD_EP_DBUF_IN)\ |
1005 | if ((bDir) == 1U) \ |
- | 1006 | { \ |
|
798 | {/* IN endpoint */ \ |
1007 | /* IN endpoint */ \ |
799 | *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \ |
1008 | _wBase += (uint32_t)(USBx)->BTABLE; \ |
- | 1009 | _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
|
800 | } \ |
1010 | *_wEPRegVal = (uint16_t)(wCount); \ |
- | 1011 | } \ |
|
- | 1012 | } \ |
|
801 | } /* SetEPDblBuf1Count */ |
1013 | } while(0) /* SetEPDblBuf1Count */ |
802 | 1014 | ||
803 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\ |
1015 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ |
- | 1016 | do { \ |
|
804 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
1017 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
805 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
1018 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
806 | } /* PCD_SET_EP_DBUF_CNT */ |
1019 | } while(0) /* PCD_SET_EP_DBUF_CNT */ |
807 | 1020 | ||
808 | /** |
1021 | /** |
809 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
1022 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
810 | * @param USBx: USB peripheral instance register address. |
1023 | * @param USBx USB peripheral instance register address. |
811 | * @param bEpNum: Endpoint Number. |
1024 | * @param bEpNum Endpoint Number. |
812 | * @retval None |
1025 | * @retval None |
813 | */ |
1026 | */ |
814 | #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
1027 | #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) |
815 | #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
1028 | #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) |
816 | 1029 | ||
817 | #endif /* USB */ |
1030 | #endif /* defined (USB) */ |
818 | 1031 | ||
819 | /** @defgroup PCD_Instance_definition PCD Instance definition |
- | |
820 | * @{ |
- | |
821 | */ |
- | |
822 | #define IS_PCD_ALL_INSTANCE IS_USB_ALL_INSTANCE |
- | |
823 | /** |
- | |
824 | * @} |
- | |
825 | */ |
- | |
826 | - | ||
827 | /** |
1032 | /** |
828 | * @} |
1033 | * @} |
829 | */ |
1034 | */ |
830 | 1035 | ||
831 | /** |
1036 | /** |
Line 833... | Line 1038... | ||
833 | */ |
1038 | */ |
834 | 1039 | ||
835 | /** |
1040 | /** |
836 | * @} |
1041 | * @} |
837 | */ |
1042 | */ |
838 | - | ||
839 | #endif /* STM32F102x6 || STM32F102xB || */ |
1043 | #endif /* defined (USB) || defined (USB_OTG_FS) */ |
840 | /* STM32F103x6 || STM32F103xB || */ |
- | |
841 | /* STM32F103xE || STM32F103xG || */ |
- | |
842 | /* STM32F105xC || STM32F107xC */ |
- | |
843 | 1044 | ||
844 | #ifdef __cplusplus |
1045 | #ifdef __cplusplus |
845 | } |
1046 | } |
846 | #endif |
1047 | #endif |
847 | 1048 | ||
848 | - | ||
849 | #endif /* __STM32F1xx_HAL_PCD_H */ |
1049 | #endif /* STM32F1xx_HAL_PCD_H */ |
850 | 1050 | ||
851 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
1051 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |