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/**
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/**
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  ******************************************************************************
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  ******************************************************************************
3
  * @file    stm32f1xx_hal_mmc.h
3
  * @file    stm32f1xx_hal_mmc.h
4
  * @author  MCD Application Team
4
  * @author  MCD Application Team
5
  * @brief   Header file of MMC HAL module.
5
  * @brief   Header file of MMC HAL module.
6
  ******************************************************************************
6
  ******************************************************************************
7
  * @attention
7
  * @attention
8
  *
8
  *
9
  * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
9
  * Copyright (c) 2016 STMicroelectronics.
10
  * All rights reserved.</center></h2>
10
  * All rights reserved.
11
  *
11
  *
12
  * This software component is licensed by ST under BSD 3-Clause license,
12
  * This software is licensed under terms that can be found in the LICENSE file
13
  * the "License"; You may not use this file except in compliance with the
13
  * in the root directory of this software component.
14
  * License. You may obtain a copy of the License at:
14
  * If no LICENSE file comes with this software, it is provided AS-IS.
15
  *                       opensource.org/licenses/BSD-3-Clause
15
  *
16
  *
16
  ******************************************************************************
17
  ******************************************************************************
17
  */
18
  */
18
 
19
 
19
/* Define to prevent recursive inclusion -------------------------------------*/
20
/* Define to prevent recursive inclusion -------------------------------------*/
20
#ifndef STM32F1xx_HAL_MMC_H
21
#ifndef STM32F1xx_HAL_MMC_H
21
#define STM32F1xx_HAL_MMC_H
22
#define STM32F1xx_HAL_MMC_H
22
 
23
 
23
#if defined(SDIO)
24
#if defined(SDIO)
24
 
25
 
25
#ifdef __cplusplus
26
#ifdef __cplusplus
26
 extern "C" {
27
 extern "C" {
27
#endif
28
#endif
28
 
29
 
29
/* Includes ------------------------------------------------------------------*/
30
/* Includes ------------------------------------------------------------------*/
30
#include "stm32f1xx_ll_sdmmc.h"
31
#include "stm32f1xx_ll_sdmmc.h"
31
 
32
 
32
/** @addtogroup STM32F1xx_HAL_Driver
33
/** @addtogroup STM32F1xx_HAL_Driver
33
  * @{
34
  * @{
34
  */
35
  */
35
 
36
 
36
/** @addtogroup MMC
37
/** @addtogroup MMC
37
  * @{
38
  * @{
38
  */
39
  */
39
 
40
 
40
/* Exported types ------------------------------------------------------------*/
41
/* Exported types ------------------------------------------------------------*/
41
/** @defgroup MMC_Exported_Types MMC Exported Types
42
/** @defgroup MMC_Exported_Types MMC Exported Types
42
  * @{
43
  * @{
43
  */
44
  */
44
 
45
 
45
/** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
46
/** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
46
  * @{
47
  * @{
47
  */  
48
  */  
48
typedef enum
49
typedef enum
49
{
50
{
50
  HAL_MMC_STATE_RESET                  = 0x00000000U,  /*!< MMC not yet initialized or disabled  */
51
  HAL_MMC_STATE_RESET                  = 0x00000000U,  /*!< MMC not yet initialized or disabled  */
51
  HAL_MMC_STATE_READY                  = 0x00000001U,  /*!< MMC initialized and ready for use    */
52
  HAL_MMC_STATE_READY                  = 0x00000001U,  /*!< MMC initialized and ready for use    */
52
  HAL_MMC_STATE_TIMEOUT                = 0x00000002U,  /*!< MMC Timeout state                    */
53
  HAL_MMC_STATE_TIMEOUT                = 0x00000002U,  /*!< MMC Timeout state                    */
53
  HAL_MMC_STATE_BUSY                   = 0x00000003U,  /*!< MMC process ongoing                  */
54
  HAL_MMC_STATE_BUSY                   = 0x00000003U,  /*!< MMC process ongoing                  */
54
  HAL_MMC_STATE_PROGRAMMING            = 0x00000004U,  /*!< MMC Programming State                */
55
  HAL_MMC_STATE_PROGRAMMING            = 0x00000004U,  /*!< MMC Programming State                */
55
  HAL_MMC_STATE_RECEIVING              = 0x00000005U,  /*!< MMC Receinving State                 */
56
  HAL_MMC_STATE_RECEIVING              = 0x00000005U,  /*!< MMC Receinving State                 */
56
  HAL_MMC_STATE_TRANSFER               = 0x00000006U,  /*!< MMC Transfer State                  */
57
  HAL_MMC_STATE_TRANSFER               = 0x00000006U,  /*!< MMC Transfer State                  */
57
  HAL_MMC_STATE_ERROR                  = 0x0000000FU   /*!< MMC is in error state                */
58
  HAL_MMC_STATE_ERROR                  = 0x0000000FU   /*!< MMC is in error state                */
58
}HAL_MMC_StateTypeDef;
59
}HAL_MMC_StateTypeDef;
59
/**
60
/**
60
  * @}
61
  * @}
61
  */
62
  */
62
 
63
 
63
/** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
64
/** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
64
  * @{
65
  * @{
65
  */  
66
  */  
66
typedef uint32_t HAL_MMC_CardStateTypeDef;
67
typedef uint32_t HAL_MMC_CardStateTypeDef;
67
 
68
 
68
#define HAL_MMC_CARD_READY          0x00000001U  /*!< Card state is ready                     */
69
#define HAL_MMC_CARD_READY          0x00000001U  /*!< Card state is ready                     */
69
#define HAL_MMC_CARD_IDENTIFICATION 0x00000002U  /*!< Card is in identification state         */
70
#define HAL_MMC_CARD_IDENTIFICATION 0x00000002U  /*!< Card is in identification state         */
70
#define HAL_MMC_CARD_STANDBY        0x00000003U  /*!< Card is in standby state                */
71
#define HAL_MMC_CARD_STANDBY        0x00000003U  /*!< Card is in standby state                */
71
#define HAL_MMC_CARD_TRANSFER       0x00000004U  /*!< Card is in transfer state               */
72
#define HAL_MMC_CARD_TRANSFER       0x00000004U  /*!< Card is in transfer state               */
72
#define HAL_MMC_CARD_SENDING        0x00000005U  /*!< Card is sending an operation            */
73
#define HAL_MMC_CARD_SENDING        0x00000005U  /*!< Card is sending an operation            */
73
#define HAL_MMC_CARD_RECEIVING      0x00000006U  /*!< Card is receiving operation information */
74
#define HAL_MMC_CARD_RECEIVING      0x00000006U  /*!< Card is receiving operation information */
74
#define HAL_MMC_CARD_PROGRAMMING    0x00000007U  /*!< Card is in programming state            */
75
#define HAL_MMC_CARD_PROGRAMMING    0x00000007U  /*!< Card is in programming state            */
75
#define HAL_MMC_CARD_DISCONNECTED   0x00000008U  /*!< Card is disconnected                    */
76
#define HAL_MMC_CARD_DISCONNECTED   0x00000008U  /*!< Card is disconnected                    */
76
#define HAL_MMC_CARD_ERROR          0x000000FFU  /*!< Card response Error                     */
77
#define HAL_MMC_CARD_ERROR          0x000000FFU  /*!< Card response Error                     */
77
/**
78
/**
78
  * @}
79
  * @}
79
  */
80
  */
80
 
81
 
81
/** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition  
82
/** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition  
82
  * @{
83
  * @{
83
  */
84
  */
84
#define MMC_InitTypeDef      SDIO_InitTypeDef 
85
#define MMC_InitTypeDef      SDIO_InitTypeDef 
85
#define MMC_TypeDef          SDIO_TypeDef
86
#define MMC_TypeDef          SDIO_TypeDef
86
 
87
 
87
/**
88
/**
88
  * @brief  MMC Card Information Structure definition
89
  * @brief  MMC Card Information Structure definition
89
  */
90
  */
90
typedef struct
91
typedef struct
91
{
92
{
92
  uint32_t CardType;                     /*!< Specifies the card Type                         */
93
  uint32_t CardType;                     /*!< Specifies the card Type                         */
93
 
94
 
94
  uint32_t Class;                        /*!< Specifies the class of the card class           */
95
  uint32_t Class;                        /*!< Specifies the class of the card class           */
95
 
96
 
96
  uint32_t RelCardAdd;                   /*!< Specifies the Relative Card Address             */
97
  uint32_t RelCardAdd;                   /*!< Specifies the Relative Card Address             */
97
 
98
 
98
  uint32_t BlockNbr;                     /*!< Specifies the Card Capacity in blocks           */
99
  uint32_t BlockNbr;                     /*!< Specifies the Card Capacity in blocks           */
99
 
100
 
100
  uint32_t BlockSize;                    /*!< Specifies one block size in bytes               */
101
  uint32_t BlockSize;                    /*!< Specifies one block size in bytes               */
101
 
102
 
102
  uint32_t LogBlockNbr;                  /*!< Specifies the Card logical Capacity in blocks   */
103
  uint32_t LogBlockNbr;                  /*!< Specifies the Card logical Capacity in blocks   */
103
 
104
 
104
  uint32_t LogBlockSize;                 /*!< Specifies logical block size in bytes           */
105
  uint32_t LogBlockSize;                 /*!< Specifies logical block size in bytes           */
105
 
106
 
106
}HAL_MMC_CardInfoTypeDef;
107
}HAL_MMC_CardInfoTypeDef;
107
 
108
 
108
/**
109
/**
109
  * @brief  MMC handle Structure definition
110
  * @brief  MMC handle Structure definition
110
  */
111
  */
111
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
112
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
112
typedef struct __MMC_HandleTypeDef
113
typedef struct __MMC_HandleTypeDef
113
#else
114
#else
114
typedef struct
115
typedef struct
115
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
116
#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
116
{
117
{
117
  MMC_TypeDef                  *Instance;        /*!< MMC registers base address           */
118
  MMC_TypeDef                  *Instance;        /*!< MMC registers base address           */
118
 
119
 
119
  MMC_InitTypeDef              Init;             /*!< MMC required parameters              */
120
  MMC_InitTypeDef              Init;             /*!< MMC required parameters              */
120
 
121
 
121
  HAL_LockTypeDef              Lock;             /*!< MMC locking object                   */
122
  HAL_LockTypeDef              Lock;             /*!< MMC locking object                   */
122
 
123
 
123
  uint8_t                      *pTxBuffPtr;      /*!< Pointer to MMC Tx transfer Buffer    */
124
  uint8_t                      *pTxBuffPtr;      /*!< Pointer to MMC Tx transfer Buffer    */
124
 
125
 
125
  uint32_t                     TxXferSize;       /*!< MMC Tx Transfer size                 */
126
  uint32_t                     TxXferSize;       /*!< MMC Tx Transfer size                 */
126
 
127
 
127
  uint8_t                      *pRxBuffPtr;      /*!< Pointer to MMC Rx transfer Buffer    */
128
  uint8_t                      *pRxBuffPtr;      /*!< Pointer to MMC Rx transfer Buffer    */
128
 
129
 
129
  uint32_t                     RxXferSize;       /*!< MMC Rx Transfer size                 */
130
  uint32_t                     RxXferSize;       /*!< MMC Rx Transfer size                 */
130
 
131
 
131
  __IO uint32_t                Context;          /*!< MMC transfer context                 */
132
  __IO uint32_t                Context;          /*!< MMC transfer context                 */
132
 
133
 
133
  __IO HAL_MMC_StateTypeDef    State;            /*!< MMC card State                       */
134
  __IO HAL_MMC_StateTypeDef    State;            /*!< MMC card State                       */
134
 
135
 
135
  __IO uint32_t                ErrorCode;        /*!< MMC Card Error codes                 */  
136
  __IO uint32_t                ErrorCode;        /*!< MMC Card Error codes                 */  
136
 
137
 
137
  DMA_HandleTypeDef            *hdmarx;          /*!< MMC Rx DMA handle parameters         */
138
  DMA_HandleTypeDef            *hdmarx;          /*!< MMC Rx DMA handle parameters         */
138
 
139
 
139
  DMA_HandleTypeDef            *hdmatx;          /*!< MMC Tx DMA handle parameters         */
140
  DMA_HandleTypeDef            *hdmatx;          /*!< MMC Tx DMA handle parameters         */
140
 
141
 
141
  HAL_MMC_CardInfoTypeDef      MmcCard;          /*!< MMC Card information                 */
142
  HAL_MMC_CardInfoTypeDef      MmcCard;          /*!< MMC Card information                 */
142
 
143
 
143
  uint32_t                     CSD[4U];          /*!< MMC card specific data table         */
144
  uint32_t                     CSD[4U];          /*!< MMC card specific data table         */
144
 
145
 
145
  uint32_t                     CID[4U];          /*!< MMC card identification number table */
146
  uint32_t                     CID[4U];          /*!< MMC card identification number table */
146
 
147
 
147
  uint32_t                     Ext_CSD[128];
148
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
148
 
149
  void (* TxCpltCallback)                 (struct __MMC_HandleTypeDef *hmmc);
149
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
150
  void (* RxCpltCallback)                 (struct __MMC_HandleTypeDef *hmmc);
150
  void (* TxCpltCallback)                 (struct __MMC_HandleTypeDef *hmmc);
151
  void (* ErrorCallback)                  (struct __MMC_HandleTypeDef *hmmc);
151
  void (* RxCpltCallback)                 (struct __MMC_HandleTypeDef *hmmc);
152
  void (* AbortCpltCallback)              (struct __MMC_HandleTypeDef *hmmc);
152
  void (* ErrorCallback)                  (struct __MMC_HandleTypeDef *hmmc);
153
 
153
  void (* AbortCpltCallback)              (struct __MMC_HandleTypeDef *hmmc);
154
  void (* MspInitCallback)                (struct __MMC_HandleTypeDef *hmmc);
154
 
155
  void (* MspDeInitCallback)              (struct __MMC_HandleTypeDef *hmmc);
155
  void (* MspInitCallback)                (struct __MMC_HandleTypeDef *hmmc);
156
#endif  
156
  void (* MspDeInitCallback)              (struct __MMC_HandleTypeDef *hmmc);
157
}MMC_HandleTypeDef;
157
#endif  
158
 
158
}MMC_HandleTypeDef;
159
/**
159
 
160
  * @}
160
/**
161
  */
161
  * @}
162
 
162
  */
163
/** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
163
 
164
  * @{
164
/** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
165
  */
165
  * @{
166
typedef struct
166
  */
167
{
167
typedef struct
168
  __IO uint8_t  CSDStruct;            /*!< CSD structure                         */
168
{
169
  __IO uint8_t  SysSpecVersion;       /*!< System specification version          */
169
  __IO uint8_t  CSDStruct;            /*!< CSD structure                         */
170
  __IO uint8_t  Reserved1;            /*!< Reserved                              */
170
  __IO uint8_t  SysSpecVersion;       /*!< System specification version          */
171
  __IO uint8_t  TAAC;                 /*!< Data read access time 1               */
171
  __IO uint8_t  Reserved1;            /*!< Reserved                              */
172
  __IO uint8_t  NSAC;                 /*!< Data read access time 2 in CLK cycles */
172
  __IO uint8_t  TAAC;                 /*!< Data read access time 1               */
173
  __IO uint8_t  MaxBusClkFrec;        /*!< Max. bus clock frequency              */
173
  __IO uint8_t  NSAC;                 /*!< Data read access time 2 in CLK cycles */
174
  __IO uint16_t CardComdClasses;      /*!< Card command classes                  */
174
  __IO uint8_t  MaxBusClkFrec;        /*!< Max. bus clock frequency              */
175
  __IO uint8_t  RdBlockLen;           /*!< Max. read data block length           */
175
  __IO uint16_t CardComdClasses;      /*!< Card command classes                  */
176
  __IO uint8_t  PartBlockRead;        /*!< Partial blocks for read allowed       */
176
  __IO uint8_t  RdBlockLen;           /*!< Max. read data block length           */
177
  __IO uint8_t  WrBlockMisalign;      /*!< Write block misalignment              */
177
  __IO uint8_t  PartBlockRead;        /*!< Partial blocks for read allowed       */
178
  __IO uint8_t  RdBlockMisalign;      /*!< Read block misalignment               */
178
  __IO uint8_t  WrBlockMisalign;      /*!< Write block misalignment              */
179
  __IO uint8_t  DSRImpl;              /*!< DSR implemented                       */
179
  __IO uint8_t  RdBlockMisalign;      /*!< Read block misalignment               */
180
  __IO uint8_t  Reserved2;            /*!< Reserved                              */
180
  __IO uint8_t  DSRImpl;              /*!< DSR implemented                       */
181
  __IO uint32_t DeviceSize;           /*!< Device Size                           */
181
  __IO uint8_t  Reserved2;            /*!< Reserved                              */
182
  __IO uint8_t  MaxRdCurrentVDDMin;   /*!< Max. read current @ VDD min           */
182
  __IO uint32_t DeviceSize;           /*!< Device Size                           */
183
  __IO uint8_t  MaxRdCurrentVDDMax;   /*!< Max. read current @ VDD max           */
183
  __IO uint8_t  MaxRdCurrentVDDMin;   /*!< Max. read current @ VDD min           */
184
  __IO uint8_t  MaxWrCurrentVDDMin;   /*!< Max. write current @ VDD min          */
184
  __IO uint8_t  MaxRdCurrentVDDMax;   /*!< Max. read current @ VDD max           */
185
  __IO uint8_t  MaxWrCurrentVDDMax;   /*!< Max. write current @ VDD max          */
185
  __IO uint8_t  MaxWrCurrentVDDMin;   /*!< Max. write current @ VDD min          */
186
  __IO uint8_t  DeviceSizeMul;        /*!< Device size multiplier                */
186
  __IO uint8_t  MaxWrCurrentVDDMax;   /*!< Max. write current @ VDD max          */
187
  __IO uint8_t  EraseGrSize;          /*!< Erase group size                      */
187
  __IO uint8_t  DeviceSizeMul;        /*!< Device size multiplier                */
188
  __IO uint8_t  EraseGrMul;           /*!< Erase group size multiplier           */
188
  __IO uint8_t  EraseGrSize;          /*!< Erase group size                      */
189
  __IO uint8_t  WrProtectGrSize;      /*!< Write protect group size              */
189
  __IO uint8_t  EraseGrMul;           /*!< Erase group size multiplier           */
190
  __IO uint8_t  WrProtectGrEnable;    /*!< Write protect group enable            */
190
  __IO uint8_t  WrProtectGrSize;      /*!< Write protect group size              */
191
  __IO uint8_t  ManDeflECC;           /*!< Manufacturer default ECC              */
191
  __IO uint8_t  WrProtectGrEnable;    /*!< Write protect group enable            */
192
  __IO uint8_t  WrSpeedFact;          /*!< Write speed factor                    */
192
  __IO uint8_t  ManDeflECC;           /*!< Manufacturer default ECC              */
193
  __IO uint8_t  MaxWrBlockLen;        /*!< Max. write data block length          */
193
  __IO uint8_t  WrSpeedFact;          /*!< Write speed factor                    */
194
  __IO uint8_t  WriteBlockPaPartial;  /*!< Partial blocks for write allowed      */
194
  __IO uint8_t  MaxWrBlockLen;        /*!< Max. write data block length          */
195
  __IO uint8_t  Reserved3;            /*!< Reserved                              */
195
  __IO uint8_t  WriteBlockPaPartial;  /*!< Partial blocks for write allowed      */
196
  __IO uint8_t  ContentProtectAppli;  /*!< Content protection application        */
196
  __IO uint8_t  Reserved3;            /*!< Reserved                              */
197
  __IO uint8_t  FileFormatGroup;      /*!< File format group                     */
197
  __IO uint8_t  ContentProtectAppli;  /*!< Content protection application        */
198
  __IO uint8_t  CopyFlag;             /*!< Copy flag (OTP)                       */
198
  __IO uint8_t  FileFormatGroup;      /*!< File format group                     */
199
  __IO uint8_t  PermWrProtect;        /*!< Permanent write protection            */
199
  __IO uint8_t  CopyFlag;             /*!< Copy flag (OTP)                       */
200
  __IO uint8_t  TempWrProtect;        /*!< Temporary write protection            */
200
  __IO uint8_t  PermWrProtect;        /*!< Permanent write protection            */
201
  __IO uint8_t  FileFormat;           /*!< File format                           */
201
  __IO uint8_t  TempWrProtect;        /*!< Temporary write protection            */
202
  __IO uint8_t  ECC;                  /*!< ECC code                              */
202
  __IO uint8_t  FileFormat;           /*!< File format                           */
203
  __IO uint8_t  CSD_CRC;              /*!< CSD CRC                               */
203
  __IO uint8_t  ECC;                  /*!< ECC code                              */
204
  __IO uint8_t  Reserved4;            /*!< Always 1                              */
204
  __IO uint8_t  CSD_CRC;              /*!< CSD CRC                               */
205
 
205
  __IO uint8_t  Reserved4;            /*!< Always 1                              */
206
}HAL_MMC_CardCSDTypeDef;
206
 
207
/**
207
}HAL_MMC_CardCSDTypeDef;
208
  * @}
208
/**
209
  */
209
  * @}
210
 
210
  */
211
/** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
211
 
212
  * @{
212
/** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
213
  */
213
  * @{
214
typedef struct
214
  */
215
{
215
typedef struct
216
  __IO uint8_t  ManufacturerID;  /*!< Manufacturer ID       */
216
{
217
  __IO uint16_t OEM_AppliID;     /*!< OEM/Application ID    */
217
  __IO uint8_t  ManufacturerID;  /*!< Manufacturer ID       */
218
  __IO uint32_t ProdName1;       /*!< Product Name part1    */
218
  __IO uint16_t OEM_AppliID;     /*!< OEM/Application ID    */
219
  __IO uint8_t  ProdName2;       /*!< Product Name part2    */
219
  __IO uint32_t ProdName1;       /*!< Product Name part1    */
220
  __IO uint8_t  ProdRev;         /*!< Product Revision      */
220
  __IO uint8_t  ProdName2;       /*!< Product Name part2    */
221
  __IO uint32_t ProdSN;          /*!< Product Serial Number */
221
  __IO uint8_t  ProdRev;         /*!< Product Revision      */
222
  __IO uint8_t  Reserved1;       /*!< Reserved1             */
222
  __IO uint32_t ProdSN;          /*!< Product Serial Number */
223
  __IO uint16_t ManufactDate;    /*!< Manufacturing Date    */
223
  __IO uint8_t  Reserved1;       /*!< Reserved1             */
224
  __IO uint8_t  CID_CRC;         /*!< CID CRC               */
224
  __IO uint16_t ManufactDate;    /*!< Manufacturing Date    */
225
  __IO uint8_t  Reserved2;       /*!< Always 1              */
225
  __IO uint8_t  CID_CRC;         /*!< CID CRC               */
226
 
226
  __IO uint8_t  Reserved2;       /*!< Always 1              */
227
}HAL_MMC_CardCIDTypeDef;
227
 
228
/**
228
}HAL_MMC_CardCIDTypeDef;
229
  * @}
229
/**
230
  */
230
  * @}
231
 
231
  */
232
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
232
 
233
/** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition
233
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
234
  * @{
234
/** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition
235
  */
235
  * @{
236
typedef enum
236
  */
237
{
237
typedef enum
238
  HAL_MMC_TX_CPLT_CB_ID                 = 0x00U,  /*!< MMC Tx Complete Callback ID                     */
238
{
239
  HAL_MMC_RX_CPLT_CB_ID                 = 0x01U,  /*!< MMC Rx Complete Callback ID                     */
239
  HAL_MMC_TX_CPLT_CB_ID                 = 0x00U,  /*!< MMC Tx Complete Callback ID                     */
240
  HAL_MMC_ERROR_CB_ID                   = 0x02U,  /*!< MMC Error Callback ID                           */
240
  HAL_MMC_RX_CPLT_CB_ID                 = 0x01U,  /*!< MMC Rx Complete Callback ID                     */
241
  HAL_MMC_ABORT_CB_ID                   = 0x03U,  /*!< MMC Abort Callback ID                           */
241
  HAL_MMC_ERROR_CB_ID                   = 0x02U,  /*!< MMC Error Callback ID                           */
242
 
242
  HAL_MMC_ABORT_CB_ID                   = 0x03U,  /*!< MMC Abort Callback ID                           */
243
  HAL_MMC_MSP_INIT_CB_ID                = 0x10U,  /*!< MMC MspInit Callback ID                         */
243
 
244
  HAL_MMC_MSP_DEINIT_CB_ID              = 0x11U   /*!< MMC MspDeInit Callback ID                       */
244
  HAL_MMC_MSP_INIT_CB_ID                = 0x10U,  /*!< MMC MspInit Callback ID                         */
245
}HAL_MMC_CallbackIDTypeDef;
245
  HAL_MMC_MSP_DEINIT_CB_ID              = 0x11U   /*!< MMC MspDeInit Callback ID                       */
246
/**
246
}HAL_MMC_CallbackIDTypeDef;
247
  * @}
247
/**
248
  */
248
  * @}
249
 
249
  */
250
/** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition
250
 
251
  * @{
251
/** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition
252
  */
252
  * @{
253
typedef void (*pMMC_CallbackTypeDef)           (MMC_HandleTypeDef *hmmc);
253
  */
254
/**
254
typedef void (*pMMC_CallbackTypeDef)           (MMC_HandleTypeDef *hmmc);
255
  * @}
255
/**
256
  */
256
  * @}
257
#endif
257
  */
258
/**
258
#endif
259
  * @}
259
/**
260
  */
260
  * @}
261
 
261
  */
262
/* Exported constants --------------------------------------------------------*/
262
 
263
/** @defgroup MMC_Exported_Constants Exported Constants
263
/* Exported constants --------------------------------------------------------*/
264
  * @{
264
/** @defgroup MMC_Exported_Constants Exported Constants
265
  */
265
  * @{
266
 
266
  */
267
#define MMC_BLOCKSIZE              512U  /*!< Block size is 512 bytes */
267
 
268
 
268
#define MMC_BLOCKSIZE              512U  /*!< Block size is 512 bytes */
269
/** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
269
 
270
  * @{
270
/** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
271
  */  
271
  * @{
272
#define HAL_MMC_ERROR_NONE                     SDMMC_ERROR_NONE                    /*!< No error                                                      */
272
  */  
273
#define HAL_MMC_ERROR_CMD_CRC_FAIL             SDMMC_ERROR_CMD_CRC_FAIL            /*!< Command response received (but CRC check failed)              */
273
#define HAL_MMC_ERROR_NONE                     SDMMC_ERROR_NONE                    /*!< No error                                                      */
274
#define HAL_MMC_ERROR_DATA_CRC_FAIL            SDMMC_ERROR_DATA_CRC_FAIL           /*!< Data block sent/received (CRC check failed)                   */
274
#define HAL_MMC_ERROR_CMD_CRC_FAIL             SDMMC_ERROR_CMD_CRC_FAIL            /*!< Command response received (but CRC check failed)              */
275
#define HAL_MMC_ERROR_CMD_RSP_TIMEOUT          SDMMC_ERROR_CMD_RSP_TIMEOUT         /*!< Command response timeout                                      */
275
#define HAL_MMC_ERROR_DATA_CRC_FAIL            SDMMC_ERROR_DATA_CRC_FAIL           /*!< Data block sent/received (CRC check failed)                   */
276
#define HAL_MMC_ERROR_DATA_TIMEOUT             SDMMC_ERROR_DATA_TIMEOUT            /*!< Data timeout                                                  */
276
#define HAL_MMC_ERROR_CMD_RSP_TIMEOUT          SDMMC_ERROR_CMD_RSP_TIMEOUT         /*!< Command response timeout                                      */
277
#define HAL_MMC_ERROR_TX_UNDERRUN              SDMMC_ERROR_TX_UNDERRUN             /*!< Transmit FIFO underrun                                        */
277
#define HAL_MMC_ERROR_DATA_TIMEOUT             SDMMC_ERROR_DATA_TIMEOUT            /*!< Data timeout                                                  */
278
#define HAL_MMC_ERROR_RX_OVERRUN               SDMMC_ERROR_RX_OVERRUN              /*!< Receive FIFO overrun                                          */
278
#define HAL_MMC_ERROR_TX_UNDERRUN              SDMMC_ERROR_TX_UNDERRUN             /*!< Transmit FIFO underrun                                        */
279
#define HAL_MMC_ERROR_ADDR_MISALIGNED          SDMMC_ERROR_ADDR_MISALIGNED         /*!< Misaligned address                                            */
279
#define HAL_MMC_ERROR_RX_OVERRUN               SDMMC_ERROR_RX_OVERRUN              /*!< Receive FIFO overrun                                          */
280
#define HAL_MMC_ERROR_BLOCK_LEN_ERR            SDMMC_ERROR_BLOCK_LEN_ERR           /*!< Transferred block length is not allowed for the card or the 
280
#define HAL_MMC_ERROR_ADDR_MISALIGNED          SDMMC_ERROR_ADDR_MISALIGNED         /*!< Misaligned address                                            */
281
                                                                                       number of transferred bytes does not match the block length   */
281
#define HAL_MMC_ERROR_BLOCK_LEN_ERR            SDMMC_ERROR_BLOCK_LEN_ERR           /*!< Transferred block length is not allowed for the card or the 
282
#define HAL_MMC_ERROR_ERASE_SEQ_ERR            SDMMC_ERROR_ERASE_SEQ_ERR           /*!< An error in the sequence of erase command occurs              */
282
                                                                                       number of transferred bytes does not match the block length   */
283
#define HAL_MMC_ERROR_BAD_ERASE_PARAM          SDMMC_ERROR_BAD_ERASE_PARAM         /*!< An invalid selection for erase groups                         */
283
#define HAL_MMC_ERROR_ERASE_SEQ_ERR            SDMMC_ERROR_ERASE_SEQ_ERR           /*!< An error in the sequence of erase command occurs              */
284
#define HAL_MMC_ERROR_WRITE_PROT_VIOLATION     SDMMC_ERROR_WRITE_PROT_VIOLATION    /*!< Attempt to program a write protect block                      */
284
#define HAL_MMC_ERROR_BAD_ERASE_PARAM          SDMMC_ERROR_BAD_ERASE_PARAM         /*!< An invalid selection for erase groups                         */
285
#define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED       SDMMC_ERROR_LOCK_UNLOCK_FAILED      /*!< Sequence or password error has been detected in unlock 
285
#define HAL_MMC_ERROR_WRITE_PROT_VIOLATION     SDMMC_ERROR_WRITE_PROT_VIOLATION    /*!< Attempt to program a write protect block                      */
286
                                                                                       command or if there was an attempt to access a locked card    */
286
#define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED       SDMMC_ERROR_LOCK_UNLOCK_FAILED      /*!< Sequence or password error has been detected in unlock 
287
#define HAL_MMC_ERROR_COM_CRC_FAILED           SDMMC_ERROR_COM_CRC_FAILED          /*!< CRC check of the previous command failed                      */
287
                                                                                       command or if there was an attempt to access a locked card    */
288
#define HAL_MMC_ERROR_ILLEGAL_CMD              SDMMC_ERROR_ILLEGAL_CMD             /*!< Command is not legal for the card state                       */
288
#define HAL_MMC_ERROR_COM_CRC_FAILED           SDMMC_ERROR_COM_CRC_FAILED          /*!< CRC check of the previous command failed                      */
289
#define HAL_MMC_ERROR_CARD_ECC_FAILED          SDMMC_ERROR_CARD_ECC_FAILED         /*!< Card internal ECC was applied but failed to correct the data  */
289
#define HAL_MMC_ERROR_ILLEGAL_CMD              SDMMC_ERROR_ILLEGAL_CMD             /*!< Command is not legal for the card state                       */
290
#define HAL_MMC_ERROR_CC_ERR                   SDMMC_ERROR_CC_ERR                  /*!< Internal card controller error                                */
290
#define HAL_MMC_ERROR_CARD_ECC_FAILED          SDMMC_ERROR_CARD_ECC_FAILED         /*!< Card internal ECC was applied but failed to correct the data  */
291
#define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR      SDMMC_ERROR_GENERAL_UNKNOWN_ERR     /*!< General or unknown error                                      */
291
#define HAL_MMC_ERROR_CC_ERR                   SDMMC_ERROR_CC_ERR                  /*!< Internal card controller error                                */
292
#define HAL_MMC_ERROR_STREAM_READ_UNDERRUN     SDMMC_ERROR_STREAM_READ_UNDERRUN    /*!< The card could not sustain data reading in stream rmode       */
292
#define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR      SDMMC_ERROR_GENERAL_UNKNOWN_ERR     /*!< General or unknown error                                      */
293
#define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN     SDMMC_ERROR_STREAM_WRITE_OVERRUN    /*!< The card could not sustain data programming in stream mode    */
293
#define HAL_MMC_ERROR_STREAM_READ_UNDERRUN     SDMMC_ERROR_STREAM_READ_UNDERRUN    /*!< The card could not sustain data reading in stream rmode       */
294
#define HAL_MMC_ERROR_CID_CSD_OVERWRITE        SDMMC_ERROR_CID_CSD_OVERWRITE       /*!< CID/CSD overwrite error                                       */
294
#define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN     SDMMC_ERROR_STREAM_WRITE_OVERRUN    /*!< The card could not sustain data programming in stream mode    */
295
#define HAL_MMC_ERROR_WP_ERASE_SKIP            SDMMC_ERROR_WP_ERASE_SKIP           /*!< Only partial address space was erased                         */
295
#define HAL_MMC_ERROR_CID_CSD_OVERWRITE        SDMMC_ERROR_CID_CSD_OVERWRITE       /*!< CID/CSD overwrite error                                       */
296
#define HAL_MMC_ERROR_CARD_ECC_DISABLED        SDMMC_ERROR_CARD_ECC_DISABLED       /*!< Command has been executed without using internal ECC          */
296
#define HAL_MMC_ERROR_WP_ERASE_SKIP            SDMMC_ERROR_WP_ERASE_SKIP           /*!< Only partial address space was erased                         */
297
#define HAL_MMC_ERROR_ERASE_RESET              SDMMC_ERROR_ERASE_RESET             /*!< Erase sequence was cleared before executing because an out 
297
#define HAL_MMC_ERROR_CARD_ECC_DISABLED        SDMMC_ERROR_CARD_ECC_DISABLED       /*!< Command has been executed without using internal ECC          */
298
                                                                                       of erase sequence command was received                        */
298
#define HAL_MMC_ERROR_ERASE_RESET              SDMMC_ERROR_ERASE_RESET             /*!< Erase sequence was cleared before executing because an out 
299
#define HAL_MMC_ERROR_AKE_SEQ_ERR              SDMMC_ERROR_AKE_SEQ_ERR             /*!< Error in sequence of authentication                           */
299
                                                                                       of erase sequence command was received                        */
300
#define HAL_MMC_ERROR_INVALID_VOLTRANGE        SDMMC_ERROR_INVALID_VOLTRANGE       /*!< Error in case of invalid voltage range                        */        
300
#define HAL_MMC_ERROR_AKE_SEQ_ERR              SDMMC_ERROR_AKE_SEQ_ERR             /*!< Error in sequence of authentication                           */
301
#define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE        SDMMC_ERROR_ADDR_OUT_OF_RANGE       /*!< Error when addressed block is out of range                    */        
301
#define HAL_MMC_ERROR_INVALID_VOLTRANGE        SDMMC_ERROR_INVALID_VOLTRANGE       /*!< Error in case of invalid voltage range                        */        
302
#define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE   SDMMC_ERROR_REQUEST_NOT_APPLICABLE  /*!< Error when command request is not applicable                  */  
302
#define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE        SDMMC_ERROR_ADDR_OUT_OF_RANGE       /*!< Error when addressed block is out of range                    */        
303
#define HAL_MMC_ERROR_PARAM                    SDMMC_ERROR_INVALID_PARAMETER       /*!< the used parameter is not valid                               */  
303
#define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE   SDMMC_ERROR_REQUEST_NOT_APPLICABLE  /*!< Error when command request is not applicable                  */  
304
#define HAL_MMC_ERROR_UNSUPPORTED_FEATURE      SDMMC_ERROR_UNSUPPORTED_FEATURE     /*!< Error when feature is not insupported                         */
304
#define HAL_MMC_ERROR_PARAM                    SDMMC_ERROR_INVALID_PARAMETER       /*!< the used parameter is not valid                               */  
305
#define HAL_MMC_ERROR_BUSY                     SDMMC_ERROR_BUSY                    /*!< Error when transfer process is busy                           */ 
305
#define HAL_MMC_ERROR_UNSUPPORTED_FEATURE      SDMMC_ERROR_UNSUPPORTED_FEATURE     /*!< Error when feature is not insupported                         */
306
#define HAL_MMC_ERROR_DMA                      SDMMC_ERROR_DMA                     /*!< Error while DMA transfer                                      */
306
#define HAL_MMC_ERROR_BUSY                     SDMMC_ERROR_BUSY                    /*!< Error when transfer process is busy                           */ 
307
#define HAL_MMC_ERROR_TIMEOUT                  SDMMC_ERROR_TIMEOUT                 /*!< Timeout error                                                 */
307
#define HAL_MMC_ERROR_DMA                      SDMMC_ERROR_DMA                     /*!< Error while DMA transfer                                      */
308
                                               
308
#define HAL_MMC_ERROR_TIMEOUT                  SDMMC_ERROR_TIMEOUT                 /*!< Timeout error                                                 */
309
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
309
                                               
310
#define HAL_MMC_ERROR_INVALID_CALLBACK         SDMMC_ERROR_INVALID_PARAMETER       /*!< Invalid callback error                                        */
310
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
311
#endif
311
#define HAL_MMC_ERROR_INVALID_CALLBACK         SDMMC_ERROR_INVALID_PARAMETER       /*!< Invalid callback error                                        */
312
/**
312
#endif
313
  * @}
313
/**
314
  */
314
  * @}
315
 
315
  */
316
/** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
316
 
317
  * @{
317
/** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
318
  */
318
  * @{
319
#define   MMC_CONTEXT_NONE                            0x00000000U   /*!< None                             */
319
  */
320
#define   MMC_CONTEXT_READ_SINGLE_BLOCK               0x00000001U   /*!< Read single block operation      */
320
#define   MMC_CONTEXT_NONE                            0x00000000U   /*!< None                             */
321
#define   MMC_CONTEXT_READ_MULTIPLE_BLOCK             0x00000002U   /*!< Read multiple blocks operation   */
321
#define   MMC_CONTEXT_READ_SINGLE_BLOCK               0x00000001U   /*!< Read single block operation      */
322
#define   MMC_CONTEXT_WRITE_SINGLE_BLOCK              0x00000010U   /*!< Write single block operation     */
322
#define   MMC_CONTEXT_READ_MULTIPLE_BLOCK             0x00000002U   /*!< Read multiple blocks operation   */
323
#define   MMC_CONTEXT_WRITE_MULTIPLE_BLOCK            0x00000020U   /*!< Write multiple blocks operation  */
323
#define   MMC_CONTEXT_WRITE_SINGLE_BLOCK              0x00000010U   /*!< Write single block operation     */
324
#define   MMC_CONTEXT_IT                              0x00000008U   /*!< Process in Interrupt mode        */
324
#define   MMC_CONTEXT_WRITE_MULTIPLE_BLOCK            0x00000020U   /*!< Write multiple blocks operation  */
325
#define   MMC_CONTEXT_DMA                             0x00000080U   /*!< Process in DMA mode              */
325
#define   MMC_CONTEXT_IT                              0x00000008U   /*!< Process in Interrupt mode        */
326
 
326
#define   MMC_CONTEXT_DMA                             0x00000080U   /*!< Process in DMA mode              */
327
/**
327
 
328
  * @}
328
/**
329
  */
329
  * @}
330
 
330
  */
331
/** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
331
 
332
  * @{
332
/** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
333
  */
333
  * @{
334
/**
334
  */
335
  * @brief
335
/**
336
  */
336
  * @brief
337
#define MMC_HIGH_VOLTAGE_RANGE         0x80FF8000U  /*!< VALUE OF ARGUMENT            */
337
  */
338
#define MMC_DUAL_VOLTAGE_RANGE         0x80FF8080U  /*!< VALUE OF ARGUMENT            */
338
#define MMC_HIGH_VOLTAGE_RANGE         0x80FF8000U  /*!< High voltage in byte mode    */
339
#define eMMC_HIGH_VOLTAGE_RANGE        0xC0FF8000U  /*!< for eMMC > 2Gb sector mode   */
339
#define MMC_DUAL_VOLTAGE_RANGE         0x80FF8080U  /*!< Dual voltage in byte mode    */
340
#define eMMC_DUAL_VOLTAGE_RANGE        0xC0FF8080U  /*!< for eMMC > 2Gb sector mode   */
340
#define MMC_LOW_VOLTAGE_RANGE          0x80000080U  /*!< Low voltage in byte mode     */
341
#define MMC_INVALID_VOLTAGE_RANGE      0x0001FF01U 
341
#define EMMC_HIGH_VOLTAGE_RANGE        0xC0FF8000U  /*!< High voltage in sector mode  */
342
/**
342
#define EMMC_DUAL_VOLTAGE_RANGE        0xC0FF8080U  /*!< Dual voltage in sector mode  */
343
  * @}
343
#define EMMC_LOW_VOLTAGE_RANGE         0xC0000080U  /*!< Low voltage in sector mode   */
344
  */
344
#define MMC_INVALID_VOLTAGE_RANGE      0x0001FF01U 
345
 
345
/**
346
/** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
346
  * @}
347
  * @{
347
  */
348
  */
348
 
349
#define  MMC_LOW_CAPACITY_CARD                0x00000000U    /*!< MMC Card Capacity <=2Gbytes   */
349
/** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
350
#define  MMC_HIGH_CAPACITY_CARD               0x00000001U    /*!< MMC Card Capacity >2Gbytes and <2Tbytes   */
350
  * @{
351
 
351
  */
352
/**
352
#define  MMC_LOW_CAPACITY_CARD                0x00000000U    /*!< MMC Card Capacity <=2Gbytes   */
353
  * @}
353
#define  MMC_HIGH_CAPACITY_CARD               0x00000001U    /*!< MMC Card Capacity >2Gbytes and <2Tbytes   */
354
  */
354
 
355
     
355
/**
356
/**
356
  * @}
357
  * @}
357
  */
358
  */
358
     
359
 
359
/**
360
/* Exported macro ------------------------------------------------------------*/
360
  * @}
361
/** @defgroup MMC_Exported_macros MMC Exported Macros
361
  */
362
 *  @brief macros to handle interrupts and specific clock configurations
362
 
363
 * @{
363
/* Exported macro ------------------------------------------------------------*/
364
 */
364
/** @defgroup MMC_Exported_macros MMC Exported Macros
365
/** @brief Reset MMC handle state.
365
 *  @brief macros to handle interrupts and specific clock configurations
366
  * @param  __HANDLE__ : MMC handle.
366
 * @{
367
  * @retval None
367
 */
368
  */
368
/** @brief Reset MMC handle state.
369
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
369
  * @param  __HANDLE__ : MMC handle.
370
#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__)           do {                                              \
370
  * @retval None
371
                                                               (__HANDLE__)->State = HAL_MMC_STATE_RESET; \
371
  */
372
                                                               (__HANDLE__)->MspInitCallback = NULL;       \
372
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
373
                                                               (__HANDLE__)->MspDeInitCallback = NULL;     \
373
#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__)           do {                                              \
374
                                                             } while(0)
374
                                                               (__HANDLE__)->State = HAL_MMC_STATE_RESET; \
375
#else
375
                                                               (__HANDLE__)->MspInitCallback = NULL;       \
376
#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__)           ((__HANDLE__)->State = HAL_MMC_STATE_RESET)
376
                                                               (__HANDLE__)->MspDeInitCallback = NULL;     \
377
#endif
377
                                                             } while(0)
378
 
378
#else
379
/**
379
#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__)           ((__HANDLE__)->State = HAL_MMC_STATE_RESET)
380
  * @brief  Enable the MMC device.
380
#endif
381
  * @retval None
381
 
382
  */
382
/**
383
#define __HAL_MMC_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance)
383
  * @brief  Enable the MMC device.
384
 
384
  * @retval None
385
/**
385
  */
386
  * @brief  Disable the MMC device.
386
#define __HAL_MMC_ENABLE(__HANDLE__) __SDIO_ENABLE((__HANDLE__)->Instance)
387
  * @retval None
387
 
388
  */
388
/**
389
#define __HAL_MMC_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance)
389
  * @brief  Disable the MMC device.
390
 
390
  * @retval None
391
/**
391
  */
392
  * @brief  Enable the SDMMC DMA transfer.
392
#define __HAL_MMC_DISABLE(__HANDLE__) __SDIO_DISABLE((__HANDLE__)->Instance)
393
  * @retval None
393
 
394
  */
394
/**
395
#define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance)
395
  * @brief  Enable the SDMMC DMA transfer.
396
 
396
  * @retval None
397
/**
397
  */
398
  * @brief  Disable the SDMMC DMA transfer.
398
#define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDIO_DMA_ENABLE((__HANDLE__)->Instance)
399
  * @retval None
399
 
400
  */
400
/**
401
#define __HAL_MMC_DMA_DISABLE(__HANDLE__)  __SDIO_DMA_DISABLE((__HANDLE__)->Instance)
401
  * @brief  Disable the SDMMC DMA transfer.
402
 
402
  * @retval None
403
/**
403
  */
404
  * @brief  Enable the MMC device interrupt.
404
#define __HAL_MMC_DMA_DISABLE(__HANDLE__)  __SDIO_DMA_DISABLE((__HANDLE__)->Instance)
405
  * @param  __HANDLE__: MMC Handle  
405
 
406
  * @param  __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
406
/**
407
  *         This parameter can be one or a combination of the following values:
407
  * @brief  Enable the MMC device interrupt.
408
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
408
  * @param  __HANDLE__: MMC Handle  
409
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
409
  * @param  __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled.
410
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
410
  *         This parameter can be one or a combination of the following values:
411
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
411
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
412
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
412
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
413
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
413
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
414
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
414
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
415
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
415
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
416
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
416
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
417
  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
417
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
418
  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
418
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
419
  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
419
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
420
  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
420
  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
421
  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
421
  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
422
  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
422
  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
423
  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
423
  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
424
  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
424
  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
425
  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
425
  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
426
  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
426
  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
427
  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
427
  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
428
  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
428
  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
429
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt
429
  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
430
  * @retval None
430
  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
431
  */
431
  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
432
#define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
432
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt
433
 
433
  * @retval None
434
/**
434
  */
435
  * @brief  Disable the MMC device interrupt.
435
#define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
436
  * @param  __HANDLE__: MMC Handle  
436
 
437
  * @param  __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
437
/**
438
  *          This parameter can be one or a combination of the following values:
438
  * @brief  Disable the MMC device interrupt.
439
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
439
  * @param  __HANDLE__: MMC Handle  
440
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
440
  * @param  __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled.
441
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
441
  *          This parameter can be one or a combination of the following values:
442
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
442
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
443
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
443
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
444
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
444
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
445
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
445
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
446
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
446
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
447
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
447
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
448
  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
448
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
449
  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
449
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
450
  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
450
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
451
  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
451
  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
452
  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
452
  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
453
  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
453
  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
454
  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
454
  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
455
  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
455
  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
456
  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
456
  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
457
  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
457
  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
458
  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
458
  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
459
  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
459
  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
460
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt  
460
  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
461
  * @retval None
461
  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
462
  */
462
  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
463
#define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
463
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt  
464
 
464
  * @retval None
465
/**
465
  */
466
  * @brief  Check whether the specified MMC flag is set or not.
466
#define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
467
  * @param  __HANDLE__: MMC Handle  
467
 
468
  * @param  __FLAG__: specifies the flag to check.
468
/**
469
  *          This parameter can be one of the following values:
469
  * @brief  Check whether the specified MMC flag is set or not.
470
  *            @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
470
  * @param  __HANDLE__: MMC Handle  
471
  *            @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
471
  * @param  __FLAG__: specifies the flag to check.
472
  *            @arg SDIO_FLAG_CTIMEOUT: Command response timeout
472
  *          This parameter can be one of the following values:
473
  *            @arg SDIO_FLAG_DTIMEOUT: Data timeout
473
  *            @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
474
  *            @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
474
  *            @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
475
  *            @arg SDIO_FLAG_RXOVERR:  Received FIFO overrun error
475
  *            @arg SDIO_FLAG_CTIMEOUT: Command response timeout
476
  *            @arg SDIO_FLAG_CMDREND:  Command response received (CRC check passed)
476
  *            @arg SDIO_FLAG_DTIMEOUT: Data timeout
477
  *            @arg SDIO_FLAG_CMDSENT:  Command sent (no response required)
477
  *            @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
478
  *            @arg SDIO_FLAG_DATAEND:  Data end (data counter, DATACOUNT, is zero)
478
  *            @arg SDIO_FLAG_RXOVERR:  Received FIFO overrun error
479
  *            @arg SDIO_FLAG_DBCKEND:  Data block sent/received (CRC check passed)
479
  *            @arg SDIO_FLAG_CMDREND:  Command response received (CRC check passed)
480
  *            @arg SDIO_FLAG_CMDACT:   Command transfer in progress
480
  *            @arg SDIO_FLAG_CMDSENT:  Command sent (no response required)
481
  *            @arg SDIO_FLAG_TXACT:    Data transmit in progress
481
  *            @arg SDIO_FLAG_DATAEND:  Data end (data counter, DATACOUNT, is zero)
482
  *            @arg SDIO_FLAG_RXACT:    Data receive in progress
482
  *            @arg SDIO_FLAG_DBCKEND:  Data block sent/received (CRC check passed)
483
  *            @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
483
  *            @arg SDIO_FLAG_CMDACT:   Command transfer in progress
484
  *            @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
484
  *            @arg SDIO_FLAG_TXACT:    Data transmit in progress
485
  *            @arg SDIO_FLAG_TXFIFOF:  Transmit FIFO full
485
  *            @arg SDIO_FLAG_RXACT:    Data receive in progress
486
  *            @arg SDIO_FLAG_RXFIFOF:  Receive FIFO full
486
  *            @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
487
  *            @arg SDIO_FLAG_TXFIFOE:  Transmit FIFO empty
487
  *            @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
488
  *            @arg SDIO_FLAG_RXFIFOE:  Receive FIFO empty
488
  *            @arg SDIO_FLAG_TXFIFOF:  Transmit FIFO full
489
  *            @arg SDIO_FLAG_TXDAVL:   Data available in transmit FIFO
489
  *            @arg SDIO_FLAG_RXFIFOF:  Receive FIFO full
490
  *            @arg SDIO_FLAG_RXDAVL:   Data available in receive FIFO
490
  *            @arg SDIO_FLAG_TXFIFOE:  Transmit FIFO empty
491
  *            @arg SDIO_FLAG_SDIOIT:   SD I/O interrupt received
491
  *            @arg SDIO_FLAG_RXFIFOE:  Receive FIFO empty
492
  * @retval The new state of MMC FLAG (SET or RESET).
492
  *            @arg SDIO_FLAG_TXDAVL:   Data available in transmit FIFO
493
  */
493
  *            @arg SDIO_FLAG_RXDAVL:   Data available in receive FIFO
494
#define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
494
  *            @arg SDIO_FLAG_SDIOIT:   SD I/O interrupt received
495
 
495
  * @retval The new state of MMC FLAG (SET or RESET).
496
/**
496
  */
497
  * @brief  Clear the MMC's pending flags.
497
#define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
498
  * @param  __HANDLE__: MMC Handle  
498
 
499
  * @param  __FLAG__: specifies the flag to clear.  
499
/**
500
  *          This parameter can be one or a combination of the following values:
500
  * @brief  Clear the MMC's pending flags.
501
  *            @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
501
  * @param  __HANDLE__: MMC Handle  
502
  *            @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
502
  * @param  __FLAG__: specifies the flag to clear.  
503
  *            @arg SDIO_FLAG_CTIMEOUT: Command response timeout
503
  *          This parameter can be one or a combination of the following values:
504
  *            @arg SDIO_FLAG_DTIMEOUT: Data timeout
504
  *            @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
505
  *            @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
505
  *            @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
506
  *            @arg SDIO_FLAG_RXOVERR:  Received FIFO overrun error
506
  *            @arg SDIO_FLAG_CTIMEOUT: Command response timeout
507
  *            @arg SDIO_FLAG_CMDREND:  Command response received (CRC check passed)
507
  *            @arg SDIO_FLAG_DTIMEOUT: Data timeout
508
  *            @arg SDIO_FLAG_CMDSENT:  Command sent (no response required)
508
  *            @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
509
  *            @arg SDIO_FLAG_DATAEND:  Data end (data counter, DATACOUNT, is zero)
509
  *            @arg SDIO_FLAG_RXOVERR:  Received FIFO overrun error
510
  *            @arg SDIO_FLAG_DBCKEND:  Data block sent/received (CRC check passed)
510
  *            @arg SDIO_FLAG_CMDREND:  Command response received (CRC check passed)
511
  *            @arg SDIO_FLAG_SDIOIT:   SD I/O interrupt received
511
  *            @arg SDIO_FLAG_CMDSENT:  Command sent (no response required)
512
  * @retval None
512
  *            @arg SDIO_FLAG_DATAEND:  Data end (data counter, DATACOUNT, is zero)
513
  */
513
  *            @arg SDIO_FLAG_DBCKEND:  Data block sent/received (CRC check passed)
514
#define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
514
  *            @arg SDIO_FLAG_SDIOIT:   SD I/O interrupt received
515
 
515
  * @retval None
516
/**
516
  */
517
  * @brief  Check whether the specified MMC interrupt has occurred or not.
517
#define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
518
  * @param  __HANDLE__: MMC Handle  
518
 
519
  * @param  __INTERRUPT__: specifies the SDMMC interrupt source to check.
519
/**
520
  *          This parameter can be one of the following values:
520
  * @brief  Check whether the specified MMC interrupt has occurred or not.
521
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
521
  * @param  __HANDLE__: MMC Handle  
522
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
522
  * @param  __INTERRUPT__: specifies the SDMMC interrupt source to check.
523
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
523
  *          This parameter can be one of the following values:
524
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
524
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
525
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
525
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
526
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
526
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
527
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
527
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
528
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
528
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
529
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
529
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
530
  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
530
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
531
  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
531
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
532
  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
532
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
533
  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
533
  *            @arg SDIO_IT_DBCKEND:  Data block sent/received (CRC check passed) interrupt
534
  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
534
  *            @arg SDIO_IT_CMDACT:   Command transfer in progress interrupt
535
  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
535
  *            @arg SDIO_IT_TXACT:    Data transmit in progress interrupt
536
  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
536
  *            @arg SDIO_IT_RXACT:    Data receive in progress interrupt
537
  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
537
  *            @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
538
  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
538
  *            @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
539
  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
539
  *            @arg SDIO_IT_TXFIFOF:  Transmit FIFO full interrupt
540
  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
540
  *            @arg SDIO_IT_RXFIFOF:  Receive FIFO full interrupt
541
  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
541
  *            @arg SDIO_IT_TXFIFOE:  Transmit FIFO empty interrupt
542
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt
542
  *            @arg SDIO_IT_RXFIFOE:  Receive FIFO empty interrupt
543
  * @retval The new state of MMC IT (SET or RESET).
543
  *            @arg SDIO_IT_TXDAVL:   Data available in transmit FIFO interrupt
544
  */
544
  *            @arg SDIO_IT_RXDAVL:   Data available in receive FIFO interrupt
545
#define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
545
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt
546
 
546
  * @retval The new state of MMC IT (SET or RESET).
547
/**
547
  */
548
  * @brief  Clear the MMC's interrupt pending bits.
548
#define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDIO_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
549
  * @param  __HANDLE__: MMC Handle
549
 
550
  * @param  __INTERRUPT__: specifies the interrupt pending bit to clear.
550
/**
551
  *          This parameter can be one or a combination of the following values:
551
  * @brief  Clear the MMC's interrupt pending bits.
552
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
552
  * @param  __HANDLE__: MMC Handle
553
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
553
  * @param  __INTERRUPT__: specifies the interrupt pending bit to clear.
554
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
554
  *          This parameter can be one or a combination of the following values:
555
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
555
  *            @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
556
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
556
  *            @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
557
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
557
  *            @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
558
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
558
  *            @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
559
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
559
  *            @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
560
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
560
  *            @arg SDIO_IT_RXOVERR:  Received FIFO overrun error interrupt
561
  *            @arg SDIO_IT_DBCKEND:    Data block sent/received (CRC check passed) interrupt
561
  *            @arg SDIO_IT_CMDREND:  Command response received (CRC check passed) interrupt
562
  *            @arg SDIO_IT_TXFIFOHE:   Transmit FIFO Half Empty interrupt
562
  *            @arg SDIO_IT_CMDSENT:  Command sent (no response required) interrupt
563
  *            @arg SDIO_IT_RXFIFOHF:   Receive FIFO Half Full interrupt
563
  *            @arg SDIO_IT_DATAEND:  Data end (data counter, DATACOUNT, is zero) interrupt
564
  *            @arg SDIO_IT_RXFIFOF:    Receive FIFO full interrupt
564
  *            @arg SDIO_IT_DBCKEND:    Data block sent/received (CRC check passed) interrupt
565
  *            @arg SDIO_IT_TXFIFOE:    Transmit FIFO empty interrupt
565
  *            @arg SDIO_IT_TXFIFOHE:   Transmit FIFO Half Empty interrupt
566
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt
566
  *            @arg SDIO_IT_RXFIFOHF:   Receive FIFO Half Full interrupt
567
  * @retval None
567
  *            @arg SDIO_IT_RXFIFOF:    Receive FIFO full interrupt
568
  */
568
  *            @arg SDIO_IT_TXFIFOE:    Transmit FIFO empty interrupt
569
#define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
569
  *            @arg SDIO_IT_SDIOIT:   SD I/O interrupt received interrupt
570
 
570
  * @retval None
571
/**
571
  */
572
  * @}
572
#define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
573
  */
573
 
574
 
574
/**
575
/* Exported functions --------------------------------------------------------*/
575
  * @}
576
/** @defgroup MMC_Exported_Functions MMC Exported Functions
576
  */
577
  * @{
577
 
578
  */
578
/* Exported functions --------------------------------------------------------*/
579
 
579
/** @defgroup MMC_Exported_Functions MMC Exported Functions
580
/** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
580
  * @{
581
  * @{
581
  */
582
  */
582
 
583
HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
583
/** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
584
HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
584
  * @{
585
HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
585
  */
586
void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
586
HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
587
void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
587
HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
588
 
588
HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
589
/**
589
void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
590
  * @}
590
void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
591
  */
591
 
592
 
592
/**
593
/** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
593
  * @}
594
  * @{
594
  */
595
  */
595
 
596
/* Blocking mode: Polling */
596
/** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
597
HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
597
  * @{
598
HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
598
  */
599
HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
599
/* Blocking mode: Polling */
600
/* Non-Blocking mode: IT */
600
HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
601
HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
601
HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
602
HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
602
HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
603
/* Non-Blocking mode: DMA */
603
/* Non-Blocking mode: IT */
604
HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
604
HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
605
HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
605
HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
606
 
606
/* Non-Blocking mode: DMA */
607
void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
607
HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
608
 
608
HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
609
/* Callback in non blocking modes (DMA) */
609
 
610
void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
610
void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
611
void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
611
 
612
void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
612
/* Callback in non blocking modes (DMA) */
613
void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
613
void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
614
 
614
void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
615
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
615
void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
616
/* MMC callback registering/unregistering */
616
void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
617
HAL_StatusTypeDef HAL_MMC_RegisterCallback  (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback);
617
 
618
HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId);
618
#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
619
#endif
619
/* MMC callback registering/unregistering */
620
/**
620
HAL_StatusTypeDef HAL_MMC_RegisterCallback  (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback);
621
  * @}
621
HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId);
622
  */
622
#endif
623
 
623
/**
624
/** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
624
  * @}
625
  * @{
625
  */
626
  */
626
 
627
HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
627
/** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
628
/**
628
  * @{
629
  * @}
629
  */
630
  */
630
HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
631
 
631
/**
632
/** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
632
  * @}
633
  * @{
633
  */
634
  */
634
 
635
HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
635
/** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
636
HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
636
  * @{
637
HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
637
  */
638
HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
638
HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
639
/**
639
HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
640
  * @}
640
HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
641
  */
641
HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
642
 
642
HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout);
643
/** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
643
/**
644
  * @{
644
  * @}
645
  */
645
  */
646
HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
646
 
647
uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
647
/** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
648
/**
648
  * @{
649
  * @}
649
  */
650
  */
650
HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
651
 
651
uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
652
/** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management
652
/**
653
  * @{
653
  * @}
654
  */
654
  */
655
HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
655
 
656
HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
656
/** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management
657
/**
657
  * @{
658
  * @}
658
  */
659
  */
659
HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
660
   
660
HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
661
/* Private types -------------------------------------------------------------*/
661
/**
662
/** @defgroup MMC_Private_Types MMC Private Types
662
  * @}
663
  * @{
663
  */
664
  */
664
   
665
 
665
/* Private types -------------------------------------------------------------*/
666
/**
666
/** @defgroup MMC_Private_Types MMC Private Types
667
  * @}
667
  * @{
668
  */
668
  */
669
 
669
 
670
/* Private defines -----------------------------------------------------------*/
670
/**
671
/** @defgroup MMC_Private_Defines MMC Private Defines
671
  * @}
672
  * @{
672
  */
673
  */
673
 
674
 
674
/* Private defines -----------------------------------------------------------*/
675
/**
675
/** @defgroup MMC_Private_Defines MMC Private Defines
676
  * @}
676
  * @{
677
  */
677
  */
678
         
678
 
679
/* Private variables ---------------------------------------------------------*/
679
/**
680
/** @defgroup MMC_Private_Variables MMC Private Variables
680
  * @}
681
  * @{
681
  */
682
  */
682
         
683
 
683
/* Private variables ---------------------------------------------------------*/
684
/**
684
/** @defgroup MMC_Private_Variables MMC Private Variables
685
  * @}
685
  * @{
686
  */
686
  */
687
 
687
 
688
/* Private constants ---------------------------------------------------------*/
688
/**
689
/** @defgroup MMC_Private_Constants MMC Private Constants
689
  * @}
690
  * @{
690
  */
691
  */
691
 
692
 
692
/* Private constants ---------------------------------------------------------*/
693
/**
693
/** @defgroup MMC_Private_Constants MMC Private Constants
694
  * @}
694
  * @{
695
  */
695
  */
696
 
696
 
697
/* Private macros ------------------------------------------------------------*/
697
/**
698
/** @defgroup MMC_Private_Macros MMC Private Macros
698
  * @}
699
  * @{
699
  */
700
  */
700
 
701
 
701
/* Private macros ------------------------------------------------------------*/
702
/**
702
/** @defgroup MMC_Private_Macros MMC Private Macros
703
  * @}
703
  * @{
704
  */
704
  */
705
 
705
 
706
/* Private functions prototypes ----------------------------------------------*/
706
/**
707
/** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
707
  * @}
708
  * @{
708
  */
709
  */
709
 
710
 
710
/* Private functions prototypes ----------------------------------------------*/
711
/**
711
/** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
712
  * @}
712
  * @{
713
  */
713
  */
714
 
714
 
715
/* Private functions ---------------------------------------------------------*/
715
/**
716
/** @defgroup MMC_Private_Functions MMC Private Functions
716
  * @}
717
  * @{
717
  */
718
  */
718
 
719
 
719
/* Private functions ---------------------------------------------------------*/
720
/**
720
/** @defgroup MMC_Private_Functions MMC Private Functions
721
  * @}
721
  * @{
722
  */
722
  */
723
 
723
 
724
 
724
/**
725
/**
725
  * @}
726
  * @}
726
  */
727
  */
727
 
728
 
728
 
729
/**
729
/**
730
  * @}
730
  * @}
731
  */
731
  */
732
 
732
 
733
/**
733
/**
734
  * @}
734
  * @}
735
  */
735
  */
736
 
736
 
737
#ifdef __cplusplus
737
/**
738
}
738
  * @}
739
#endif
739
  */
740
 
740
 
741
#endif /* SDIO */
741
#ifdef __cplusplus
742
 
742
}
743
#endif /* STM32F1xx_HAL_MMC_H */ 
743
#endif
744
 
744
 
745
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
745
#endif /* SDIO */
-
 
746
 
-
 
747
#endif /* STM32F1xx_HAL_MMC_H */