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4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief Header file of MMC HAL module. |
5 | * @brief Header file of MMC HAL module. |
6 | ****************************************************************************** |
6 | ****************************************************************************** |
7 | * @attention |
7 | * @attention |
8 | * |
8 | * |
9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
9 | * <h2><center>© Copyright (c) 2018 STMicroelectronics. |
- | 10 | * All rights reserved.</center></h2> |
|
10 | * |
11 | * |
11 | * Redistribution and use in source and binary forms, with or without modification, |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * are permitted provided that the following conditions are met: |
13 | * the "License"; You may not use this file except in compliance with the |
13 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
14 | * this list of conditions and the following disclaimer. |
14 | * License. You may obtain a copy of the License at: |
15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
16 | * this list of conditions and the following disclaimer in the documentation |
- | |
17 | * and/or other materials provided with the distribution. |
15 | * opensource.org/licenses/BSD-3-Clause |
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
19 | * may be used to endorse or promote products derived from this software |
- | |
20 | * without specific prior written permission. |
- | |
21 | * |
- | |
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
32 | * |
16 | * |
33 | ****************************************************************************** |
17 | ****************************************************************************** |
34 | */ |
18 | */ |
35 | 19 | ||
36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
37 | #ifndef __STM32F1xx_HAL_MMC_H |
21 | #ifndef STM32F1xx_HAL_MMC_H |
38 | #define __STM32F1xx_HAL_MMC_H |
22 | #define STM32F1xx_HAL_MMC_H |
- | 23 | ||
- | 24 | #if defined(SDIO) |
|
39 | 25 | ||
40 | #ifdef __cplusplus |
26 | #ifdef __cplusplus |
41 | extern "C" { |
27 | extern "C" { |
42 | #endif |
28 | #endif |
43 | 29 | ||
44 | #if defined(STM32F103xE) || defined(STM32F103xG) |
- | |
45 | - | ||
46 | /* Includes ------------------------------------------------------------------*/ |
30 | /* Includes ------------------------------------------------------------------*/ |
47 | #include "stm32f1xx_ll_sdmmc.h" |
31 | #include "stm32f1xx_ll_sdmmc.h" |
48 | 32 | ||
49 | /** @addtogroup STM32F1xx_HAL_Driver |
33 | /** @addtogroup STM32F1xx_HAL_Driver |
50 | * @{ |
34 | * @{ |
51 | */ |
35 | */ |
52 | 36 | ||
53 | /** @defgroup MMC MMC |
37 | /** @addtogroup MMC |
54 | * @brief MMC HAL module driver |
- | |
55 | * @{ |
38 | * @{ |
56 | */ |
39 | */ |
57 | 40 | ||
58 | /* Exported types ------------------------------------------------------------*/ |
41 | /* Exported types ------------------------------------------------------------*/ |
59 | /** @defgroup MMC_Exported_Types MMC Exported Types |
42 | /** @defgroup MMC_Exported_Types MMC Exported Types |
Line 63... | Line 46... | ||
63 | /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure |
46 | /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure |
64 | * @{ |
47 | * @{ |
65 | */ |
48 | */ |
66 | typedef enum |
49 | typedef enum |
67 | { |
50 | { |
68 | HAL_MMC_STATE_RESET = 0x00000000U, /*!< MMC not yet initialized or disabled */ |
51 | HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ |
69 | HAL_MMC_STATE_READY = 0x00000001U, /*!< MMC initialized and ready for use */ |
52 | HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ |
70 | HAL_MMC_STATE_TIMEOUT = 0x00000002U, /*!< MMC Timeout state */ |
53 | HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ |
71 | HAL_MMC_STATE_BUSY = 0x00000003U, /*!< MMC process ongoing */ |
54 | HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ |
72 | HAL_MMC_STATE_PROGRAMMING = 0x00000004U, /*!< MMC Programming State */ |
55 | HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ |
73 | HAL_MMC_STATE_RECEIVING = 0x00000005U, /*!< MMC Receinving State */ |
56 | HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ |
74 | HAL_MMC_STATE_TRANSFER = 0x00000006U, /*!< MMC Transfert State */ |
57 | HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */ |
75 | HAL_MMC_STATE_ERROR = 0x0000000FU /*!< MMC is in error state */ |
58 | HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ |
76 | }HAL_MMC_StateTypeDef; |
59 | }HAL_MMC_StateTypeDef; |
77 | /** |
60 | /** |
78 | * @} |
61 | * @} |
79 | */ |
62 | */ |
80 | 63 | ||
81 | /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure |
64 | /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure |
82 | * @{ |
65 | * @{ |
83 | */ |
66 | */ |
84 | typedef enum |
67 | typedef uint32_t HAL_MMC_CardStateTypeDef; |
85 | { |
68 | |
86 | HAL_MMC_CARD_READY = 0x00000001U, /*!< Card state is ready */ |
69 | #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ |
87 | HAL_MMC_CARD_IDENTIFICATION = 0x00000002U, /*!< Card is in identification state */ |
70 | #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ |
88 | HAL_MMC_CARD_STANDBY = 0x00000003U, /*!< Card is in standby state */ |
71 | #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ |
89 | HAL_MMC_CARD_TRANSFER = 0x00000004U, /*!< Card is in transfer state */ |
72 | #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ |
90 | HAL_MMC_CARD_SENDING = 0x00000005U, /*!< Card is sending an operation */ |
73 | #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ |
91 | HAL_MMC_CARD_RECEIVING = 0x00000006U, /*!< Card is receiving operation information */ |
74 | #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ |
92 | HAL_MMC_CARD_PROGRAMMING = 0x00000007U, /*!< Card is in programming state */ |
75 | #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ |
93 | HAL_MMC_CARD_DISCONNECTED = 0x00000008U, /*!< Card is disconnected */ |
76 | #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ |
94 | HAL_MMC_CARD_ERROR = 0x000000FFU /*!< Card response Error */ |
77 | #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ |
95 | }HAL_MMC_CardStateTypeDef; |
- | |
96 | /** |
78 | /** |
97 | * @} |
79 | * @} |
98 | */ |
80 | */ |
99 | 81 | ||
100 | /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition |
82 | /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition |
Line 125... | Line 107... | ||
125 | }HAL_MMC_CardInfoTypeDef; |
107 | }HAL_MMC_CardInfoTypeDef; |
126 | 108 | ||
127 | /** |
109 | /** |
128 | * @brief MMC handle Structure definition |
110 | * @brief MMC handle Structure definition |
129 | */ |
111 | */ |
- | 112 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
|
- | 113 | typedef struct __MMC_HandleTypeDef |
|
- | 114 | #else |
|
130 | typedef struct |
115 | typedef struct |
- | 116 | #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ |
|
131 | { |
117 | { |
132 | MMC_TypeDef *Instance; /*!< MMC registers base address */ |
118 | MMC_TypeDef *Instance; /*!< MMC registers base address */ |
133 | 119 | ||
134 | MMC_InitTypeDef Init; /*!< MMC required parameters */ |
120 | MMC_InitTypeDef Init; /*!< MMC required parameters */ |
135 | 121 | ||
136 | HAL_LockTypeDef Lock; /*!< MMC locking object */ |
122 | HAL_LockTypeDef Lock; /*!< MMC locking object */ |
137 | 123 | ||
138 | uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ |
124 | uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ |
139 | 125 | ||
140 | uint32_t TxXferSize; /*!< MMC Tx Transfer size */ |
126 | uint32_t TxXferSize; /*!< MMC Tx Transfer size */ |
141 | 127 | ||
142 | uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ |
128 | uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ |
143 | 129 | ||
144 | uint32_t RxXferSize; /*!< MMC Rx Transfer size */ |
130 | uint32_t RxXferSize; /*!< MMC Rx Transfer size */ |
145 | 131 | ||
146 | __IO uint32_t Context; /*!< MMC transfer context */ |
132 | __IO uint32_t Context; /*!< MMC transfer context */ |
147 | 133 | ||
Line 152... | Line 138... | ||
152 | DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ |
138 | DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */ |
153 | 139 | ||
154 | DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ |
140 | DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */ |
155 | 141 | ||
156 | HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ |
142 | HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ |
157 | 143 | ||
158 | uint32_t CSD[4U]; /*!< MMC card specific data table */ |
144 | uint32_t CSD[4U]; /*!< MMC card specific data table */ |
159 | 145 | ||
160 | uint32_t CID[4U]; /*!< MMC card identification number table */ |
146 | uint32_t CID[4U]; /*!< MMC card identification number table */ |
161 | 147 | ||
- | 148 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
|
- | 149 | void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
|
- | 150 | void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
|
- | 151 | void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); |
|
- | 152 | void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
|
- | 153 | ||
- | 154 | void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); |
|
- | 155 | void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); |
|
- | 156 | #endif |
|
162 | }MMC_HandleTypeDef; |
157 | }MMC_HandleTypeDef; |
163 | 158 | ||
164 | /** |
159 | /** |
165 | * @} |
160 | * @} |
166 | */ |
161 | */ |
Line 197... | Line 192... | ||
197 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
192 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
198 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
193 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
199 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
194 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
200 | __IO uint8_t Reserved3; /*!< Reserved */ |
195 | __IO uint8_t Reserved3; /*!< Reserved */ |
201 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
196 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
202 | __IO uint8_t FileFormatGrouop; /*!< File format group */ |
197 | __IO uint8_t FileFormatGroup; /*!< File format group */ |
203 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
198 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
204 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
199 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
205 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
200 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
206 | __IO uint8_t FileFormat; /*!< File format */ |
201 | __IO uint8_t FileFormat; /*!< File format */ |
207 | __IO uint8_t ECC; /*!< ECC code */ |
202 | __IO uint8_t ECC; /*!< ECC code */ |
Line 232... | Line 227... | ||
232 | }HAL_MMC_CardCIDTypeDef; |
227 | }HAL_MMC_CardCIDTypeDef; |
233 | /** |
228 | /** |
234 | * @} |
229 | * @} |
235 | */ |
230 | */ |
236 | 231 | ||
- | 232 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
|
237 | /** @defgroup MMC_Exported_Types_Group6 MMC Card Status returned by ACMD13 |
233 | /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition |
238 | * @{ |
234 | * @{ |
239 | */ |
235 | */ |
240 | typedef struct |
236 | typedef enum |
241 | { |
237 | { |
242 | __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ |
238 | HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ |
243 | __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ |
239 | HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ |
244 | __IO uint16_t CardType; /*!< Carries information about card type */ |
240 | HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ |
245 | __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ |
- | |
246 | __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ |
- | |
247 | __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ |
- | |
248 | __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ |
- | |
249 | __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ |
- | |
250 | __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ |
- | |
251 | __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ |
241 | HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ |
252 | 242 | ||
- | 243 | HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ |
|
- | 244 | HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ |
|
253 | }HAL_MMC_CardStatusTypeDef; |
245 | }HAL_MMC_CallbackIDTypeDef; |
254 | /** |
246 | /** |
255 | * @} |
247 | * @} |
256 | */ |
248 | */ |
257 | 249 | ||
- | 250 | /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition |
|
- | 251 | * @{ |
|
- | 252 | */ |
|
- | 253 | typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); |
|
- | 254 | /** |
|
- | 255 | * @} |
|
- | 256 | */ |
|
- | 257 | #endif |
|
258 | /** |
258 | /** |
259 | * @} |
259 | * @} |
260 | */ |
260 | */ |
261 | 261 | ||
262 | /* Exported constants --------------------------------------------------------*/ |
262 | /* Exported constants --------------------------------------------------------*/ |
263 | /** @defgroup MMC_Exported_Constants Exported Constants |
263 | /** @defgroup MMC_Exported_Constants Exported Constants |
264 | * @{ |
264 | * @{ |
265 | */ |
265 | */ |
266 | 266 | ||
267 | #define BLOCKSIZE 512U /*!< Block size is 512 bytes */ |
267 | #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ |
268 | - | ||
269 | #define CAPACITY 0x400000U /*!< Log Block Nuumber for 2 G bytes Cards */ |
- | |
270 | 268 | ||
271 | /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition |
269 | /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition |
272 | * @{ |
270 | * @{ |
273 | */ |
271 | */ |
274 | #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
272 | #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
Line 305... | Line 303... | ||
305 | #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
303 | #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
306 | #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
304 | #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
307 | #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
305 | #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
308 | #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
306 | #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
309 | #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
307 | #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
- | 308 | ||
- | 309 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
|
- | 310 | #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ |
|
- | 311 | #endif |
|
310 | /** |
312 | /** |
311 | * @} |
313 | * @} |
312 | */ |
314 | */ |
313 | 315 | ||
314 | /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration structure |
316 | /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration |
315 | * @{ |
317 | * @{ |
316 | */ |
318 | */ |
317 | #define MMC_CONTEXT_NONE 0x00000000U /*!< None */ |
319 | #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ |
318 | #define MMC_CONTEXT_READ_SINGLE_BLOCK 0x00000001U /*!< Read single block operation */ |
320 | #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ |
319 | #define MMC_CONTEXT_READ_MULTIPLE_BLOCK 0x00000002U /*!< Read multiple blocks operation */ |
321 | #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ |
320 | #define MMC_CONTEXT_WRITE_SINGLE_BLOCK 0x00000010U /*!< Write single block operation */ |
322 | #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ |
321 | #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK 0x00000020U /*!< Write multiple blocks operation */ |
323 | #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ |
322 | #define MMC_CONTEXT_IT 0x00000008U /*!< Process in Interrupt mode */ |
324 | #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ |
323 | #define MMC_CONTEXT_DMA 0x00000080U /*!< Process in DMA mode */ |
325 | #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ |
- | 326 | ||
324 | /** |
327 | /** |
325 | * @} |
328 | * @} |
326 | */ |
329 | */ |
327 | 330 | ||
328 | /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode |
331 | /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode |
Line 341... | Line 344... | ||
341 | */ |
344 | */ |
342 | 345 | ||
343 | /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards |
346 | /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards |
344 | * @{ |
347 | * @{ |
345 | */ |
348 | */ |
346 | #define MMC_HIGH_VOLTAGE_CARD 0x00000000U |
349 | #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ |
347 | #define MMC_DUAL_VOLTAGE_CARD 0x00000001U |
350 | #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ |
- | 351 | ||
348 | /** |
352 | /** |
349 | * @} |
353 | * @} |
350 | */ |
354 | */ |
351 | 355 | ||
352 | /** |
356 | /** |
Line 356... | Line 360... | ||
356 | /* Exported macro ------------------------------------------------------------*/ |
360 | /* Exported macro ------------------------------------------------------------*/ |
357 | /** @defgroup MMC_Exported_macros MMC Exported Macros |
361 | /** @defgroup MMC_Exported_macros MMC Exported Macros |
358 | * @brief macros to handle interrupts and specific clock configurations |
362 | * @brief macros to handle interrupts and specific clock configurations |
359 | * @{ |
363 | * @{ |
360 | */ |
364 | */ |
- | 365 | /** @brief Reset MMC handle state. |
|
- | 366 | * @param __HANDLE__ : MMC handle. |
|
- | 367 | * @retval None |
|
- | 368 | */ |
|
- | 369 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
|
- | 370 | #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ |
|
- | 371 | (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ |
|
- | 372 | (__HANDLE__)->MspInitCallback = NULL; \ |
|
- | 373 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
|
- | 374 | } while(0) |
|
- | 375 | #else |
|
- | 376 | #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) |
|
- | 377 | #endif |
|
361 | 378 | ||
362 | /** |
379 | /** |
363 | * @brief Enable the MMC device. |
380 | * @brief Enable the MMC device. |
364 | * @retval None |
381 | * @retval None |
365 | */ |
382 | */ |
Line 394... | Line 411... | ||
394 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
411 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
395 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
412 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
396 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
413 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
397 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
414 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
398 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
415 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
399 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
416 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
400 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
417 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
401 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
418 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
402 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
419 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
403 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
420 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
404 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
421 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
Line 425... | Line 442... | ||
425 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
442 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
426 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
443 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
427 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
444 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
428 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
445 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
429 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
446 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
430 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
447 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
431 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
448 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
432 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
449 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
433 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
450 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
434 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
451 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
435 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
452 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
Line 456... | Line 473... | ||
456 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
473 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
457 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
474 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
458 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
475 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
459 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
476 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
460 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
477 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
461 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
478 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
462 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
479 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
463 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
480 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
464 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
481 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
465 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
482 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
466 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
483 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
Line 487... | Line 504... | ||
487 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
504 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
488 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
505 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
489 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
506 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
490 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
507 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
491 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
508 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
492 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
509 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
493 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
510 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
494 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
511 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
495 | * @retval None |
512 | * @retval None |
496 | */ |
513 | */ |
497 | #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
514 | #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
Line 507... | Line 524... | ||
507 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
524 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
508 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
525 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
509 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
526 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
510 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
527 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
511 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
528 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
512 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
529 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
513 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
530 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
514 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
531 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
515 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
532 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
516 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
533 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
517 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
534 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
Line 538... | Line 555... | ||
538 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
555 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
539 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
556 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
540 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
557 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
541 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
558 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
542 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
559 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
543 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt |
560 | * @arg SDIO_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
- | 561 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
|
- | 562 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
|
- | 563 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
|
- | 564 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
|
- | 565 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
|
544 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
566 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
545 | * @retval None |
567 | * @retval None |
546 | */ |
568 | */ |
547 | #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
569 | #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
548 | 570 | ||
Line 561... | Line 583... | ||
561 | HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); |
583 | HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); |
562 | HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); |
584 | HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); |
563 | HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); |
585 | HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); |
564 | void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); |
586 | void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); |
565 | void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); |
587 | void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); |
- | 588 | ||
566 | /** |
589 | /** |
567 | * @} |
590 | * @} |
568 | */ |
591 | */ |
569 | 592 | ||
570 | /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions |
593 | /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions |
Line 586... | Line 609... | ||
586 | /* Callback in non blocking modes (DMA) */ |
609 | /* Callback in non blocking modes (DMA) */ |
587 | void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); |
610 | void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); |
588 | void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); |
611 | void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); |
589 | void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); |
612 | void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); |
590 | void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); |
613 | void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); |
- | 614 | ||
- | 615 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
|
- | 616 | /* MMC callback registering/unregistering */ |
|
- | 617 | HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); |
|
- | 618 | HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); |
|
- | 619 | #endif |
|
591 | /** |
620 | /** |
592 | * @} |
621 | * @} |
593 | */ |
622 | */ |
594 | 623 | ||
595 | /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions |
624 | /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions |
Line 602... | Line 631... | ||
602 | 631 | ||
603 | /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions |
632 | /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions |
604 | * @{ |
633 | * @{ |
605 | */ |
634 | */ |
606 | HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); |
635 | HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); |
607 | HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); |
636 | HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); |
608 | HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); |
637 | HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); |
609 | HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); |
638 | HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); |
610 | /** |
639 | /** |
611 | * @} |
640 | * @} |
612 | */ |
641 | */ |
613 | 642 | ||
614 | /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions |
643 | /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions |
Line 690... | Line 719... | ||
690 | 719 | ||
691 | /** |
720 | /** |
692 | * @} |
721 | * @} |
693 | */ |
722 | */ |
694 | 723 | ||
- | 724 | ||
695 | /** |
725 | /** |
696 | * @} |
726 | * @} |
697 | */ |
727 | */ |
698 | 728 | ||
699 | /** |
729 | /** |
Line 702... | Line 732... | ||
702 | 732 | ||
703 | /** |
733 | /** |
704 | * @} |
734 | * @} |
705 | */ |
735 | */ |
706 | 736 | ||
707 | #endif /* STM32F103xE || STM32F103xG */ |
- | |
708 | - | ||
709 | #ifdef __cplusplus |
737 | #ifdef __cplusplus |
710 | } |
738 | } |
711 | #endif |
739 | #endif |
712 | 740 | ||
- | 741 | #endif /* SDIO */ |
|
713 | 742 | ||
714 | #endif /* __STM32F1xx_HAL_MMC_H */ |
743 | #endif /* STM32F1xx_HAL_MMC_H */ |
715 | 744 | ||
716 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
745 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |