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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_hal_iwdg.h |
3 | * @file stm32f1xx_hal_iwdg.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief Header file of IWDG HAL module. |
5 | * @brief Header file of IWDG HAL module. |
| 6 | ****************************************************************************** |
6 | ****************************************************************************** |
| 7 | * @attention |
7 | * @attention |
| 8 | * |
8 | * |
| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
9 | * Copyright (c) 2016 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
| 11 | * |
11 | * |
| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
| 13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
| 14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
| 16 | * |
16 | ****************************************************************************** |
| 17 | ****************************************************************************** |
17 | */ |
| 18 | */ |
18 | |
| 19 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
|
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | #ifndef STM32F1xx_HAL_IWDG_H |
| 21 | #ifndef STM32F1xx_HAL_IWDG_H |
21 | #define STM32F1xx_HAL_IWDG_H |
| 22 | #define STM32F1xx_HAL_IWDG_H |
22 | |
| 23 | 23 | #ifdef __cplusplus |
|
| 24 | #ifdef __cplusplus |
24 | extern "C" { |
| 25 | extern "C" { |
25 | #endif |
| 26 | #endif |
26 | |
| 27 | 27 | /* Includes ------------------------------------------------------------------*/ |
|
| 28 | /* Includes ------------------------------------------------------------------*/ |
28 | #include "stm32f1xx_hal_def.h" |
| 29 | #include "stm32f1xx_hal_def.h" |
29 | |
| 30 | 30 | /** @addtogroup STM32F1xx_HAL_Driver |
|
| 31 | /** @addtogroup STM32F1xx_HAL_Driver |
31 | * @{ |
| 32 | * @{ |
32 | */ |
| 33 | */ |
33 | |
| 34 | 34 | /** @defgroup IWDG IWDG |
|
| 35 | /** @defgroup IWDG IWDG |
35 | * @{ |
| 36 | * @{ |
36 | */ |
| 37 | */ |
37 | |
| 38 | 38 | /* Exported types ------------------------------------------------------------*/ |
|
| 39 | /* Exported types ------------------------------------------------------------*/ |
39 | /** @defgroup IWDG_Exported_Types IWDG Exported Types |
| 40 | /** @defgroup IWDG_Exported_Types IWDG Exported Types |
40 | * @{ |
| 41 | * @{ |
41 | */ |
| 42 | */ |
42 | |
| 43 | 43 | /** |
|
| 44 | /** |
44 | * @brief IWDG Init structure definition |
| 45 | * @brief IWDG Init structure definition |
45 | */ |
| 46 | */ |
46 | typedef struct |
| 47 | typedef struct |
47 | { |
| 48 | { |
48 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
| 49 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
49 | This parameter can be a value of @ref IWDG_Prescaler */ |
| 50 | This parameter can be a value of @ref IWDG_Prescaler */ |
50 | |
| 51 | 51 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
|
| 52 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
52 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
| 53 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
53 | |
| 54 | 54 | } IWDG_InitTypeDef; |
|
| 55 | } IWDG_InitTypeDef; |
55 | |
| 56 | 56 | /** |
|
| 57 | /** |
57 | * @brief IWDG Handle Structure definition |
| 58 | * @brief IWDG Handle Structure definition |
58 | */ |
| 59 | */ |
59 | typedef struct |
| 60 | typedef struct |
60 | { |
| 61 | { |
61 | IWDG_TypeDef *Instance; /*!< Register base address */ |
| 62 | IWDG_TypeDef *Instance; /*!< Register base address */ |
62 | |
| 63 | 63 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
|
| 64 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
64 | } IWDG_HandleTypeDef; |
| 65 | } IWDG_HandleTypeDef; |
65 | |
| 66 | 66 | ||
| 67 | 67 | /** |
|
| 68 | /** |
68 | * @} |
| 69 | * @} |
69 | */ |
| 70 | */ |
70 | |
| 71 | 71 | /* Exported constants --------------------------------------------------------*/ |
|
| 72 | /* Exported constants --------------------------------------------------------*/ |
72 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
| 73 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
73 | * @{ |
| 74 | * @{ |
74 | */ |
| 75 | */ |
75 | |
| 76 | 76 | /** @defgroup IWDG_Prescaler IWDG Prescaler |
|
| 77 | /** @defgroup IWDG_Prescaler IWDG Prescaler |
77 | * @{ |
| 78 | * @{ |
78 | */ |
| 79 | */ |
79 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ |
| 80 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ |
80 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ |
| 81 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ |
81 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ |
| 82 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ |
82 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ |
| 83 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ |
83 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ |
| 84 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ |
84 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ |
| 85 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ |
85 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ |
| 86 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ |
86 | /** |
| 87 | /** |
87 | * @} |
| 88 | * @} |
88 | */ |
| 89 | */ |
89 | |
| 90 | 90 | /** |
|
| 91 | /** |
91 | * @} |
| 92 | * @} |
92 | */ |
| 93 | */ |
93 | |
| 94 | 94 | /* Exported macros -----------------------------------------------------------*/ |
|
| 95 | /* Exported macros -----------------------------------------------------------*/ |
95 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
| 96 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
96 | * @{ |
| 97 | * @{ |
97 | */ |
| 98 | */ |
98 | |
| 99 | 99 | /** |
|
| 100 | /** |
100 | * @brief Enable the IWDG peripheral. |
| 101 | * @brief Enable the IWDG peripheral. |
101 | * @param __HANDLE__ IWDG handle |
| 102 | * @param __HANDLE__ IWDG handle |
102 | * @retval None |
| 103 | * @retval None |
103 | */ |
| 104 | */ |
104 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
| 105 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
105 | |
| 106 | 106 | /** |
|
| 107 | /** |
107 | * @brief Reload IWDG counter with value defined in the reload register |
| 108 | * @brief Reload IWDG counter with value defined in the reload register |
108 | * (write access to IWDG_PR and IWDG_RLR registers disabled). |
| 109 | * (write access to IWDG_PR and IWDG_RLR registers disabled). |
109 | * @param __HANDLE__ IWDG handle |
| 110 | * @param __HANDLE__ IWDG handle |
110 | * @retval None |
| 111 | * @retval None |
111 | */ |
| 112 | */ |
112 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
| 113 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
113 | |
| 114 | 114 | /** |
|
| 115 | /** |
115 | * @} |
| 116 | * @} |
116 | */ |
| 117 | */ |
117 | |
| 118 | 118 | /* Exported functions --------------------------------------------------------*/ |
|
| 119 | /* Exported functions --------------------------------------------------------*/ |
119 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions |
| 120 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions |
120 | * @{ |
| 121 | * @{ |
121 | */ |
| 122 | */ |
122 | |
| 123 | 123 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions |
|
| 124 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions |
124 | * @{ |
| 125 | * @{ |
125 | */ |
| 126 | */ |
126 | /* Initialization/Start functions ********************************************/ |
| 127 | /* Initialization/Start functions ********************************************/ |
127 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
| 128 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
128 | /** |
| 129 | /** |
129 | * @} |
| 130 | * @} |
130 | */ |
| 131 | */ |
131 | |
| 132 | 132 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions |
|
| 133 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions |
133 | * @{ |
| 134 | * @{ |
134 | */ |
| 135 | */ |
135 | /* I/O operation functions ****************************************************/ |
| 136 | /* I/O operation functions ****************************************************/ |
136 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
| 137 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
137 | /** |
| 138 | /** |
138 | * @} |
| 139 | * @} |
139 | */ |
| 140 | */ |
140 | |
| 141 | 141 | /** |
|
| 142 | /** |
142 | * @} |
| 143 | * @} |
143 | */ |
| 144 | */ |
144 | |
| 145 | 145 | /* Private constants ---------------------------------------------------------*/ |
|
| 146 | /* Private constants ---------------------------------------------------------*/ |
146 | /** @defgroup IWDG_Private_Constants IWDG Private Constants |
| 147 | /** @defgroup IWDG_Private_Constants IWDG Private Constants |
147 | * @{ |
| 148 | * @{ |
148 | */ |
| 149 | */ |
149 | |
| 150 | 150 | /** |
|
| 151 | /** |
151 | * @brief IWDG Key Register BitMask |
| 152 | * @brief IWDG Key Register BitMask |
152 | */ |
| 153 | */ |
153 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ |
| 154 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ |
154 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ |
| 155 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ |
155 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ |
| 156 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ |
156 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ |
| 157 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ |
157 | |
| 158 | 158 | /** |
|
| 159 | /** |
159 | * @} |
| 160 | * @} |
160 | */ |
| 161 | */ |
161 | |
| 162 | 162 | /* Private macros ------------------------------------------------------------*/ |
|
| 163 | /* Private macros ------------------------------------------------------------*/ |
163 | /** @defgroup IWDG_Private_Macros IWDG Private Macros |
| 164 | /** @defgroup IWDG_Private_Macros IWDG Private Macros |
164 | * @{ |
| 165 | * @{ |
165 | */ |
| 166 | */ |
166 | |
| 167 | 167 | /** |
|
| 168 | /** |
168 | * @brief Enable write access to IWDG_PR and IWDG_RLR registers. |
| 169 | * @brief Enable write access to IWDG_PR and IWDG_RLR registers. |
169 | * @param __HANDLE__ IWDG handle |
| 170 | * @param __HANDLE__ IWDG handle |
170 | * @retval None |
| 171 | * @retval None |
171 | */ |
| 172 | */ |
172 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
| 173 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
173 | |
| 174 | 174 | /** |
|
| 175 | /** |
175 | * @brief Disable write access to IWDG_PR and IWDG_RLR registers. |
| 176 | * @brief Disable write access to IWDG_PR and IWDG_RLR registers. |
176 | * @param __HANDLE__ IWDG handle |
| 177 | * @param __HANDLE__ IWDG handle |
177 | * @retval None |
| 178 | * @retval None |
178 | */ |
| 179 | */ |
179 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
| 180 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
180 | |
| 181 | 181 | /** |
|
| 182 | /** |
182 | * @brief Check IWDG prescaler value. |
| 183 | * @brief Check IWDG prescaler value. |
183 | * @param __PRESCALER__ IWDG prescaler value |
| 184 | * @param __PRESCALER__ IWDG prescaler value |
184 | * @retval None |
| 185 | * @retval None |
185 | */ |
| 186 | */ |
186 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
| 187 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
187 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
| 188 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
188 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
| 189 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
189 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
| 190 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
190 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
| 191 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
191 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
| 192 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
192 | ((__PRESCALER__) == IWDG_PRESCALER_256)) |
| 193 | ((__PRESCALER__) == IWDG_PRESCALER_256)) |
193 | |
| 194 | 194 | /** |
|
| 195 | /** |
195 | * @brief Check IWDG reload value. |
| 196 | * @brief Check IWDG reload value. |
196 | * @param __RELOAD__ IWDG reload value |
| 197 | * @param __RELOAD__ IWDG reload value |
197 | * @retval None |
| 198 | * @retval None |
198 | */ |
| 199 | */ |
199 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) |
| 200 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) |
200 | |
| 201 | 201 | ||
| 202 | 202 | ||
| 203 | 203 | /** |
|
| 204 | /** |
204 | * @} |
| 205 | * @} |
205 | */ |
| 206 | */ |
206 | |
| 207 | 207 | /** |
|
| 208 | /** |
208 | * @} |
| 209 | * @} |
209 | */ |
| 210 | */ |
210 | |
| 211 | 211 | /** |
|
| 212 | /** |
212 | * @} |
| 213 | * @} |
213 | */ |
| 214 | */ |
214 | |
| 215 | 215 | ||
| 216 | 216 | #ifdef __cplusplus |
|
| 217 | #ifdef __cplusplus |
217 | } |
| 218 | } |
218 | #endif |
| 219 | #endif |
219 | |
| 220 | 220 | #endif /* STM32F1xx_HAL_IWDG_H */ |
|
| 221 | #endif /* STM32F1xx_HAL_IWDG_H */ |
- | |
| 222 | - | ||
| 223 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
- | |