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1 | /** |
1 | /** |
2 | ****************************************************************************** |
2 | ****************************************************************************** |
3 | * @file stm32f1xx_hal_i2c.h |
3 | * @file stm32f1xx_hal_i2c.h |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief Header file of I2C HAL module. |
5 | * @brief Header file of I2C HAL module. |
6 | ****************************************************************************** |
6 | ****************************************************************************** |
7 | * @attention |
7 | * @attention |
8 | * |
8 | * |
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
9 | * Copyright (c) 2016 STMicroelectronics. |
10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
11 | * |
11 | * |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
16 | * |
16 | ****************************************************************************** |
17 | ****************************************************************************** |
17 | */ |
18 | */ |
18 | |
19 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
|
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | #ifndef __STM32F1xx_HAL_I2C_H |
21 | #ifndef __STM32F1xx_HAL_I2C_H |
21 | #define __STM32F1xx_HAL_I2C_H |
22 | #define __STM32F1xx_HAL_I2C_H |
22 | |
23 | 23 | #ifdef __cplusplus |
|
24 | #ifdef __cplusplus |
24 | extern "C" { |
25 | extern "C" { |
25 | #endif |
26 | #endif |
26 | |
27 | 27 | /* Includes ------------------------------------------------------------------*/ |
|
28 | /* Includes ------------------------------------------------------------------*/ |
28 | #include "stm32f1xx_hal_def.h" |
29 | #include "stm32f1xx_hal_def.h" |
29 | |
30 | 30 | /** @addtogroup STM32F1xx_HAL_Driver |
|
31 | /** @addtogroup STM32F1xx_HAL_Driver |
31 | * @{ |
32 | * @{ |
32 | */ |
33 | */ |
33 | |
34 | 34 | /** @addtogroup I2C |
|
35 | /** @addtogroup I2C |
35 | * @{ |
36 | * @{ |
36 | */ |
37 | */ |
37 | |
38 | 38 | /* Exported types ------------------------------------------------------------*/ |
|
39 | /* Exported types ------------------------------------------------------------*/ |
39 | /** @defgroup I2C_Exported_Types I2C Exported Types |
40 | /** @defgroup I2C_Exported_Types I2C Exported Types |
40 | * @{ |
41 | * @{ |
41 | */ |
42 | */ |
42 | |
43 | 43 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
|
44 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
44 | * @brief I2C Configuration Structure definition |
45 | * @brief I2C Configuration Structure definition |
45 | * @{ |
46 | * @{ |
46 | */ |
47 | */ |
47 | typedef struct |
48 | typedef struct |
48 | { |
49 | { |
49 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
50 | uint32_t ClockSpeed; /*!< Specifies the clock frequency. |
50 | This parameter must be set to a value lower than 400kHz */ |
51 | This parameter must be set to a value lower than 400kHz */ |
51 | |
52 | 52 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
|
53 | uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle. |
53 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
54 | This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ |
54 | |
55 | 55 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
|
56 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
56 | This parameter can be a 7-bit or 10-bit address. */ |
57 | This parameter can be a 7-bit or 10-bit address. */ |
57 | |
58 | 58 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
|
59 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
59 | This parameter can be a value of @ref I2C_addressing_mode */ |
60 | This parameter can be a value of @ref I2C_addressing_mode */ |
60 | |
61 | 61 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
|
62 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
62 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
63 | This parameter can be a value of @ref I2C_dual_addressing_mode */ |
63 | |
64 | 64 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
|
65 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
65 | This parameter can be a 7-bit address. */ |
66 | This parameter can be a 7-bit address. */ |
66 | |
67 | 67 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
|
68 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
68 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
69 | This parameter can be a value of @ref I2C_general_call_addressing_mode */ |
69 | |
70 | 70 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
|
71 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
71 | This parameter can be a value of @ref I2C_nostretch_mode */ |
72 | This parameter can be a value of @ref I2C_nostretch_mode */ |
72 | |
73 | 73 | } I2C_InitTypeDef; |
|
74 | } I2C_InitTypeDef; |
74 | |
75 | 75 | /** |
|
76 | /** |
76 | * @} |
77 | * @} |
77 | */ |
78 | */ |
78 | |
79 | 79 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
|
80 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
80 | * @brief HAL State structure definition |
81 | * @brief HAL State structure definition |
81 | * @note HAL I2C State value coding follow below described bitmap : |
82 | * @note HAL I2C State value coding follow below described bitmap : |
82 | * b7-b6 Error information |
83 | * b7-b6 Error information |
83 | * 00 : No Error |
84 | * 00 : No Error |
84 | * 01 : Abort (Abort user request on going) |
85 | * 01 : Abort (Abort user request on going) |
85 | * 10 : Timeout |
86 | * 10 : Timeout |
86 | * 11 : Error |
87 | * 11 : Error |
87 | * b5 Peripheral initialization status |
88 | * b5 Peripheral initialization status |
88 | * 0 : Reset (Peripheral not initialized) |
89 | * 0 : Reset (Peripheral not initialized) |
89 | * 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called) |
90 | * 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called) |
90 | * b4 (not used) |
91 | * b4 (not used) |
91 | * x : Should be set to 0 |
92 | * x : Should be set to 0 |
92 | * b3 |
93 | * b3 |
93 | * 0 : Ready or Busy (No Listen mode ongoing) |
94 | * 0 : Ready or Busy (No Listen mode ongoing) |
94 | * 1 : Listen (Peripheral in Address Listen Mode) |
95 | * 1 : Listen (Peripheral in Address Listen Mode) |
95 | * b2 Intrinsic process state |
96 | * b2 Intrinsic process state |
96 | * 0 : Ready |
97 | * 0 : Ready |
97 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
98 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
98 | * b1 Rx state |
99 | * b1 Rx state |
99 | * 0 : Ready (no Rx operation ongoing) |
100 | * 0 : Ready (no Rx operation ongoing) |
100 | * 1 : Busy (Rx operation ongoing) |
101 | * 1 : Busy (Rx operation ongoing) |
101 | * b0 Tx state |
102 | * b0 Tx state |
102 | * 0 : Ready (no Tx operation ongoing) |
103 | * 0 : Ready (no Tx operation ongoing) |
103 | * 1 : Busy (Tx operation ongoing) |
104 | * 1 : Busy (Tx operation ongoing) |
104 | * @{ |
105 | * @{ |
105 | */ |
106 | */ |
106 | typedef enum |
107 | typedef enum |
107 | { |
108 | { |
108 | HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
109 | HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
109 | HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
110 | HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
110 | HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
111 | HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
111 | HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
112 | HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
112 | HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
113 | HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
113 | HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
114 | HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
114 | HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission |
115 | HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission |
115 | process is ongoing */ |
116 | process is ongoing */ |
116 | HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception |
117 | HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception |
117 | process is ongoing */ |
118 | process is ongoing */ |
118 | HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
119 | HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
119 | HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
120 | HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
120 | HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
121 | HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
121 | |
122 | 122 | } HAL_I2C_StateTypeDef; |
|
123 | } HAL_I2C_StateTypeDef; |
123 | |
124 | 124 | /** |
|
125 | /** |
125 | * @} |
126 | * @} |
126 | */ |
127 | */ |
127 | |
128 | 128 | /** @defgroup HAL_mode_structure_definition HAL mode structure definition |
|
129 | /** @defgroup HAL_mode_structure_definition HAL mode structure definition |
129 | * @brief HAL Mode structure definition |
130 | * @brief HAL Mode structure definition |
130 | * @note HAL I2C Mode value coding follow below described bitmap :\n |
131 | * @note HAL I2C Mode value coding follow below described bitmap :\n |
131 | * b7 (not used)\n |
132 | * b7 (not used)\n |
132 | * x : Should be set to 0\n |
133 | * x : Should be set to 0\n |
133 | * b6\n |
134 | * b6\n |
134 | * 0 : None\n |
135 | * 0 : None\n |
135 | * 1 : Memory (HAL I2C communication is in Memory Mode)\n |
136 | * 1 : Memory (HAL I2C communication is in Memory Mode)\n |
136 | * b5\n |
137 | * b5\n |
137 | * 0 : None\n |
138 | * 0 : None\n |
138 | * 1 : Slave (HAL I2C communication is in Slave Mode)\n |
139 | * 1 : Slave (HAL I2C communication is in Slave Mode)\n |
139 | * b4\n |
140 | * b4\n |
140 | * 0 : None\n |
141 | * 0 : None\n |
141 | * 1 : Master (HAL I2C communication is in Master Mode)\n |
142 | * 1 : Master (HAL I2C communication is in Master Mode)\n |
142 | * b3-b2-b1-b0 (not used)\n |
143 | * b3-b2-b1-b0 (not used)\n |
143 | * xxxx : Should be set to 0000 |
144 | * xxxx : Should be set to 0000 |
144 | * @{ |
145 | * @{ |
145 | */ |
146 | */ |
146 | typedef enum |
147 | typedef enum |
147 | { |
148 | { |
148 | HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
149 | HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
149 | HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
150 | HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
150 | HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
151 | HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
151 | HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
152 | HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
152 | |
153 | 153 | } HAL_I2C_ModeTypeDef; |
|
154 | } HAL_I2C_ModeTypeDef; |
154 | |
155 | 155 | /** |
|
156 | /** |
156 | * @} |
157 | * @} |
157 | */ |
158 | */ |
158 | |
159 | 159 | /** @defgroup I2C_Error_Code_definition I2C Error Code definition |
|
160 | /** @defgroup I2C_Error_Code_definition I2C Error Code definition |
160 | * @brief I2C Error Code definition |
161 | * @brief I2C Error Code definition |
161 | * @{ |
162 | * @{ |
162 | */ |
163 | */ |
163 | #define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */ |
164 | #define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */ |
164 | #define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */ |
165 | #define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */ |
165 | #define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */ |
166 | #define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */ |
166 | #define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */ |
167 | #define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */ |
167 | #define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */ |
168 | #define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */ |
168 | #define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
169 | #define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
169 | #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */ |
170 | #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */ |
170 | #define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */ |
171 | #define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */ |
171 | #define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */ |
172 | #define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */ |
172 | #define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */ |
173 | #define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */ |
173 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
174 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
174 | #define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */ |
175 | #define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */ |
175 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
176 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
176 | /** |
177 | /** |
177 | * @} |
178 | * @} |
178 | */ |
179 | */ |
179 | |
180 | 180 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
|
181 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
181 | * @brief I2C handle Structure definition |
182 | * @brief I2C handle Structure definition |
182 | * @{ |
183 | * @{ |
183 | */ |
184 | */ |
184 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
185 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
185 | typedef struct __I2C_HandleTypeDef |
186 | typedef struct __I2C_HandleTypeDef |
186 | #else |
187 | #else |
187 | typedef struct |
188 | typedef struct |
188 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
189 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
189 | { |
190 | { |
190 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
191 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
191 | |
192 | 192 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
|
193 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
193 | |
194 | 194 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
|
195 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
195 | |
196 | 196 | uint16_t XferSize; /*!< I2C transfer size */ |
|
197 | uint16_t XferSize; /*!< I2C transfer size */ |
197 | |
198 | 198 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
|
199 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
199 | |
200 | 200 | __IO uint32_t XferOptions; /*!< I2C transfer options */ |
|
201 | __IO uint32_t XferOptions; /*!< I2C transfer options */ |
201 | |
202 | 202 | __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode |
|
203 | __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode |
203 | context for internal usage */ |
204 | context for internal usage */ |
204 | |
205 | 205 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
|
206 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
206 | |
207 | 207 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
|
208 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
208 | |
209 | 209 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
|
210 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
210 | |
211 | 211 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
|
212 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
212 | |
213 | 213 | __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
|
214 | __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
214 | |
215 | 215 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
|
216 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
216 | |
217 | 217 | __IO uint32_t Devaddress; /*!< I2C Target device address */ |
|
218 | __IO uint32_t Devaddress; /*!< I2C Target device address */ |
218 | |
219 | 219 | __IO uint32_t Memaddress; /*!< I2C Target memory address */ |
|
220 | __IO uint32_t Memaddress; /*!< I2C Target memory address */ |
220 | |
221 | 221 | __IO uint32_t MemaddSize; /*!< I2C Target memory address size */ |
|
222 | __IO uint32_t MemaddSize; /*!< I2C Target memory address size */ |
222 | |
223 | 223 | __IO uint32_t EventCount; /*!< I2C Event counter */ |
|
224 | __IO uint32_t EventCount; /*!< I2C Event counter */ |
224 | |
225 | 225 | ||
226 | 226 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
|
227 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
227 | void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ |
228 | void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ |
228 | void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ |
229 | void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ |
229 | void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ |
230 | void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ |
230 | void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ |
231 | void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ |
231 | void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ |
232 | void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ |
232 | void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ |
233 | void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ |
233 | void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ |
234 | void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ |
234 | void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ |
235 | void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ |
235 | void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ |
236 | void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ |
236 | |
237 | 237 | void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ |
|
238 | void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ |
238 | |
239 | 239 | void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ |
|
240 | void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ |
240 | void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ |
241 | void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ |
241 | |
242 | 242 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
|
243 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
243 | } I2C_HandleTypeDef; |
244 | } I2C_HandleTypeDef; |
244 | |
245 | 245 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
|
246 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
246 | /** |
247 | /** |
247 | * @brief HAL I2C Callback ID enumeration definition |
248 | * @brief HAL I2C Callback ID enumeration definition |
248 | */ |
249 | */ |
249 | typedef enum |
250 | typedef enum |
250 | { |
251 | { |
251 | HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ |
252 | HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ |
252 | HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ |
253 | HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ |
253 | HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ |
254 | HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ |
254 | HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ |
255 | HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ |
255 | HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ |
256 | HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ |
256 | HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ |
257 | HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ |
257 | HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ |
258 | HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ |
258 | HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ |
259 | HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ |
259 | HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ |
260 | HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ |
260 | |
261 | 261 | HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ |
|
262 | HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ |
262 | HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ |
263 | HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ |
263 | |
264 | 264 | } HAL_I2C_CallbackIDTypeDef; |
|
265 | } HAL_I2C_CallbackIDTypeDef; |
265 | |
266 | 266 | /** |
|
267 | /** |
267 | * @brief HAL I2C Callback pointer definition |
268 | * @brief HAL I2C Callback pointer definition |
268 | */ |
269 | */ |
269 | typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ |
270 | typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ |
270 | typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ |
271 | typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ |
271 | |
272 | 272 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
|
273 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
273 | /** |
274 | /** |
274 | * @} |
275 | * @} |
275 | */ |
276 | */ |
276 | |
277 | 277 | /** |
|
278 | /** |
278 | * @} |
279 | * @} |
279 | */ |
280 | */ |
280 | /* Exported constants --------------------------------------------------------*/ |
281 | /* Exported constants --------------------------------------------------------*/ |
281 | |
282 | 282 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
|
283 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
283 | * @{ |
284 | * @{ |
284 | */ |
285 | */ |
285 | |
286 | 286 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode |
|
287 | /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode |
287 | * @{ |
288 | * @{ |
288 | */ |
289 | */ |
289 | #define I2C_DUTYCYCLE_2 0x00000000U |
290 | #define I2C_DUTYCYCLE_2 0x00000000U |
290 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
291 | #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY |
291 | /** |
292 | /** |
292 | * @} |
293 | * @} |
293 | */ |
294 | */ |
294 | |
295 | 295 | /** @defgroup I2C_addressing_mode I2C addressing mode |
|
296 | /** @defgroup I2C_addressing_mode I2C addressing mode |
296 | * @{ |
297 | * @{ |
297 | */ |
298 | */ |
298 | #define I2C_ADDRESSINGMODE_7BIT 0x00004000U |
299 | #define I2C_ADDRESSINGMODE_7BIT 0x00004000U |
299 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U) |
300 | #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U) |
300 | /** |
301 | /** |
301 | * @} |
302 | * @} |
302 | */ |
303 | */ |
303 | |
304 | 304 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
|
305 | /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode |
305 | * @{ |
306 | * @{ |
306 | */ |
307 | */ |
307 | #define I2C_DUALADDRESS_DISABLE 0x00000000U |
308 | #define I2C_DUALADDRESS_DISABLE 0x00000000U |
308 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
309 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL |
309 | /** |
310 | /** |
310 | * @} |
311 | * @} |
311 | */ |
312 | */ |
312 | |
313 | 313 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
|
314 | /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode |
314 | * @{ |
315 | * @{ |
315 | */ |
316 | */ |
316 | #define I2C_GENERALCALL_DISABLE 0x00000000U |
317 | #define I2C_GENERALCALL_DISABLE 0x00000000U |
317 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
318 | #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC |
318 | /** |
319 | /** |
319 | * @} |
320 | * @} |
320 | */ |
321 | */ |
321 | |
322 | 322 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
|
323 | /** @defgroup I2C_nostretch_mode I2C nostretch mode |
323 | * @{ |
324 | * @{ |
324 | */ |
325 | */ |
325 | #define I2C_NOSTRETCH_DISABLE 0x00000000U |
326 | #define I2C_NOSTRETCH_DISABLE 0x00000000U |
326 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
327 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
327 | /** |
328 | /** |
328 | * @} |
329 | * @} |
329 | */ |
330 | */ |
330 | |
331 | 331 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
|
332 | /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size |
332 | * @{ |
333 | * @{ |
333 | */ |
334 | */ |
334 | #define I2C_MEMADD_SIZE_8BIT 0x00000001U |
335 | #define I2C_MEMADD_SIZE_8BIT 0x00000001U |
335 | #define I2C_MEMADD_SIZE_16BIT 0x00000010U |
336 | #define I2C_MEMADD_SIZE_16BIT 0x00000010U |
336 | /** |
337 | /** |
337 | * @} |
338 | * @} |
338 | */ |
339 | */ |
339 | |
340 | 340 | /** @defgroup I2C_XferDirection_definition I2C XferDirection definition |
|
341 | /** @defgroup I2C_XferDirection_definition I2C XferDirection definition |
341 | * @{ |
342 | * @{ |
342 | */ |
343 | */ |
343 | #define I2C_DIRECTION_RECEIVE 0x00000000U |
344 | #define I2C_DIRECTION_RECEIVE 0x00000000U |
344 | #define I2C_DIRECTION_TRANSMIT 0x00000001U |
345 | #define I2C_DIRECTION_TRANSMIT 0x00000001U |
345 | /** |
346 | /** |
346 | * @} |
347 | * @} |
347 | */ |
348 | */ |
348 | |
349 | 349 | /** @defgroup I2C_XferOptions_definition I2C XferOptions definition |
|
350 | /** @defgroup I2C_XferOptions_definition I2C XferOptions definition |
350 | * @{ |
351 | * @{ |
351 | */ |
352 | */ |
352 | #define I2C_FIRST_FRAME 0x00000001U |
353 | #define I2C_FIRST_FRAME 0x00000001U |
353 | #define I2C_FIRST_AND_NEXT_FRAME 0x00000002U |
354 | #define I2C_FIRST_AND_NEXT_FRAME 0x00000002U |
354 | #define I2C_NEXT_FRAME 0x00000004U |
355 | #define I2C_NEXT_FRAME 0x00000004U |
355 | #define I2C_FIRST_AND_LAST_FRAME 0x00000008U |
356 | #define I2C_FIRST_AND_LAST_FRAME 0x00000008U |
356 | #define I2C_LAST_FRAME_NO_STOP 0x00000010U |
357 | #define I2C_LAST_FRAME_NO_STOP 0x00000010U |
357 | #define I2C_LAST_FRAME 0x00000020U |
358 | #define I2C_LAST_FRAME 0x00000020U |
358 | |
359 | 359 | /* List of XferOptions in usage of : |
|
360 | /* List of XferOptions in usage of : |
360 | * 1- Restart condition in all use cases (direction change or not) |
361 | * 1- Restart condition in all use cases (direction change or not) |
361 | */ |
362 | */ |
362 | #define I2C_OTHER_FRAME (0x00AA0000U) |
363 | #define I2C_OTHER_FRAME (0x00AA0000U) |
363 | #define I2C_OTHER_AND_LAST_FRAME (0xAA000000U) |
364 | #define I2C_OTHER_AND_LAST_FRAME (0xAA000000U) |
364 | /** |
365 | /** |
365 | * @} |
366 | * @} |
366 | */ |
367 | */ |
367 | |
368 | 368 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
|
369 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
369 | * @brief I2C Interrupt definition |
370 | * @brief I2C Interrupt definition |
370 | * Elements values convention: 0xXXXXXXXX |
371 | * Elements values convention: 0xXXXXXXXX |
371 | * - XXXXXXXX : Interrupt control mask |
372 | * - XXXXXXXX : Interrupt control mask |
372 | * @{ |
373 | * @{ |
373 | */ |
374 | */ |
374 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
375 | #define I2C_IT_BUF I2C_CR2_ITBUFEN |
375 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
376 | #define I2C_IT_EVT I2C_CR2_ITEVTEN |
376 | #define I2C_IT_ERR I2C_CR2_ITERREN |
377 | #define I2C_IT_ERR I2C_CR2_ITERREN |
377 | /** |
378 | /** |
378 | * @} |
379 | * @} |
379 | */ |
380 | */ |
380 | |
381 | 381 | /** @defgroup I2C_Flag_definition I2C Flag definition |
|
382 | /** @defgroup I2C_Flag_definition I2C Flag definition |
382 | * @{ |
383 | * @{ |
383 | */ |
384 | */ |
384 | |
385 | 385 | #define I2C_FLAG_OVR 0x00010800U |
|
386 | #define I2C_FLAG_OVR 0x00010800U |
386 | #define I2C_FLAG_AF 0x00010400U |
387 | #define I2C_FLAG_AF 0x00010400U |
387 | #define I2C_FLAG_ARLO 0x00010200U |
388 | #define I2C_FLAG_ARLO 0x00010200U |
388 | #define I2C_FLAG_BERR 0x00010100U |
389 | #define I2C_FLAG_BERR 0x00010100U |
389 | #define I2C_FLAG_TXE 0x00010080U |
390 | #define I2C_FLAG_TXE 0x00010080U |
390 | #define I2C_FLAG_RXNE 0x00010040U |
391 | #define I2C_FLAG_RXNE 0x00010040U |
391 | #define I2C_FLAG_STOPF 0x00010010U |
392 | #define I2C_FLAG_STOPF 0x00010010U |
392 | #define I2C_FLAG_ADD10 0x00010008U |
393 | #define I2C_FLAG_ADD10 0x00010008U |
393 | #define I2C_FLAG_BTF 0x00010004U |
394 | #define I2C_FLAG_BTF 0x00010004U |
394 | #define I2C_FLAG_ADDR 0x00010002U |
395 | #define I2C_FLAG_ADDR 0x00010002U |
395 | #define I2C_FLAG_SB 0x00010001U |
396 | #define I2C_FLAG_SB 0x00010001U |
396 | #define I2C_FLAG_DUALF 0x00100080U |
397 | #define I2C_FLAG_DUALF 0x00100080U |
397 | #define I2C_FLAG_GENCALL 0x00100010U |
398 | #define I2C_FLAG_GENCALL 0x00100010U |
398 | #define I2C_FLAG_TRA 0x00100004U |
399 | #define I2C_FLAG_TRA 0x00100004U |
399 | #define I2C_FLAG_BUSY 0x00100002U |
400 | #define I2C_FLAG_BUSY 0x00100002U |
400 | #define I2C_FLAG_MSL 0x00100001U |
401 | #define I2C_FLAG_MSL 0x00100001U |
401 | /** |
402 | /** |
402 | * @} |
403 | * @} |
403 | */ |
404 | */ |
404 | |
405 | 405 | /** |
|
406 | /** |
406 | * @} |
407 | * @} |
407 | */ |
408 | */ |
408 | |
409 | 409 | /* Exported macros -----------------------------------------------------------*/ |
|
410 | /* Exported macros -----------------------------------------------------------*/ |
410 | |
411 | 411 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
|
412 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
412 | * @{ |
413 | * @{ |
413 | */ |
414 | */ |
414 | |
415 | 415 | /** @brief Reset I2C handle state. |
|
416 | /** @brief Reset I2C handle state. |
416 | * @param __HANDLE__ specifies the I2C Handle. |
417 | * @param __HANDLE__ specifies the I2C Handle. |
417 | * @retval None |
418 | * @retval None |
418 | */ |
419 | */ |
419 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
420 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
420 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
421 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
421 | (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ |
422 | (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ |
422 | (__HANDLE__)->MspInitCallback = NULL; \ |
423 | (__HANDLE__)->MspInitCallback = NULL; \ |
423 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
424 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
424 | } while(0) |
425 | } while(0) |
425 | #else |
426 | #else |
426 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
427 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
427 | #endif |
428 | #endif |
428 | |
429 | 429 | /** @brief Enable or disable the specified I2C interrupts. |
|
430 | /** @brief Enable or disable the specified I2C interrupts. |
430 | * @param __HANDLE__ specifies the I2C Handle. |
431 | * @param __HANDLE__ specifies the I2C Handle. |
431 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
432 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
432 | * This parameter can be one of the following values: |
433 | * This parameter can be one of the following values: |
433 | * @arg I2C_IT_BUF: Buffer interrupt enable |
434 | * @arg I2C_IT_BUF: Buffer interrupt enable |
434 | * @arg I2C_IT_EVT: Event interrupt enable |
435 | * @arg I2C_IT_EVT: Event interrupt enable |
435 | * @arg I2C_IT_ERR: Error interrupt enable |
436 | * @arg I2C_IT_ERR: Error interrupt enable |
436 | * @retval None |
437 | * @retval None |
437 | */ |
438 | */ |
438 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)) |
439 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)) |
439 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
440 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__)) |
440 | |
441 | 441 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
|
442 | /** @brief Checks if the specified I2C interrupt source is enabled or disabled. |
442 | * @param __HANDLE__ specifies the I2C Handle. |
443 | * @param __HANDLE__ specifies the I2C Handle. |
443 | * @param __INTERRUPT__ specifies the I2C interrupt source to check. |
444 | * @param __INTERRUPT__ specifies the I2C interrupt source to check. |
444 | * This parameter can be one of the following values: |
445 | * This parameter can be one of the following values: |
445 | * @arg I2C_IT_BUF: Buffer interrupt enable |
446 | * @arg I2C_IT_BUF: Buffer interrupt enable |
446 | * @arg I2C_IT_EVT: Event interrupt enable |
447 | * @arg I2C_IT_EVT: Event interrupt enable |
447 | * @arg I2C_IT_ERR: Error interrupt enable |
448 | * @arg I2C_IT_ERR: Error interrupt enable |
448 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
449 | * @retval The new state of __INTERRUPT__ (TRUE or FALSE). |
449 | */ |
450 | */ |
450 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
451 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
451 | |
452 | 452 | /** @brief Checks whether the specified I2C flag is set or not. |
|
453 | /** @brief Checks whether the specified I2C flag is set or not. |
453 | * @param __HANDLE__ specifies the I2C Handle. |
454 | * @param __HANDLE__ specifies the I2C Handle. |
454 | * @param __FLAG__ specifies the flag to check. |
455 | * @param __FLAG__ specifies the flag to check. |
455 | * This parameter can be one of the following values: |
456 | * This parameter can be one of the following values: |
456 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
457 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag |
457 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
458 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
458 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
459 | * @arg I2C_FLAG_ARLO: Arbitration lost flag |
459 | * @arg I2C_FLAG_BERR: Bus error flag |
460 | * @arg I2C_FLAG_BERR: Bus error flag |
460 | * @arg I2C_FLAG_TXE: Data register empty flag |
461 | * @arg I2C_FLAG_TXE: Data register empty flag |
461 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
462 | * @arg I2C_FLAG_RXNE: Data register not empty flag |
462 | * @arg I2C_FLAG_STOPF: Stop detection flag |
463 | * @arg I2C_FLAG_STOPF: Stop detection flag |
463 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
464 | * @arg I2C_FLAG_ADD10: 10-bit header sent flag |
464 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
465 | * @arg I2C_FLAG_BTF: Byte transfer finished flag |
465 | * @arg I2C_FLAG_ADDR: Address sent flag |
466 | * @arg I2C_FLAG_ADDR: Address sent flag |
466 | * Address matched flag |
467 | * Address matched flag |
467 | * @arg I2C_FLAG_SB: Start bit flag |
468 | * @arg I2C_FLAG_SB: Start bit flag |
468 | * @arg I2C_FLAG_DUALF: Dual flag |
469 | * @arg I2C_FLAG_DUALF: Dual flag |
469 | * @arg I2C_FLAG_GENCALL: General call header flag |
470 | * @arg I2C_FLAG_GENCALL: General call header flag |
470 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
471 | * @arg I2C_FLAG_TRA: Transmitter/Receiver flag |
471 | * @arg I2C_FLAG_BUSY: Bus busy flag |
472 | * @arg I2C_FLAG_BUSY: Bus busy flag |
472 | * @arg I2C_FLAG_MSL: Master/Slave flag |
473 | * @arg I2C_FLAG_MSL: Master/Slave flag |
473 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
474 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
474 | */ |
475 | */ |
475 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \ |
476 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \ |
476 | (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \ |
477 | (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \ |
477 | (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)) |
478 | (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)) |
478 | |
479 | 479 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
|
480 | /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit. |
480 | * @param __HANDLE__ specifies the I2C Handle. |
481 | * @param __HANDLE__ specifies the I2C Handle. |
481 | * @param __FLAG__ specifies the flag to clear. |
482 | * @param __FLAG__ specifies the flag to clear. |
482 | * This parameter can be any combination of the following values: |
483 | * This parameter can be any combination of the following values: |
483 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
484 | * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) |
484 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
485 | * @arg I2C_FLAG_AF: Acknowledge failure flag |
485 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
486 | * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) |
486 | * @arg I2C_FLAG_BERR: Bus error flag |
487 | * @arg I2C_FLAG_BERR: Bus error flag |
487 | * @retval None |
488 | * @retval None |
488 | */ |
489 | */ |
489 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
490 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK)) |
490 | |
491 | 491 | /** @brief Clears the I2C ADDR pending flag. |
|
492 | /** @brief Clears the I2C ADDR pending flag. |
492 | * @param __HANDLE__ specifies the I2C Handle. |
493 | * @param __HANDLE__ specifies the I2C Handle. |
493 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
494 | * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral. |
494 | * @retval None |
495 | * @retval None |
495 | */ |
496 | */ |
496 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
497 | #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \ |
497 | do{ \ |
498 | do{ \ |
498 | __IO uint32_t tmpreg = 0x00U; \ |
499 | __IO uint32_t tmpreg = 0x00U; \ |
499 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
500 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
500 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
501 | tmpreg = (__HANDLE__)->Instance->SR2; \ |
501 | UNUSED(tmpreg); \ |
502 | UNUSED(tmpreg); \ |
502 | } while(0) |
503 | } while(0) |
503 | |
504 | 504 | /** @brief Clears the I2C STOPF pending flag. |
|
505 | /** @brief Clears the I2C STOPF pending flag. |
505 | * @param __HANDLE__ specifies the I2C Handle. |
506 | * @param __HANDLE__ specifies the I2C Handle. |
506 | * @retval None |
507 | * @retval None |
507 | */ |
508 | */ |
508 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
509 | #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \ |
509 | do{ \ |
510 | do{ \ |
510 | __IO uint32_t tmpreg = 0x00U; \ |
511 | __IO uint32_t tmpreg = 0x00U; \ |
511 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
512 | tmpreg = (__HANDLE__)->Instance->SR1; \ |
512 | SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \ |
513 | SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \ |
513 | UNUSED(tmpreg); \ |
514 | UNUSED(tmpreg); \ |
514 | } while(0) |
515 | } while(0) |
515 | |
516 | 516 | /** @brief Enable the specified I2C peripheral. |
|
517 | /** @brief Enable the specified I2C peripheral. |
517 | * @param __HANDLE__ specifies the I2C Handle. |
518 | * @param __HANDLE__ specifies the I2C Handle. |
518 | * @retval None |
519 | * @retval None |
519 | */ |
520 | */ |
520 | #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) |
521 | #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) |
521 | |
522 | 522 | /** @brief Disable the specified I2C peripheral. |
|
523 | /** @brief Disable the specified I2C peripheral. |
523 | * @param __HANDLE__ specifies the I2C Handle. |
524 | * @param __HANDLE__ specifies the I2C Handle. |
524 | * @retval None |
525 | * @retval None |
525 | */ |
526 | */ |
526 | #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) |
527 | #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE) |
527 | |
528 | 528 | /** |
|
529 | /** |
529 | * @} |
530 | * @} |
530 | */ |
531 | */ |
531 | |
532 | 532 | /* Exported functions --------------------------------------------------------*/ |
|
533 | /* Exported functions --------------------------------------------------------*/ |
533 | /** @addtogroup I2C_Exported_Functions |
534 | /** @addtogroup I2C_Exported_Functions |
534 | * @{ |
535 | * @{ |
535 | */ |
536 | */ |
536 | |
537 | 537 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
|
538 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
538 | * @{ |
539 | * @{ |
539 | */ |
540 | */ |
540 | /* Initialization and de-initialization functions******************************/ |
541 | /* Initialization and de-initialization functions******************************/ |
541 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
542 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
542 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); |
543 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); |
543 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
544 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
544 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
545 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
545 | |
546 | 546 | /* Callbacks Register/UnRegister functions ***********************************/ |
|
547 | /* Callbacks Register/UnRegister functions ***********************************/ |
547 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
548 | #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) |
548 | HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback); |
549 | HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback); |
549 | HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); |
550 | HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); |
550 | |
551 | 551 | HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); |
|
552 | HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); |
552 | HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); |
553 | HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); |
553 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
554 | #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ |
554 | /** |
555 | /** |
555 | * @} |
556 | * @} |
556 | */ |
557 | */ |
557 | |
558 | 558 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
|
559 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
559 | * @{ |
560 | * @{ |
560 | */ |
561 | */ |
561 | /* IO operation functions ****************************************************/ |
562 | /* IO operation functions ****************************************************/ |
562 | /******* Blocking mode: Polling */ |
563 | /******* Blocking mode: Polling */ |
563 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
564 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
564 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
565 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
565 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
566 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
566 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
567 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
567 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
568 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
568 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
569 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
569 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
570 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
570 | |
571 | 571 | /******* Non-Blocking mode: Interrupt */ |
|
572 | /******* Non-Blocking mode: Interrupt */ |
572 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
573 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
573 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
574 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
574 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
575 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
575 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
576 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
576 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
577 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
577 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
578 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
578 | |
579 | 579 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|
580 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
580 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
581 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
581 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
582 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
582 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
583 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
583 | HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
584 | HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
584 | HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
585 | HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
585 | HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
586 | HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
586 | |
587 | 587 | /******* Non-Blocking mode: DMA */ |
|
588 | /******* Non-Blocking mode: DMA */ |
588 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
589 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
589 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
590 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
590 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
591 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
591 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
592 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
592 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
593 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
593 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
594 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
594 | |
595 | 595 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
|
596 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
596 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
597 | HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
597 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
598 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
598 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
599 | HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
599 | /** |
600 | /** |
600 | * @} |
601 | * @} |
601 | */ |
602 | */ |
602 | |
603 | 603 | /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
|
604 | /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
604 | * @{ |
605 | * @{ |
605 | */ |
606 | */ |
606 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
607 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
607 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
608 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
608 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
609 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
609 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
610 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
610 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
611 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
611 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
612 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
612 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
613 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
613 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
614 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
614 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
615 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
615 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
616 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
616 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
617 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
617 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
618 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
618 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
619 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
619 | /** |
620 | /** |
620 | * @} |
621 | * @} |
621 | */ |
622 | */ |
622 | |
623 | 623 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions |
|
624 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions |
624 | * @{ |
625 | * @{ |
625 | */ |
626 | */ |
626 | /* Peripheral State, Mode and Error functions *********************************/ |
627 | /* Peripheral State, Mode and Error functions *********************************/ |
627 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
628 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
628 | HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
629 | HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
629 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
630 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
630 | |
631 | 631 | /** |
|
632 | /** |
632 | * @} |
633 | * @} |
633 | */ |
634 | */ |
634 | |
635 | 635 | /** |
|
636 | /** |
636 | * @} |
637 | * @} |
637 | */ |
638 | */ |
638 | /* Private types -------------------------------------------------------------*/ |
639 | /* Private types -------------------------------------------------------------*/ |
639 | /* Private variables ---------------------------------------------------------*/ |
640 | /* Private variables ---------------------------------------------------------*/ |
640 | /* Private constants ---------------------------------------------------------*/ |
641 | /* Private constants ---------------------------------------------------------*/ |
641 | /** @defgroup I2C_Private_Constants I2C Private Constants |
642 | /** @defgroup I2C_Private_Constants I2C Private Constants |
642 | * @{ |
643 | * @{ |
643 | */ |
644 | */ |
644 | #define I2C_FLAG_MASK 0x0000FFFFU |
645 | #define I2C_FLAG_MASK 0x0000FFFFU |
645 | #define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */ |
646 | #define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */ |
646 | #define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */ |
647 | #define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */ |
647 | /** |
648 | /** |
648 | * @} |
649 | * @} |
649 | */ |
650 | */ |
650 | |
651 | 651 | /* Private macros ------------------------------------------------------------*/ |
|
652 | /* Private macros ------------------------------------------------------------*/ |
652 | /** @defgroup I2C_Private_Macros I2C Private Macros |
653 | /** @defgroup I2C_Private_Macros I2C Private Macros |
653 | * @{ |
654 | * @{ |
654 | */ |
655 | */ |
655 | |
656 | 656 | #define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST)) |
|
657 | #define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST)) |
657 | #define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR) |
658 | #define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR) |
658 | #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) |
659 | #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U) |
659 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) |
660 | #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U)) |
660 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) |
661 | #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U)) |
661 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) |
662 | #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9)) |
662 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
663 | #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \ |
663 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \ |
664 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \ |
664 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
665 | ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS)) |
665 | |
666 | 666 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0))) |
|
667 | #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0))) |
667 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
668 | #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0)) |
668 | |
669 | 669 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
|
670 | #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
670 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0))) |
671 | #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0))) |
671 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1)))) |
672 | #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1)))) |
672 | |
673 | 673 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8))) |
|
674 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8))) |
674 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
675 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF))) |
675 | |
676 | 676 | /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters |
|
677 | /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters |
677 | * @{ |
678 | * @{ |
678 | */ |
679 | */ |
679 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
680 | #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \ |
680 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
681 | ((CYCLE) == I2C_DUTYCYCLE_16_9)) |
681 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
682 | #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \ |
682 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
683 | ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT)) |
683 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
684 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
684 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
685 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
685 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
686 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
686 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
687 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
687 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
688 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
688 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
689 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
689 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
690 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
690 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
691 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
691 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U)) |
692 | #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U)) |
692 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U) |
693 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U) |
693 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U) |
694 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U) |
694 | #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
695 | #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
695 | ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ |
696 | ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ |
696 | ((REQUEST) == I2C_NEXT_FRAME) || \ |
697 | ((REQUEST) == I2C_NEXT_FRAME) || \ |
697 | ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
698 | ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
698 | ((REQUEST) == I2C_LAST_FRAME) || \ |
699 | ((REQUEST) == I2C_LAST_FRAME) || \ |
699 | ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ |
700 | ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ |
700 | IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) |
701 | IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) |
701 | |
702 | 702 | #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ |
|
703 | #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ |
703 | ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) |
704 | ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) |
704 | |
705 | 705 | #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) |
|
706 | #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) |
706 | #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) |
707 | #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) |
707 | /** |
708 | /** |
708 | * @} |
709 | * @} |
709 | */ |
710 | */ |
710 | |
711 | 711 | /** |
|
712 | /** |
712 | * @} |
713 | * @} |
713 | */ |
714 | */ |
714 | |
715 | 715 | /* Private functions ---------------------------------------------------------*/ |
|
716 | /* Private functions ---------------------------------------------------------*/ |
716 | /** @defgroup I2C_Private_Functions I2C Private Functions |
717 | /** @defgroup I2C_Private_Functions I2C Private Functions |
717 | * @{ |
718 | * @{ |
718 | */ |
719 | */ |
719 | |
720 | 720 | /** |
|
721 | /** |
721 | * @} |
722 | * @} |
722 | */ |
723 | */ |
723 | |
724 | 724 | /** |
|
725 | /** |
725 | * @} |
726 | * @} |
726 | */ |
727 | */ |
727 | |
728 | 728 | /** |
|
729 | /** |
729 | * @} |
730 | * @} |
730 | */ |
731 | */ |
731 | |
732 | 732 | #ifdef __cplusplus |
|
733 | #ifdef __cplusplus |
733 | } |
734 | } |
734 | #endif |
735 | #endif |
735 | |
736 | 736 | ||
737 | 737 | #endif /* __STM32F1xx_HAL_I2C_H */ |
|
738 | #endif /* __STM32F1xx_HAL_I2C_H */ |
738 | |
739 | - | ||
740 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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