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4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief Header file of GPIO HAL Extension module. |
5 | * @brief Header file of GPIO HAL Extension module. |
6 | ****************************************************************************** |
6 | ****************************************************************************** |
7 | * @attention |
7 | * @attention |
8 | * |
8 | * |
9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
- | 10 | * All rights reserved.</center></h2> |
|
10 | * |
11 | * |
11 | * Redistribution and use in source and binary forms, with or without modification, |
12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * are permitted provided that the following conditions are met: |
13 | * the "License"; You may not use this file except in compliance with the |
13 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
14 | * this list of conditions and the following disclaimer. |
- | |
15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
16 | * this list of conditions and the following disclaimer in the documentation |
- | |
17 | * and/or other materials provided with the distribution. |
14 | * License. You may obtain a copy of the License at: |
18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
19 | * may be used to endorse or promote products derived from this software |
15 | * opensource.org/licenses/BSD-3-Clause |
20 | * without specific prior written permission. |
- | |
21 | * |
- | |
22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
32 | * |
16 | * |
33 | ****************************************************************************** |
17 | ****************************************************************************** |
34 | */ |
18 | */ |
35 | 19 | ||
36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
37 | #ifndef __STM32F1xx_HAL_GPIO_EX_H |
21 | #ifndef STM32F1xx_HAL_GPIO_EX_H |
38 | #define __STM32F1xx_HAL_GPIO_EX_H |
22 | #define STM32F1xx_HAL_GPIO_EX_H |
39 | 23 | ||
40 | #ifdef __cplusplus |
24 | #ifdef __cplusplus |
41 | extern "C" { |
25 | extern "C" { |
42 | #endif |
26 | #endif |
43 | 27 | ||
Line 823... | Line 807... | ||
823 | 807 | ||
824 | /** @defgroup GPIOEx_Private_Macros GPIOEx Private Macros |
808 | /** @defgroup GPIOEx_Private_Macros GPIOEx Private Macros |
825 | * @{ |
809 | * @{ |
826 | */ |
810 | */ |
827 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) |
811 | #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) |
828 | #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ |
812 | #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\ |
829 | ((__GPIOx__) == (GPIOB))? 1U :\ |
813 | ((__GPIOx__) == (GPIOB))? 1uL :\ |
830 | ((__GPIOx__) == (GPIOC))? 2U :3U) |
814 | ((__GPIOx__) == (GPIOC))? 2uL :3uL) |
831 | #elif defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F103xB) || defined(STM32F105xC) || defined(STM32F107xC) |
815 | #elif defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F103xB) || defined(STM32F105xC) || defined(STM32F107xC) |
832 | #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ |
816 | #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\ |
833 | ((__GPIOx__) == (GPIOB))? 1U :\ |
817 | ((__GPIOx__) == (GPIOB))? 1uL :\ |
834 | ((__GPIOx__) == (GPIOC))? 2U :\ |
818 | ((__GPIOx__) == (GPIOC))? 2uL :\ |
835 | ((__GPIOx__) == (GPIOD))? 3U :4U) |
819 | ((__GPIOx__) == (GPIOD))? 3uL :4uL) |
836 | #elif defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) |
820 | #elif defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) |
837 | #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\ |
821 | #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\ |
838 | ((__GPIOx__) == (GPIOB))? 1U :\ |
822 | ((__GPIOx__) == (GPIOB))? 1uL :\ |
839 | ((__GPIOx__) == (GPIOC))? 2U :\ |
823 | ((__GPIOx__) == (GPIOC))? 2uL :\ |
840 | ((__GPIOx__) == (GPIOD))? 3U :\ |
824 | ((__GPIOx__) == (GPIOD))? 3uL :\ |
841 | ((__GPIOx__) == (GPIOE))? 4U :\ |
825 | ((__GPIOx__) == (GPIOE))? 4uL :\ |
842 | ((__GPIOx__) == (GPIOF))? 5U :6U) |
826 | ((__GPIOx__) == (GPIOF))? 5uL :6uL) |
843 | #endif |
827 | #endif |
844 | 828 | ||
845 | #define AFIO_REMAP_ENABLE(REMAP_PIN) do{ uint32_t tmpreg = AFIO->MAPR; \ |
829 | #define AFIO_REMAP_ENABLE(REMAP_PIN) do{ uint32_t tmpreg = AFIO->MAPR; \ |
846 | tmpreg |= AFIO_MAPR_SWJ_CFG; \ |
830 | tmpreg |= AFIO_MAPR_SWJ_CFG; \ |
847 | tmpreg |= REMAP_PIN; \ |
831 | tmpreg |= REMAP_PIN; \ |
848 | AFIO->MAPR = tmpreg; \ |
832 | AFIO->MAPR = tmpreg; \ |
849 | }while(0U) |
833 | }while(0u) |
850 | 834 | ||
851 | #define AFIO_REMAP_DISABLE(REMAP_PIN) do{ uint32_t tmpreg = AFIO->MAPR; \ |
835 | #define AFIO_REMAP_DISABLE(REMAP_PIN) do{ uint32_t tmpreg = AFIO->MAPR; \ |
852 | tmpreg |= AFIO_MAPR_SWJ_CFG; \ |
836 | tmpreg |= AFIO_MAPR_SWJ_CFG; \ |
853 | tmpreg &= ~REMAP_PIN; \ |
837 | tmpreg &= ~REMAP_PIN; \ |
854 | AFIO->MAPR = tmpreg; \ |
838 | AFIO->MAPR = tmpreg; \ |
855 | }while(0U) |
839 | }while(0u) |
856 | 840 | ||
857 | #define AFIO_REMAP_PARTIAL(REMAP_PIN, REMAP_PIN_MASK) do{ uint32_t tmpreg = AFIO->MAPR; \ |
841 | #define AFIO_REMAP_PARTIAL(REMAP_PIN, REMAP_PIN_MASK) do{ uint32_t tmpreg = AFIO->MAPR; \ |
858 | tmpreg &= ~REMAP_PIN_MASK; \ |
842 | tmpreg &= ~REMAP_PIN_MASK; \ |
859 | tmpreg |= AFIO_MAPR_SWJ_CFG; \ |
843 | tmpreg |= AFIO_MAPR_SWJ_CFG; \ |
860 | tmpreg |= REMAP_PIN; \ |
844 | tmpreg |= REMAP_PIN; \ |
861 | AFIO->MAPR = tmpreg; \ |
845 | AFIO->MAPR = tmpreg; \ |
862 | }while(0U) |
846 | }while(0u) |
863 | 847 | ||
864 | #define AFIO_DBGAFR_CONFIG(DBGAFR_SWJCFG) do{ uint32_t tmpreg = AFIO->MAPR; \ |
848 | #define AFIO_DBGAFR_CONFIG(DBGAFR_SWJCFG) do{ uint32_t tmpreg = AFIO->MAPR; \ |
865 | tmpreg &= ~AFIO_MAPR_SWJ_CFG_Msk; \ |
849 | tmpreg &= ~AFIO_MAPR_SWJ_CFG_Msk; \ |
866 | tmpreg |= DBGAFR_SWJCFG; \ |
850 | tmpreg |= DBGAFR_SWJCFG; \ |
867 | AFIO->MAPR = tmpreg; \ |
851 | AFIO->MAPR = tmpreg; \ |
868 | }while(0U) |
852 | }while(0u) |
869 | 853 | ||
870 | /** |
854 | /** |
871 | * @} |
855 | * @} |
872 | */ |
856 | */ |
873 | 857 | ||
Line 903... | Line 887... | ||
903 | 887 | ||
904 | #ifdef __cplusplus |
888 | #ifdef __cplusplus |
905 | } |
889 | } |
906 | #endif |
890 | #endif |
907 | 891 | ||
908 | #endif /* __STM32F1xx_HAL_GPIO_EX_H */ |
892 | #endif /* STM32F1xx_HAL_GPIO_EX_H */ |
909 | 893 | ||
910 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
894 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |