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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32f1xx_hal_can.h |
3 | * @file stm32f1xx_hal_can.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief Header file of CAN HAL module. |
5 | * @brief Header file of CAN HAL module. |
| 6 | ****************************************************************************** |
6 | ****************************************************************************** |
| 7 | * @attention |
7 | * @attention |
| 8 | * |
8 | * |
| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
9 | * Copyright (c) 2016 STMicroelectronics. |
| 10 | * All rights reserved.</center></h2> |
10 | * All rights reserved. |
| 11 | * |
11 | * |
| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
12 | * This software is licensed under terms that can be found in the LICENSE file |
| 13 | * the "License"; You may not use this file except in compliance with the |
13 | * in the root directory of this software component. |
| 14 | * License. You may obtain a copy of the License at: |
14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 15 | * opensource.org/licenses/BSD-3-Clause |
15 | * |
| 16 | * |
16 | ****************************************************************************** |
| 17 | ****************************************************************************** |
17 | */ |
| 18 | */ |
18 | |
| 19 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
|
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
20 | #ifndef STM32F1xx_HAL_CAN_H |
| 21 | #ifndef STM32F1xx_HAL_CAN_H |
21 | #define STM32F1xx_HAL_CAN_H |
| 22 | #define STM32F1xx_HAL_CAN_H |
22 | |
| 23 | 23 | #ifdef __cplusplus |
|
| 24 | #ifdef __cplusplus |
24 | extern "C" { |
| 25 | extern "C" { |
25 | #endif |
| 26 | #endif |
26 | |
| 27 | 27 | /* Includes ------------------------------------------------------------------*/ |
|
| 28 | /* Includes ------------------------------------------------------------------*/ |
28 | #include "stm32f1xx_hal_def.h" |
| 29 | #include "stm32f1xx_hal_def.h" |
29 | |
| 30 | 30 | /** @addtogroup STM32F1xx_HAL_Driver |
|
| 31 | /** @addtogroup STM32F1xx_HAL_Driver |
31 | * @{ |
| 32 | * @{ |
32 | */ |
| 33 | */ |
33 | |
| 34 | 34 | #if defined (CAN1) |
|
| 35 | #if defined (CAN1) |
35 | /** @addtogroup CAN |
| 36 | /** @addtogroup CAN |
36 | * @{ |
| 37 | * @{ |
37 | */ |
| 38 | */ |
38 | |
| 39 | 39 | /* Exported types ------------------------------------------------------------*/ |
|
| 40 | /* Exported types ------------------------------------------------------------*/ |
40 | /** @defgroup CAN_Exported_Types CAN Exported Types |
| 41 | /** @defgroup CAN_Exported_Types CAN Exported Types |
41 | * @{ |
| 42 | * @{ |
42 | */ |
| 43 | */ |
43 | /** |
| 44 | /** |
44 | * @brief HAL State structures definition |
| 45 | * @brief HAL State structures definition |
45 | */ |
| 46 | */ |
46 | typedef enum |
| 47 | typedef enum |
47 | { |
| 48 | { |
48 | HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */ |
| 49 | HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */ |
49 | HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */ |
| 50 | HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */ |
50 | HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */ |
| 51 | HAL_CAN_STATE_LISTENING = 0x02U, /*!< CAN receive process is ongoing */ |
51 | HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */ |
| 52 | HAL_CAN_STATE_SLEEP_PENDING = 0x03U, /*!< CAN sleep request is pending */ |
52 | HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */ |
| 53 | HAL_CAN_STATE_SLEEP_ACTIVE = 0x04U, /*!< CAN sleep mode is active */ |
53 | HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */ |
| 54 | HAL_CAN_STATE_ERROR = 0x05U /*!< CAN error state */ |
54 | |
| 55 | 55 | } HAL_CAN_StateTypeDef; |
|
| 56 | } HAL_CAN_StateTypeDef; |
56 | |
| 57 | 57 | /** |
|
| 58 | /** |
58 | * @brief CAN init structure definition |
| 59 | * @brief CAN init structure definition |
59 | */ |
| 60 | */ |
60 | typedef struct |
| 61 | typedef struct |
61 | { |
| 62 | { |
62 | uint32_t Prescaler; /*!< Specifies the length of a time quantum. |
| 63 | uint32_t Prescaler; /*!< Specifies the length of a time quantum. |
63 | This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */ |
| 64 | This parameter must be a number between Min_Data = 1 and Max_Data = 1024. */ |
64 | |
| 65 | 65 | uint32_t Mode; /*!< Specifies the CAN operating mode. |
|
| 66 | uint32_t Mode; /*!< Specifies the CAN operating mode. |
66 | This parameter can be a value of @ref CAN_operating_mode */ |
| 67 | This parameter can be a value of @ref CAN_operating_mode */ |
67 | |
| 68 | 68 | uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware |
|
| 69 | uint32_t SyncJumpWidth; /*!< Specifies the maximum number of time quanta the CAN hardware |
69 | is allowed to lengthen or shorten a bit to perform resynchronization. |
| 70 | is allowed to lengthen or shorten a bit to perform resynchronization. |
70 | This parameter can be a value of @ref CAN_synchronisation_jump_width */ |
| 71 | This parameter can be a value of @ref CAN_synchronisation_jump_width */ |
71 | |
| 72 | 72 | uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1. |
|
| 73 | uint32_t TimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1. |
73 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ |
| 74 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ |
74 | |
| 75 | 75 | uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2. |
|
| 76 | uint32_t TimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2. |
76 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ |
| 77 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ |
77 | |
| 78 | 78 | FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode. |
|
| 79 | FunctionalState TimeTriggeredMode; /*!< Enable or disable the time triggered communication mode. |
79 | This parameter can be set to ENABLE or DISABLE. */ |
| 80 | This parameter can be set to ENABLE or DISABLE. */ |
80 | |
| 81 | 81 | FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management. |
|
| 82 | FunctionalState AutoBusOff; /*!< Enable or disable the automatic bus-off management. |
82 | This parameter can be set to ENABLE or DISABLE. */ |
| 83 | This parameter can be set to ENABLE or DISABLE. */ |
83 | |
| 84 | 84 | FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode. |
|
| 85 | FunctionalState AutoWakeUp; /*!< Enable or disable the automatic wake-up mode. |
85 | This parameter can be set to ENABLE or DISABLE. */ |
| 86 | This parameter can be set to ENABLE or DISABLE. */ |
86 | |
| 87 | 87 | FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode. |
|
| 88 | FunctionalState AutoRetransmission; /*!< Enable or disable the non-automatic retransmission mode. |
88 | This parameter can be set to ENABLE or DISABLE. */ |
| 89 | This parameter can be set to ENABLE or DISABLE. */ |
89 | |
| 90 | 90 | FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode. |
|
| 91 | FunctionalState ReceiveFifoLocked; /*!< Enable or disable the Receive FIFO Locked mode. |
91 | This parameter can be set to ENABLE or DISABLE. */ |
| 92 | This parameter can be set to ENABLE or DISABLE. */ |
92 | |
| 93 | 93 | FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority. |
|
| 94 | FunctionalState TransmitFifoPriority;/*!< Enable or disable the transmit FIFO priority. |
94 | This parameter can be set to ENABLE or DISABLE. */ |
| 95 | This parameter can be set to ENABLE or DISABLE. */ |
95 | |
| 96 | 96 | } CAN_InitTypeDef; |
|
| 97 | } CAN_InitTypeDef; |
97 | |
| 98 | 98 | /** |
|
| 99 | /** |
99 | * @brief CAN filter configuration structure definition |
| 100 | * @brief CAN filter configuration structure definition |
100 | */ |
| 101 | */ |
101 | typedef struct |
| 102 | typedef struct |
102 | { |
| 103 | { |
103 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit |
| 104 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit |
104 | configuration, first one for a 16-bit configuration). |
| 105 | configuration, first one for a 16-bit configuration). |
105 | This parameter must be a number between |
| 106 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
106 | Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
| 107 | 107 | ||
| 108 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit |
108 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit |
| 109 | configuration, second one for a 16-bit configuration). |
109 | configuration, second one for a 16-bit configuration). |
| 110 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
110 | This parameter must be a number between |
| 111 | 111 | Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
|
| 112 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, |
112 | |
| 113 | according to the mode (MSBs for a 32-bit configuration, |
113 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, |
| 114 | first one for a 16-bit configuration). |
114 | according to the mode (MSBs for a 32-bit configuration, |
| 115 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
115 | first one for a 16-bit configuration). |
| 116 | 116 | This parameter must be a number between |
|
| 117 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, |
117 | Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
| 118 | according to the mode (LSBs for a 32-bit configuration, |
118 | |
| 119 | second one for a 16-bit configuration). |
119 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, |
| 120 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
120 | according to the mode (LSBs for a 32-bit configuration, |
| 121 | 121 | second one for a 16-bit configuration). |
|
| 122 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter. |
122 | This parameter must be a number between |
| 123 | This parameter can be a value of @ref CAN_filter_FIFO */ |
123 | Min_Data = 0x0000 and Max_Data = 0xFFFF. */ |
| 124 | 124 | ||
| 125 | uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized. |
125 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1U) which will be assigned to the filter. |
| 126 | For single CAN instance(14 dedicated filter banks), |
126 | This parameter can be a value of @ref CAN_filter_FIFO */ |
| 127 | this parameter must be a number between Min_Data = 0 and Max_Data = 13. |
127 | |
| 128 | For dual CAN instances(28 filter banks shared), |
128 | uint32_t FilterBank; /*!< Specifies the filter bank which will be initialized. |
| 129 | this parameter must be a number between Min_Data = 0 and Max_Data = 27. */ |
129 | For single CAN instance(14 dedicated filter banks), |
| 130 | 130 | this parameter must be a number between Min_Data = 0 and Max_Data = 13. |
|
| 131 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. |
131 | For dual CAN instances(28 filter banks shared), |
| 132 | This parameter can be a value of @ref CAN_filter_mode */ |
132 | this parameter must be a number between Min_Data = 0 and Max_Data = 27. */ |
| 133 | 133 | ||
| 134 | uint32_t FilterScale; /*!< Specifies the filter scale. |
134 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. |
| 135 | This parameter can be a value of @ref CAN_filter_scale */ |
135 | This parameter can be a value of @ref CAN_filter_mode */ |
| 136 | 136 | ||
| 137 | uint32_t FilterActivation; /*!< Enable or disable the filter. |
137 | uint32_t FilterScale; /*!< Specifies the filter scale. |
| 138 | This parameter can be a value of @ref CAN_filter_activation */ |
138 | This parameter can be a value of @ref CAN_filter_scale */ |
| 139 | 139 | ||
| 140 | uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance. |
140 | uint32_t FilterActivation; /*!< Enable or disable the filter. |
| 141 | For single CAN instances, this parameter is meaningless. |
141 | This parameter can be a value of @ref CAN_filter_activation */ |
| 142 | For dual CAN instances, all filter banks with lower index are assigned to master |
142 | |
| 143 | CAN instance, whereas all filter banks with greater index are assigned to slave |
143 | uint32_t SlaveStartFilterBank; /*!< Select the start filter bank for the slave CAN instance. |
| 144 | CAN instance. |
144 | For single CAN instances, this parameter is meaningless. |
| 145 | This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ |
145 | For dual CAN instances, all filter banks with lower index are assigned to master |
| 146 | 146 | CAN instance, whereas all filter banks with greater index are assigned to slave |
|
| 147 | } CAN_FilterTypeDef; |
147 | CAN instance. |
| 148 | 148 | This parameter must be a number between Min_Data = 0 and Max_Data = 27. */ |
|
| 149 | /** |
149 | |
| 150 | * @brief CAN Tx message header structure definition |
150 | } CAN_FilterTypeDef; |
| 151 | */ |
151 | |
| 152 | typedef struct |
152 | /** |
| 153 | { |
153 | * @brief CAN Tx message header structure definition |
| 154 | uint32_t StdId; /*!< Specifies the standard identifier. |
154 | */ |
| 155 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ |
155 | typedef struct |
| 156 | 156 | { |
|
| 157 | uint32_t ExtId; /*!< Specifies the extended identifier. |
157 | uint32_t StdId; /*!< Specifies the standard identifier. |
| 158 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ |
158 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ |
| 159 | 159 | ||
| 160 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
160 | uint32_t ExtId; /*!< Specifies the extended identifier. |
| 161 | This parameter can be a value of @ref CAN_identifier_type */ |
161 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ |
| 162 | 162 | ||
| 163 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
163 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
| 164 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
164 | This parameter can be a value of @ref CAN_identifier_type */ |
| 165 | 165 | ||
| 166 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
166 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
| 167 | This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ |
167 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
| 168 | 168 | ||
| 169 | FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start |
169 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
| 170 | of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7]. |
170 | This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ |
| 171 | @note: Time Triggered Communication Mode must be enabled. |
171 | |
| 172 | @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent. |
172 | FunctionalState TransmitGlobalTime; /*!< Specifies whether the timestamp counter value captured on start |
| 173 | This parameter can be set to ENABLE or DISABLE. */ |
173 | of frame transmission, is sent in DATA6 and DATA7 replacing pData[6] and pData[7]. |
| 174 | 174 | @note: Time Triggered Communication Mode must be enabled. |
|
| 175 | } CAN_TxHeaderTypeDef; |
175 | @note: DLC must be programmed as 8 bytes, in order these 2 bytes are sent. |
| 176 | 176 | This parameter can be set to ENABLE or DISABLE. */ |
|
| 177 | /** |
177 | |
| 178 | * @brief CAN Rx message header structure definition |
178 | } CAN_TxHeaderTypeDef; |
| 179 | */ |
179 | |
| 180 | typedef struct |
180 | /** |
| 181 | { |
181 | * @brief CAN Rx message header structure definition |
| 182 | uint32_t StdId; /*!< Specifies the standard identifier. |
182 | */ |
| 183 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ |
183 | typedef struct |
| 184 | 184 | { |
|
| 185 | uint32_t ExtId; /*!< Specifies the extended identifier. |
185 | uint32_t StdId; /*!< Specifies the standard identifier. |
| 186 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ |
186 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF. */ |
| 187 | 187 | ||
| 188 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
188 | uint32_t ExtId; /*!< Specifies the extended identifier. |
| 189 | This parameter can be a value of @ref CAN_identifier_type */ |
189 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF. */ |
| 190 | 190 | ||
| 191 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
191 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
| 192 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
192 | This parameter can be a value of @ref CAN_identifier_type */ |
| 193 | 193 | ||
| 194 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
194 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
| 195 | This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ |
195 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
| 196 | 196 | ||
| 197 | uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception. |
197 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
| 198 | @note: Time Triggered Communication Mode must be enabled. |
198 | This parameter must be a number between Min_Data = 0 and Max_Data = 8. */ |
| 199 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */ |
199 | |
| 200 | 200 | uint32_t Timestamp; /*!< Specifies the timestamp counter value captured on start of frame reception. |
|
| 201 | uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element. |
201 | @note: Time Triggered Communication Mode must be enabled. |
| 202 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ |
202 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFFFF. */ |
| 203 | 203 | ||
| 204 | } CAN_RxHeaderTypeDef; |
204 | uint32_t FilterMatchIndex; /*!< Specifies the index of matching acceptance filter element. |
| 205 | 205 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF. */ |
|
| 206 | /** |
206 | |
| 207 | * @brief CAN handle Structure definition |
207 | } CAN_RxHeaderTypeDef; |
| 208 | */ |
208 | |
| 209 | typedef struct __CAN_HandleTypeDef |
209 | /** |
| 210 | { |
210 | * @brief CAN handle Structure definition |
| 211 | CAN_TypeDef *Instance; /*!< Register base address */ |
211 | */ |
| 212 | 212 | typedef struct __CAN_HandleTypeDef |
|
| 213 | CAN_InitTypeDef Init; /*!< CAN required parameters */ |
213 | { |
| 214 | 214 | CAN_TypeDef *Instance; /*!< Register base address */ |
|
| 215 | __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ |
215 | |
| 216 | 216 | CAN_InitTypeDef Init; /*!< CAN required parameters */ |
|
| 217 | __IO uint32_t ErrorCode; /*!< CAN Error code. |
217 | |
| 218 | This parameter can be a value of @ref CAN_Error_Code */ |
218 | __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ |
| 219 | 219 | ||
| 220 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
220 | __IO uint32_t ErrorCode; /*!< CAN Error code. |
| 221 | void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */ |
221 | This parameter can be a value of @ref CAN_Error_Code */ |
| 222 | void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */ |
222 | |
| 223 | void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */ |
223 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 224 | void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */ |
224 | void (* TxMailbox0CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 0 complete callback */ |
| 225 | void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */ |
225 | void (* TxMailbox1CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 1 complete callback */ |
| 226 | void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */ |
226 | void (* TxMailbox2CompleteCallback)(struct __CAN_HandleTypeDef *hcan);/*!< CAN Tx Mailbox 2 complete callback */ |
| 227 | void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */ |
227 | void (* TxMailbox0AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 0 abort callback */ |
| 228 | void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */ |
228 | void (* TxMailbox1AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 1 abort callback */ |
| 229 | void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */ |
229 | void (* TxMailbox2AbortCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Tx Mailbox 2 abort callback */ |
| 230 | void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */ |
230 | void (* RxFifo0MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 msg pending callback */ |
| 231 | void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */ |
231 | void (* RxFifo0FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 0 full callback */ |
| 232 | void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */ |
232 | void (* RxFifo1MsgPendingCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 msg pending callback */ |
| 233 | void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */ |
233 | void (* RxFifo1FullCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Rx FIFO 1 full callback */ |
| 234 | 234 | void (* SleepCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Sleep callback */ |
|
| 235 | void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */ |
235 | void (* WakeUpFromRxMsgCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Wake Up from Rx msg callback */ |
| 236 | void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */ |
236 | void (* ErrorCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Error callback */ |
| 237 | 237 | ||
| 238 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
238 | void (* MspInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp Init callback */ |
| 239 | } CAN_HandleTypeDef; |
239 | void (* MspDeInitCallback)(struct __CAN_HandleTypeDef *hcan); /*!< CAN Msp DeInit callback */ |
| 240 | 240 | ||
| 241 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
241 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
| 242 | /** |
242 | } CAN_HandleTypeDef; |
| 243 | * @brief HAL CAN common Callback ID enumeration definition |
243 | |
| 244 | */ |
244 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 245 | typedef enum |
245 | /** |
| 246 | { |
246 | * @brief HAL CAN common Callback ID enumeration definition |
| 247 | HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */ |
247 | */ |
| 248 | HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */ |
248 | typedef enum |
| 249 | HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */ |
249 | { |
| 250 | HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */ |
250 | HAL_CAN_TX_MAILBOX0_COMPLETE_CB_ID = 0x00U, /*!< CAN Tx Mailbox 0 complete callback ID */ |
| 251 | HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */ |
251 | HAL_CAN_TX_MAILBOX1_COMPLETE_CB_ID = 0x01U, /*!< CAN Tx Mailbox 1 complete callback ID */ |
| 252 | HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */ |
252 | HAL_CAN_TX_MAILBOX2_COMPLETE_CB_ID = 0x02U, /*!< CAN Tx Mailbox 2 complete callback ID */ |
| 253 | HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ |
253 | HAL_CAN_TX_MAILBOX0_ABORT_CB_ID = 0x03U, /*!< CAN Tx Mailbox 0 abort callback ID */ |
| 254 | HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ |
254 | HAL_CAN_TX_MAILBOX1_ABORT_CB_ID = 0x04U, /*!< CAN Tx Mailbox 1 abort callback ID */ |
| 255 | HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ |
255 | HAL_CAN_TX_MAILBOX2_ABORT_CB_ID = 0x05U, /*!< CAN Tx Mailbox 2 abort callback ID */ |
| 256 | HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ |
256 | HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ |
| 257 | HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ |
257 | HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ |
| 258 | HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up from Rx msg callback ID */ |
258 | HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ |
| 259 | HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ |
259 | HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ |
| 260 | 260 | HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ |
|
| 261 | HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ |
261 | HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up from Rx msg callback ID */ |
| 262 | HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ |
262 | HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ |
| 263 | 263 | ||
| 264 | } HAL_CAN_CallbackIDTypeDef; |
264 | HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ |
| 265 | 265 | HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ |
|
| 266 | /** |
266 | |
| 267 | * @brief HAL CAN Callback pointer definition |
267 | } HAL_CAN_CallbackIDTypeDef; |
| 268 | */ |
268 | |
| 269 | typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */ |
269 | /** |
| 270 | 270 | * @brief HAL CAN Callback pointer definition |
|
| 271 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
271 | */ |
| 272 | /** |
272 | typedef void (*pCAN_CallbackTypeDef)(CAN_HandleTypeDef *hcan); /*!< pointer to a CAN callback function */ |
| 273 | * @} |
273 | |
| 274 | */ |
274 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 275 | 275 | /** |
|
| 276 | /* Exported constants --------------------------------------------------------*/ |
276 | * @} |
| 277 | 277 | */ |
|
| 278 | /** @defgroup CAN_Exported_Constants CAN Exported Constants |
278 | |
| 279 | * @{ |
279 | /* Exported constants --------------------------------------------------------*/ |
| 280 | */ |
280 | |
| 281 | 281 | /** @defgroup CAN_Exported_Constants CAN Exported Constants |
|
| 282 | /** @defgroup CAN_Error_Code CAN Error Code |
282 | * @{ |
| 283 | * @{ |
283 | */ |
| 284 | */ |
284 | |
| 285 | #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */ |
285 | /** @defgroup CAN_Error_Code CAN Error Code |
| 286 | #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */ |
286 | * @{ |
| 287 | #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */ |
287 | */ |
| 288 | #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */ |
288 | #define HAL_CAN_ERROR_NONE (0x00000000U) /*!< No error */ |
| 289 | #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */ |
289 | #define HAL_CAN_ERROR_EWG (0x00000001U) /*!< Protocol Error Warning */ |
| 290 | #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */ |
290 | #define HAL_CAN_ERROR_EPV (0x00000002U) /*!< Error Passive */ |
| 291 | #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */ |
291 | #define HAL_CAN_ERROR_BOF (0x00000004U) /*!< Bus-off error */ |
| 292 | #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */ |
292 | #define HAL_CAN_ERROR_STF (0x00000008U) /*!< Stuff error */ |
| 293 | #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ |
293 | #define HAL_CAN_ERROR_FOR (0x00000010U) /*!< Form error */ |
| 294 | #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ |
294 | #define HAL_CAN_ERROR_ACK (0x00000020U) /*!< Acknowledgment error */ |
| 295 | #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ |
295 | #define HAL_CAN_ERROR_BR (0x00000040U) /*!< Bit recessive error */ |
| 296 | #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ |
296 | #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ |
| 297 | #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
297 | #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ |
| 298 | #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 0 transmit failure due to transmit error */ |
298 | #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ |
| 299 | #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 1 transmit failure due to arbitration lost */ |
299 | #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ |
| 300 | #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to transmit error */ |
300 | #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
| 301 | #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 2 transmit failure due to arbitration lost */ |
301 | #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 0 transmit failure due to transmit error */ |
| 302 | #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 2 transmit failure due to transmit error */ |
302 | #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 1 transmit failure due to arbitration lost */ |
| 303 | #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ |
303 | #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to transmit error */ |
| 304 | #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ |
304 | #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 2 transmit failure due to arbitration lost */ |
| 305 | #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ |
305 | #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 2 transmit failure due to transmit error */ |
| 306 | #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ |
306 | #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ |
| 307 | #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ |
307 | #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ |
| 308 | 308 | #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ |
|
| 309 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
309 | #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ |
| 310 | #define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */ |
310 | #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ |
| 311 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
311 | |
| 312 | #define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */ |
312 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 313 | 313 | #define HAL_CAN_ERROR_INVALID_CALLBACK (0x00400000U) /*!< Invalid Callback error */ |
|
| 314 | /** |
314 | #endif /* USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 315 | * @} |
315 | #define HAL_CAN_ERROR_INTERNAL (0x00800000U) /*!< Internal error */ |
| 316 | */ |
316 | |
| 317 | 317 | /** |
|
| 318 | /** @defgroup CAN_InitStatus CAN InitStatus |
318 | * @} |
| 319 | * @{ |
319 | */ |
| 320 | */ |
320 | |
| 321 | #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */ |
321 | /** @defgroup CAN_InitStatus CAN InitStatus |
| 322 | #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */ |
322 | * @{ |
| 323 | /** |
323 | */ |
| 324 | * @} |
324 | #define CAN_INITSTATUS_FAILED (0x00000000U) /*!< CAN initialization failed */ |
| 325 | */ |
325 | #define CAN_INITSTATUS_SUCCESS (0x00000001U) /*!< CAN initialization OK */ |
| 326 | 326 | /** |
|
| 327 | /** @defgroup CAN_operating_mode CAN Operating Mode |
327 | * @} |
| 328 | * @{ |
328 | */ |
| 329 | */ |
329 | |
| 330 | #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */ |
330 | /** @defgroup CAN_operating_mode CAN Operating Mode |
| 331 | #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ |
331 | * @{ |
| 332 | #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ |
332 | */ |
| 333 | #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ |
333 | #define CAN_MODE_NORMAL (0x00000000U) /*!< Normal mode */ |
| 334 | /** |
334 | #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ |
| 335 | * @} |
335 | #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ |
| 336 | */ |
336 | #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with |
| 337 | 337 | silent mode */ |
|
| 338 | 338 | /** |
|
| 339 | /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width |
339 | * @} |
| 340 | * @{ |
340 | */ |
| 341 | */ |
341 | |
| 342 | #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */ |
342 | |
| 343 | #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ |
343 | /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width |
| 344 | #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ |
344 | * @{ |
| 345 | #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ |
345 | */ |
| 346 | /** |
346 | #define CAN_SJW_1TQ (0x00000000U) /*!< 1 time quantum */ |
| 347 | * @} |
347 | #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ |
| 348 | */ |
348 | #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ |
| 349 | 349 | #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ |
|
| 350 | /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 |
350 | /** |
| 351 | * @{ |
351 | * @} |
| 352 | */ |
352 | */ |
| 353 | #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */ |
353 | |
| 354 | #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ |
354 | /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 |
| 355 | #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ |
355 | * @{ |
| 356 | #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ |
356 | */ |
| 357 | #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ |
357 | #define CAN_BS1_1TQ (0x00000000U) /*!< 1 time quantum */ |
| 358 | #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ |
358 | #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ |
| 359 | #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ |
359 | #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ |
| 360 | #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ |
360 | #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ |
| 361 | #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ |
361 | #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ |
| 362 | #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ |
362 | #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ |
| 363 | #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ |
363 | #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ |
| 364 | #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ |
364 | #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ |
| 365 | #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ |
365 | #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ |
| 366 | #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ |
366 | #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ |
| 367 | #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ |
367 | #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ |
| 368 | #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ |
368 | #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ |
| 369 | /** |
369 | #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ |
| 370 | * @} |
370 | #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ |
| 371 | */ |
371 | #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ |
| 372 | 372 | #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ |
|
| 373 | /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 |
373 | /** |
| 374 | * @{ |
374 | * @} |
| 375 | */ |
375 | */ |
| 376 | #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */ |
376 | |
| 377 | #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ |
377 | /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 |
| 378 | #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ |
378 | * @{ |
| 379 | #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ |
379 | */ |
| 380 | #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ |
380 | #define CAN_BS2_1TQ (0x00000000U) /*!< 1 time quantum */ |
| 381 | #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ |
381 | #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ |
| 382 | #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ |
382 | #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ |
| 383 | #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ |
383 | #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ |
| 384 | /** |
384 | #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ |
| 385 | * @} |
385 | #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ |
| 386 | */ |
386 | #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ |
| 387 | 387 | #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ |
|
| 388 | /** @defgroup CAN_filter_mode CAN Filter Mode |
388 | /** |
| 389 | * @{ |
389 | * @} |
| 390 | */ |
390 | */ |
| 391 | #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */ |
391 | |
| 392 | #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */ |
392 | /** @defgroup CAN_filter_mode CAN Filter Mode |
| 393 | /** |
393 | * @{ |
| 394 | * @} |
394 | */ |
| 395 | */ |
395 | #define CAN_FILTERMODE_IDMASK (0x00000000U) /*!< Identifier mask mode */ |
| 396 | 396 | #define CAN_FILTERMODE_IDLIST (0x00000001U) /*!< Identifier list mode */ |
|
| 397 | /** @defgroup CAN_filter_scale CAN Filter Scale |
397 | /** |
| 398 | * @{ |
398 | * @} |
| 399 | */ |
399 | */ |
| 400 | #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */ |
400 | |
| 401 | #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */ |
401 | /** @defgroup CAN_filter_scale CAN Filter Scale |
| 402 | /** |
402 | * @{ |
| 403 | * @} |
403 | */ |
| 404 | */ |
404 | #define CAN_FILTERSCALE_16BIT (0x00000000U) /*!< Two 16-bit filters */ |
| 405 | 405 | #define CAN_FILTERSCALE_32BIT (0x00000001U) /*!< One 32-bit filter */ |
|
| 406 | /** @defgroup CAN_filter_activation CAN Filter Activation |
406 | /** |
| 407 | * @{ |
407 | * @} |
| 408 | */ |
408 | */ |
| 409 | #define CAN_FILTER_DISABLE (0x00000000U) /*!< Disable filter */ |
409 | |
| 410 | #define CAN_FILTER_ENABLE (0x00000001U) /*!< Enable filter */ |
410 | /** @defgroup CAN_filter_activation CAN Filter Activation |
| 411 | /** |
411 | * @{ |
| 412 | * @} |
412 | */ |
| 413 | */ |
413 | #define CAN_FILTER_DISABLE (0x00000000U) /*!< Disable filter */ |
| 414 | 414 | #define CAN_FILTER_ENABLE (0x00000001U) /*!< Enable filter */ |
|
| 415 | /** @defgroup CAN_filter_FIFO CAN Filter FIFO |
415 | /** |
| 416 | * @{ |
416 | * @} |
| 417 | */ |
417 | */ |
| 418 | #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */ |
418 | |
| 419 | #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */ |
419 | /** @defgroup CAN_filter_FIFO CAN Filter FIFO |
| 420 | /** |
420 | * @{ |
| 421 | * @} |
421 | */ |
| 422 | */ |
422 | #define CAN_FILTER_FIFO0 (0x00000000U) /*!< Filter FIFO 0 assignment for filter x */ |
| 423 | 423 | #define CAN_FILTER_FIFO1 (0x00000001U) /*!< Filter FIFO 1 assignment for filter x */ |
|
| 424 | /** @defgroup CAN_identifier_type CAN Identifier Type |
424 | /** |
| 425 | * @{ |
425 | * @} |
| 426 | */ |
426 | */ |
| 427 | #define CAN_ID_STD (0x00000000U) /*!< Standard Id */ |
427 | |
| 428 | #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */ |
428 | /** @defgroup CAN_identifier_type CAN Identifier Type |
| 429 | /** |
429 | * @{ |
| 430 | * @} |
430 | */ |
| 431 | */ |
431 | #define CAN_ID_STD (0x00000000U) /*!< Standard Id */ |
| 432 | 432 | #define CAN_ID_EXT (0x00000004U) /*!< Extended Id */ |
|
| 433 | /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request |
433 | /** |
| 434 | * @{ |
434 | * @} |
| 435 | */ |
435 | */ |
| 436 | #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */ |
436 | |
| 437 | #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */ |
437 | /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request |
| 438 | /** |
438 | * @{ |
| 439 | * @} |
439 | */ |
| 440 | */ |
440 | #define CAN_RTR_DATA (0x00000000U) /*!< Data frame */ |
| 441 | 441 | #define CAN_RTR_REMOTE (0x00000002U) /*!< Remote frame */ |
|
| 442 | /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number |
442 | /** |
| 443 | * @{ |
443 | * @} |
| 444 | */ |
444 | */ |
| 445 | #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */ |
445 | |
| 446 | #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */ |
446 | /** @defgroup CAN_receive_FIFO_number CAN Receive FIFO Number |
| 447 | /** |
447 | * @{ |
| 448 | * @} |
448 | */ |
| 449 | */ |
449 | #define CAN_RX_FIFO0 (0x00000000U) /*!< CAN receive FIFO 0 */ |
| 450 | 450 | #define CAN_RX_FIFO1 (0x00000001U) /*!< CAN receive FIFO 1 */ |
|
| 451 | /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes |
451 | /** |
| 452 | * @{ |
452 | * @} |
| 453 | */ |
453 | */ |
| 454 | #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */ |
454 | |
| 455 | #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */ |
455 | /** @defgroup CAN_Tx_Mailboxes CAN Tx Mailboxes |
| 456 | #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */ |
456 | * @{ |
| 457 | /** |
457 | */ |
| 458 | * @} |
458 | #define CAN_TX_MAILBOX0 (0x00000001U) /*!< Tx Mailbox 0 */ |
| 459 | */ |
459 | #define CAN_TX_MAILBOX1 (0x00000002U) /*!< Tx Mailbox 1 */ |
| 460 | 460 | #define CAN_TX_MAILBOX2 (0x00000004U) /*!< Tx Mailbox 2 */ |
|
| 461 | /** @defgroup CAN_flags CAN Flags |
461 | /** |
| 462 | * @{ |
462 | * @} |
| 463 | */ |
463 | */ |
| 464 | /* Transmit Flags */ |
464 | |
| 465 | #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */ |
465 | /** @defgroup CAN_flags CAN Flags |
| 466 | #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */ |
466 | * @{ |
| 467 | #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */ |
467 | */ |
| 468 | #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */ |
468 | /* Transmit Flags */ |
| 469 | #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */ |
469 | #define CAN_FLAG_RQCP0 (0x00000500U) /*!< Request complete MailBox 0 flag */ |
| 470 | #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */ |
470 | #define CAN_FLAG_TXOK0 (0x00000501U) /*!< Transmission OK MailBox 0 flag */ |
| 471 | #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */ |
471 | #define CAN_FLAG_ALST0 (0x00000502U) /*!< Arbitration Lost MailBox 0 flag */ |
| 472 | #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */ |
472 | #define CAN_FLAG_TERR0 (0x00000503U) /*!< Transmission error MailBox 0 flag */ |
| 473 | #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */ |
473 | #define CAN_FLAG_RQCP1 (0x00000508U) /*!< Request complete MailBox1 flag */ |
| 474 | #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */ |
474 | #define CAN_FLAG_TXOK1 (0x00000509U) /*!< Transmission OK MailBox 1 flag */ |
| 475 | #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */ |
475 | #define CAN_FLAG_ALST1 (0x0000050AU) /*!< Arbitration Lost MailBox 1 flag */ |
| 476 | #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */ |
476 | #define CAN_FLAG_TERR1 (0x0000050BU) /*!< Transmission error MailBox 1 flag */ |
| 477 | #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */ |
477 | #define CAN_FLAG_RQCP2 (0x00000510U) /*!< Request complete MailBox2 flag */ |
| 478 | #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */ |
478 | #define CAN_FLAG_TXOK2 (0x00000511U) /*!< Transmission OK MailBox 2 flag */ |
| 479 | #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */ |
479 | #define CAN_FLAG_ALST2 (0x00000512U) /*!< Arbitration Lost MailBox 2 flag */ |
| 480 | #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */ |
480 | #define CAN_FLAG_TERR2 (0x00000513U) /*!< Transmission error MailBox 2 flag */ |
| 481 | #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */ |
481 | #define CAN_FLAG_TME0 (0x0000051AU) /*!< Transmit mailbox 0 empty flag */ |
| 482 | #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */ |
482 | #define CAN_FLAG_TME1 (0x0000051BU) /*!< Transmit mailbox 1 empty flag */ |
| 483 | 483 | #define CAN_FLAG_TME2 (0x0000051CU) /*!< Transmit mailbox 2 empty flag */ |
|
| 484 | /* Receive Flags */ |
484 | #define CAN_FLAG_LOW0 (0x0000051DU) /*!< Lowest priority mailbox 0 flag */ |
| 485 | #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */ |
485 | #define CAN_FLAG_LOW1 (0x0000051EU) /*!< Lowest priority mailbox 1 flag */ |
| 486 | #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */ |
486 | #define CAN_FLAG_LOW2 (0x0000051FU) /*!< Lowest priority mailbox 2 flag */ |
| 487 | #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */ |
487 | |
| 488 | #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */ |
488 | /* Receive Flags */ |
| 489 | 489 | #define CAN_FLAG_FF0 (0x00000203U) /*!< RX FIFO 0 Full flag */ |
|
| 490 | /* Operating Mode Flags */ |
490 | #define CAN_FLAG_FOV0 (0x00000204U) /*!< RX FIFO 0 Overrun flag */ |
| 491 | #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */ |
491 | #define CAN_FLAG_FF1 (0x00000403U) /*!< RX FIFO 1 Full flag */ |
| 492 | #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */ |
492 | #define CAN_FLAG_FOV1 (0x00000404U) /*!< RX FIFO 1 Overrun flag */ |
| 493 | #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */ |
493 | |
| 494 | #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */ |
494 | /* Operating Mode Flags */ |
| 495 | #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */ |
495 | #define CAN_FLAG_INAK (0x00000100U) /*!< Initialization acknowledge flag */ |
| 496 | 496 | #define CAN_FLAG_SLAK (0x00000101U) /*!< Sleep acknowledge flag */ |
|
| 497 | /* Error Flags */ |
497 | #define CAN_FLAG_ERRI (0x00000102U) /*!< Error flag */ |
| 498 | #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */ |
498 | #define CAN_FLAG_WKU (0x00000103U) /*!< Wake up interrupt flag */ |
| 499 | #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */ |
499 | #define CAN_FLAG_SLAKI (0x00000104U) /*!< Sleep acknowledge interrupt flag */ |
| 500 | #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */ |
500 | |
| 501 | /** |
501 | /* Error Flags */ |
| 502 | * @} |
502 | #define CAN_FLAG_EWG (0x00000300U) /*!< Error warning flag */ |
| 503 | */ |
503 | #define CAN_FLAG_EPV (0x00000301U) /*!< Error passive flag */ |
| 504 | 504 | #define CAN_FLAG_BOF (0x00000302U) /*!< Bus-Off flag */ |
|
| 505 | 505 | /** |
|
| 506 | /** @defgroup CAN_Interrupts CAN Interrupts |
506 | * @} |
| 507 | * @{ |
507 | */ |
| 508 | */ |
508 | |
| 509 | /* Transmit Interrupt */ |
509 | |
| 510 | #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ |
510 | /** @defgroup CAN_Interrupts CAN Interrupts |
| 511 | 511 | * @{ |
|
| 512 | /* Receive Interrupts */ |
512 | */ |
| 513 | #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ |
513 | /* Transmit Interrupt */ |
| 514 | #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ |
514 | #define CAN_IT_TX_MAILBOX_EMPTY ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ |
| 515 | #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ |
515 | |
| 516 | #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ |
516 | /* Receive Interrupts */ |
| 517 | #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ |
517 | #define CAN_IT_RX_FIFO0_MSG_PENDING ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ |
| 518 | #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ |
518 | #define CAN_IT_RX_FIFO0_FULL ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ |
| 519 | 519 | #define CAN_IT_RX_FIFO0_OVERRUN ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ |
|
| 520 | /* Operating Mode Interrupts */ |
520 | #define CAN_IT_RX_FIFO1_MSG_PENDING ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ |
| 521 | #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ |
521 | #define CAN_IT_RX_FIFO1_FULL ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ |
| 522 | #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ |
522 | #define CAN_IT_RX_FIFO1_OVERRUN ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ |
| 523 | 523 | ||
| 524 | /* Error Interrupts */ |
524 | /* Operating Mode Interrupts */ |
| 525 | #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ |
525 | #define CAN_IT_WAKEUP ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ |
| 526 | #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ |
526 | #define CAN_IT_SLEEP_ACK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ |
| 527 | #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ |
527 | |
| 528 | #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ |
528 | /* Error Interrupts */ |
| 529 | #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ |
529 | #define CAN_IT_ERROR_WARNING ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ |
| 530 | /** |
530 | #define CAN_IT_ERROR_PASSIVE ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ |
| 531 | * @} |
531 | #define CAN_IT_BUSOFF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ |
| 532 | */ |
532 | #define CAN_IT_LAST_ERROR_CODE ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ |
| 533 | 533 | #define CAN_IT_ERROR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ |
|
| 534 | /** |
534 | /** |
| 535 | * @} |
535 | * @} |
| 536 | */ |
536 | */ |
| 537 | 537 | ||
| 538 | /* Exported macros -----------------------------------------------------------*/ |
538 | /** |
| 539 | /** @defgroup CAN_Exported_Macros CAN Exported Macros |
539 | * @} |
| 540 | * @{ |
540 | */ |
| 541 | */ |
541 | |
| 542 | 542 | /* Exported macros -----------------------------------------------------------*/ |
|
| 543 | /** @brief Reset CAN handle state |
543 | /** @defgroup CAN_Exported_Macros CAN Exported Macros |
| 544 | * @param __HANDLE__ CAN handle. |
544 | * @{ |
| 545 | * @retval None |
545 | */ |
| 546 | */ |
546 | |
| 547 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
547 | /** @brief Reset CAN handle state |
| 548 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
548 | * @param __HANDLE__ CAN handle. |
| 549 | (__HANDLE__)->State = HAL_CAN_STATE_RESET; \ |
549 | * @retval None |
| 550 | (__HANDLE__)->MspInitCallback = NULL; \ |
550 | */ |
| 551 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
551 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
| 552 | } while(0) |
552 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| 553 | #else |
553 | (__HANDLE__)->State = HAL_CAN_STATE_RESET; \ |
| 554 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) |
554 | (__HANDLE__)->MspInitCallback = NULL; \ |
| 555 | #endif /*USE_HAL_CAN_REGISTER_CALLBACKS */ |
555 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
| 556 | 556 | } while(0) |
|
| 557 | /** |
557 | #else |
| 558 | * @brief Enable the specified CAN interrupts. |
558 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) |
| 559 | * @param __HANDLE__ CAN handle. |
559 | #endif /*USE_HAL_CAN_REGISTER_CALLBACKS */ |
| 560 | * @param __INTERRUPT__ CAN Interrupt sources to enable. |
560 | |
| 561 | * This parameter can be any combination of @arg CAN_Interrupts |
561 | /** |
| 562 | * @retval None |
562 | * @brief Enable the specified CAN interrupts. |
| 563 | */ |
563 | * @param __HANDLE__ CAN handle. |
| 564 | #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) |
564 | * @param __INTERRUPT__ CAN Interrupt sources to enable. |
| 565 | 565 | * This parameter can be any combination of @arg CAN_Interrupts |
|
| 566 | /** |
566 | * @retval None |
| 567 | * @brief Disable the specified CAN interrupts. |
567 | */ |
| 568 | * @param __HANDLE__ CAN handle. |
568 | #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) |
| 569 | * @param __INTERRUPT__ CAN Interrupt sources to disable. |
569 | |
| 570 | * This parameter can be any combination of @arg CAN_Interrupts |
570 | /** |
| 571 | * @retval None |
571 | * @brief Disable the specified CAN interrupts. |
| 572 | */ |
572 | * @param __HANDLE__ CAN handle. |
| 573 | #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) |
573 | * @param __INTERRUPT__ CAN Interrupt sources to disable. |
| 574 | 574 | * This parameter can be any combination of @arg CAN_Interrupts |
|
| 575 | /** @brief Check if the specified CAN interrupt source is enabled or disabled. |
575 | * @retval None |
| 576 | * @param __HANDLE__ specifies the CAN Handle. |
576 | */ |
| 577 | * @param __INTERRUPT__ specifies the CAN interrupt source to check. |
577 | #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) |
| 578 | * This parameter can be a value of @arg CAN_Interrupts |
578 | |
| 579 | * @retval The state of __IT__ (TRUE or FALSE). |
579 | /** @brief Check if the specified CAN interrupt source is enabled or disabled. |
| 580 | */ |
580 | * @param __HANDLE__ specifies the CAN Handle. |
| 581 | #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__)) |
581 | * @param __INTERRUPT__ specifies the CAN interrupt source to check. |
| 582 | 582 | * This parameter can be a value of @arg CAN_Interrupts |
|
| 583 | /** @brief Check whether the specified CAN flag is set or not. |
583 | * @retval The state of __IT__ (TRUE or FALSE). |
| 584 | * @param __HANDLE__ specifies the CAN Handle. |
584 | */ |
| 585 | * @param __FLAG__ specifies the flag to check. |
585 | #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) & (__INTERRUPT__)) |
| 586 | * This parameter can be one of @arg CAN_flags |
586 | |
| 587 | * @retval The state of __FLAG__ (TRUE or FALSE). |
587 | /** @brief Check whether the specified CAN flag is set or not. |
| 588 | */ |
588 | * @param __HANDLE__ specifies the CAN Handle. |
| 589 | #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ |
589 | * @param __FLAG__ specifies the flag to check. |
| 590 | ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
590 | * This parameter can be one of @arg CAN_flags |
| 591 | (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
591 | * @retval The state of __FLAG__ (TRUE or FALSE). |
| 592 | (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
592 | */ |
| 593 | (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
593 | #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ |
| 594 | (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) |
594 | ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| 595 | 595 | (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
|
| 596 | /** @brief Clear the specified CAN pending flag. |
596 | (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| 597 | * @param __HANDLE__ specifies the CAN Handle. |
597 | (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| 598 | * @param __FLAG__ specifies the flag to check. |
598 | (((__FLAG__) >> 8U) == 3U)? ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) |
| 599 | * This parameter can be one of the following values: |
599 | |
| 600 | * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag |
600 | /** @brief Clear the specified CAN pending flag. |
| 601 | * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag |
601 | * @param __HANDLE__ specifies the CAN Handle. |
| 602 | * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag |
602 | * @param __FLAG__ specifies the flag to check. |
| 603 | * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag |
603 | * This parameter can be one of the following values: |
| 604 | * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag |
604 | * @arg CAN_FLAG_RQCP0: Request complete MailBox 0 Flag |
| 605 | * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag |
605 | * @arg CAN_FLAG_TXOK0: Transmission OK MailBox 0 Flag |
| 606 | * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag |
606 | * @arg CAN_FLAG_ALST0: Arbitration Lost MailBox 0 Flag |
| 607 | * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag |
607 | * @arg CAN_FLAG_TERR0: Transmission error MailBox 0 Flag |
| 608 | * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag |
608 | * @arg CAN_FLAG_RQCP1: Request complete MailBox 1 Flag |
| 609 | * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag |
609 | * @arg CAN_FLAG_TXOK1: Transmission OK MailBox 1 Flag |
| 610 | * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag |
610 | * @arg CAN_FLAG_ALST1: Arbitration Lost MailBox 1 Flag |
| 611 | * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag |
611 | * @arg CAN_FLAG_TERR1: Transmission error MailBox 1 Flag |
| 612 | * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag |
612 | * @arg CAN_FLAG_RQCP2: Request complete MailBox 2 Flag |
| 613 | * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag |
613 | * @arg CAN_FLAG_TXOK2: Transmission OK MailBox 2 Flag |
| 614 | * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag |
614 | * @arg CAN_FLAG_ALST2: Arbitration Lost MailBox 2 Flag |
| 615 | * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag |
615 | * @arg CAN_FLAG_TERR2: Transmission error MailBox 2 Flag |
| 616 | * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag |
616 | * @arg CAN_FLAG_FF0: RX FIFO 0 Full Flag |
| 617 | * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag |
617 | * @arg CAN_FLAG_FOV0: RX FIFO 0 Overrun Flag |
| 618 | * @retval None |
618 | * @arg CAN_FLAG_FF1: RX FIFO 1 Full Flag |
| 619 | */ |
619 | * @arg CAN_FLAG_FOV1: RX FIFO 1 Overrun Flag |
| 620 | #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
620 | * @arg CAN_FLAG_WKUI: Wake up Interrupt Flag |
| 621 | ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
621 | * @arg CAN_FLAG_SLAKI: Sleep acknowledge Interrupt Flag |
| 622 | (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
622 | * @retval None |
| 623 | (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
623 | */ |
| 624 | (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) |
624 | #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| 625 | 625 | ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
|
| 626 | /** |
626 | (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| 627 | * @} |
627 | (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| 628 | */ |
628 | (((__FLAG__) >> 8U) == 1U)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0U) |
| 629 | 629 | ||
| 630 | /* Exported functions --------------------------------------------------------*/ |
630 | /** |
| 631 | /** @addtogroup CAN_Exported_Functions CAN Exported Functions |
631 | * @} |
| 632 | * @{ |
632 | */ |
| 633 | */ |
633 | |
| 634 | 634 | /* Exported functions --------------------------------------------------------*/ |
|
| 635 | /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions |
635 | /** @addtogroup CAN_Exported_Functions CAN Exported Functions |
| 636 | * @brief Initialization and Configuration functions |
636 | * @{ |
| 637 | * @{ |
637 | */ |
| 638 | */ |
638 | |
| 639 | 639 | /** @addtogroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions |
|
| 640 | /* Initialization and de-initialization functions *****************************/ |
640 | * @brief Initialization and Configuration functions |
| 641 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan); |
641 | * @{ |
| 642 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan); |
642 | */ |
| 643 | void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan); |
643 | |
| 644 | void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan); |
644 | /* Initialization and de-initialization functions *****************************/ |
| 645 | 645 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef *hcan); |
|
| 646 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
646 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef *hcan); |
| 647 | /* Callbacks Register/UnRegister functions ***********************************/ |
647 | void HAL_CAN_MspInit(CAN_HandleTypeDef *hcan); |
| 648 | HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, void (* pCallback)(CAN_HandleTypeDef *_hcan)); |
648 | void HAL_CAN_MspDeInit(CAN_HandleTypeDef *hcan); |
| 649 | HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID); |
649 | |
| 650 | 650 | #if USE_HAL_CAN_REGISTER_CALLBACKS == 1 |
|
| 651 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
651 | /* Callbacks Register/UnRegister functions ***********************************/ |
| 652 | /** |
652 | HAL_StatusTypeDef HAL_CAN_RegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID, |
| 653 | * @} |
653 | void (* pCallback)(CAN_HandleTypeDef *_hcan)); |
| 654 | */ |
654 | HAL_StatusTypeDef HAL_CAN_UnRegisterCallback(CAN_HandleTypeDef *hcan, HAL_CAN_CallbackIDTypeDef CallbackID); |
| 655 | 655 | ||
| 656 | /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions |
656 | #endif /* (USE_HAL_CAN_REGISTER_CALLBACKS) */ |
| 657 | * @brief Configuration functions |
657 | /** |
| 658 | * @{ |
658 | * @} |
| 659 | */ |
659 | */ |
| 660 | 660 | ||
| 661 | /* Configuration functions ****************************************************/ |
661 | /** @addtogroup CAN_Exported_Functions_Group2 Configuration functions |
| 662 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, CAN_FilterTypeDef *sFilterConfig); |
662 | * @brief Configuration functions |
| 663 | 663 | * @{ |
|
| 664 | /** |
664 | */ |
| 665 | * @} |
665 | |
| 666 | */ |
666 | /* Configuration functions ****************************************************/ |
| 667 | 667 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef *hcan, const CAN_FilterTypeDef *sFilterConfig); |
|
| 668 | /** @addtogroup CAN_Exported_Functions_Group3 Control functions |
668 | |
| 669 | * @brief Control functions |
669 | /** |
| 670 | * @{ |
670 | * @} |
| 671 | */ |
671 | */ |
| 672 | 672 | ||
| 673 | /* Control functions **********************************************************/ |
673 | /** @addtogroup CAN_Exported_Functions_Group3 Control functions |
| 674 | HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan); |
674 | * @brief Control functions |
| 675 | HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan); |
675 | * @{ |
| 676 | HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan); |
676 | */ |
| 677 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); |
677 | |
| 678 | uint32_t HAL_CAN_IsSleepActive(CAN_HandleTypeDef *hcan); |
678 | /* Control functions **********************************************************/ |
| 679 | HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, CAN_TxHeaderTypeDef *pHeader, uint8_t aData[], uint32_t *pTxMailbox); |
679 | HAL_StatusTypeDef HAL_CAN_Start(CAN_HandleTypeDef *hcan); |
| 680 | HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); |
680 | HAL_StatusTypeDef HAL_CAN_Stop(CAN_HandleTypeDef *hcan); |
| 681 | uint32_t HAL_CAN_GetTxMailboxesFreeLevel(CAN_HandleTypeDef *hcan); |
681 | HAL_StatusTypeDef HAL_CAN_RequestSleep(CAN_HandleTypeDef *hcan); |
| 682 | uint32_t HAL_CAN_IsTxMessagePending(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); |
682 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); |
| 683 | uint32_t HAL_CAN_GetTxTimestamp(CAN_HandleTypeDef *hcan, uint32_t TxMailbox); |
683 | uint32_t HAL_CAN_IsSleepActive(const CAN_HandleTypeDef *hcan); |
| 684 | HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]); |
684 | HAL_StatusTypeDef HAL_CAN_AddTxMessage(CAN_HandleTypeDef *hcan, const CAN_TxHeaderTypeDef *pHeader, |
| 685 | uint32_t HAL_CAN_GetRxFifoFillLevel(CAN_HandleTypeDef *hcan, uint32_t RxFifo); |
685 | const uint8_t aData[], uint32_t *pTxMailbox); |
| 686 | 686 | HAL_StatusTypeDef HAL_CAN_AbortTxRequest(CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); |
|
| 687 | /** |
687 | uint32_t HAL_CAN_GetTxMailboxesFreeLevel(const CAN_HandleTypeDef *hcan); |
| 688 | * @} |
688 | uint32_t HAL_CAN_IsTxMessagePending(const CAN_HandleTypeDef *hcan, uint32_t TxMailboxes); |
| 689 | */ |
689 | uint32_t HAL_CAN_GetTxTimestamp(const CAN_HandleTypeDef *hcan, uint32_t TxMailbox); |
| 690 | 690 | HAL_StatusTypeDef HAL_CAN_GetRxMessage(CAN_HandleTypeDef *hcan, uint32_t RxFifo, |
|
| 691 | /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management |
691 | CAN_RxHeaderTypeDef *pHeader, uint8_t aData[]); |
| 692 | * @brief Interrupts management |
692 | uint32_t HAL_CAN_GetRxFifoFillLevel(const CAN_HandleTypeDef *hcan, uint32_t RxFifo); |
| 693 | * @{ |
693 | |
| 694 | */ |
694 | /** |
| 695 | /* Interrupts management ******************************************************/ |
695 | * @} |
| 696 | HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs); |
696 | */ |
| 697 | HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs); |
697 | |
| 698 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan); |
698 | /** @addtogroup CAN_Exported_Functions_Group4 Interrupts management |
| 699 | 699 | * @brief Interrupts management |
|
| 700 | /** |
700 | * @{ |
| 701 | * @} |
701 | */ |
| 702 | */ |
702 | /* Interrupts management ******************************************************/ |
| 703 | 703 | HAL_StatusTypeDef HAL_CAN_ActivateNotification(CAN_HandleTypeDef *hcan, uint32_t ActiveITs); |
|
| 704 | /** @addtogroup CAN_Exported_Functions_Group5 Callback functions |
704 | HAL_StatusTypeDef HAL_CAN_DeactivateNotification(CAN_HandleTypeDef *hcan, uint32_t InactiveITs); |
| 705 | * @brief Callback functions |
705 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef *hcan); |
| 706 | * @{ |
706 | |
| 707 | */ |
707 | /** |
| 708 | /* Callbacks functions ********************************************************/ |
708 | * @} |
| 709 | 709 | */ |
|
| 710 | void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan); |
710 | |
| 711 | void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan); |
711 | /** @addtogroup CAN_Exported_Functions_Group5 Callback functions |
| 712 | void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan); |
712 | * @brief Callback functions |
| 713 | void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan); |
713 | * @{ |
| 714 | void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan); |
714 | */ |
| 715 | void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan); |
715 | /* Callbacks functions ********************************************************/ |
| 716 | void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan); |
716 | |
| 717 | void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan); |
717 | void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan); |
| 718 | void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan); |
718 | void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan); |
| 719 | void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan); |
719 | void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan); |
| 720 | void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan); |
720 | void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan); |
| 721 | void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan); |
721 | void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan); |
| 722 | void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); |
722 | void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan); |
| 723 | 723 | void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan); |
|
| 724 | /** |
724 | void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan); |
| 725 | * @} |
725 | void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan); |
| 726 | */ |
726 | void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan); |
| 727 | 727 | void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan); |
|
| 728 | /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions |
728 | void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan); |
| 729 | * @brief CAN Peripheral State functions |
729 | void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); |
| 730 | * @{ |
730 | |
| 731 | */ |
731 | /** |
| 732 | /* Peripheral State and Error functions ***************************************/ |
732 | * @} |
| 733 | HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef *hcan); |
733 | */ |
| 734 | uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); |
734 | |
| 735 | HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan); |
735 | /** @addtogroup CAN_Exported_Functions_Group6 Peripheral State and Error functions |
| 736 | 736 | * @brief CAN Peripheral State functions |
|
| 737 | /** |
737 | * @{ |
| 738 | * @} |
738 | */ |
| 739 | */ |
739 | /* Peripheral State and Error functions ***************************************/ |
| 740 | 740 | HAL_CAN_StateTypeDef HAL_CAN_GetState(const CAN_HandleTypeDef *hcan); |
|
| 741 | /** |
741 | uint32_t HAL_CAN_GetError(const CAN_HandleTypeDef *hcan); |
| 742 | * @} |
742 | HAL_StatusTypeDef HAL_CAN_ResetError(CAN_HandleTypeDef *hcan); |
| 743 | */ |
743 | |
| 744 | 744 | /** |
|
| 745 | /* Private types -------------------------------------------------------------*/ |
745 | * @} |
| 746 | /** @defgroup CAN_Private_Types CAN Private Types |
746 | */ |
| 747 | * @{ |
747 | |
| 748 | */ |
748 | /** |
| 749 | 749 | * @} |
|
| 750 | /** |
750 | */ |
| 751 | * @} |
751 | |
| 752 | */ |
752 | /* Private types -------------------------------------------------------------*/ |
| 753 | 753 | /** @defgroup CAN_Private_Types CAN Private Types |
|
| 754 | /* Private variables ---------------------------------------------------------*/ |
754 | * @{ |
| 755 | /** @defgroup CAN_Private_Variables CAN Private Variables |
755 | */ |
| 756 | * @{ |
756 | |
| 757 | */ |
757 | /** |
| 758 | 758 | * @} |
|
| 759 | /** |
759 | */ |
| 760 | * @} |
760 | |
| 761 | */ |
761 | /* Private variables ---------------------------------------------------------*/ |
| 762 | 762 | /** @defgroup CAN_Private_Variables CAN Private Variables |
|
| 763 | /* Private constants ---------------------------------------------------------*/ |
763 | * @{ |
| 764 | /** @defgroup CAN_Private_Constants CAN Private Constants |
764 | */ |
| 765 | * @{ |
765 | |
| 766 | */ |
766 | /** |
| 767 | #define CAN_FLAG_MASK (0x000000FFU) |
767 | * @} |
| 768 | /** |
768 | */ |
| 769 | * @} |
769 | |
| 770 | */ |
770 | /* Private constants ---------------------------------------------------------*/ |
| 771 | 771 | /** @defgroup CAN_Private_Constants CAN Private Constants |
|
| 772 | /* Private Macros -----------------------------------------------------------*/ |
772 | * @{ |
| 773 | /** @defgroup CAN_Private_Macros CAN Private Macros |
773 | */ |
| 774 | * @{ |
774 | #define CAN_FLAG_MASK (0x000000FFU) |
| 775 | */ |
775 | /** |
| 776 | 776 | * @} |
|
| 777 | #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ |
777 | */ |
| 778 | ((MODE) == CAN_MODE_LOOPBACK)|| \ |
778 | |
| 779 | ((MODE) == CAN_MODE_SILENT) || \ |
779 | /* Private Macros -----------------------------------------------------------*/ |
| 780 | ((MODE) == CAN_MODE_SILENT_LOOPBACK)) |
780 | /** @defgroup CAN_Private_Macros CAN Private Macros |
| 781 | #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \ |
781 | * @{ |
| 782 | ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) |
782 | */ |
| 783 | #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \ |
783 | |
| 784 | ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \ |
784 | #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ |
| 785 | ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \ |
785 | ((MODE) == CAN_MODE_LOOPBACK)|| \ |
| 786 | ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \ |
786 | ((MODE) == CAN_MODE_SILENT) || \ |
| 787 | ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \ |
787 | ((MODE) == CAN_MODE_SILENT_LOOPBACK)) |
| 788 | ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \ |
788 | #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ) || \ |
| 789 | ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \ |
789 | ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) |
| 790 | ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ)) |
790 | #define IS_CAN_BS1(BS1) (((BS1) == CAN_BS1_1TQ) || ((BS1) == CAN_BS1_2TQ) || \ |
| 791 | #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \ |
791 | ((BS1) == CAN_BS1_3TQ) || ((BS1) == CAN_BS1_4TQ) || \ |
| 792 | ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \ |
792 | ((BS1) == CAN_BS1_5TQ) || ((BS1) == CAN_BS1_6TQ) || \ |
| 793 | ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \ |
793 | ((BS1) == CAN_BS1_7TQ) || ((BS1) == CAN_BS1_8TQ) || \ |
| 794 | ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ)) |
794 | ((BS1) == CAN_BS1_9TQ) || ((BS1) == CAN_BS1_10TQ)|| \ |
| 795 | #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) |
795 | ((BS1) == CAN_BS1_11TQ)|| ((BS1) == CAN_BS1_12TQ)|| \ |
| 796 | #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU) |
796 | ((BS1) == CAN_BS1_13TQ)|| ((BS1) == CAN_BS1_14TQ)|| \ |
| 797 | #if defined(CAN2) |
797 | ((BS1) == CAN_BS1_15TQ)|| ((BS1) == CAN_BS1_16TQ)) |
| 798 | #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U) |
798 | #define IS_CAN_BS2(BS2) (((BS2) == CAN_BS2_1TQ) || ((BS2) == CAN_BS2_2TQ) || \ |
| 799 | #endif |
799 | ((BS2) == CAN_BS2_3TQ) || ((BS2) == CAN_BS2_4TQ) || \ |
| 800 | #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U) |
800 | ((BS2) == CAN_BS2_5TQ) || ((BS2) == CAN_BS2_6TQ) || \ |
| 801 | #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ |
801 | ((BS2) == CAN_BS2_7TQ) || ((BS2) == CAN_BS2_8TQ)) |
| 802 | ((MODE) == CAN_FILTERMODE_IDLIST)) |
802 | #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U)) |
| 803 | #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ |
803 | #define IS_CAN_FILTER_ID_HALFWORD(HALFWORD) ((HALFWORD) <= 0xFFFFU) |
| 804 | ((SCALE) == CAN_FILTERSCALE_32BIT)) |
804 | #if defined(CAN2) |
| 805 | #define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \ |
805 | #define IS_CAN_FILTER_BANK_DUAL(BANK) ((BANK) <= 27U) |
| 806 | ((ACTIVATION) == CAN_FILTER_ENABLE)) |
806 | #endif |
| 807 | #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ |
807 | #define IS_CAN_FILTER_BANK_SINGLE(BANK) ((BANK) <= 13U) |
| 808 | ((FIFO) == CAN_FILTER_FIFO1)) |
808 | #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ |
| 809 | #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \ |
809 | ((MODE) == CAN_FILTERMODE_IDLIST)) |
| 810 | ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \ |
810 | #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ |
| 811 | ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 )) |
811 | ((SCALE) == CAN_FILTERSCALE_32BIT)) |
| 812 | #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | CAN_TX_MAILBOX2)) |
812 | #define IS_CAN_FILTER_ACTIVATION(ACTIVATION) (((ACTIVATION) == CAN_FILTER_DISABLE) || \ |
| 813 | #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU) |
813 | ((ACTIVATION) == CAN_FILTER_ENABLE)) |
| 814 | #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU) |
814 | #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ |
| 815 | #define IS_CAN_DLC(DLC) ((DLC) <= 8U) |
815 | ((FIFO) == CAN_FILTER_FIFO1)) |
| 816 | #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ |
816 | #define IS_CAN_TX_MAILBOX(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TX_MAILBOX0 ) || \ |
| 817 | ((IDTYPE) == CAN_ID_EXT)) |
817 | ((TRANSMITMAILBOX) == CAN_TX_MAILBOX1 ) || \ |
| 818 | #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) |
818 | ((TRANSMITMAILBOX) == CAN_TX_MAILBOX2 )) |
| 819 | #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1)) |
819 | #define IS_CAN_TX_MAILBOX_LIST(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= (CAN_TX_MAILBOX0 | CAN_TX_MAILBOX1 | \ |
| 820 | #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \ |
820 | CAN_TX_MAILBOX2)) |
| 821 | CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \ |
821 | #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU) |
| 822 | CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \ |
822 | #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU) |
| 823 | CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \ |
823 | #define IS_CAN_DLC(DLC) ((DLC) <= 8U) |
| 824 | CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \ |
824 | #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ |
| 825 | CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \ |
825 | ((IDTYPE) == CAN_ID_EXT)) |
| 826 | CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR)) |
826 | #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) |
| 827 | 827 | #define IS_CAN_RX_FIFO(FIFO) (((FIFO) == CAN_RX_FIFO0) || ((FIFO) == CAN_RX_FIFO1)) |
|
| 828 | /** |
828 | #define IS_CAN_IT(IT) ((IT) <= (CAN_IT_TX_MAILBOX_EMPTY | CAN_IT_RX_FIFO0_MSG_PENDING | \ |
| 829 | * @} |
829 | CAN_IT_RX_FIFO0_FULL | CAN_IT_RX_FIFO0_OVERRUN | \ |
| 830 | */ |
830 | CAN_IT_RX_FIFO1_MSG_PENDING | CAN_IT_RX_FIFO1_FULL | \ |
| 831 | /* End of private macros -----------------------------------------------------*/ |
831 | CAN_IT_RX_FIFO1_OVERRUN | CAN_IT_WAKEUP | \ |
| 832 | 832 | CAN_IT_SLEEP_ACK | CAN_IT_ERROR_WARNING | \ |
|
| 833 | /** |
833 | CAN_IT_ERROR_PASSIVE | CAN_IT_BUSOFF | \ |
| 834 | * @} |
834 | CAN_IT_LAST_ERROR_CODE | CAN_IT_ERROR)) |
| 835 | */ |
835 | |
| 836 | 836 | /** |
|
| 837 | 837 | * @} |
|
| 838 | #endif /* CAN1 */ |
838 | */ |
| 839 | /** |
839 | /* End of private macros -----------------------------------------------------*/ |
| 840 | * @} |
840 | |
| 841 | */ |
841 | /** |
| 842 | 842 | * @} |
|
| 843 | #ifdef __cplusplus |
843 | */ |
| 844 | } |
844 | |
| 845 | #endif |
845 | |
| 846 | 846 | #endif /* CAN1 */ |
|
| 847 | #endif /* STM32F1xx_HAL_CAN_H */ |
847 | /** |
| 848 | 848 | * @} |
|
| 849 | 849 | */ |
|
| 850 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
850 | |
| - | 851 | #ifdef __cplusplus |
|
| - | 852 | } |
|
| - | 853 | #endif |
|
| - | 854 | ||
| - | 855 | #endif /* STM32F1xx_HAL_CAN_H */ |
|