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/**
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/**
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  ******************************************************************************
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  ******************************************************************************
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  * @file    stm32f1xx_hal_adc_ex.h
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  * @file    stm32f1xx_hal_adc_ex.h
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  * @author  MCD Application Team
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  * @author  MCD Application Team
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  * @brief   Header file of ADC HAL extension module.
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  * @brief   Header file of ADC HAL extension module.
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  ******************************************************************************
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  ******************************************************************************
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  * @attention
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  * @attention
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  *
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  *
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  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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  * Copyright (c) 2016 STMicroelectronics.
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  * All rights reserved.</center></h2>
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  * All rights reserved.
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  *
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  *
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  * This software component is licensed by ST under BSD 3-Clause license,
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  * This software is licensed under terms that can be found in the LICENSE file
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  * the "License"; You may not use this file except in compliance with the
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  * in the root directory of this software component.
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  * License. You may obtain a copy of the License at:
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  * If no LICENSE file comes with this software, it is provided AS-IS.
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  *                        opensource.org/licenses/BSD-3-Clause
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  *
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  *
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  ******************************************************************************
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  ******************************************************************************
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  */
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  */
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/* Define to prevent recursive inclusion -------------------------------------*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_HAL_ADC_EX_H
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#ifndef __STM32F1xx_HAL_ADC_EX_H
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#define __STM32F1xx_HAL_ADC_EX_H
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#define __STM32F1xx_HAL_ADC_EX_H
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23 
 
 23 
#ifdef __cplusplus
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#ifdef __cplusplus
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 extern "C" {
25 
 extern "C" {
 25 
#endif
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#endif
 26 
 
27 
 
 27 
/* Includes ------------------------------------------------------------------*/
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/* Includes ------------------------------------------------------------------*/
 28 
#include "stm32f1xx_hal_def.h"  
29 
#include "stm32f1xx_hal_def.h"  
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30 
 
 30 
/** @addtogroup STM32F1xx_HAL_Driver
31 
/** @addtogroup STM32F1xx_HAL_Driver
 31 
  * @{
32 
  * @{
 32 
  */
33 
  */
 33 
 
34 
 
 34 
/** @addtogroup ADCEx
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/** @addtogroup ADCEx
 35 
  * @{
36 
  * @{
 36 
  */
37 
  */
 37 
 
38 
 
 38 
/* Exported types ------------------------------------------------------------*/
39 
/* Exported types ------------------------------------------------------------*/
 39 
/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
40 
/** @defgroup ADCEx_Exported_Types ADCEx Exported Types
 40 
  * @{
41 
  * @{
 41 
  */
42 
  */
 42 
 
43 
 
 43 
/**
44 
/**
 44 
  * @brief  ADC Configuration injected Channel structure definition
45 
  * @brief  ADC Configuration injected Channel structure definition
 45 
  * @note   Parameters of this structure are shared within 2 scopes:
46 
  * @note   Parameters of this structure are shared within 2 scopes:
 46 
  *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
47 
  *          - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
 47 
  *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
48 
  *          - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
 48 
  *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
49 
  *            AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
 49 
  * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
50 
  * @note   The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
 50 
  *         ADC state can be either:
51 
  *         ADC state can be either:
 51 
  *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
52 
  *          - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv')
 52 
  *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
53 
  *          - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group.
 53 
  */
54 
  */
 54 
typedef struct
55 
typedef struct
 55 
{
56 
{
 56 
  uint32_t InjectedChannel;                       /*!< Selection of ADC channel to configure
57 
  uint32_t InjectedChannel;                       /*!< Selection of ADC channel to configure
 57 
                                                       This parameter can be a value of @ref ADC_channels
58 
                                                       This parameter can be a value of @ref ADC_channels
 58 
                                                       Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
59 
                                                       Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
 59 
                                                       Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
60 
                                                       Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor)
 60 
                                                       Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
61 
                                                       Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger.
 61 
                                                             It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
62 
                                                             It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel.
 62 
                                                             Refer to errata sheet of these devices for more details. */
63 
                                                             Refer to errata sheet of these devices for more details. */
 63 
  uint32_t InjectedRank;                          /*!< Rank in the injected group sequencer
64 
  uint32_t InjectedRank;                          /*!< Rank in the injected group sequencer
 64 
                                                       This parameter must be a value of @ref ADCEx_injected_rank
65 
                                                       This parameter must be a value of @ref ADCEx_injected_rank
 65 
                                                       Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
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                                                       Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
 66 
  uint32_t InjectedSamplingTime;                  /*!< Sampling time value to be set for the selected channel.
67 
  uint32_t InjectedSamplingTime;                  /*!< Sampling time value to be set for the selected channel.
 67 
                                                       Unit: ADC clock cycles
68 
                                                       Unit: ADC clock cycles
 68 
                                                       Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
69 
                                                       Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits).
 69 
                                                       This parameter can be a value of @ref ADC_sampling_times
70 
                                                       This parameter can be a value of @ref ADC_sampling_times
 70 
                                                       Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
71 
                                                       Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
 71 
                                                                If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
72 
                                                                If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
 72 
                                                       Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
73 
                                                       Note: In case of usage of internal measurement channels (VrefInt/TempSensor),
 73 
                                                             sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
74 
                                                             sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
 74 
                                                             Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
75 
                                                             Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */
 75 
  uint32_t InjectedOffset;                        /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
76 
  uint32_t InjectedOffset;                        /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
 76 
                                                       Offset value must be a positive number.
77 
                                                       Offset value must be a positive number.
 77 
                                                       Depending of ADC resolution selected (12, 10, 8 or 6 bits),
78 
                                                       Depending of ADC resolution selected (12, 10, 8 or 6 bits),
 78 
                                                       this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
79 
                                                       this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
 79 
  uint32_t InjectedNbrOfConversion;               /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
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  uint32_t InjectedNbrOfConversion;               /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
 80 
                                                       To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
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                                                       To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
 81 
                                                       This parameter must be a number between Min_Data = 1 and Max_Data = 4.
82 
                                                       This parameter must be a number between Min_Data = 1 and Max_Data = 4.
 82 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
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                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 83 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
84 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
 84 
  FunctionalState InjectedDiscontinuousConvMode;  /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
85 
  FunctionalState InjectedDiscontinuousConvMode;  /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
 85 
                                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
86 
                                                       Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
 86 
                                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
87 
                                                       Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
 87 
                                                       This parameter can be set to ENABLE or DISABLE.
88 
                                                       This parameter can be set to ENABLE or DISABLE.
 88 
                                                       Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
89 
                                                       Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
 89 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
90 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 90 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
91 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
 91 
  FunctionalState AutoInjectedConv;               /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
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  FunctionalState AutoInjectedConv;               /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
 92 
                                                       This parameter can be set to ENABLE or DISABLE.
93 
                                                       This parameter can be set to ENABLE or DISABLE.
 93 
                                                       Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
94 
                                                       Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
 94 
                                                       Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
95 
                                                       Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
 95 
                                                       Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
96 
                                                       Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
 96 
                                                             To maintain JAUTO always enabled, DMA must be configured in circular mode.
97 
                                                             To maintain JAUTO always enabled, DMA must be configured in circular mode.
 97 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
98 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 98 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
99 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
 99 
  uint32_t ExternalTrigInjecConv;                 /*!< Selects the external event used to trigger the conversion start of injected group.
100 
  uint32_t ExternalTrigInjecConv;                 /*!< Selects the external event used to trigger the conversion start of injected group.
 100 
                                                       If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
101 
                                                       If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
 101 
                                                       If set to external trigger source, triggering is on event rising edge.
102 
                                                       If set to external trigger source, triggering is on event rising edge.
 102 
                                                       This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
103 
                                                       This parameter can be a value of @ref ADCEx_External_trigger_source_Injected
 103 
                                                       Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
104 
                                                       Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
 104 
                                                             If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
105 
                                                             If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
 105 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
106 
                                                       Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
 106 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
107 
                                                                configure a channel on injected group can impact the configuration of other channels previously set. */
 107 
}ADC_InjectionConfTypeDef;
108 
}ADC_InjectionConfTypeDef;
 108 
 
109 
 
 109 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
110 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 110 
/**
111 
/**
 111 
  * @brief  Structure definition of ADC multimode
112 
  * @brief  Structure definition of ADC multimode
 112 
  * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
113 
  * @note   The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group).
 113 
  *         State of ADCs of the common group must be: disabled.
114 
  *         State of ADCs of the common group must be: disabled.
 114 
  */
115 
  */
 115 
typedef struct
116 
typedef struct
 116 
{
117 
{
 117 
  uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode.
118 
  uint32_t Mode;              /*!< Configures the ADC to operate in independent or multi mode.
 118 
                                   This parameter can be a value of @ref ADCEx_Common_mode
119 
                                   This parameter can be a value of @ref ADCEx_Common_mode
 119 
                                   Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
120 
                                   Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change.
 120 
                                   Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
121 
                                   Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2.
 121 
                                   Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
122 
                                   Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode.
 122 
                                   Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
123 
                                   Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters).
 123 
                                         The equivalences are:
124 
                                         The equivalences are:
 124 
                                           - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
125 
                                           - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'.
 125 
                                           - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
126 
                                           - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */
 126 
 
127 
 
 127 
 
128 
 
 128 
}ADC_MultiModeTypeDef;                                                          
129 
}ADC_MultiModeTypeDef;                                                          
 129 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
130 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 130 
 
131 
 
 131 
/**
132 
/**
 132 
  * @}
133 
  * @}
 133 
  */
134 
  */
 134 
 
135 
 
 135 
 
136 
 
 136 
/* Exported constants --------------------------------------------------------*/
137 
/* Exported constants --------------------------------------------------------*/
 137 
   
138 
   
 138 
/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
139 
/** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants
 139 
  * @{
140 
  * @{
 140 
  */
141 
  */
 141 
 
142 
 
 142 
/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
143 
/** @defgroup ADCEx_injected_rank ADCEx rank into injected group
 143 
  * @{
144 
  * @{
 144 
  */
145 
  */
 145 
#define ADC_INJECTED_RANK_1                           0x00000001U
146 
#define ADC_INJECTED_RANK_1                           0x00000001U
 146 
#define ADC_INJECTED_RANK_2                           0x00000002U
147 
#define ADC_INJECTED_RANK_2                           0x00000002U
 147 
#define ADC_INJECTED_RANK_3                           0x00000003U
148 
#define ADC_INJECTED_RANK_3                           0x00000003U
 148 
#define ADC_INJECTED_RANK_4                           0x00000004U
149 
#define ADC_INJECTED_RANK_4                           0x00000004U
 149 
/**
150 
/**
 150 
  * @}
151 
  * @}
 151 
  */
152 
  */
 152 
 
153 
 
 153 
/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
154 
/** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group
 154 
  * @{
155 
  * @{
 155 
  */
156 
  */
 156 
#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           0x00000000U
157 
#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE           0x00000000U
 157 
#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
158 
#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING         ((uint32_t)ADC_CR2_JEXTTRIG)
 158 
/**
159 
/**
 159 
  * @}
160 
  * @}
 160 
  */
161 
  */
 161 
   
162 
   
 162 
/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
163 
/** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group
 163 
  * @{
164 
  * @{
 164 
  */
165 
  */
 165 
/*!< List of external triggers with generic trigger name, independently of    */
166 
/*!< List of external triggers with generic trigger name, independently of    */
 166 
/* ADC target, sorted by trigger name:                                        */
167 
/* ADC target, sorted by trigger name:                                        */
 167 
 
168 
 
 168 
/*!< External triggers of regular group for ADC1&ADC2 only */
169 
/*!< External triggers of regular group for ADC1&ADC2 only */
 169 
#define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
170 
#define ADC_EXTERNALTRIGCONV_T1_CC1         ADC1_2_EXTERNALTRIG_T1_CC1
 170 
#define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
171 
#define ADC_EXTERNALTRIGCONV_T1_CC2         ADC1_2_EXTERNALTRIG_T1_CC2
 171 
#define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
172 
#define ADC_EXTERNALTRIGCONV_T2_CC2         ADC1_2_EXTERNALTRIG_T2_CC2
 172 
#define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
173 
#define ADC_EXTERNALTRIGCONV_T3_TRGO        ADC1_2_EXTERNALTRIG_T3_TRGO
 173 
#define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
174 
#define ADC_EXTERNALTRIGCONV_T4_CC4         ADC1_2_EXTERNALTRIG_T4_CC4
 174 
#define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
175 
#define ADC_EXTERNALTRIGCONV_EXT_IT11       ADC1_2_EXTERNALTRIG_EXT_IT11
 175 
 
176 
 
 176 
#if defined (STM32F103xE) || defined (STM32F103xG)
177 
#if defined (STM32F103xE) || defined (STM32F103xG)
 177 
/*!< External triggers of regular group for ADC3 only */
178 
/*!< External triggers of regular group for ADC3 only */
 178 
#define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
179 
#define ADC_EXTERNALTRIGCONV_T2_CC3         ADC3_EXTERNALTRIG_T2_CC3
 179 
#define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
180 
#define ADC_EXTERNALTRIGCONV_T3_CC1         ADC3_EXTERNALTRIG_T3_CC1
 180 
#define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
181 
#define ADC_EXTERNALTRIGCONV_T5_CC1         ADC3_EXTERNALTRIG_T5_CC1
 181 
#define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
182 
#define ADC_EXTERNALTRIGCONV_T5_CC3         ADC3_EXTERNALTRIG_T5_CC3
 182 
#define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
183 
#define ADC_EXTERNALTRIGCONV_T8_CC1         ADC3_EXTERNALTRIG_T8_CC1
 183 
#endif /* STM32F103xE || defined STM32F103xG */
184 
#endif /* STM32F103xE || defined STM32F103xG */
 184 
 
185 
 
 185 
/*!< External triggers of regular group for all ADC instances */
186 
/*!< External triggers of regular group for all ADC instances */
 186 
#define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
187 
#define ADC_EXTERNALTRIGCONV_T1_CC3         ADC1_2_3_EXTERNALTRIG_T1_CC3
 187 
 
188 
 
 188 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
189 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
 189 
/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
190 
/*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and   */
 190 
/*         XL-density devices.                                                */
191 
/*         XL-density devices.                                                */
 191 
/*         To use it on ADC or ADC2, a remap of trigger must be done from     */
192 
/*         To use it on ADC or ADC2, a remap of trigger must be done from     */
 192 
/*         EXTI line 11 to TIM8_TRGO with macro:                              */
193 
/*         EXTI line 11 to TIM8_TRGO with macro:                              */
 193 
/*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
194 
/*           __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE()                           */
 194 
/*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
195 
/*           __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE()                           */
 195 
 
196 
 
 196 
/* Note for internal constant value management: If TIM8_TRGO is available,    */
197 
/* Note for internal constant value management: If TIM8_TRGO is available,    */
 197 
/* its definition is set to value for ADC1&ADC2 by default and changed to     */
198 
/* its definition is set to value for ADC1&ADC2 by default and changed to     */
 198 
/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
199 
/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
 199 
#define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
200 
#define ADC_EXTERNALTRIGCONV_T8_TRGO        ADC1_2_EXTERNALTRIG_T8_TRGO
 200 
#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
201 
#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
 201 
 
202 
 
 202 
#define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
203 
#define ADC_SOFTWARE_START                  ADC1_2_3_SWSTART
 203 
/**
204 
/**
 204 
  * @}
205 
  * @}
 205 
  */
206 
  */
 206 
 
207 
 
 207 
/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
208 
/** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group
 208 
  * @{
209 
  * @{
 209 
  */
210 
  */
 210 
/*!< List of external triggers with generic trigger name, independently of    */
211 
/*!< List of external triggers with generic trigger name, independently of    */
 211 
/* ADC target, sorted by trigger name:                                        */
212 
/* ADC target, sorted by trigger name:                                        */
 212 
 
213 
 
 213 
/*!< External triggers of injected group for ADC1&ADC2 only */
214 
/*!< External triggers of injected group for ADC1&ADC2 only */
 214 
#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
215 
#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO        ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
 215 
#define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
216 
#define ADC_EXTERNALTRIGINJECCONV_T2_CC1         ADC1_2_EXTERNALTRIGINJEC_T2_CC1
 216 
#define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
217 
#define ADC_EXTERNALTRIGINJECCONV_T3_CC4         ADC1_2_EXTERNALTRIGINJEC_T3_CC4
 217 
#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
218 
#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO        ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
218 
#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
219 
#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15       ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
 219 
 
220 
 
 220 
#if defined (STM32F103xE) || defined (STM32F103xG)
221 
#if defined (STM32F103xE) || defined (STM32F103xG)
 221 
/*!< External triggers of injected group for ADC3 only */
222 
/*!< External triggers of injected group for ADC3 only */
 222 
#define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
223 
#define ADC_EXTERNALTRIGINJECCONV_T4_CC3         ADC3_EXTERNALTRIGINJEC_T4_CC3
 223 
#define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
224 
#define ADC_EXTERNALTRIGINJECCONV_T8_CC2         ADC3_EXTERNALTRIGINJEC_T8_CC2
 224 
#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
225 
#define ADC_EXTERNALTRIGINJECCONV_T5_TRGO        ADC3_EXTERNALTRIGINJEC_T5_TRGO
 225 
#define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
226 
#define ADC_EXTERNALTRIGINJECCONV_T5_CC4         ADC3_EXTERNALTRIGINJEC_T5_CC4
 226 
#endif /* STM32F103xE || defined STM32F103xG */
227 
#endif /* STM32F103xE || defined STM32F103xG */
 227 
 
228 
 
 228 
/*!< External triggers of injected group for all ADC instances */
229 
/*!< External triggers of injected group for all ADC instances */
 229 
#define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
230 
#define ADC_EXTERNALTRIGINJECCONV_T1_CC4         ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4
 230 
#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
231 
#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO        ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO
 231 
 
232 
 
 232 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
233 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC)
 233 
/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
234 
/*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and    */
 234 
/*         XL-density devices.                                                */
235 
/*         XL-density devices.                                                */
 235 
/*         To use it on ADC1 or ADC2, a remap of trigger must be done from    */
236 
/*         To use it on ADC1 or ADC2, a remap of trigger must be done from    */
 236 
/*         EXTI line 11 to TIM8_CC4 with macro:                               */
237 
/*         EXTI line 11 to TIM8_CC4 with macro:                               */
 237 
/*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
238 
/*           __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE()                           */
 238 
/*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
239 
/*           __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE()                           */
 239 
 
240 
 
 240 
/* Note for internal constant value management: If TIM8_CC4 is available,     */
241 
/* Note for internal constant value management: If TIM8_CC4 is available,     */
 241 
/* its definition is set to value for ADC1&ADC2 by default and changed to     */
242 
/* its definition is set to value for ADC1&ADC2 by default and changed to     */
 242 
/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
243 
/* value for ADC3 by HAL ADC driver if ADC3 is selected.                      */
 243 
#define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
244 
#define ADC_EXTERNALTRIGINJECCONV_T8_CC4         ADC1_2_EXTERNALTRIGINJEC_T8_CC4
 244 
#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
245 
#endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
 245 
 
246 
 
 246 
#define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
247 
#define ADC_INJECTED_SOFTWARE_START              ADC1_2_3_JSWSTART
 247 
/**
248 
/**
 248 
  * @}
249 
  * @}
 249 
  */
250 
  */
 250 
 
251 
 
 251 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
252 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 252 
/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
253 
/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode
 253 
  * @{
254 
  * @{
 254 
  */
255 
  */
 255 
#define ADC_MODE_INDEPENDENT                              0x00000000U                                                                     /*!< ADC dual mode disabled (ADC independent mode) */
256 
#define ADC_MODE_INDEPENDENT                              0x00000000U                                                                     /*!< ADC dual mode disabled (ADC independent mode) */
 256 
#define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
257 
#define ADC_DUALMODE_REGSIMULT_INJECSIMULT    ((uint32_t)(                                                            ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */
 257 
#define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
258 
#define ADC_DUALMODE_REGSIMULT_ALTERTRIG      ((uint32_t)(                                        ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */
 258 
#define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
259 
#define ADC_DUALMODE_INJECSIMULT_INTERLFAST   ((uint32_t)(                                        ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 259 
#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
260 
#define ADC_DUALMODE_INJECSIMULT_INTERLSLOW   ((uint32_t)(                    ADC_CR1_DUALMOD_2                                        )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 260 
#define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
261 
#define ADC_DUALMODE_INJECSIMULT              ((uint32_t)(                    ADC_CR1_DUALMOD_2 |                     ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */
 261 
#define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
262 
#define ADC_DUALMODE_REGSIMULT                ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1                    )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */
 262 
#define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
263 
#define ADC_DUALMODE_INTERLFAST               ((uint32_t)(                    ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 263 
#define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
264 
#define ADC_DUALMODE_INTERLSLOW               ((uint32_t)(ADC_CR1_DUALMOD_3                                                            )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */
 264 
#define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
265 
#define ADC_DUALMODE_ALTERTRIG                ((uint32_t)(ADC_CR1_DUALMOD_3 |                                         ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */
 265 
/**
266 
/**
 266 
  * @}
267 
  * @}
 267 
  */
268 
  */
 268 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
269 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 269 
 
270 
 
 270 
/**
271 
/**
 271 
  * @}
272 
  * @}
 272 
  */
273 
  */
 273 
 
274 
 
 274 
 
275 
 
 275 
/* Private constants ---------------------------------------------------------*/
276 
/* Private constants ---------------------------------------------------------*/
 276 
 
277 
 
 277 
/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
278 
/** @addtogroup ADCEx_Private_Constants ADCEx Private Constants
 278 
  * @{
279 
  * @{
 279 
  */
280 
  */
 280 
 
281 
 
 281 
/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
282 
/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group
 282 
  * @{
283 
  * @{
 283 
  */
284 
  */
 284 
/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
285 
/* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC    */
 285 
/* instance is available on the selected device).                             */
286 
/* instance is available on the selected device).                             */
 286 
/* (used internally by HAL driver. To not use into HAL structure parameters)  */
287 
/* (used internally by HAL driver. To not use into HAL structure parameters)  */
 287 
 
288 
 
 288 
/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
289 
/* External triggers of regular group for ADC1&ADC2 (if ADCx available) */
 289 
#define ADC1_2_EXTERNALTRIG_T1_CC1                       0x00000000U
290 
#define ADC1_2_EXTERNALTRIG_T1_CC1                       0x00000000U
 290 
#define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
291 
#define ADC1_2_EXTERNALTRIG_T1_CC2           ((uint32_t)(                                      ADC_CR2_EXTSEL_0))
 291 
#define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
292 
#define ADC1_2_EXTERNALTRIG_T2_CC2           ((uint32_t)(                   ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
 292 
#define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
293 
#define ADC1_2_EXTERNALTRIG_T3_TRGO          ((uint32_t)(ADC_CR2_EXTSEL_2                                      ))
 293 
#define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
294 
#define ADC1_2_EXTERNALTRIG_T4_CC4           ((uint32_t)(ADC_CR2_EXTSEL_2 |                    ADC_CR2_EXTSEL_0))
 294 
#define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
295 
#define ADC1_2_EXTERNALTRIG_EXT_IT11         ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1                   ))
 295 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
296 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
 296 
/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
297 
/* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and     */
 297 
/* XL-density devices.                                                        */
298 
/* XL-density devices.                                                        */
 298 
#define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
299 
#define ADC1_2_EXTERNALTRIG_T8_TRGO          ADC1_2_EXTERNALTRIG_EXT_IT11
 299 
#endif
300 
#endif
 300 
 
301 
 
 301 
#if defined (STM32F103xE) || defined (STM32F103xG)
302 
#if defined (STM32F103xE) || defined (STM32F103xG)
 302 
/* External triggers of regular group for ADC3 */
303 
/* External triggers of regular group for ADC3 */
 303 
#define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
304 
#define ADC3_EXTERNALTRIG_T3_CC1             ADC1_2_EXTERNALTRIG_T1_CC1
 304 
#define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
305 
#define ADC3_EXTERNALTRIG_T2_CC3             ADC1_2_EXTERNALTRIG_T1_CC2
 305 
#define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
306 
#define ADC3_EXTERNALTRIG_T8_CC1             ADC1_2_EXTERNALTRIG_T2_CC2
 306 
#define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
307 
#define ADC3_EXTERNALTRIG_T8_TRGO            ADC1_2_EXTERNALTRIG_T3_TRGO
 307 
#define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
308 
#define ADC3_EXTERNALTRIG_T5_CC1             ADC1_2_EXTERNALTRIG_T4_CC4
 308 
#define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
309 
#define ADC3_EXTERNALTRIG_T5_CC3             ADC1_2_EXTERNALTRIG_EXT_IT11
 309 
#endif
310 
#endif
 310 
 
311 
 
 311 
/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
312 
/* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */
 312 
#define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
313 
#define ADC1_2_3_EXTERNALTRIG_T1_CC3         ((uint32_t)(                   ADC_CR2_EXTSEL_1                   ))
 313 
#define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
314 
#define ADC1_2_3_SWSTART                     ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
 314 
/**
315 
/**
 315 
  * @}
316 
  * @}
 316 
  */
317 
  */
 317 
 
318 
 
 318 
/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
319 
/** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group
 319 
  * @{
320 
  * @{
 320 
  */
321 
  */
 321 
/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
322 
/* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC    */
 322 
/* instance is available on the selected device).                             */
323 
/* instance is available on the selected device).                             */
 323 
/* (used internally by HAL driver. To not use into HAL structure parameters)  */
324 
/* (used internally by HAL driver. To not use into HAL structure parameters)  */
 324 
 
325 
 
 325 
/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
326 
/* External triggers of injected group for ADC1&ADC2 (if ADCx available) */
 326 
#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
327 
#define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO          ((uint32_t)(                    ADC_CR2_JEXTSEL_1                    ))
 327 
#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
328 
#define ADC1_2_EXTERNALTRIGINJEC_T2_CC1           ((uint32_t)(                    ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 328 
#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
329 
#define ADC1_2_EXTERNALTRIGINJEC_T3_CC4           ((uint32_t)(ADC_CR2_JEXTSEL_2                                        ))
 329 
#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
330 
#define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO          ((uint32_t)(ADC_CR2_JEXTSEL_2 |                     ADC_CR2_JEXTSEL_0))
 330 
#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
331 
#define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1                    ))
 331 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
332 
#if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG)
 332 
/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
333 
/* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and      */
 333 
/* XL-density devices.                                                        */
334 
/* XL-density devices.                                                        */
 334 
#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
335 
#define ADC1_2_EXTERNALTRIGINJEC_T8_CC4           ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
 335 
#endif
336 
#endif
 336 
 
337 
 
 337 
#if defined (STM32F103xE) || defined (STM32F103xG)
338 
#if defined (STM32F103xE) || defined (STM32F103xG)
 338 
/* External triggers of injected group for ADC3 */
339 
/* External triggers of injected group for ADC3 */
 339 
#define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
340 
#define ADC3_EXTERNALTRIGINJEC_T4_CC3             ADC1_2_EXTERNALTRIGINJEC_T2_TRGO
 340 
#define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
341 
#define ADC3_EXTERNALTRIGINJEC_T8_CC2             ADC1_2_EXTERNALTRIGINJEC_T2_CC1
 341 
#define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
342 
#define ADC3_EXTERNALTRIGINJEC_T8_CC4             ADC1_2_EXTERNALTRIGINJEC_T3_CC4
 342 
#define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
343 
#define ADC3_EXTERNALTRIGINJEC_T5_TRGO            ADC1_2_EXTERNALTRIGINJEC_T4_TRGO
 343 
#define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
344 
#define ADC3_EXTERNALTRIGINJEC_T5_CC4             ADC1_2_EXTERNALTRIGINJEC_EXT_IT15
 344 
#endif /* STM32F103xE || defined STM32F103xG */
345 
#endif /* STM32F103xE || defined STM32F103xG */
 345 
 
346 
 
 346 
/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
347 
/* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */
 347 
#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO                    0x00000000U
348 
#define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO                    0x00000000U
 348 
#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
349 
#define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4         ((uint32_t)(                                        ADC_CR2_JEXTSEL_0))
 349 
#define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
350 
#define ADC1_2_3_JSWSTART                         ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
 350 
/**
351 
/**
 351 
  * @}
352 
  * @}
 352 
  */
353 
  */
 353 
 
354 
 
 354 
/**
355 
/**
 355 
  * @}
356 
  * @}
 356 
  */
357 
  */
 357 
 
358 
 
 358 
 
359 
 
 359 
/* Exported macro ------------------------------------------------------------*/
360 
/* Exported macro ------------------------------------------------------------*/
 360 
 
361 
 
 361 
/* Private macro -------------------------------------------------------------*/
362 
/* Private macro -------------------------------------------------------------*/
 362 
 
363 
 
 363 
/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
364 
/** @defgroup ADCEx_Private_Macro ADCEx Private Macro
 364 
  * @{
365 
  * @{
 365 
  */
366 
  */
 366 
/* Macro reserved for internal HAL driver usage, not intended to be used in   */
367 
/* Macro reserved for internal HAL driver usage, not intended to be used in   */
 367 
/* code of final user.                                                        */
368 
/* code of final user.                                                        */
 368 
 
369 
 
 369 
   
370 
   
 370 
/**
371 
/**
 371 
  * @brief For devices with 3 ADCs: Defines the external trigger source
372 
  * @brief For devices with 3 ADCs: Defines the external trigger source
 372 
  *        for regular group according to ADC into common group ADC1&ADC2 or
373 
  *        for regular group according to ADC into common group ADC1&ADC2 or
 373 
  *        ADC3 (some triggers with same source have different value to
374 
  *        ADC3 (some triggers with same source have different value to
 374 
  *        be programmed into ADC EXTSEL bits of CR2 register).
375 
  *        be programmed into ADC EXTSEL bits of CR2 register).
 375 
  *        For devices with 2 ADCs or less: this macro makes no change.
376 
  *        For devices with 2 ADCs or less: this macro makes no change.
 376 
  * @param __HANDLE__: ADC handle
377 
  * @param __HANDLE__: ADC handle
 377 
  * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
378 
  * @param __EXT_TRIG_CONV__: External trigger selected for regular group.
 378 
  * @retval External trigger to be programmed into EXTSEL bits of CR2 register
379 
  * @retval External trigger to be programmed into EXTSEL bits of CR2 register
 379 
  */
380 
  */
 380 
#if defined (STM32F103xE) || defined (STM32F103xG)
381 
#if defined (STM32F103xE) || defined (STM32F103xG)
 381 
#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
382 
#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
 382 
 (( (((__HANDLE__)->Instance) == ADC3)                                         \
383 
 (( (((__HANDLE__)->Instance) == ADC3)                                         \
 383 
  )?                                                                           \
384 
  )?                                                                           \
 384 
   ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
385 
   ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO                     \
 385 
     )?                                                                        \
386 
     )?                                                                        \
 386 
      (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
387 
      (ADC3_EXTERNALTRIG_T8_TRGO)                                              \
 387 
      :                                                                        \
388 
      :                                                                        \
 388 
      (__EXT_TRIG_CONV__)                                                      \
389 
      (__EXT_TRIG_CONV__)                                                      \
 389 
   )                                                                           \
390 
   )                                                                           \
 390 
   :                                                                           \
391 
   :                                                                           \
 391 
   (__EXT_TRIG_CONV__)                                                         \
392 
   (__EXT_TRIG_CONV__)                                                         \
 392 
 )
393 
 )
 393 
#else
394 
#else
 394 
#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
395 
#define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__)                         \
 395 
  (__EXT_TRIG_CONV__)
396 
  (__EXT_TRIG_CONV__)
 396 
#endif /* STM32F103xE || STM32F103xG */
397 
#endif /* STM32F103xE || STM32F103xG */
 397 
 
398 
 
 398 
/**
399 
/**
 399 
  * @brief For devices with 3 ADCs: Defines the external trigger source
400 
  * @brief For devices with 3 ADCs: Defines the external trigger source
 400 
  *        for injected group according to ADC into common group ADC1&ADC2 or
401 
  *        for injected group according to ADC into common group ADC1&ADC2 or
 401 
  *        ADC3 (some triggers with same source have different value to
402 
  *        ADC3 (some triggers with same source have different value to
 402 
  *        be programmed into ADC JEXTSEL bits of CR2 register).
403 
  *        be programmed into ADC JEXTSEL bits of CR2 register).
 403 
  *        For devices with 2 ADCs or less: this macro makes no change.
404 
  *        For devices with 2 ADCs or less: this macro makes no change.
 404 
  * @param __HANDLE__: ADC handle
405 
  * @param __HANDLE__: ADC handle
 405 
  * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
406 
  * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group.
 406 
  * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
407 
  * @retval External trigger to be programmed into JEXTSEL bits of CR2 register
 407 
  */
408 
  */
 408 
#if defined (STM32F103xE) || defined (STM32F103xG)
409 
#if defined (STM32F103xE) || defined (STM32F103xG)
 409 
#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
410 
#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
 410 
 (( (((__HANDLE__)->Instance) == ADC3)                                         \
411 
 (( (((__HANDLE__)->Instance) == ADC3)                                         \
 411 
  )?                                                                           \
412 
  )?                                                                           \
 412 
   ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
413 
   ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4           \
 413 
     )?                                                                        \
414 
     )?                                                                        \
 414 
      (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
415 
      (ADC3_EXTERNALTRIGINJEC_T8_CC4)                                          \
 415 
      :                                                                        \
416 
      :                                                                        \
 416 
      (__EXT_TRIG_INJECTCONV__)                                                \
417 
      (__EXT_TRIG_INJECTCONV__)                                                \
 417 
   )                                                                           \
418 
   )                                                                           \
 418 
   :                                                                           \
419 
   :                                                                           \
 419 
   (__EXT_TRIG_INJECTCONV__)                                                   \
420 
   (__EXT_TRIG_INJECTCONV__)                                                   \
 420 
 )
421 
 )
 421 
#else
422 
#else
 422 
#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
423 
#define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__)                  \
 423 
   (__EXT_TRIG_INJECTCONV__)
424 
   (__EXT_TRIG_INJECTCONV__)
 424 
#endif /* STM32F103xE || STM32F103xG */
425 
#endif /* STM32F103xE || STM32F103xG */
 425 
 
426 
 
 426 
 
427 
 
 427 
/**
428 
/**
 428 
  * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
429 
  * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs)
 429 
  * @param __HANDLE__: ADC handle
430 
  * @param __HANDLE__: ADC handle
 430 
  * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
431 
  * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled
 431 
  */
432 
  */
 432 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
433 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 433 
#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
434 
#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
 434 
 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
435 
 (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)   \
 435 
  )?                                                                           \
436 
  )?                                                                           \
 436 
   (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
437 
   (ADC1->CR1 & ADC_CR1_DUALMOD)                                               \
 437 
   :                                                                           \
438 
   :                                                                           \
 438 
   (RESET)                                                                     \
439 
   (RESET)                                                                     \
 439 
 )
440 
 )
 440 
#else
441 
#else
 441 
#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
442 
#define ADC_MULTIMODE_IS_ENABLE(__HANDLE__)                                    \
 442 
  (RESET)
443 
  (RESET)
 443 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
444 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 444 
 
445 
 
 445 
/**
446 
/**
 446 
  * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
447 
  * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs)
 447 
  * @param __HANDLE__: ADC handle
448 
  * @param __HANDLE__: ADC handle
 448 
  * @retval None
449 
  * @retval None
 449 
  */
450 
  */
 450 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
451 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 451 
#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
452 
#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
 452 
  (( (((__HANDLE__)->Instance) == ADC2)                                        \
453 
  (( (((__HANDLE__)->Instance) == ADC2)                                        \
 453 
   )?                                                                          \
454 
   )?                                                                          \
 454 
    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                   \
455 
    ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET)                                   \
 455 
    :                                                                          \
456 
    :                                                                          \
 456 
    (!RESET)                                                                   \
457 
    (!RESET)                                                                   \
 457 
  )
458 
  )
 458 
#else
459 
#else
 459 
#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
460 
#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)                        \
 460 
  (!RESET)
461 
  (!RESET)
 461 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
462 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 462 
 
463 
 
 463 
/**
464 
/**
 464 
  * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
465 
  * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs)
 465 
  * @param __HANDLE__: ADC handle
466 
  * @param __HANDLE__: ADC handle
 466 
  * @retval None
467 
  * @retval None
 467 
  */
468 
  */
 468 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
469 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 469 
#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
470 
#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
 470 
  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)  \
471 
  (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)  \
 471 
   )?                                                                          \
472 
   )?                                                                          \
 472 
    (ADC1->CR1 & ADC_CR1_JAUTO)                                                \
473 
    (ADC1->CR1 & ADC_CR1_JAUTO)                                                \
 473 
    :                                                                          \
474 
    :                                                                          \
 474 
    (RESET)                                                                    \
475 
    (RESET)                                                                    \
 475 
  )
476 
  )
 476 
#else
477 
#else
 477 
#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
478 
#define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__)                                \
 478 
  (RESET)
479 
  (RESET)
 479 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
480 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 480 
 
481 
 
 481 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
482 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 482 
/**
483 
/**
 483 
  * @brief Set handle of the other ADC sharing the common multimode settings
484 
  * @brief Set handle of the other ADC sharing the common multimode settings
 484 
  * @param __HANDLE__: ADC handle
485 
  * @param __HANDLE__: ADC handle
 485 
  * @param __HANDLE_OTHER_ADC__: other ADC handle
486 
  * @param __HANDLE_OTHER_ADC__: other ADC handle
 486 
  * @retval None
487 
  * @retval None
 487 
  */
488 
  */
 488 
#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
489 
#define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__)                 \
 489 
  ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
490 
  ((__HANDLE_OTHER_ADC__)->Instance = ADC2)
 490 
 
491 
 
 491 
/**
492 
/**
 492 
  * @brief Set handle of the ADC slave associated to the ADC master
493 
  * @brief Set handle of the ADC slave associated to the ADC master
 493 
  * On STM32F1 devices, ADC slave is always ADC2 (this can be different
494 
  * On STM32F1 devices, ADC slave is always ADC2 (this can be different
 494 
  * on other STM32 devices)
495 
  * on other STM32 devices)
 495 
  * @param __HANDLE_MASTER__: ADC master handle
496 
  * @param __HANDLE_MASTER__: ADC master handle
 496 
  * @param __HANDLE_SLAVE__: ADC slave handle
497 
  * @param __HANDLE_SLAVE__: ADC slave handle
 497 
  * @retval None
498 
  * @retval None
 498 
  */
499 
  */
 499 
#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
500 
#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)                   \
 500 
  ((__HANDLE_SLAVE__)->Instance = ADC2)
501 
  ((__HANDLE_SLAVE__)->Instance = ADC2)
 501 
       
502 
       
 502 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
503 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 503 
 
504 
 
 504 
#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
505 
#define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \
 505 
                                       ((CHANNEL) == ADC_INJECTED_RANK_2) || \
506 
                                       ((CHANNEL) == ADC_INJECTED_RANK_2) || \
 506 
                                       ((CHANNEL) == ADC_INJECTED_RANK_3) || \
507 
                                       ((CHANNEL) == ADC_INJECTED_RANK_3) || \
 507 
                                       ((CHANNEL) == ADC_INJECTED_RANK_4))
508 
                                       ((CHANNEL) == ADC_INJECTED_RANK_4))
 508 
 
509 
 
 509 
#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
510 
#define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)  || \
 510 
                                        ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
511 
                                        ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING))
 511 
 
512 
 
 512 
/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
513 
/** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification
 513 
  * @{
514 
  * @{
 514 
  */
515 
  */
 515 
#define IS_ADC_INJECTED_NB_CONV(LENGTH)  (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
516 
#define IS_ADC_INJECTED_NB_CONV(LENGTH)  (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
 516 
/**
517 
/**
 517 
  * @}
518 
  * @}
 518 
  */
519 
  */
 519 
 
520 
 
 520 
#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
521 
#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
 521 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
522 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 522 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
523 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 523 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
524 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 524 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
525 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 525 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
526 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 526 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
527 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 527 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
528 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
 528 
#endif
529 
#endif
 529 
#if defined (STM32F101xE)
530 
#if defined (STM32F101xE)
 530 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
531 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 531 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
532 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 532 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
533 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 533 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
534 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 534 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
535 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 535 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
536 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 536 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
537 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
 537 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
538 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
 538 
#endif
539 
#endif
 539 
#if defined (STM32F101xG)
540 
#if defined (STM32F101xG)
 540 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
541 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 541 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
542 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 542 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
543 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 543 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
544 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 544 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
545 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 545 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
546 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 546 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
547 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
 547 
#endif
548 
#endif
 548 
#if defined (STM32F103xE) || defined (STM32F103xG)
549 
#if defined (STM32F103xE) || defined (STM32F103xG)
 549 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
550 
#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1)    || \
 550 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
551 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2)    || \
 551 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
552 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2)    || \
 552 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
553 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO)   || \
 553 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
554 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4)    || \
 554 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
555 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11)  || \
 555 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
556 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1)    || \
 556 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
557 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3)    || \
 557 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
558 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1)    || \
 558 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
559 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1)    || \
 559 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
560 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3)    || \
 560 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
561 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3)    || \
 561 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
562 
                                 ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO)   || \
 562 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
563 
                                 ((REGTRIG) == ADC_SOFTWARE_START))
 563 
#endif
564 
#endif
 564 
 
565 
 
 565 
#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
566 
#if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC)
 566 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
567 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 567 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
568 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 568 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
569 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 569 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
570 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 570 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
571 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 571 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
572 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 572 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
573 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 573 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
574 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
 574 
#endif
575 
#endif
 575 
#if defined (STM32F101xE)
576 
#if defined (STM32F101xE)
 576 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
577 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 577 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
578 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 578 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
579 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 579 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
580 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 580 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
581 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 581 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
582 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 582 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
583 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 583 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
584 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
 584 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
585 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
 585 
#endif
586 
#endif
 586 
#if defined (STM32F101xG)
587 
#if defined (STM32F101xG)
 587 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
588 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 588 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
589 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 589 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
590 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 590 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
591 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 591 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
592 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 592 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
593 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 593 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
594 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 594 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
595 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
 595 
#endif
596 
#endif
 596 
#if defined (STM32F103xE) || defined (STM32F103xG)
597 
#if defined (STM32F103xE) || defined (STM32F103xG)
 597 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
598 
#define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO)  || \
 598 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
599 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1)   || \
 599 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
600 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4)   || \
 600 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
601 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO)  || \
 601 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
602 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
 602 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
603 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \
 603 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
604 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3)   || \
 604 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
605 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2)   || \
 605 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
606 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO)  || \
 606 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
607 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4)   || \
 607 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
608 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4)   || \
 608 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
609 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO)  || \
 609 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
610 
                                      ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4)   || \
 610 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
611 
                                      ((REGTRIG) == ADC_INJECTED_SOFTWARE_START))
 611 
#endif
612 
#endif
 612 
 
613 
 
 613 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
614 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 614 
#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
615 
#define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT)                || \
 615 
                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
616 
                           ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT)  || \
 616 
                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
617 
                           ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG)    || \
 617 
                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
618 
                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \
 618 
                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
619 
                           ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \
 619 
                           ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
620 
                           ((MODE) == ADC_DUALMODE_INJECSIMULT)            || \
 620 
                           ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
621 
                           ((MODE) == ADC_DUALMODE_REGSIMULT)              || \
 621 
                           ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
622 
                           ((MODE) == ADC_DUALMODE_INTERLFAST)             || \
 622 
                           ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
623 
                           ((MODE) == ADC_DUALMODE_INTERLSLOW)             || \
 623 
                           ((MODE) == ADC_DUALMODE_ALTERTRIG) )
624 
                           ((MODE) == ADC_DUALMODE_ALTERTRIG) )
 624 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
625 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 625 
 
626 
 
 626 
/**
627 
/**
 627 
  * @}
628 
  * @}
 628 
  */      
629 
  */      
 629 
   
630 
   
 630 
   
631 
   
 631 
 
632 
 
 632 
   
633 
   
 633 
   
634 
   
 634 
   
635 
   
 635 
/* Exported functions --------------------------------------------------------*/
636 
/* Exported functions --------------------------------------------------------*/
 636 
/** @addtogroup ADCEx_Exported_Functions
637 
/** @addtogroup ADCEx_Exported_Functions
 637 
  * @{
638 
  * @{
 638 
  */
639 
  */
 639 
 
640 
 
 640 
/* IO operation functions  *****************************************************/
641 
/* IO operation functions  *****************************************************/
 641 
/** @addtogroup ADCEx_Exported_Functions_Group1
642 
/** @addtogroup ADCEx_Exported_Functions_Group1
 642 
  * @{
643 
  * @{
 643 
  */
644 
  */
 644 
 
645 
 
 645 
/* ADC calibration */
646 
/* ADC calibration */
 646 
HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
647 
HAL_StatusTypeDef       HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc);
 647 
 
648 
 
 648 
/* Blocking mode: Polling */
649 
/* Blocking mode: Polling */
 649 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
650 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
 650 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
651 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
 651 
HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
652 
HAL_StatusTypeDef       HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
 652 
 
653 
 
 653 
/* Non-blocking mode: Interruption */
654 
/* Non-blocking mode: Interruption */
 654 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
655 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
 655 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
656 
HAL_StatusTypeDef       HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
 656 
 
657 
 
 657 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
658 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 658 
/* ADC multimode */
659 
/* ADC multimode */
 659 
HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
660 
HAL_StatusTypeDef       HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length);
 660 
HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
661 
HAL_StatusTypeDef       HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc);
 661 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
662 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 662 
 
663 
 
 663 
/* ADC retrieve conversion value intended to be used with polling or interruption */
664 
/* ADC retrieve conversion value intended to be used with polling or interruption */
 664 
uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
665 
uint32_t                HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
 665 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
666 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 666 
uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
667 
uint32_t                HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc);
 667 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
668 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 668 
 
669 
 
 669 
/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
670 
/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */
 670 
void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
671 
void                    HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
 671 
/**
672 
/**
 672 
  * @}
673 
  * @}
 673 
  */
674 
  */
 674 
 
675 
 
 675 
 
676 
 
 676 
/* Peripheral Control functions ***********************************************/
677 
/* Peripheral Control functions ***********************************************/
 677 
/** @addtogroup ADCEx_Exported_Functions_Group2
678 
/** @addtogroup ADCEx_Exported_Functions_Group2
 678 
  * @{
679 
  * @{
 679 
  */
680 
  */
 680 
HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
681 
HAL_StatusTypeDef       HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
 681 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
682 
#if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG)
 682 
HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
683 
HAL_StatusTypeDef       HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode);
 683 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
684 
#endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */
 684 
/**
685 
/**
 685 
  * @}
686 
  * @}
 686 
  */
687 
  */
 687 
 
688 
 
 688 
 
689 
 
 689 
/**
690 
/**
 690 
  * @}
691 
  * @}
 691 
  */
692 
  */
 692 
 
693 
 
 693 
 
694 
 
 694 
/**
695 
/**
 695 
  * @}
696 
  * @}
 696 
  */
697 
  */
 697 
 
698 
 
 698 
/**
699 
/**
 699 
  * @}
700 
  * @}
 700 
  */
701 
  */
 701 
 
702 
 
 702 
#ifdef __cplusplus
703 
#ifdef __cplusplus
 703 
}
704 
}
 704 
#endif
705 
#endif
 705 
 
706 
 
 706 
#endif /* __STM32F1xx_HAL_ADC_EX_H */
707 
#endif /* __STM32F1xx_HAL_ADC_EX_H */
 - 
 
708 
 
 - 
 
709 
 
 - 
 
710 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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