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| 1 | /** |
1 | /** |
| 2 | ****************************************************************************** |
2 | ****************************************************************************** |
| 3 | * @file stm32_hal_legacy.h |
3 | * @file stm32_hal_legacy.h |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @version V1.1.1 |
- | |
| 6 | * @date 12-May-2017 |
- | |
| 7 | * @brief This file contains aliases definition for the STM32Cube HAL constants |
5 | * @brief This file contains aliases definition for the STM32Cube HAL constants |
| 8 | * macros and functions maintained for legacy purpose. |
6 | * macros and functions maintained for legacy purpose. |
| 9 | ****************************************************************************** |
7 | ****************************************************************************** |
| 10 | * @attention |
8 | * @attention |
| 11 | * |
9 | * |
| 12 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
10 | * <h2><center>© Copyright (c) 2019 STMicroelectronics. |
| - | 11 | * All rights reserved.</center></h2> |
|
| 13 | * |
12 | * |
| 14 | * Redistribution and use in source and binary forms, with or without modification, |
13 | * This software component is licensed by ST under BSD 3-Clause license, |
| 15 | * are permitted provided that the following conditions are met: |
14 | * the "License"; You may not use this file except in compliance with the |
| 16 | * 1. Redistributions of source code must retain the above copyright notice, |
- | |
| 17 | * this list of conditions and the following disclaimer. |
- | |
| 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
- | |
| 19 | * this list of conditions and the following disclaimer in the documentation |
- | |
| 20 | * and/or other materials provided with the distribution. |
15 | * License. You may obtain a copy of the License at: |
| 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
- | |
| 22 | * may be used to endorse or promote products derived from this software |
16 | * opensource.org/licenses/BSD-3-Clause |
| 23 | * without specific prior written permission. |
- | |
| 24 | * |
- | |
| 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
- | |
| 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
- | |
| 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
- | |
| 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
- | |
| 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
- | |
| 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
- | |
| 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
- | |
| 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
- | |
| 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
- | |
| 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
- | |
| 35 | * |
17 | * |
| 36 | ****************************************************************************** |
18 | ****************************************************************************** |
| 37 | */ |
19 | */ |
| 38 | 20 | ||
| 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
21 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| 40 | #ifndef __STM32_HAL_LEGACY |
22 | #ifndef STM32_HAL_LEGACY |
| 41 | #define __STM32_HAL_LEGACY |
23 | #define STM32_HAL_LEGACY |
| 42 | 24 | ||
| 43 | #ifdef __cplusplus |
25 | #ifdef __cplusplus |
| 44 | extern "C" { |
26 | extern "C" { |
| 45 | #endif |
27 | #endif |
| 46 | 28 | ||
| Line 54... | Line 36... | ||
| 54 | #define AES_FLAG_RDERR CRYP_FLAG_RDERR |
36 | #define AES_FLAG_RDERR CRYP_FLAG_RDERR |
| 55 | #define AES_FLAG_WRERR CRYP_FLAG_WRERR |
37 | #define AES_FLAG_WRERR CRYP_FLAG_WRERR |
| 56 | #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF |
38 | #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF |
| 57 | #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR |
39 | #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR |
| 58 | #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR |
40 | #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR |
| 59 | - | ||
| 60 | /** |
41 | /** |
| 61 | * @} |
42 | * @} |
| 62 | */ |
43 | */ |
| 63 | 44 | ||
| 64 | /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose |
45 | /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose |
| 65 | * @{ |
46 | * @{ |
| 66 | */ |
47 | */ |
| 67 | #define ADC_RESOLUTION12b ADC_RESOLUTION_12B |
48 | #define ADC_RESOLUTION12b ADC_RESOLUTION_12B |
| 68 | #define ADC_RESOLUTION10b ADC_RESOLUTION_10B |
49 | #define ADC_RESOLUTION10b ADC_RESOLUTION_10B |
| Line 90... | Line 71... | ||
| 90 | #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 |
71 | #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 |
| 91 | #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 |
72 | #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 |
| 92 | #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 |
73 | #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 |
| 93 | #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 |
74 | #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6 |
| 94 | #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 |
75 | #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8 |
| 95 | #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO |
76 | #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO |
| 96 | #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 |
77 | #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2 |
| 97 | #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO |
78 | #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO |
| 98 | #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 |
79 | #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4 |
| 99 | #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO |
80 | #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO |
| 100 | #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 |
81 | #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11 |
| 101 | #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 |
82 | #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1 |
| 102 | #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE |
83 | #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE |
| 103 | #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING |
84 | #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING |
| Line 109... | Line 90... | ||
| 109 | #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY |
90 | #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY |
| 110 | #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC |
91 | #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC |
| 111 | #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC |
92 | #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC |
| 112 | #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL |
93 | #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL |
| 113 | #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL |
94 | #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL |
| 114 | #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 |
95 | #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1 |
| - | 96 | ||
| - | 97 | #if defined(STM32H7) |
|
| - | 98 | #define ADC_CHANNEL_VBAT_DIV4 ADC_CHANNEL_VBAT |
|
| - | 99 | #endif /* STM32H7 */ |
|
| 115 | /** |
100 | /** |
| 116 | * @} |
101 | * @} |
| 117 | */ |
102 | */ |
| 118 | 103 | ||
| 119 | /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose |
104 | /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose |
| 120 | * @{ |
105 | * @{ |
| 121 | */ |
106 | */ |
| 122 | 107 | ||
| 123 | #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG |
108 | #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG |
| 124 | 109 | ||
| 125 | /** |
110 | /** |
| 126 | * @} |
111 | * @} |
| 127 | */ |
112 | */ |
| 128 | 113 | ||
| 129 | /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose |
114 | /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose |
| 130 | * @{ |
115 | * @{ |
| 131 | */ |
116 | */ |
| 132 | #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE |
117 | #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE |
| 133 | #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE |
118 | #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE |
| Line 136... | Line 121... | ||
| 136 | #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 |
121 | #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3 |
| 137 | #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 |
122 | #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4 |
| 138 | #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 |
123 | #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5 |
| 139 | #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 |
124 | #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6 |
| 140 | #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 |
125 | #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7 |
| - | 126 | #if defined(STM32L0) |
|
| 141 | #define COMP_LPTIMCONNECTION_ENABLED COMP_LPTIMCONNECTION_IN1_ENABLED /*!< COMPX output is connected to LPTIM input 1 */ |
127 | #define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */ |
| - | 128 | #endif |
|
| 142 | #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR |
129 | #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR |
| 143 | #if defined(STM32F373xC) || defined(STM32F378xx) |
130 | #if defined(STM32F373xC) || defined(STM32F378xx) |
| 144 | #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 |
131 | #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1 |
| 145 | #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR |
132 | #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR |
| 146 | #endif /* STM32F373xC || STM32F378xx */ |
133 | #endif /* STM32F373xC || STM32F378xx */ |
| Line 152... | Line 139... | ||
| 152 | #define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 |
139 | #define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2 |
| 153 | #define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 |
140 | #define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3 |
| 154 | #define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 |
141 | #define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4 |
| 155 | #define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 |
142 | #define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5 |
| 156 | #define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 |
143 | #define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6 |
| 157 | 144 | ||
| 158 | #define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT |
145 | #define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT |
| 159 | #define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT |
146 | #define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT |
| 160 | #define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT |
147 | #define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT |
| 161 | #define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT |
148 | #define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT |
| 162 | #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 |
149 | #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1 |
| Line 224... | Line 211... | ||
| 224 | */ |
211 | */ |
| 225 | 212 | ||
| 226 | /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose |
213 | /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose |
| 227 | * @{ |
214 | * @{ |
| 228 | */ |
215 | */ |
| 229 | 216 | ||
| 230 | #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE |
217 | #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE |
| 231 | #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE |
218 | #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE |
| 232 | 219 | ||
| 233 | /** |
220 | /** |
| 234 | * @} |
221 | * @} |
| Line 246... | Line 233... | ||
| 246 | #define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1 |
233 | #define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1 |
| 247 | #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE |
234 | #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE |
| 248 | #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE |
235 | #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE |
| 249 | #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE |
236 | #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE |
| 250 | 237 | ||
| - | 238 | #if defined(STM32G4) || defined(STM32H7) |
|
| - | 239 | #define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL |
|
| - | 240 | #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL |
|
| - | 241 | #endif |
|
| - | 242 | ||
| - | 243 | #if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4) |
|
| - | 244 | #define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID |
|
| - | 245 | #define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID |
|
| - | 246 | #endif |
|
| - | 247 | ||
| 251 | /** |
248 | /** |
| 252 | * @} |
249 | * @} |
| 253 | */ |
250 | */ |
| 254 | 251 | ||
| 255 | /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose |
252 | /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose |
| 256 | * @{ |
253 | * @{ |
| 257 | */ |
254 | */ |
| 258 | #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 |
255 | #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2 |
| 259 | #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 |
256 | #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4 |
| 260 | #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 |
257 | #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5 |
| 261 | #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 |
258 | #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4 |
| 262 | #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 |
259 | #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2 |
| 263 | #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 |
260 | #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 |
| 264 | #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 |
261 | #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6 |
| 265 | #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 |
262 | #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7 |
| 266 | #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 |
263 | #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67 |
| 267 | #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 |
264 | #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67 |
| 268 | #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32 |
- | |
| 269 | #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 |
265 | #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76 |
| 270 | #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 |
266 | #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6 |
| 271 | #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 |
267 | #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7 |
| 272 | #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 |
268 | #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6 |
| 273 | 269 | ||
| 274 | #define IS_HAL_REMAPDMA IS_DMA_REMAP |
270 | #define IS_HAL_REMAPDMA IS_DMA_REMAP |
| 275 | #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE |
271 | #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE |
| 276 | #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE |
272 | #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE |
| - | 273 | ||
| - | 274 | #if defined(STM32L4) |
|
| - | 275 | ||
| - | 276 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 |
|
| - | 277 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI1 HAL_DMAMUX1_REQ_GEN_EXTI1 |
|
| - | 278 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI2 HAL_DMAMUX1_REQ_GEN_EXTI2 |
|
| - | 279 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI3 HAL_DMAMUX1_REQ_GEN_EXTI3 |
|
| - | 280 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI4 HAL_DMAMUX1_REQ_GEN_EXTI4 |
|
| - | 281 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI5 HAL_DMAMUX1_REQ_GEN_EXTI5 |
|
| - | 282 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI6 HAL_DMAMUX1_REQ_GEN_EXTI6 |
|
| - | 283 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI7 HAL_DMAMUX1_REQ_GEN_EXTI7 |
|
| - | 284 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI8 HAL_DMAMUX1_REQ_GEN_EXTI8 |
|
| - | 285 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI9 HAL_DMAMUX1_REQ_GEN_EXTI9 |
|
| - | 286 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI10 HAL_DMAMUX1_REQ_GEN_EXTI10 |
|
| - | 287 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI11 HAL_DMAMUX1_REQ_GEN_EXTI11 |
|
| - | 288 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI12 HAL_DMAMUX1_REQ_GEN_EXTI12 |
|
| - | 289 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI13 HAL_DMAMUX1_REQ_GEN_EXTI13 |
|
| - | 290 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI14 HAL_DMAMUX1_REQ_GEN_EXTI14 |
|
| - | 291 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI15 HAL_DMAMUX1_REQ_GEN_EXTI15 |
|
| - | 292 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT |
|
| - | 293 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT |
|
| - | 294 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT |
|
| - | 295 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT |
|
| - | 296 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT |
|
| - | 297 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT |
|
| - | 298 | #define HAL_DMAMUX1_REQUEST_GEN_DSI_TE HAL_DMAMUX1_REQ_GEN_DSI_TE |
|
| - | 299 | #define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT HAL_DMAMUX1_REQ_GEN_DSI_EOT |
|
| - | 300 | #define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT HAL_DMAMUX1_REQ_GEN_DMA2D_EOT |
|
| - | 301 | #define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT HAL_DMAMUX1_REQ_GEN_LTDC_IT |
|
| - | 302 | ||
| - | 303 | #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT |
|
| - | 304 | #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING |
|
| - | 305 | #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING |
|
| - | 306 | #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING |
|
| - | 307 | ||
| - | 308 | #if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) |
|
| - | 309 | #define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI |
|
| - | 310 | #endif |
|
| - | 311 | ||
| - | 312 | #endif /* STM32L4 */ |
|
| - | 313 | ||
| - | 314 | #if defined(STM32G0) |
|
| - | 315 | #define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1 |
|
| - | 316 | #define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2 |
|
| - | 317 | #define DMA_REQUEST_TIM16_TRIG_COM DMA_REQUEST_TIM16_COM |
|
| - | 318 | #define DMA_REQUEST_TIM17_TRIG_COM DMA_REQUEST_TIM17_COM |
|
| - | 319 | ||
| - | 320 | #define LL_DMAMUX_REQ_TIM16_TRIG_COM LL_DMAMUX_REQ_TIM16_COM |
|
| - | 321 | #define LL_DMAMUX_REQ_TIM17_TRIG_COM LL_DMAMUX_REQ_TIM17_COM |
|
| - | 322 | #endif |
|
| - | 323 | ||
| - | 324 | #if defined(STM32H7) |
|
| - | 325 | ||
| - | 326 | #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 |
|
| - | 327 | #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2 |
|
| - | 328 | ||
| - | 329 | #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX |
|
| - | 330 | #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX |
|
| - | 331 | ||
| - | 332 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT |
|
| - | 333 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT |
|
| - | 334 | #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT |
|
| - | 335 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT |
|
| - | 336 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT |
|
| - | 337 | #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT |
|
| - | 338 | #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0 |
|
| - | 339 | #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO |
|
| - | 340 | ||
| - | 341 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT |
|
| - | 342 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT |
|
| - | 343 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT |
|
| - | 344 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT |
|
| - | 345 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT |
|
| - | 346 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT |
|
| - | 347 | #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT |
|
| - | 348 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP |
|
| - | 349 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP |
|
| - | 350 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP |
|
| - | 351 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT |
|
| - | 352 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP |
|
| - | 353 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT |
|
| - | 354 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP |
|
| - | 355 | #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP |
|
| - | 356 | #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP |
|
| - | 357 | #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP |
|
| - | 358 | #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT |
|
| - | 359 | #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT |
|
| - | 360 | #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP |
|
| - | 361 | #define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0 |
|
| - | 362 | #define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2 |
|
| - | 363 | #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT |
|
| - | 364 | #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT |
|
| - | 365 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT |
|
| - | 366 | #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT |
|
| - | 367 | #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT |
|
| - | 368 | #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT |
|
| - | 369 | #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT |
|
| - | 370 | #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT |
|
| - | 371 | ||
| - | 372 | #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT |
|
| - | 373 | #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING |
|
| - | 374 | #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING |
|
| - | 375 | #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING |
|
| - | 376 | ||
| - | 377 | #define DFSDM_FILTER_EXT_TRIG_LPTIM1 DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT |
|
| - | 378 | #define DFSDM_FILTER_EXT_TRIG_LPTIM2 DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT |
|
| - | 379 | #define DFSDM_FILTER_EXT_TRIG_LPTIM3 DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT |
|
| 277 | 380 | ||
| - | 381 | #define DAC_TRIGGER_LP1_OUT DAC_TRIGGER_LPTIM1_OUT |
|
| - | 382 | #define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT |
|
| 278 | 383 | ||
| - | 384 | #endif /* STM32H7 */ |
|
| 279 | 385 | ||
| 280 | /** |
386 | /** |
| 281 | * @} |
387 | * @} |
| 282 | */ |
388 | */ |
| 283 | 389 | ||
| 284 | /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose |
390 | /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose |
| 285 | * @{ |
391 | * @{ |
| 286 | */ |
392 | */ |
| 287 | 393 | ||
| 288 | #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE |
394 | #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE |
| 289 | #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD |
395 | #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD |
| 290 | #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD |
396 | #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD |
| 291 | #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD |
397 | #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD |
| 292 | #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS |
398 | #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS |
| Line 354... | Line 460... | ||
| 354 | #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET |
460 | #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET |
| 355 | #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR |
461 | #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR |
| 356 | #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 |
462 | #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0 |
| 357 | #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 |
463 | #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1 |
| 358 | #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 |
464 | #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2 |
| - | 465 | #if defined(STM32G0) |
|
| - | 466 | #define OB_BOOT_LOCK_DISABLE OB_BOOT_ENTRY_FORCED_NONE |
|
| - | 467 | #define OB_BOOT_LOCK_ENABLE OB_BOOT_ENTRY_FORCED_FLASH |
|
| - | 468 | #else |
|
| - | 469 | #define OB_BOOT_ENTRY_FORCED_NONE OB_BOOT_LOCK_DISABLE |
|
| - | 470 | #define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE |
|
| - | 471 | #endif |
|
| - | 472 | #if defined(STM32H7) |
|
| - | 473 | #define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1 |
|
| - | 474 | #define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1 |
|
| - | 475 | #define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1 |
|
| - | 476 | #define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2 |
|
| - | 477 | #define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2 |
|
| - | 478 | #define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2 |
|
| - | 479 | #define FLASH_FLAG_WDW FLASH_FLAG_WBNE |
|
| - | 480 | #define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL |
|
| - | 481 | #endif /* STM32H7 */ |
|
| 359 | 482 | ||
| 360 | /** |
483 | /** |
| 361 | * @} |
484 | * @} |
| 362 | */ |
485 | */ |
| - | 486 | ||
| - | 487 | /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose |
|
| - | 488 | * @{ |
|
| 363 | 489 | */ |
|
| - | 490 | ||
| - | 491 | #if defined(STM32H7) |
|
| - | 492 | #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE |
|
| - | 493 | #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE |
|
| - | 494 | #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET |
|
| - | 495 | #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET |
|
| - | 496 | #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE |
|
| - | 497 | #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE |
|
| - | 498 | #endif /* STM32H7 */ |
|
| - | 499 | ||
| - | 500 | /** |
|
| - | 501 | * @} |
|
| - | 502 | */ |
|
| - | 503 | ||
| 364 | /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose |
504 | /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose |
| 365 | * @{ |
505 | * @{ |
| 366 | */ |
506 | */ |
| 367 | 507 | ||
| 368 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 |
508 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9 |
| 369 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 |
509 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10 |
| 370 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 |
510 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6 |
| 371 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 |
511 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7 |
| 372 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 |
512 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8 |
| 373 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 |
513 | #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9 |
| 374 | #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 |
514 | #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1 |
| 375 | #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 |
515 | #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2 |
| 376 | #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 |
516 | #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3 |
| - | 517 | #if defined(STM32G4) |
|
| - | 518 | ||
| - | 519 | #define HAL_SYSCFG_EnableIOAnalogSwitchBooster HAL_SYSCFG_EnableIOSwitchBooster |
|
| - | 520 | #define HAL_SYSCFG_DisableIOAnalogSwitchBooster HAL_SYSCFG_DisableIOSwitchBooster |
|
| - | 521 | #define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD |
|
| - | 522 | #define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD |
|
| - | 523 | #endif /* STM32G4 */ |
|
| 377 | /** |
524 | /** |
| 378 | * @} |
525 | * @} |
| 379 | */ |
526 | */ |
| 380 | 527 | ||
| 381 | 528 | ||
| 382 | /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose |
529 | /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose |
| 383 | * @{ |
530 | * @{ |
| 384 | */ |
531 | */ |
| 385 | #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) |
532 | #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4) |
| 386 | #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE |
533 | #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE |
| 387 | #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE |
534 | #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE |
| 388 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 |
535 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8 |
| 389 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 |
536 | #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16 |
| 390 | #else |
- | |
| - | 537 | #elif defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) |
|
| 391 | #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE |
538 | #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE |
| 392 | #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE |
539 | #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE |
| 393 | #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 |
540 | #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8 |
| 394 | #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 |
541 | #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16 |
| 395 | #endif |
542 | #endif |
| Line 398... | Line 545... | ||
| 398 | */ |
545 | */ |
| 399 | 546 | ||
| 400 | /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose |
547 | /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose |
| 401 | * @{ |
548 | * @{ |
| 402 | */ |
549 | */ |
| 403 | 550 | ||
| 404 | #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef |
551 | #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef |
| 405 | #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef |
552 | #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef |
| 406 | /** |
553 | /** |
| 407 | * @} |
554 | * @} |
| 408 | */ |
555 | */ |
| Line 426... | Line 573... | ||
| 426 | #if defined(STM32L4) |
573 | #if defined(STM32L4) |
| 427 | #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 |
574 | #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1 |
| 428 | #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 |
575 | #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1 |
| 429 | #endif |
576 | #endif |
| 430 | 577 | ||
| - | 578 | #if defined(STM32H7) |
|
| - | 579 | #define GPIO_AF7_SDIO1 GPIO_AF7_SDMMC1 |
|
| - | 580 | #define GPIO_AF8_SDIO1 GPIO_AF8_SDMMC1 |
|
| - | 581 | #define GPIO_AF12_SDIO1 GPIO_AF12_SDMMC1 |
|
| - | 582 | #define GPIO_AF9_SDIO2 GPIO_AF9_SDMMC2 |
|
| - | 583 | #define GPIO_AF10_SDIO2 GPIO_AF10_SDMMC2 |
|
| - | 584 | #define GPIO_AF11_SDIO2 GPIO_AF11_SDMMC2 |
|
| - | 585 | ||
| - | 586 | #if defined (STM32H743xx) || defined (STM32H753xx) || defined (STM32H750xx) || defined (STM32H742xx) || \ |
|
| - | 587 | defined (STM32H745xx) || defined (STM32H755xx) || defined (STM32H747xx) || defined (STM32H757xx) |
|
| - | 588 | #define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS |
|
| - | 589 | #define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS |
|
| - | 590 | #define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS |
|
| - | 591 | #endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */ |
|
| - | 592 | #endif /* STM32H7 */ |
|
| - | 593 | ||
| 431 | #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 |
594 | #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 |
| 432 | #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 |
595 | #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 |
| 433 | #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 |
596 | #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 |
| 434 | 597 | ||
| 435 | #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) |
598 | #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) |
| 436 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
599 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
| 437 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
600 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
| 438 | #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH |
601 | #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH |
| 439 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
602 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
| 440 | #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 */ |
603 | #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7*/ |
| 441 | 604 | ||
| 442 | #if defined(STM32L1) |
605 | #if defined(STM32L1) |
| 443 | #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW |
606 | #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW |
| 444 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM |
607 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM |
| 445 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH |
608 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH |
| 446 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
609 | #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH |
| 447 | #endif /* STM32L1 */ |
610 | #endif /* STM32L1 */ |
| 448 | 611 | ||
| 449 | #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) |
612 | #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1) |
| 450 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
613 | #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW |
| 451 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
614 | #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM |
| Line 455... | Line 618... | ||
| 455 | #define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1 |
618 | #define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1 |
| 456 | /** |
619 | /** |
| 457 | * @} |
620 | * @} |
| 458 | */ |
621 | */ |
| 459 | 622 | ||
| 460 | /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose |
- | |
| 461 | * @{ |
- | |
| 462 | */ |
- | |
| 463 | - | ||
| 464 | #if defined(STM32H7) |
- | |
| 465 | #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE |
- | |
| 466 | #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE |
- | |
| 467 | #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET |
- | |
| 468 | #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET |
- | |
| 469 | #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE |
- | |
| 470 | #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE |
- | |
| 471 | #endif /* STM32H7 */ |
- | |
| 472 | - | ||
| 473 | - | ||
| 474 | /** |
- | |
| 475 | * @} |
- | |
| 476 | */ |
- | |
| 477 | - | ||
| 478 | - | ||
| 479 | /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose |
623 | /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose |
| 480 | * @{ |
624 | * @{ |
| 481 | */ |
625 | */ |
| 482 | #define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED |
626 | #define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED |
| 483 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6 |
627 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6 |
| Line 486... | Line 630... | ||
| 486 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 |
630 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6 |
| 487 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 |
631 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7 |
| 488 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 |
632 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7 |
| 489 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 |
633 | #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7 |
| 490 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 |
634 | #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7 |
| 491 | 635 | ||
| 492 | #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER |
636 | #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER |
| 493 | #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER |
637 | #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER |
| 494 | #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD |
638 | #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD |
| 495 | #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD |
639 | #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD |
| 496 | #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER |
640 | #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER |
| 497 | #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER |
641 | #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER |
| 498 | #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE |
642 | #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE |
| 499 | #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE |
643 | #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE |
| - | 644 | ||
| - | 645 | #if defined(STM32G4) |
|
| - | 646 | #define HAL_HRTIM_ExternalEventCounterConfig HAL_HRTIM_ExtEventCounterConfig |
|
| - | 647 | #define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable |
|
| - | 648 | #define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable |
|
| - | 649 | #define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset |
|
| - | 650 | #define HRTIM_TIMEEVENT_A HRTIM_EVENTCOUNTER_A |
|
| - | 651 | #define HRTIM_TIMEEVENT_B HRTIM_EVENTCOUNTER_B |
|
| - | 652 | #define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL |
|
| - | 653 | #define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL |
|
| - | 654 | #endif /* STM32G4 */ |
|
| - | 655 | ||
| - | 656 | #if defined(STM32H7) |
|
| - | 657 | #define HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 658 | #define HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 659 | #define HRTIM_OUTPUTSET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 660 | #define HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 661 | #define HRTIM_OUTPUTSET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 662 | #define HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 663 | #define HRTIM_OUTPUTSET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 664 | #define HRTIM_OUTPUTSET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 665 | #define HRTIM_OUTPUTSET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 666 | #define HRTIM_OUTPUTSET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 667 | #define HRTIM_OUTPUTSET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 668 | #define HRTIM_OUTPUTSET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 669 | #define HRTIM_OUTPUTSET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 670 | #define HRTIM_OUTPUTSET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 671 | #define HRTIM_OUTPUTSET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 672 | #define HRTIM_OUTPUTSET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 673 | #define HRTIM_OUTPUTSET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 674 | #define HRTIM_OUTPUTSET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 675 | #define HRTIM_OUTPUTSET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 676 | #define HRTIM_OUTPUTSET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 677 | #define HRTIM_OUTPUTSET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 678 | #define HRTIM_OUTPUTSET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 679 | #define HRTIM_OUTPUTSET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 680 | #define HRTIM_OUTPUTSET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 681 | #define HRTIM_OUTPUTSET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 682 | #define HRTIM_OUTPUTSET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 683 | #define HRTIM_OUTPUTSET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 684 | #define HRTIM_OUTPUTSET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 685 | #define HRTIM_OUTPUTSET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 686 | #define HRTIM_OUTPUTSET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 687 | #define HRTIM_OUTPUTSET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 688 | #define HRTIM_OUTPUTSET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 689 | #define HRTIM_OUTPUTSET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 690 | #define HRTIM_OUTPUTSET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 691 | #define HRTIM_OUTPUTSET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 692 | #define HRTIM_OUTPUTSET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 693 | #define HRTIM_OUTPUTSET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 694 | #define HRTIM_OUTPUTSET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 695 | #define HRTIM_OUTPUTSET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 696 | #define HRTIM_OUTPUTSET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 697 | #define HRTIM_OUTPUTSET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 698 | #define HRTIM_OUTPUTSET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 699 | #define HRTIM_OUTPUTSET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 700 | #define HRTIM_OUTPUTSET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 701 | #define HRTIM_OUTPUTSET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 702 | #define HRTIM_OUTPUTSET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 703 | #define HRTIM_OUTPUTSET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 704 | #define HRTIM_OUTPUTSET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 705 | #define HRTIM_OUTPUTSET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 706 | #define HRTIM_OUTPUTSET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 707 | #define HRTIM_OUTPUTSET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 708 | #define HRTIM_OUTPUTSET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 709 | #define HRTIM_OUTPUTSET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 710 | #define HRTIM_OUTPUTSET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 711 | ||
| - | 712 | #define HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 713 | #define HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 714 | #define HRTIM_OUTPUTRESET_TIMAEV3_TIMCCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 715 | #define HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 716 | #define HRTIM_OUTPUTRESET_TIMAEV5_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 717 | #define HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 718 | #define HRTIM_OUTPUTRESET_TIMAEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 719 | #define HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 720 | #define HRTIM_OUTPUTRESET_TIMAEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 721 | #define HRTIM_OUTPUTRESET_TIMBEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 722 | #define HRTIM_OUTPUTRESET_TIMBEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 723 | #define HRTIM_OUTPUTRESET_TIMBEV3_TIMCCMP3 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 724 | #define HRTIM_OUTPUTRESET_TIMBEV4_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 725 | #define HRTIM_OUTPUTRESET_TIMBEV5_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 726 | #define HRTIM_OUTPUTRESET_TIMBEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 727 | #define HRTIM_OUTPUTRESET_TIMBEV7_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 728 | #define HRTIM_OUTPUTRESET_TIMBEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 729 | #define HRTIM_OUTPUTRESET_TIMBEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 730 | #define HRTIM_OUTPUTRESET_TIMCEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 731 | #define HRTIM_OUTPUTRESET_TIMCEV2_TIMACMP2 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 732 | #define HRTIM_OUTPUTRESET_TIMCEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 733 | #define HRTIM_OUTPUTRESET_TIMCEV4_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 734 | #define HRTIM_OUTPUTRESET_TIMCEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 735 | #define HRTIM_OUTPUTRESET_TIMCEV6_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 736 | #define HRTIM_OUTPUTRESET_TIMCEV7_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 737 | #define HRTIM_OUTPUTRESET_TIMCEV8_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 738 | #define HRTIM_OUTPUTRESET_TIMCEV9_TIMFCMP2 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 739 | #define HRTIM_OUTPUTRESET_TIMDEV1_TIMACMP1 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 740 | #define HRTIM_OUTPUTRESET_TIMDEV2_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 741 | #define HRTIM_OUTPUTRESET_TIMDEV3_TIMBCMP2 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 742 | #define HRTIM_OUTPUTRESET_TIMDEV4_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 743 | #define HRTIM_OUTPUTRESET_TIMDEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 744 | #define HRTIM_OUTPUTRESET_TIMDEV6_TIMECMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 745 | #define HRTIM_OUTPUTRESET_TIMDEV7_TIMECMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 746 | #define HRTIM_OUTPUTRESET_TIMDEV8_TIMFCMP1 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 747 | #define HRTIM_OUTPUTRESET_TIMDEV9_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 748 | #define HRTIM_OUTPUTRESET_TIMEEV1_TIMACMP4 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 749 | #define HRTIM_OUTPUTRESET_TIMEEV2_TIMBCMP3 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 750 | #define HRTIM_OUTPUTRESET_TIMEEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 751 | #define HRTIM_OUTPUTRESET_TIMEEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 752 | #define HRTIM_OUTPUTRESET_TIMEEV5_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 753 | #define HRTIM_OUTPUTRESET_TIMEEV6_TIMDCMP1 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 754 | #define HRTIM_OUTPUTRESET_TIMEEV7_TIMDCMP2 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 755 | #define HRTIM_OUTPUTRESET_TIMEEV8_TIMFCMP3 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 756 | #define HRTIM_OUTPUTRESET_TIMEEV9_TIMFCMP4 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 757 | #define HRTIM_OUTPUTRESET_TIMFEV1_TIMACMP3 HRTIM_OUTPUTSET_TIMEV_1 |
|
| - | 758 | #define HRTIM_OUTPUTRESET_TIMFEV2_TIMBCMP1 HRTIM_OUTPUTSET_TIMEV_2 |
|
| - | 759 | #define HRTIM_OUTPUTRESET_TIMFEV3_TIMBCMP4 HRTIM_OUTPUTSET_TIMEV_3 |
|
| - | 760 | #define HRTIM_OUTPUTRESET_TIMFEV4_TIMCCMP1 HRTIM_OUTPUTSET_TIMEV_4 |
|
| - | 761 | #define HRTIM_OUTPUTRESET_TIMFEV5_TIMCCMP4 HRTIM_OUTPUTSET_TIMEV_5 |
|
| - | 762 | #define HRTIM_OUTPUTRESET_TIMFEV6_TIMDCMP3 HRTIM_OUTPUTSET_TIMEV_6 |
|
| - | 763 | #define HRTIM_OUTPUTRESET_TIMFEV7_TIMDCMP4 HRTIM_OUTPUTSET_TIMEV_7 |
|
| - | 764 | #define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 |
|
| - | 765 | #define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9 |
|
| - | 766 | #endif /* STM32H7 */ |
|
| - | 767 | ||
| - | 768 | #if defined(STM32F3) |
|
| - | 769 | /** @brief Constants defining available sources associated to external events. |
|
| - | 770 | */ |
|
| - | 771 | #define HRTIM_EVENTSRC_1 (0x00000000U) |
|
| - | 772 | #define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0) |
|
| - | 773 | #define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1) |
|
| - | 774 | #define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0) |
|
| - | 775 | ||
| - | 776 | /** @brief Constants defining the events that can be selected to configure the |
|
| - | 777 | * set/reset crossbar of a timer output |
|
| - | 778 | */ |
|
| - | 779 | #define HRTIM_OUTPUTSET_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) |
|
| - | 780 | #define HRTIM_OUTPUTSET_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) |
|
| - | 781 | #define HRTIM_OUTPUTSET_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) |
|
| - | 782 | #define HRTIM_OUTPUTSET_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) |
|
| - | 783 | #define HRTIM_OUTPUTSET_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) |
|
| - | 784 | #define HRTIM_OUTPUTSET_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) |
|
| - | 785 | #define HRTIM_OUTPUTSET_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) |
|
| - | 786 | #define HRTIM_OUTPUTSET_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) |
|
| - | 787 | #define HRTIM_OUTPUTSET_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) |
|
| - | 788 | ||
| - | 789 | #define HRTIM_OUTPUTRESET_TIMEV_1 (HRTIM_RST1R_TIMEVNT1) |
|
| - | 790 | #define HRTIM_OUTPUTRESET_TIMEV_2 (HRTIM_RST1R_TIMEVNT2) |
|
| - | 791 | #define HRTIM_OUTPUTRESET_TIMEV_3 (HRTIM_RST1R_TIMEVNT3) |
|
| - | 792 | #define HRTIM_OUTPUTRESET_TIMEV_4 (HRTIM_RST1R_TIMEVNT4) |
|
| - | 793 | #define HRTIM_OUTPUTRESET_TIMEV_5 (HRTIM_RST1R_TIMEVNT5) |
|
| - | 794 | #define HRTIM_OUTPUTRESET_TIMEV_6 (HRTIM_RST1R_TIMEVNT6) |
|
| - | 795 | #define HRTIM_OUTPUTRESET_TIMEV_7 (HRTIM_RST1R_TIMEVNT7) |
|
| - | 796 | #define HRTIM_OUTPUTRESET_TIMEV_8 (HRTIM_RST1R_TIMEVNT8) |
|
| - | 797 | #define HRTIM_OUTPUTRESET_TIMEV_9 (HRTIM_RST1R_TIMEVNT9) |
|
| - | 798 | ||
| - | 799 | /** @brief Constants defining the event filtering applied to external events |
|
| - | 800 | * by a timer |
|
| - | 801 | */ |
|
| - | 802 | #define HRTIM_TIMEVENTFILTER_NONE (0x00000000U) |
|
| - | 803 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 804 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 805 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 806 | #define HRTIM_TIMEVENTFILTER_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) |
|
| - | 807 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 808 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 809 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 810 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) |
|
| - | 811 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 812 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 813 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 814 | #define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2) |
|
| - | 815 | #define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 816 | #define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) |
|
| - | 817 | #define HRTIM_TIMEVENTFILTER_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) |
|
| - | 818 | ||
| - | 819 | /** @brief Constants defining the DLL calibration periods (in micro seconds) |
|
| - | 820 | */ |
|
| - | 821 | #define HRTIM_CALIBRATIONRATE_7300 0x00000000U |
|
| - | 822 | #define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) |
|
| - | 823 | #define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) |
|
| - | 824 | #define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) |
|
| - | 825 | ||
| - | 826 | #endif /* STM32F3 */ |
|
| 500 | /** |
827 | /** |
| 501 | * @} |
828 | * @} |
| 502 | */ |
829 | */ |
| 503 | 830 | ||
| 504 | /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose |
831 | /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose |
| Line 559... | Line 886... | ||
| 559 | #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING |
886 | #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING |
| 560 | 887 | ||
| 561 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION |
888 | #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION |
| 562 | #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
889 | #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
| 563 | #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
890 | #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
| 564 | #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS |
891 | #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS |
| 565 | 892 | ||
| 566 | /* The following 3 definition have also been present in a temporary version of lptim.h */ |
893 | /* The following 3 definition have also been present in a temporary version of lptim.h */ |
| 567 | /* They need to be renamed also to the right name, just in case */ |
894 | /* They need to be renamed also to the right name, just in case */ |
| 568 | #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
895 | #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS |
| 569 | #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
896 | #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS |
| Line 589... | Line 916... | ||
| 589 | #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE |
916 | #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE |
| 590 | #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE |
917 | #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE |
| 591 | /** |
918 | /** |
| 592 | * @} |
919 | * @} |
| 593 | */ |
920 | */ |
| 594 | 921 | ||
| 595 | /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose |
922 | /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose |
| 596 | * @{ |
923 | * @{ |
| 597 | */ |
924 | */ |
| 598 | #define NOR_StatusTypedef HAL_NOR_StatusTypeDef |
925 | #define NOR_StatusTypedef HAL_NOR_StatusTypeDef |
| 599 | #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS |
926 | #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS |
| Line 613... | Line 940... | ||
| 613 | 940 | ||
| 614 | #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 |
941 | #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0 |
| 615 | #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 |
942 | #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1 |
| 616 | #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 |
943 | #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2 |
| 617 | #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 |
944 | #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3 |
| 618 | - | ||
| - | 945 | ||
| 619 | #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 |
946 | #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0 |
| 620 | #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 |
947 | #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1 |
| 621 | #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 |
948 | #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2 |
| 622 | #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 |
949 | #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3 |
| 623 | 950 | ||
| 624 | #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
951 | #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
| 625 | #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
952 | #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
| 626 | 953 | ||
| 627 | #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
954 | #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0 |
| 628 | #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
955 | #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1 |
| 629 | 956 | ||
| 630 | #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 |
957 | #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0 |
| 631 | #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 |
958 | #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1 |
| 632 | 959 | ||
| 633 | #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 |
960 | #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1 |
| - | 961 | ||
| 634 | 962 | #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO |
|
| 635 | #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO |
963 | #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 |
| 636 | #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 |
964 | #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 |
| - | 965 | ||
| - | 966 | #if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) || defined(STM32G4) |
|
| 637 | #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 |
967 | #define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID |
| 638 | 968 | #define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID |
|
| - | 969 | #endif |
|
| - | 970 | ||
| - | 971 | ||
| 639 | /** |
972 | /** |
| 640 | * @} |
973 | * @} |
| 641 | */ |
974 | */ |
| 642 | 975 | ||
| 643 | /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose |
976 | /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose |
| 644 | * @{ |
977 | * @{ |
| 645 | */ |
978 | */ |
| 646 | #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
979 | #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS |
| - | 980 | ||
| - | 981 | #if defined(STM32H7) |
|
| - | 982 | #define I2S_IT_TXE I2S_IT_TXP |
|
| - | 983 | #define I2S_IT_RXNE I2S_IT_RXP |
|
| - | 984 | ||
| - | 985 | #define I2S_FLAG_TXE I2S_FLAG_TXP |
|
| - | 986 | #define I2S_FLAG_RXNE I2S_FLAG_RXP |
|
| - | 987 | #endif |
|
| - | 988 | ||
| 647 | #if defined(STM32F7) |
989 | #if defined(STM32F7) |
| 648 | #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL |
990 | #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL |
| 649 | #endif |
991 | #endif |
| 650 | /** |
992 | /** |
| 651 | * @} |
993 | * @} |
| 652 | */ |
994 | */ |
| Line 654... | Line 996... | ||
| 654 | /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose |
996 | /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose |
| 655 | * @{ |
997 | * @{ |
| 656 | */ |
998 | */ |
| 657 | 999 | ||
| 658 | /* Compact Flash-ATA registers description */ |
1000 | /* Compact Flash-ATA registers description */ |
| 659 | #define CF_DATA ATA_DATA |
1001 | #define CF_DATA ATA_DATA |
| 660 | #define CF_SECTOR_COUNT ATA_SECTOR_COUNT |
1002 | #define CF_SECTOR_COUNT ATA_SECTOR_COUNT |
| 661 | #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER |
1003 | #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER |
| 662 | #define CF_CYLINDER_LOW ATA_CYLINDER_LOW |
1004 | #define CF_CYLINDER_LOW ATA_CYLINDER_LOW |
| 663 | #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH |
1005 | #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH |
| 664 | #define CF_CARD_HEAD ATA_CARD_HEAD |
1006 | #define CF_CARD_HEAD ATA_CARD_HEAD |
| 665 | #define CF_STATUS_CMD ATA_STATUS_CMD |
1007 | #define CF_STATUS_CMD ATA_STATUS_CMD |
| 666 | #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE |
1008 | #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE |
| 667 | #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA |
1009 | #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA |
| 668 | 1010 | ||
| 669 | /* Compact Flash-ATA commands */ |
1011 | /* Compact Flash-ATA commands */ |
| 670 | #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD |
1012 | #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD |
| 671 | #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD |
1013 | #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD |
| 672 | #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD |
1014 | #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD |
| 673 | #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD |
1015 | #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD |
| 674 | 1016 | ||
| 675 | #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef |
1017 | #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef |
| Line 682... | Line 1024... | ||
| 682 | */ |
1024 | */ |
| 683 | 1025 | ||
| 684 | /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose |
1026 | /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose |
| 685 | * @{ |
1027 | * @{ |
| 686 | */ |
1028 | */ |
| 687 | 1029 | ||
| 688 | #define FORMAT_BIN RTC_FORMAT_BIN |
1030 | #define FORMAT_BIN RTC_FORMAT_BIN |
| 689 | #define FORMAT_BCD RTC_FORMAT_BCD |
1031 | #define FORMAT_BCD RTC_FORMAT_BCD |
| 690 | 1032 | ||
| 691 | #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE |
1033 | #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE |
| 692 | #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE |
- | |
| 693 | #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE |
1034 | #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE |
| 694 | #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
1035 | #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
| 695 | #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
1036 | #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
| 696 | 1037 | ||
| 697 | #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
1038 | #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
| 698 | #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
- | |
| 699 | #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE |
- | |
| 700 | #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE |
- | |
| 701 | #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE |
- | |
| 702 | #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
1039 | #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE |
| - | 1040 | #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE |
|
| 703 | #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
1041 | #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
| 704 | #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
1042 | #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT |
| 705 | 1043 | ||
| 706 | #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT |
1044 | #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT |
| 707 | #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 |
1045 | #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1 |
| 708 | #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 |
1046 | #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1 |
| 709 | #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 |
1047 | #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2 |
| 710 | 1048 | ||
| 711 | #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE |
1049 | #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE |
| 712 | #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 |
1050 | #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1 |
| 713 | #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 |
1051 | #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1 |
| 714 | 1052 | ||
| 715 | #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT |
1053 | #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT |
| 716 | #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 |
1054 | #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 |
| 717 | #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 |
1055 | #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 |
| 718 | 1056 | ||
| - | 1057 | #if defined(STM32H7) |
|
| - | 1058 | #define RTC_TAMPCR_TAMPXE RTC_TAMPER_X |
|
| - | 1059 | #define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT |
|
| - | 1060 | ||
| - | 1061 | #define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 |
|
| - | 1062 | #define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 |
|
| - | 1063 | #define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 |
|
| - | 1064 | #define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL |
|
| - | 1065 | #endif /* STM32H7 */ |
|
| - | 1066 | ||
| 719 | /** |
1067 | /** |
| 720 | * @} |
1068 | * @} |
| 721 | */ |
1069 | */ |
| 722 | 1070 | ||
| 723 | 1071 | ||
| 724 | /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose |
1072 | /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose |
| 725 | * @{ |
1073 | * @{ |
| 726 | */ |
1074 | */ |
| 727 | #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE |
1075 | #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE |
| 728 | #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE |
1076 | #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE |
| Line 739... | Line 1087... | ||
| 739 | #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE |
1087 | #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE |
| 740 | /** |
1088 | /** |
| 741 | * @} |
1089 | * @} |
| 742 | */ |
1090 | */ |
| 743 | 1091 | ||
| 744 | 1092 | ||
| 745 | /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose |
1093 | /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose |
| 746 | * @{ |
1094 | * @{ |
| 747 | */ |
1095 | */ |
| 748 | #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE |
1096 | #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE |
| 749 | #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE |
1097 | #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE |
| Line 757... | Line 1105... | ||
| 757 | #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE |
1105 | #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE |
| 758 | #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN |
1106 | #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN |
| 759 | /** |
1107 | /** |
| 760 | * @} |
1108 | * @} |
| 761 | */ |
1109 | */ |
| 762 | 1110 | ||
| 763 | /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose |
1111 | /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose |
| 764 | * @{ |
1112 | * @{ |
| 765 | */ |
1113 | */ |
| 766 | #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE |
1114 | #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE |
| 767 | #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE |
1115 | #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE |
| Line 770... | Line 1118... | ||
| 770 | #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE |
1118 | #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE |
| 771 | 1119 | ||
| 772 | #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE |
1120 | #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE |
| 773 | #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE |
1121 | #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE |
| 774 | 1122 | ||
| - | 1123 | #if defined(STM32H7) |
|
| - | 1124 | ||
| - | 1125 | #define SPI_FLAG_TXE SPI_FLAG_TXP |
|
| - | 1126 | #define SPI_FLAG_RXNE SPI_FLAG_RXP |
|
| - | 1127 | ||
| - | 1128 | #define SPI_IT_TXE SPI_IT_TXP |
|
| - | 1129 | #define SPI_IT_RXNE SPI_IT_RXP |
|
| - | 1130 | ||
| - | 1131 | #define SPI_FRLVL_EMPTY SPI_RX_FIFO_0PACKET |
|
| - | 1132 | #define SPI_FRLVL_QUARTER_FULL SPI_RX_FIFO_1PACKET |
|
| - | 1133 | #define SPI_FRLVL_HALF_FULL SPI_RX_FIFO_2PACKET |
|
| - | 1134 | #define SPI_FRLVL_FULL SPI_RX_FIFO_3PACKET |
|
| - | 1135 | ||
| - | 1136 | #endif /* STM32H7 */ |
|
| - | 1137 | ||
| 775 | /** |
1138 | /** |
| 776 | * @} |
1139 | * @} |
| 777 | */ |
1140 | */ |
| 778 | 1141 | ||
| 779 | /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose |
1142 | /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose |
| 780 | * @{ |
1143 | * @{ |
| 781 | */ |
1144 | */ |
| 782 | #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK |
1145 | #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK |
| 783 | #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK |
1146 | #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK |
| 784 | 1147 | ||
| 785 | #define TIM_DMABase_CR1 TIM_DMABASE_CR1 |
1148 | #define TIM_DMABase_CR1 TIM_DMABASE_CR1 |
| 786 | #define TIM_DMABase_CR2 TIM_DMABASE_CR2 |
1149 | #define TIM_DMABase_CR2 TIM_DMABASE_CR2 |
| 787 | #define TIM_DMABase_SMCR TIM_DMABASE_SMCR |
1150 | #define TIM_DMABase_SMCR TIM_DMABASE_SMCR |
| 788 | #define TIM_DMABase_DIER TIM_DMABASE_DIER |
1151 | #define TIM_DMABase_DIER TIM_DMABASE_DIER |
| 789 | #define TIM_DMABase_SR TIM_DMABASE_SR |
1152 | #define TIM_DMABase_SR TIM_DMABASE_SR |
| Line 837... | Line 1200... | ||
| 837 | #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS |
1200 | #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS |
| 838 | #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS |
1201 | #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS |
| 839 | #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS |
1202 | #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS |
| 840 | #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS |
1203 | #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS |
| 841 | 1204 | ||
| - | 1205 | #if defined(STM32L0) |
|
| - | 1206 | #define TIM22_TI1_GPIO1 TIM22_TI1_GPIO |
|
| - | 1207 | #define TIM22_TI1_GPIO2 TIM22_TI1_GPIO |
|
| - | 1208 | #endif |
|
| - | 1209 | ||
| - | 1210 | #if defined(STM32F3) |
|
| - | 1211 | #define IS_TIM_HALL_INTERFACE_INSTANCE IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE |
|
| - | 1212 | #endif |
|
| - | 1213 | ||
| - | 1214 | #if defined(STM32H7) |
|
| - | 1215 | #define TIM_TIM1_ETR_COMP1_OUT TIM_TIM1_ETR_COMP1 |
|
| - | 1216 | #define TIM_TIM1_ETR_COMP2_OUT TIM_TIM1_ETR_COMP2 |
|
| - | 1217 | #define TIM_TIM8_ETR_COMP1_OUT TIM_TIM8_ETR_COMP1 |
|
| - | 1218 | #define TIM_TIM8_ETR_COMP2_OUT TIM_TIM8_ETR_COMP2 |
|
| - | 1219 | #define TIM_TIM2_ETR_COMP1_OUT TIM_TIM2_ETR_COMP1 |
|
| - | 1220 | #define TIM_TIM2_ETR_COMP2_OUT TIM_TIM2_ETR_COMP2 |
|
| - | 1221 | #define TIM_TIM3_ETR_COMP1_OUT TIM_TIM3_ETR_COMP1 |
|
| - | 1222 | #define TIM_TIM1_TI1_COMP1_OUT TIM_TIM1_TI1_COMP1 |
|
| - | 1223 | #define TIM_TIM8_TI1_COMP2_OUT TIM_TIM8_TI1_COMP2 |
|
| - | 1224 | #define TIM_TIM2_TI4_COMP1_OUT TIM_TIM2_TI4_COMP1 |
|
| - | 1225 | #define TIM_TIM2_TI4_COMP2_OUT TIM_TIM2_TI4_COMP2 |
|
| - | 1226 | #define TIM_TIM2_TI4_COMP1COMP2_OUT TIM_TIM2_TI4_COMP1_COMP2 |
|
| - | 1227 | #define TIM_TIM3_TI1_COMP1_OUT TIM_TIM3_TI1_COMP1 |
|
| - | 1228 | #define TIM_TIM3_TI1_COMP2_OUT TIM_TIM3_TI1_COMP2 |
|
| - | 1229 | #define TIM_TIM3_TI1_COMP1COMP2_OUT TIM_TIM3_TI1_COMP1_COMP2 |
|
| - | 1230 | #endif |
|
| - | 1231 | ||
| 842 | /** |
1232 | /** |
| 843 | * @} |
1233 | * @} |
| 844 | */ |
1234 | */ |
| 845 | 1235 | ||
| 846 | /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose |
1236 | /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose |
| Line 880... | Line 1270... | ||
| 880 | 1270 | ||
| 881 | /** |
1271 | /** |
| 882 | * @} |
1272 | * @} |
| 883 | */ |
1273 | */ |
| 884 | 1274 | ||
| 885 | 1275 | ||
| 886 | /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose |
1276 | /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose |
| 887 | * @{ |
1277 | * @{ |
| 888 | */ |
1278 | */ |
| 889 | 1279 | ||
| 890 | #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE |
1280 | #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE |
| Line 913... | Line 1303... | ||
| 913 | #define CAN_IT_RQCP0 CAN_IT_TME |
1303 | #define CAN_IT_RQCP0 CAN_IT_TME |
| 914 | #define CAN_IT_RQCP1 CAN_IT_TME |
1304 | #define CAN_IT_RQCP1 CAN_IT_TME |
| 915 | #define CAN_IT_RQCP2 CAN_IT_TME |
1305 | #define CAN_IT_RQCP2 CAN_IT_TME |
| 916 | #define INAK_TIMEOUT CAN_TIMEOUT_VALUE |
1306 | #define INAK_TIMEOUT CAN_TIMEOUT_VALUE |
| 917 | #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE |
1307 | #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE |
| 918 | #define CAN_TXSTATUS_FAILED ((uint8_t)0x00) |
1308 | #define CAN_TXSTATUS_FAILED ((uint8_t)0x00U) |
| 919 | #define CAN_TXSTATUS_OK ((uint8_t)0x01) |
1309 | #define CAN_TXSTATUS_OK ((uint8_t)0x01U) |
| 920 | #define CAN_TXSTATUS_PENDING ((uint8_t)0x02) |
1310 | #define CAN_TXSTATUS_PENDING ((uint8_t)0x02U) |
| 921 | 1311 | ||
| 922 | /** |
1312 | /** |
| 923 | * @} |
1313 | * @} |
| 924 | */ |
1314 | */ |
| 925 | 1315 | ||
| 926 | /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose |
1316 | /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose |
| 927 | * @{ |
1317 | * @{ |
| 928 | */ |
1318 | */ |
| 929 | 1319 | ||
| 930 | #define VLAN_TAG ETH_VLAN_TAG |
1320 | #define VLAN_TAG ETH_VLAN_TAG |
| Line 945... | Line 1335... | ||
| 945 | #define ETH_MMCTGFMSCCR 0x00000150U |
1335 | #define ETH_MMCTGFMSCCR 0x00000150U |
| 946 | #define ETH_MMCTGFCR 0x00000168U |
1336 | #define ETH_MMCTGFCR 0x00000168U |
| 947 | #define ETH_MMCRFCECR 0x00000194U |
1337 | #define ETH_MMCRFCECR 0x00000194U |
| 948 | #define ETH_MMCRFAECR 0x00000198U |
1338 | #define ETH_MMCRFAECR 0x00000198U |
| 949 | #define ETH_MMCRGUFCR 0x000001C4U |
1339 | #define ETH_MMCRGUFCR 0x000001C4U |
| 950 | 1340 | ||
| 951 | #define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */ |
1341 | #define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */ |
| 952 | #define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */ |
1342 | #define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */ |
| 953 | #define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */ |
1343 | #define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */ |
| 954 | #define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */ |
1344 | #define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */ |
| 955 | #define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ |
1345 | #define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */ |
| Line 963... | Line 1353... | ||
| 963 | #define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */ |
1353 | #define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */ |
| 964 | #define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */ |
1354 | #define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */ |
| 965 | #define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ |
1355 | #define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */ |
| 966 | #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */ |
1356 | #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */ |
| 967 | #define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */ |
1357 | #define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */ |
| - | 1358 | #if defined(STM32F1) |
|
| - | 1359 | #else |
|
| 968 | #define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */ |
1360 | #define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */ |
| 969 | #define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */ |
1361 | #define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */ |
| 970 | #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */ |
1362 | #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */ |
| - | 1363 | #endif |
|
| 971 | #define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */ |
1364 | #define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */ |
| 972 | #define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */ |
1365 | #define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */ |
| 973 | #define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */ |
1366 | #define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */ |
| 974 | #define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */ |
1367 | #define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */ |
| 975 | #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */ |
1368 | #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */ |
| Line 977... | Line 1370... | ||
| 977 | #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ |
1370 | #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ |
| 978 | 1371 | ||
| 979 | /** |
1372 | /** |
| 980 | * @} |
1373 | * @} |
| 981 | */ |
1374 | */ |
| 982 | 1375 | ||
| 983 | /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose |
1376 | /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose |
| 984 | * @{ |
1377 | * @{ |
| 985 | */ |
1378 | */ |
| 986 | #define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR |
1379 | #define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR |
| 987 | #define DCMI_IT_OVF DCMI_IT_OVR |
1380 | #define DCMI_IT_OVF DCMI_IT_OVR |
| Line 992... | Line 1385... | ||
| 992 | #define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop |
1385 | #define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop |
| 993 | #define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop |
1386 | #define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop |
| 994 | 1387 | ||
| 995 | /** |
1388 | /** |
| 996 | * @} |
1389 | * @} |
| 997 | */ |
1390 | */ |
| 998 | 1391 | ||
| 999 | #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\ |
1392 | #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \ |
| 1000 | defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) |
1393 | || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \ |
| - | 1394 | || defined(STM32H7) |
|
| 1001 | /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose |
1395 | /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose |
| 1002 | * @{ |
1396 | * @{ |
| 1003 | */ |
1397 | */ |
| 1004 | #define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 |
1398 | #define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888 |
| 1005 | #define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 |
1399 | #define DMA2D_RGB888 DMA2D_OUTPUT_RGB888 |
| 1006 | #define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 |
1400 | #define DMA2D_RGB565 DMA2D_OUTPUT_RGB565 |
| 1007 | #define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 |
1401 | #define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555 |
| 1008 | #define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 |
1402 | #define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444 |
| 1009 | 1403 | ||
| 1010 | #define CM_ARGB8888 DMA2D_INPUT_ARGB8888 |
1404 | #define CM_ARGB8888 DMA2D_INPUT_ARGB8888 |
| 1011 | #define CM_RGB888 DMA2D_INPUT_RGB888 |
1405 | #define CM_RGB888 DMA2D_INPUT_RGB888 |
| 1012 | #define CM_RGB565 DMA2D_INPUT_RGB565 |
1406 | #define CM_RGB565 DMA2D_INPUT_RGB565 |
| 1013 | #define CM_ARGB1555 DMA2D_INPUT_ARGB1555 |
1407 | #define CM_ARGB1555 DMA2D_INPUT_ARGB1555 |
| 1014 | #define CM_ARGB4444 DMA2D_INPUT_ARGB4444 |
1408 | #define CM_ARGB4444 DMA2D_INPUT_ARGB4444 |
| 1015 | #define CM_L8 DMA2D_INPUT_L8 |
1409 | #define CM_L8 DMA2D_INPUT_L8 |
| 1016 | #define CM_AL44 DMA2D_INPUT_AL44 |
1410 | #define CM_AL44 DMA2D_INPUT_AL44 |
| 1017 | #define CM_AL88 DMA2D_INPUT_AL88 |
1411 | #define CM_AL88 DMA2D_INPUT_AL88 |
| 1018 | #define CM_L4 DMA2D_INPUT_L4 |
1412 | #define CM_L4 DMA2D_INPUT_L4 |
| 1019 | #define CM_A8 DMA2D_INPUT_A8 |
1413 | #define CM_A8 DMA2D_INPUT_A8 |
| 1020 | #define CM_A4 DMA2D_INPUT_A4 |
1414 | #define CM_A4 DMA2D_INPUT_A4 |
| 1021 | /** |
1415 | /** |
| 1022 | * @} |
1416 | * @} |
| 1023 | */ |
1417 | */ |
| 1024 | #endif /* STM32L4 || STM32F7*/ |
1418 | #endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */ |
| 1025 | 1419 | ||
| 1026 | /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose |
1420 | /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose |
| 1027 | * @{ |
1421 | * @{ |
| 1028 | */ |
1422 | */ |
| 1029 | 1423 | ||
| 1030 | /** |
1424 | /** |
| 1031 | * @} |
1425 | * @} |
| 1032 | */ |
1426 | */ |
| 1033 | 1427 | ||
| 1034 | /* Exported functions --------------------------------------------------------*/ |
1428 | /* Exported functions --------------------------------------------------------*/ |
| Line 1037... | Line 1431... | ||
| 1037 | * @{ |
1431 | * @{ |
| 1038 | */ |
1432 | */ |
| 1039 | #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback |
1433 | #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback |
| 1040 | /** |
1434 | /** |
| 1041 | * @} |
1435 | * @} |
| 1042 | */ |
1436 | */ |
| 1043 | 1437 | ||
| 1044 | /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose |
1438 | /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose |
| 1045 | * @{ |
1439 | * @{ |
| 1046 | */ |
1440 | */ |
| 1047 | #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef |
1441 | #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef |
| 1048 | #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef |
1442 | #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef |
| 1049 | #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish |
1443 | #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish |
| 1050 | #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish |
1444 | #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish |
| 1051 | #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish |
1445 | #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish |
| 1052 | #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish |
1446 | #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish |
| 1053 | 1447 | ||
| 1054 | /*HASH Algorithm Selection*/ |
1448 | /*HASH Algorithm Selection*/ |
| 1055 | 1449 | ||
| 1056 | #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 |
1450 | #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1 |
| 1057 | #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 |
1451 | #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224 |
| 1058 | #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 |
1452 | #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256 |
| 1059 | #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 |
1453 | #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5 |
| 1060 | 1454 | ||
| 1061 | #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH |
1455 | #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH |
| 1062 | #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC |
1456 | #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC |
| 1063 | 1457 | ||
| 1064 | #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY |
1458 | #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY |
| 1065 | #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY |
1459 | #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY |
| - | 1460 | ||
| - | 1461 | #if defined(STM32L4) || defined(STM32L5) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) |
|
| - | 1462 | ||
| - | 1463 | #define HAL_HASH_MD5_Accumulate HAL_HASH_MD5_Accmlt |
|
| - | 1464 | #define HAL_HASH_MD5_Accumulate_End HAL_HASH_MD5_Accmlt_End |
|
| - | 1465 | #define HAL_HASH_MD5_Accumulate_IT HAL_HASH_MD5_Accmlt_IT |
|
| - | 1466 | #define HAL_HASH_MD5_Accumulate_End_IT HAL_HASH_MD5_Accmlt_End_IT |
|
| - | 1467 | ||
| - | 1468 | #define HAL_HASH_SHA1_Accumulate HAL_HASH_SHA1_Accmlt |
|
| - | 1469 | #define HAL_HASH_SHA1_Accumulate_End HAL_HASH_SHA1_Accmlt_End |
|
| - | 1470 | #define HAL_HASH_SHA1_Accumulate_IT HAL_HASH_SHA1_Accmlt_IT |
|
| - | 1471 | #define HAL_HASH_SHA1_Accumulate_End_IT HAL_HASH_SHA1_Accmlt_End_IT |
|
| - | 1472 | ||
| - | 1473 | #define HAL_HASHEx_SHA224_Accumulate HAL_HASHEx_SHA224_Accmlt |
|
| - | 1474 | #define HAL_HASHEx_SHA224_Accumulate_End HAL_HASHEx_SHA224_Accmlt_End |
|
| - | 1475 | #define HAL_HASHEx_SHA224_Accumulate_IT HAL_HASHEx_SHA224_Accmlt_IT |
|
| - | 1476 | #define HAL_HASHEx_SHA224_Accumulate_End_IT HAL_HASHEx_SHA224_Accmlt_End_IT |
|
| - | 1477 | ||
| - | 1478 | #define HAL_HASHEx_SHA256_Accumulate HAL_HASHEx_SHA256_Accmlt |
|
| - | 1479 | #define HAL_HASHEx_SHA256_Accumulate_End HAL_HASHEx_SHA256_Accmlt_End |
|
| - | 1480 | #define HAL_HASHEx_SHA256_Accumulate_IT HAL_HASHEx_SHA256_Accmlt_IT |
|
| - | 1481 | #define HAL_HASHEx_SHA256_Accumulate_End_IT HAL_HASHEx_SHA256_Accmlt_End_IT |
|
| - | 1482 | ||
| - | 1483 | #endif /* STM32L4 || STM32L5 || STM32F2 || STM32F4 || STM32F7 || STM32H7 */ |
|
| 1066 | /** |
1484 | /** |
| 1067 | * @} |
1485 | * @} |
| 1068 | */ |
1486 | */ |
| 1069 | 1487 | ||
| 1070 | /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose |
1488 | /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose |
| 1071 | * @{ |
1489 | * @{ |
| 1072 | */ |
1490 | */ |
| 1073 | #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode |
1491 | #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode |
| 1074 | #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode |
1492 | #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode |
| Line 1083... | Line 1501... | ||
| 1083 | #else |
1501 | #else |
| 1084 | #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) |
1502 | #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT()) |
| 1085 | #endif |
1503 | #endif |
| 1086 | #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) |
1504 | #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) |
| 1087 | #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) |
1505 | #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) |
| - | 1506 | #if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ) |
|
| - | 1507 | #define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode |
|
| - | 1508 | #define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode |
|
| - | 1509 | #define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode |
|
| - | 1510 | #define HAL_DisableSRDomainDBGStandbyMode HAL_DisableDomain3DBGStandbyMode |
|
| - | 1511 | #endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ || STM32H7B0xxQ */ |
|
| - | 1512 | ||
| 1088 | /** |
1513 | /** |
| 1089 | * @} |
1514 | * @} |
| 1090 | */ |
1515 | */ |
| 1091 | 1516 | ||
| 1092 | /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose |
1517 | /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose |
| Line 1111... | Line 1536... | ||
| 1111 | #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter |
1536 | #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter |
| 1112 | #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter |
1537 | #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter |
| 1113 | #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter |
1538 | #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter |
| 1114 | 1539 | ||
| 1115 | #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) |
1540 | #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) |
| - | 1541 | ||
| - | 1542 | #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1) |
|
| - | 1543 | #define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT |
|
| - | 1544 | #define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT |
|
| - | 1545 | #define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT |
|
| - | 1546 | #define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT |
|
| - | 1547 | #endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */ |
|
| - | 1548 | #if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1) |
|
| - | 1549 | #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA |
|
| - | 1550 | #define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA |
|
| - | 1551 | #define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA |
|
| - | 1552 | #define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA |
|
| - | 1553 | #endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */ |
|
| - | 1554 | ||
| - | 1555 | #if defined(STM32F4) |
|
| - | 1556 | #define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT |
|
| - | 1557 | #define HAL_FMPI2C_Master_Sequential_Receive_IT HAL_FMPI2C_Master_Seq_Receive_IT |
|
| - | 1558 | #define HAL_FMPI2C_Slave_Sequential_Transmit_IT HAL_FMPI2C_Slave_Seq_Transmit_IT |
|
| - | 1559 | #define HAL_FMPI2C_Slave_Sequential_Receive_IT HAL_FMPI2C_Slave_Seq_Receive_IT |
|
| - | 1560 | #define HAL_FMPI2C_Master_Sequential_Transmit_DMA HAL_FMPI2C_Master_Seq_Transmit_DMA |
|
| - | 1561 | #define HAL_FMPI2C_Master_Sequential_Receive_DMA HAL_FMPI2C_Master_Seq_Receive_DMA |
|
| - | 1562 | #define HAL_FMPI2C_Slave_Sequential_Transmit_DMA HAL_FMPI2C_Slave_Seq_Transmit_DMA |
|
| - | 1563 | #define HAL_FMPI2C_Slave_Sequential_Receive_DMA HAL_FMPI2C_Slave_Seq_Receive_DMA |
|
| - | 1564 | #endif /* STM32F4 */ |
|
| 1116 | /** |
1565 | /** |
| 1117 | * @} |
1566 | * @} |
| 1118 | */ |
1567 | */ |
| 1119 | 1568 | ||
| 1120 | /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose |
1569 | /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose |
| 1121 | * @{ |
1570 | * @{ |
| 1122 | */ |
1571 | */ |
| - | 1572 | ||
| - | 1573 | #if defined(STM32G0) |
|
| - | 1574 | #define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD |
|
| - | 1575 | #define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD |
|
| - | 1576 | #define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD |
|
| - | 1577 | #define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler |
|
| - | 1578 | #endif |
|
| 1123 | #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD |
1579 | #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD |
| 1124 | #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg |
1580 | #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg |
| 1125 | #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown |
1581 | #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown |
| 1126 | #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor |
1582 | #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor |
| 1127 | #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg |
1583 | #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg |
| Line 1145... | Line 1601... | ||
| 1145 | #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING |
1601 | #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING |
| 1146 | #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING |
1602 | #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING |
| 1147 | 1603 | ||
| 1148 | #define CR_OFFSET_BB PWR_CR_OFFSET_BB |
1604 | #define CR_OFFSET_BB PWR_CR_OFFSET_BB |
| 1149 | #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB |
1605 | #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB |
| - | 1606 | #define PMODE_BIT_NUMBER VOS_BIT_NUMBER |
|
| - | 1607 | #define CR_PMODE_BB CR_VOS_BB |
|
| 1150 | 1608 | ||
| 1151 | #define DBP_BitNumber DBP_BIT_NUMBER |
1609 | #define DBP_BitNumber DBP_BIT_NUMBER |
| 1152 | #define PVDE_BitNumber PVDE_BIT_NUMBER |
1610 | #define PVDE_BitNumber PVDE_BIT_NUMBER |
| 1153 | #define PMODE_BitNumber PMODE_BIT_NUMBER |
1611 | #define PMODE_BitNumber PMODE_BIT_NUMBER |
| 1154 | #define EWUP_BitNumber EWUP_BIT_NUMBER |
1612 | #define EWUP_BitNumber EWUP_BIT_NUMBER |
| Line 1158... | Line 1616... | ||
| 1158 | #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER |
1616 | #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER |
| 1159 | #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER |
1617 | #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER |
| 1160 | #define BRE_BitNumber BRE_BIT_NUMBER |
1618 | #define BRE_BitNumber BRE_BIT_NUMBER |
| 1161 | 1619 | ||
| 1162 | #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL |
1620 | #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL |
| 1163 | 1621 | ||
| 1164 | /** |
1622 | /** |
| 1165 | * @} |
1623 | * @} |
| 1166 | */ |
1624 | */ |
| 1167 | 1625 | ||
| 1168 | /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose |
1626 | /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose |
| 1169 | * @{ |
1627 | * @{ |
| 1170 | */ |
1628 | */ |
| 1171 | #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT |
1629 | #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT |
| 1172 | #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback |
1630 | #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback |
| 1173 | #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback |
1631 | #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback |
| 1174 | /** |
1632 | /** |
| 1175 | * @} |
1633 | * @} |
| 1176 | */ |
1634 | */ |
| 1177 | 1635 | ||
| 1178 | /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose |
1636 | /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose |
| 1179 | * @{ |
1637 | * @{ |
| 1180 | */ |
1638 | */ |
| 1181 | #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo |
1639 | #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo |
| 1182 | /** |
1640 | /** |
| 1183 | * @} |
1641 | * @} |
| 1184 | */ |
1642 | */ |
| 1185 | 1643 | ||
| 1186 | /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose |
1644 | /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose |
| 1187 | * @{ |
1645 | * @{ |
| 1188 | */ |
1646 | */ |
| 1189 | #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt |
1647 | #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt |
| 1190 | #define HAL_TIM_DMAError TIM_DMAError |
1648 | #define HAL_TIM_DMAError TIM_DMAError |
| 1191 | #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt |
1649 | #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt |
| 1192 | #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt |
1650 | #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt |
| - | 1651 | #if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) |
|
| - | 1652 | #define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro |
|
| - | 1653 | #define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT |
|
| - | 1654 | #define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback |
|
| - | 1655 | #define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent |
|
| - | 1656 | #define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT |
|
| - | 1657 | #define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA |
|
| - | 1658 | #endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */ |
|
| 1193 | /** |
1659 | /** |
| 1194 | * @} |
1660 | * @} |
| 1195 | */ |
1661 | */ |
| 1196 | 1662 | ||
| 1197 | /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose |
1663 | /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose |
| 1198 | * @{ |
1664 | * @{ |
| 1199 | */ |
1665 | */ |
| 1200 | #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback |
1666 | #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback |
| 1201 | /** |
1667 | /** |
| 1202 | * @} |
1668 | * @} |
| 1203 | */ |
1669 | */ |
| 1204 | 1670 | ||
| 1205 | /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose |
1671 | /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose |
| 1206 | * @{ |
1672 | * @{ |
| 1207 | */ |
1673 | */ |
| 1208 | #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback |
1674 | #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback |
| 1209 | #define HAL_LTDC_Relaod HAL_LTDC_Reload |
1675 | #define HAL_LTDC_Relaod HAL_LTDC_Reload |
| 1210 | #define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig |
1676 | #define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig |
| 1211 | #define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig |
1677 | #define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig |
| 1212 | /** |
1678 | /** |
| 1213 | * @} |
1679 | * @} |
| 1214 | */ |
1680 | */ |
| 1215 | 1681 | ||
| 1216 | 1682 | ||
| 1217 | /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose |
1683 | /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose |
| 1218 | * @{ |
1684 | * @{ |
| 1219 | */ |
1685 | */ |
| 1220 | 1686 | ||
| 1221 | /** |
1687 | /** |
| 1222 | * @} |
1688 | * @} |
| 1223 | */ |
1689 | */ |
| 1224 | 1690 | ||
| 1225 | /* Exported macros ------------------------------------------------------------*/ |
1691 | /* Exported macros ------------------------------------------------------------*/ |
| Line 1230... | Line 1696... | ||
| 1230 | #define AES_IT_CC CRYP_IT_CC |
1696 | #define AES_IT_CC CRYP_IT_CC |
| 1231 | #define AES_IT_ERR CRYP_IT_ERR |
1697 | #define AES_IT_ERR CRYP_IT_ERR |
| 1232 | #define AES_FLAG_CCF CRYP_FLAG_CCF |
1698 | #define AES_FLAG_CCF CRYP_FLAG_CCF |
| 1233 | /** |
1699 | /** |
| 1234 | * @} |
1700 | * @} |
| 1235 | */ |
1701 | */ |
| 1236 | 1702 | ||
| 1237 | /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose |
1703 | /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose |
| 1238 | * @{ |
1704 | * @{ |
| 1239 | */ |
1705 | */ |
| 1240 | #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE |
1706 | #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE |
| 1241 | #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH |
1707 | #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH |
| 1242 | #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH |
1708 | #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH |
| 1243 | #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM |
1709 | #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM |
| 1244 | #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC |
1710 | #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC |
| 1245 | #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM |
1711 | #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM |
| 1246 | #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC |
1712 | #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC |
| 1247 | #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI |
1713 | #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI |
| 1248 | #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK |
1714 | #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK |
| 1249 | #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG |
1715 | #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG |
| 1250 | #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG |
1716 | #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG |
| Line 1260... | Line 1726... | ||
| 1260 | 1726 | ||
| 1261 | /** |
1727 | /** |
| 1262 | * @} |
1728 | * @} |
| 1263 | */ |
1729 | */ |
| 1264 | 1730 | ||
| 1265 | 1731 | ||
| 1266 | /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose |
1732 | /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose |
| 1267 | * @{ |
1733 | * @{ |
| 1268 | */ |
1734 | */ |
| 1269 | #define __ADC_ENABLE __HAL_ADC_ENABLE |
1735 | #define __ADC_ENABLE __HAL_ADC_ENABLE |
| 1270 | #define __ADC_DISABLE __HAL_ADC_DISABLE |
1736 | #define __ADC_DISABLE __HAL_ADC_DISABLE |
| Line 1330... | Line 1796... | ||
| 1330 | #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS |
1796 | #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS |
| 1331 | #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS |
1797 | #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS |
| 1332 | #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV |
1798 | #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV |
| 1333 | #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection |
1799 | #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection |
| 1334 | #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq |
1800 | #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq |
| 1335 | #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION |
- | |
| 1336 | #define __HAL_ADC_JSQR ADC_JSQR |
1801 | #define __HAL_ADC_JSQR ADC_JSQR |
| 1337 | 1802 | ||
| 1338 | #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL |
1803 | #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL |
| 1339 | #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS |
1804 | #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS |
| 1340 | #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF |
1805 | #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF |
| Line 1357... | Line 1822... | ||
| 1357 | #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE |
1822 | #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE |
| 1358 | 1823 | ||
| 1359 | /** |
1824 | /** |
| 1360 | * @} |
1825 | * @} |
| 1361 | */ |
1826 | */ |
| 1362 | 1827 | ||
| 1363 | /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose |
1828 | /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose |
| 1364 | * @{ |
1829 | * @{ |
| 1365 | */ |
1830 | */ |
| 1366 | #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 |
1831 | #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1 |
| 1367 | #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 |
1832 | #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1 |
| Line 1402... | Line 1867... | ||
| 1402 | #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 |
1867 | #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16 |
| 1403 | #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 |
1868 | #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17 |
| 1404 | #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 |
1869 | #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17 |
| 1405 | #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC |
1870 | #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC |
| 1406 | #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC |
1871 | #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC |
| - | 1872 | #if defined(STM32H7) |
|
| - | 1873 | #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG1 |
|
| - | 1874 | #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UnFreeze_WWDG1 |
|
| - | 1875 | #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG1 |
|
| - | 1876 | #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UnFreeze_IWDG1 |
|
| - | 1877 | #else |
|
| 1407 | #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG |
1878 | #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG |
| 1408 | #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG |
1879 | #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG |
| 1409 | #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG |
1880 | #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG |
| 1410 | #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG |
1881 | #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG |
| - | 1882 | #endif /* STM32H7 */ |
|
| 1411 | #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT |
1883 | #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT |
| 1412 | #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT |
1884 | #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT |
| 1413 | #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT |
1885 | #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT |
| 1414 | #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT |
1886 | #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT |
| 1415 | #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT |
1887 | #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT |
| Line 1430... | Line 1902... | ||
| 1430 | */ |
1902 | */ |
| 1431 | #if defined(STM32F3) |
1903 | #if defined(STM32F3) |
| 1432 | #define COMP_START __HAL_COMP_ENABLE |
1904 | #define COMP_START __HAL_COMP_ENABLE |
| 1433 | #define COMP_STOP __HAL_COMP_DISABLE |
1905 | #define COMP_STOP __HAL_COMP_DISABLE |
| 1434 | #define COMP_LOCK __HAL_COMP_LOCK |
1906 | #define COMP_LOCK __HAL_COMP_LOCK |
| 1435 | 1907 | ||
| 1436 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
1908 | #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx) |
| 1437 | #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ |
1909 | #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ |
| 1438 | ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ |
1910 | ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ |
| 1439 | __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) |
1911 | __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE()) |
| 1440 | #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ |
1912 | #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \ |
| Line 1617... | Line 2089... | ||
| 1617 | */ |
2089 | */ |
| 1618 | 2090 | ||
| 1619 | #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ |
2091 | #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \ |
| 1620 | ((WAVE) == DAC_WAVE_NOISE)|| \ |
2092 | ((WAVE) == DAC_WAVE_NOISE)|| \ |
| 1621 | ((WAVE) == DAC_WAVE_TRIANGLE)) |
2093 | ((WAVE) == DAC_WAVE_TRIANGLE)) |
| 1622 | 2094 | ||
| 1623 | /** |
2095 | /** |
| 1624 | * @} |
2096 | * @} |
| 1625 | */ |
2097 | */ |
| 1626 | 2098 | ||
| 1627 | /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose |
2099 | /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose |
| Line 1636... | Line 2108... | ||
| 1636 | #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE |
2108 | #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE |
| 1637 | 2109 | ||
| 1638 | /** |
2110 | /** |
| 1639 | * @} |
2111 | * @} |
| 1640 | */ |
2112 | */ |
| 1641 | 2113 | ||
| 1642 | /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose |
2114 | /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose |
| 1643 | * @{ |
2115 | * @{ |
| 1644 | */ |
2116 | */ |
| 1645 | 2117 | ||
| 1646 | #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 |
2118 | #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2 |
| 1647 | #define __HAL_I2C_GENERATE_START I2C_GENERATE_START |
2119 | #define __HAL_I2C_GENERATE_START I2C_GENERATE_START |
| 1648 | #if defined(STM32F1) |
2120 | #if defined(STM32F1) |
| 1649 | #define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE |
2121 | #define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE |
| 1650 | #else |
2122 | #else |
| Line 1663... | Line 2135... | ||
| 1663 | #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB |
2135 | #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB |
| 1664 | #define __HAL_I2C_FREQRANGE I2C_FREQRANGE |
2136 | #define __HAL_I2C_FREQRANGE I2C_FREQRANGE |
| 1665 | /** |
2137 | /** |
| 1666 | * @} |
2138 | * @} |
| 1667 | */ |
2139 | */ |
| 1668 | 2140 | ||
| 1669 | /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose |
2141 | /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose |
| 1670 | * @{ |
2142 | * @{ |
| 1671 | */ |
2143 | */ |
| 1672 | 2144 | ||
| 1673 | #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE |
2145 | #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE |
| 1674 | #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT |
2146 | #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT |
| 1675 | 2147 | ||
| - | 2148 | #if defined(STM32H7) |
|
| - | 2149 | #define __HAL_I2S_CLEAR_FREFLAG __HAL_I2S_CLEAR_TIFREFLAG |
|
| - | 2150 | #endif |
|
| - | 2151 | ||
| 1676 | /** |
2152 | /** |
| 1677 | * @} |
2153 | * @} |
| 1678 | */ |
2154 | */ |
| 1679 | 2155 | ||
| 1680 | /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose |
2156 | /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose |
| 1681 | * @{ |
2157 | * @{ |
| 1682 | */ |
2158 | */ |
| 1683 | 2159 | ||
| 1684 | #define __IRDA_DISABLE __HAL_IRDA_DISABLE |
2160 | #define __IRDA_DISABLE __HAL_IRDA_DISABLE |
| 1685 | #define __IRDA_ENABLE __HAL_IRDA_ENABLE |
2161 | #define __IRDA_ENABLE __HAL_IRDA_ENABLE |
| 1686 | 2162 | ||
| 1687 | #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
2163 | #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
| 1688 | #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
2164 | #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
| 1689 | #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
2165 | #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE |
| 1690 | #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
2166 | #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION |
| 1691 | 2167 | ||
| 1692 | #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE |
2168 | #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE |
| 1693 | 2169 | ||
| 1694 | 2170 | ||
| 1695 | /** |
2171 | /** |
| 1696 | * @} |
2172 | * @} |
| 1697 | */ |
2173 | */ |
| Line 1716... | Line 2192... | ||
| 1716 | #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE |
2192 | #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE |
| 1717 | 2193 | ||
| 1718 | /** |
2194 | /** |
| 1719 | * @} |
2195 | * @} |
| 1720 | */ |
2196 | */ |
| 1721 | 2197 | ||
| 1722 | 2198 | ||
| 1723 | /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose |
2199 | /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose |
| 1724 | * @{ |
2200 | * @{ |
| 1725 | */ |
2201 | */ |
| 1726 | #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD |
2202 | #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD |
| 1727 | #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX |
2203 | #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX |
| Line 1782... | Line 2258... | ||
| 1782 | #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB |
2258 | #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB |
| 1783 | 2259 | ||
| 1784 | #if defined (STM32F4) |
2260 | #if defined (STM32F4) |
| 1785 | #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() |
2261 | #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT() |
| 1786 | #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() |
2262 | #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT() |
| 1787 | #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() |
2263 | #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG() |
| 1788 | #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() |
2264 | #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG() |
| 1789 | #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() |
2265 | #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT() |
| 1790 | #else |
2266 | #else |
| 1791 | #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG |
2267 | #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG |
| 1792 | #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT |
2268 | #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT |
| 1793 | #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT |
2269 | #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT |
| 1794 | #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT |
2270 | #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT |
| 1795 | #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG |
2271 | #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG |
| 1796 | #endif /* STM32F4 */ |
2272 | #endif /* STM32F4 */ |
| 1797 | /** |
2273 | /** |
| 1798 | * @} |
2274 | * @} |
| 1799 | */ |
2275 | */ |
| 1800 | 2276 | ||
| 1801 | 2277 | ||
| 1802 | /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose |
2278 | /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose |
| 1803 | * @{ |
2279 | * @{ |
| 1804 | */ |
2280 | */ |
| 1805 | 2281 | ||
| 1806 | #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI |
2282 | #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI |
| 1807 | #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI |
2283 | #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI |
| 1808 | 2284 | ||
| 1809 | #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback |
2285 | #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback |
| 1810 | #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) |
2286 | #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT()) |
| 1811 | 2287 | ||
| 1812 | #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE |
2288 | #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE |
| 1813 | #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE |
2289 | #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE |
| 1814 | #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE |
2290 | #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE |
| 1815 | #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE |
2291 | #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE |
| 1816 | #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET |
2292 | #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET |
| 1817 | #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET |
2293 | #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET |
| 1818 | #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE |
2294 | #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE |
| 1819 | #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE |
2295 | #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE |
| 1820 | #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET |
2296 | #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET |
| 1821 | #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET |
2297 | #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET |
| 1822 | #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE |
2298 | #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE |
| 1823 | #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE |
2299 | #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE |
| 1824 | #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE |
2300 | #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE |
| 1825 | #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE |
2301 | #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE |
| 1826 | #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET |
2302 | #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET |
| 1827 | #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET |
2303 | #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET |
| 1828 | #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE |
2304 | #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE |
| 1829 | #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE |
2305 | #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE |
| 1830 | #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET |
2306 | #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET |
| Line 1837... | Line 2313... | ||
| 1837 | #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET |
2313 | #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET |
| 1838 | #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE |
2314 | #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE |
| 1839 | #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE |
2315 | #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE |
| 1840 | #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE |
2316 | #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE |
| 1841 | #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE |
2317 | #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE |
| 1842 | #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET |
2318 | #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET |
| 1843 | #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET |
2319 | #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET |
| 1844 | #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE |
2320 | #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE |
| 1845 | #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE |
2321 | #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE |
| 1846 | #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET |
2322 | #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET |
| 1847 | #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET |
2323 | #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET |
| Line 2065... | Line 2541... | ||
| 2065 | #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE |
2541 | #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE |
| 2066 | #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE |
2542 | #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE |
| 2067 | #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE |
2543 | #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE |
| 2068 | #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET |
2544 | #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET |
| 2069 | #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET |
2545 | #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET |
| - | 2546 | ||
| - | 2547 | #if defined(STM32WB) |
|
| - | 2548 | #define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE |
|
| - | 2549 | #define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE |
|
| - | 2550 | #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE |
|
| - | 2551 | #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE |
|
| - | 2552 | #define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET |
|
| - | 2553 | #define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET |
|
| - | 2554 | #define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED |
|
| - | 2555 | #define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED |
|
| - | 2556 | #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED |
|
| - | 2557 | #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED |
|
| - | 2558 | #define QSPI_IRQHandler QUADSPI_IRQHandler |
|
| - | 2559 | #endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */ |
|
| - | 2560 | ||
| 2070 | #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE |
2561 | #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE |
| 2071 | #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE |
2562 | #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE |
| 2072 | #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE |
2563 | #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE |
| 2073 | #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE |
2564 | #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE |
| 2074 | #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET |
2565 | #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET |
| Line 2256... | Line 2747... | ||
| 2256 | #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET |
2747 | #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET |
| 2257 | #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET |
2748 | #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET |
| 2258 | #define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE |
2749 | #define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE |
| 2259 | #define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE |
2750 | #define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE |
| 2260 | #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE |
2751 | #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE |
| 2261 | #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE |
2752 | #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE |
| 2262 | #define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET |
2753 | #define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET |
| 2263 | #define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET |
2754 | #define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET |
| 2264 | #define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE |
2755 | #define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE |
| 2265 | #define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE |
2756 | #define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE |
| 2266 | #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE |
2757 | #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE |
| 2267 | #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE |
2758 | #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE |
| 2268 | #define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET |
2759 | #define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET |
| 2269 | #define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET |
2760 | #define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET |
| 2270 | #define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
2761 | #define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
| 2271 | #define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
2762 | #define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
| 2272 | #define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
2763 | #define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
| Line 2281... | Line 2772... | ||
| 2281 | #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE |
2772 | #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE |
| 2282 | #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE |
2773 | #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE |
| 2283 | #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE |
2774 | #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE |
| 2284 | #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE |
2775 | #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE |
| 2285 | #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET |
2776 | #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET |
| - | 2777 | ||
| - | 2778 | #if defined(STM32H7) |
|
| - | 2779 | #define __HAL_RCC_WWDG_CLK_DISABLE __HAL_RCC_WWDG1_CLK_DISABLE |
|
| - | 2780 | #define __HAL_RCC_WWDG_CLK_ENABLE __HAL_RCC_WWDG1_CLK_ENABLE |
|
| - | 2781 | #define __HAL_RCC_WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG1_CLK_SLEEP_DISABLE |
|
| - | 2782 | #define __HAL_RCC_WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG1_CLK_SLEEP_ENABLE |
|
| - | 2783 | ||
| - | 2784 | #define __HAL_RCC_WWDG_FORCE_RESET ((void)0U) /* Not available on the STM32H7*/ |
|
| - | 2785 | #define __HAL_RCC_WWDG_RELEASE_RESET ((void)0U) /* Not available on the STM32H7*/ |
|
| - | 2786 | ||
| - | 2787 | ||
| - | 2788 | #define __HAL_RCC_WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG1_IS_CLK_ENABLED |
|
| - | 2789 | #define __HAL_RCC_WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG1_IS_CLK_DISABLED |
|
| - | 2790 | #endif |
|
| - | 2791 | ||
| 2286 | #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE |
2792 | #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE |
| 2287 | #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE |
2793 | #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE |
| 2288 | #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE |
2794 | #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE |
| 2289 | #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE |
2795 | #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE |
| 2290 | #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET |
2796 | #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET |
| 2291 | #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET |
2797 | #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET |
| - | 2798 | ||
| 2292 | #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE |
2799 | #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE |
| 2293 | #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE |
2800 | #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE |
| 2294 | #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET |
2801 | #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET |
| 2295 | #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET |
2802 | #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET |
| 2296 | #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE |
2803 | #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE |
| Line 2315... | Line 2822... | ||
| 2315 | #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE |
2822 | #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE |
| 2316 | #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE |
2823 | #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE |
| 2317 | #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE |
2824 | #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE |
| 2318 | #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE |
2825 | #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE |
| 2319 | #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE |
2826 | #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE |
| 2320 | #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE |
2827 | #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE |
| 2321 | #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE |
2828 | #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE |
| 2322 | #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE |
2829 | #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE |
| 2323 | #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE |
2830 | #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE |
| 2324 | #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE |
2831 | #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE |
| 2325 | #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE |
2832 | #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE |
| 2326 | #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE |
2833 | #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE |
| 2327 | #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE |
2834 | #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE |
| 2328 | #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE |
2835 | #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE |
| 2329 | #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE |
2836 | #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE |
| 2330 | #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE |
2837 | #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE |
| 2331 | #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE |
2838 | #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE |
| 2332 | #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET |
2839 | #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET |
| 2333 | #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET |
2840 | #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET |
| 2334 | #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE |
2841 | #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE |
| 2335 | #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE |
2842 | #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE |
| 2336 | #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE |
2843 | #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE |
| 2337 | #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE |
2844 | #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE |
| 2338 | #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE |
2845 | #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE |
| 2339 | #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET |
2846 | #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET |
| 2340 | #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET |
2847 | #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET |
| 2341 | #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE |
2848 | #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE |
| 2342 | #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE |
2849 | #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE |
| 2343 | #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE |
2850 | #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE |
| 2344 | #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE |
2851 | #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE |
| 2345 | #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET |
2852 | #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET |
| 2346 | #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET |
2853 | #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET |
| 2347 | #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE |
2854 | #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE |
| 2348 | #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE |
2855 | #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE |
| 2349 | #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE |
2856 | #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE |
| 2350 | #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE |
2857 | #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE |
| 2351 | #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET |
2858 | #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET |
| 2352 | #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET |
2859 | #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET |
| 2353 | #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE |
2860 | #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE |
| 2354 | #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE |
2861 | #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE |
| 2355 | #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE |
2862 | #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE |
| 2356 | #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE |
2863 | #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE |
| 2357 | #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE |
2864 | #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE |
| 2358 | #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE |
2865 | #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE |
| 2359 | #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE |
2866 | #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE |
| 2360 | #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE |
2867 | #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE |
| 2361 | #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE |
2868 | #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE |
| 2362 | #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE |
2869 | #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE |
| 2363 | #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE |
2870 | #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE |
| 2364 | #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE |
2871 | #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE |
| 2365 | #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE |
2872 | #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE |
| 2366 | #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE |
2873 | #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE |
| 2367 | #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE |
2874 | #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE |
| 2368 | #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE |
2875 | #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE |
| 2369 | #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE |
2876 | #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE |
| 2370 | #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE |
2877 | #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE |
| 2371 | #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE |
2878 | #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE |
| 2372 | #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE |
2879 | #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE |
| 2373 | #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE |
2880 | #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE |
| 2374 | #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET |
2881 | #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET |
| 2375 | #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET |
2882 | #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET |
| 2376 | #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE |
2883 | #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE |
| 2377 | #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE |
2884 | #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE |
| 2378 | #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE |
2885 | #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE |
| 2379 | #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE |
2886 | #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE |
| 2380 | #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET |
2887 | #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET |
| 2381 | #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET |
2888 | #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET |
| 2382 | #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE |
2889 | #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE |
| 2383 | #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE |
2890 | #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE |
| 2384 | #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE |
2891 | #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE |
| 2385 | #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE |
2892 | #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE |
| 2386 | #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET |
2893 | #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET |
| 2387 | #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET |
2894 | #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET |
| 2388 | #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE |
2895 | #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE |
| 2389 | #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE |
2896 | #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE |
| 2390 | #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE |
2897 | #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE |
| 2391 | #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE |
2898 | #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE |
| 2392 | #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET |
2899 | #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET |
| 2393 | #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET |
2900 | #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET |
| 2394 | #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE |
2901 | #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE |
| 2395 | #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE |
2902 | #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE |
| 2396 | #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE |
2903 | #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE |
| 2397 | #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE |
2904 | #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE |
| 2398 | #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET |
2905 | #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET |
| 2399 | #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE |
2906 | #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE |
| 2400 | #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE |
2907 | #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE |
| 2401 | #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE |
2908 | #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE |
| 2402 | #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE |
2909 | #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE |
| 2403 | #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE |
2910 | #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE |
| 2404 | #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE |
2911 | #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE |
| 2405 | #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET |
2912 | #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET |
| 2406 | #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET |
2913 | #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET |
| 2407 | #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE |
2914 | #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE |
| 2408 | #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE |
2915 | #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE |
| 2409 | #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
2916 | #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE |
| 2410 | #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
2917 | #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE |
| 2411 | #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET |
2918 | #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET |
| 2412 | #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
2919 | #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET |
| 2413 | #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE |
2920 | #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE |
| 2414 | #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE |
2921 | #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE |
| 2415 | #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE |
2922 | #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE |
| 2416 | #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE |
2923 | #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE |
| 2417 | #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET |
2924 | #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET |
| 2418 | #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET |
2925 | #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET |
| 2419 | #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE |
2926 | #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE |
| 2420 | #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE |
2927 | #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE |
| 2421 | #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
2928 | #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
| 2422 | #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
2929 | #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
| 2423 | #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
2930 | #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
| 2424 | #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
2931 | #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
| 2425 | #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
2932 | #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
| 2426 | #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
2933 | #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
| 2427 | #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
2934 | #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE |
| 2428 | #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
2935 | #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE |
| 2429 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED |
2936 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED |
| 2430 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED |
2937 | #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED |
| 2431 | #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
2938 | #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET |
| 2432 | #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
2939 | #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET |
| 2433 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
2940 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE |
| 2434 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
2941 | #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE |
| 2435 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED |
2942 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED |
| 2436 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED |
2943 | #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED |
| 2437 | #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET |
- | |
| 2438 | #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE |
2944 | #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE |
| 2439 | #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE |
2945 | #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE |
| 2440 | #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE |
2946 | #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE |
| 2441 | #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE |
2947 | #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE |
| 2442 | #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE |
2948 | #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE |
| 2443 | #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE |
2949 | #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE |
| 2444 | #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE |
2950 | #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE |
| 2445 | #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE |
2951 | #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE |
| 2446 | #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE |
2952 | #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE |
| 2447 | #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET |
2953 | #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET |
| 2448 | #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET |
2954 | #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET |
| 2449 | #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE |
2955 | #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE |
| 2450 | #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE |
2956 | #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE |
| 2451 | #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
2957 | #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
| 2452 | #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
2958 | #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
| 2453 | #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
2959 | #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
| 2454 | #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
2960 | #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
| 2455 | #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE |
2961 | #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE |
| 2456 | #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE |
2962 | #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE |
| 2457 | #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET |
2963 | #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET |
| 2458 | #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET |
2964 | #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET |
| 2459 | #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE |
2965 | #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE |
| Line 2465... | Line 2971... | ||
| 2465 | 2971 | ||
| 2466 | #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE |
2972 | #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE |
| 2467 | #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE |
2973 | #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE |
| 2468 | #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE |
2974 | #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE |
| 2469 | #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE |
2975 | #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE |
| 2470 | #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE |
- | |
| 2471 | #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE |
- | |
| 2472 | #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE |
2976 | #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE |
| 2473 | #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE |
2977 | #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE |
| 2474 | #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE |
2978 | #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE |
| 2475 | #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE |
2979 | #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE |
| 2476 | #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE |
2980 | #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE |
| Line 2488... | Line 2992... | ||
| 2488 | 2992 | ||
| 2489 | #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET |
2993 | #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET |
| 2490 | #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET |
2994 | #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET |
| 2491 | #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET |
2995 | #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET |
| 2492 | #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET |
2996 | #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET |
| 2493 | #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET |
- | |
| 2494 | #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET |
- | |
| 2495 | #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET |
2997 | #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET |
| 2496 | #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET |
2998 | #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET |
| 2497 | #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET |
2999 | #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET |
| 2498 | #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET |
3000 | #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET |
| 2499 | #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET |
3001 | #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET |
| Line 2624... | Line 3126... | ||
| 2624 | #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED |
3126 | #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED |
| 2625 | #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED |
3127 | #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED |
| 2626 | #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED |
3128 | #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED |
| 2627 | #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED |
3129 | #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED |
| 2628 | 3130 | ||
| - | 3131 | #if defined(STM32L1) |
|
| - | 3132 | #define __HAL_RCC_CRYP_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE |
|
| - | 3133 | #define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE |
|
| - | 3134 | #define __HAL_RCC_CRYP_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE |
|
| - | 3135 | #define __HAL_RCC_CRYP_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE |
|
| - | 3136 | #define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET |
|
| - | 3137 | #define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET |
|
| - | 3138 | #endif /* STM32L1 */ |
|
| - | 3139 | ||
| 2629 | #if defined(STM32F4) |
3140 | #if defined(STM32F4) |
| 2630 | #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
3141 | #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET |
| 2631 | #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
3142 | #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET |
| 2632 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
3143 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE |
| 2633 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
3144 | #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE |
| Line 2653... | Line 3164... | ||
| 2653 | #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED |
3164 | #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED |
| 2654 | #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED |
3165 | #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED |
| 2655 | #define SdioClockSelection Sdmmc1ClockSelection |
3166 | #define SdioClockSelection Sdmmc1ClockSelection |
| 2656 | #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 |
3167 | #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1 |
| 2657 | #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG |
3168 | #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG |
| 2658 | #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE |
3169 | #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE |
| - | 3170 | #endif |
|
| - | 3171 | ||
| - | 3172 | #if defined(STM32F7) |
|
| - | 3173 | #define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 |
|
| - | 3174 | #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK |
|
| 2659 | #endif |
3175 | #endif |
| 2660 | 3176 | ||
| 2661 | #if defined(STM32H7) |
3177 | #if defined(STM32H7) |
| 2662 | #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE() |
3178 | #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE() |
| 2663 | #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE() |
3179 | #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE() |
| Line 2680... | Line 3196... | ||
| 2680 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE() |
3196 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE() |
| 2681 | #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE() |
3197 | #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE() |
| 2682 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE() |
3198 | #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE() |
| 2683 | #endif |
3199 | #endif |
| 2684 | 3200 | ||
| 2685 | #if defined(STM32F7) |
- | |
| 2686 | #define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48 |
- | |
| 2687 | #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK |
- | |
| 2688 | #endif |
- | |
| 2689 | - | ||
| 2690 | #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG |
3201 | #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG |
| 2691 | #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG |
3202 | #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG |
| 2692 | 3203 | ||
| 2693 | #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE |
3204 | #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE |
| 2694 | 3205 | ||
| Line 2738... | Line 3249... | ||
| 2738 | #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE |
3249 | #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE |
| 2739 | #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK |
3250 | #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK |
| 2740 | #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK |
3251 | #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK |
| 2741 | #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 |
3252 | #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 |
| 2742 | 3253 | ||
| - | 3254 | #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) |
|
| - | 3255 | #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE |
|
| - | 3256 | #else |
|
| 2743 | #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK |
3257 | #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK |
| - | 3258 | #endif |
|
| 2744 | 3259 | ||
| 2745 | #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 |
3260 | #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1 |
| 2746 | #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL |
3261 | #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL |
| 2747 | #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI |
3262 | #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI |
| 2748 | #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL |
3263 | #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL |
| Line 2854... | Line 3369... | ||
| 2854 | */ |
3369 | */ |
| 2855 | 3370 | ||
| 2856 | /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose |
3371 | /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose |
| 2857 | * @{ |
3372 | * @{ |
| 2858 | */ |
3373 | */ |
| 2859 | #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) |
3374 | #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit) |
| 2860 | 3375 | ||
| 2861 | /** |
3376 | /** |
| 2862 | * @} |
3377 | * @} |
| 2863 | */ |
3378 | */ |
| 2864 | 3379 | ||
| 2865 | /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose |
3380 | /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose |
| 2866 | * @{ |
3381 | * @{ |
| 2867 | */ |
3382 | */ |
| - | 3383 | #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) |
|
| 2868 | 3384 | #else |
|
| 2869 | #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG |
3385 | #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG |
| - | 3386 | #endif |
|
| 2870 | #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT |
3387 | #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT |
| 2871 | #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT |
3388 | #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT |
| 2872 | 3389 | ||
| 2873 | #if defined (STM32F1) |
3390 | #if defined (STM32F1) |
| 2874 | #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() |
3391 | #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() |
| Line 2900... | Line 3417... | ||
| 2900 | 3417 | ||
| 2901 | #define IS_ALARM IS_RTC_ALARM |
3418 | #define IS_ALARM IS_RTC_ALARM |
| 2902 | #define IS_ALARM_MASK IS_RTC_ALARM_MASK |
3419 | #define IS_ALARM_MASK IS_RTC_ALARM_MASK |
| 2903 | #define IS_TAMPER IS_RTC_TAMPER |
3420 | #define IS_TAMPER IS_RTC_TAMPER |
| 2904 | #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE |
3421 | #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE |
| 2905 | #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER |
3422 | #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER |
| 2906 | #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT |
3423 | #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT |
| 2907 | #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE |
3424 | #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE |
| 2908 | #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION |
3425 | #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION |
| 2909 | #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE |
3426 | #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE |
| 2910 | #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ |
3427 | #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ |
| Line 2927... | Line 3444... | ||
| 2927 | #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE |
3444 | #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE |
| 2928 | #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS |
3445 | #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS |
| 2929 | 3446 | ||
| 2930 | #if defined(STM32F4) || defined(STM32F2) |
3447 | #if defined(STM32F4) || defined(STM32F2) |
| 2931 | #define SD_SDMMC_DISABLED SD_SDIO_DISABLED |
3448 | #define SD_SDMMC_DISABLED SD_SDIO_DISABLED |
| 2932 | #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY |
3449 | #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY |
| 2933 | #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED |
3450 | #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED |
| 2934 | #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION |
3451 | #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION |
| 2935 | #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND |
3452 | #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND |
| 2936 | #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT |
3453 | #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT |
| 2937 | #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED |
3454 | #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED |
| 2938 | #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE |
3455 | #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE |
| 2939 | #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE |
3456 | #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE |
| 2940 | #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE |
3457 | #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE |
| 2941 | #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL |
3458 | #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL |
| 2942 | #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT |
3459 | #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT |
| 2943 | #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT |
3460 | #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT |
| 2944 | #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG |
3461 | #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG |
| 2945 | #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG |
3462 | #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG |
| 2946 | #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT |
3463 | #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT |
| 2947 | #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT |
3464 | #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT |
| 2948 | #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS |
3465 | #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS |
| 2949 | #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT |
3466 | #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT |
| 2950 | #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND |
3467 | #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND |
| 2951 | /* alias CMSIS */ |
3468 | /* alias CMSIS */ |
| 2952 | #define SDMMC1_IRQn SDIO_IRQn |
3469 | #define SDMMC1_IRQn SDIO_IRQn |
| 2953 | #define SDMMC1_IRQHandler SDIO_IRQHandler |
3470 | #define SDMMC1_IRQHandler SDIO_IRQHandler |
| 2954 | #endif |
3471 | #endif |
| 2955 | 3472 | ||
| 2956 | #if defined(STM32F7) || defined(STM32L4) |
3473 | #if defined(STM32F7) || defined(STM32L4) |
| 2957 | #define SD_SDIO_DISABLED SD_SDMMC_DISABLED |
3474 | #define SD_SDIO_DISABLED SD_SDMMC_DISABLED |
| 2958 | #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY |
3475 | #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY |
| 2959 | #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED |
3476 | #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED |
| 2960 | #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION |
3477 | #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION |
| 2961 | #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND |
3478 | #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND |
| 2962 | #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT |
3479 | #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT |
| 2963 | #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED |
3480 | #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED |
| 2964 | #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE |
3481 | #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE |
| Line 2969... | Line 3486... | ||
| 2969 | #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT |
3486 | #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT |
| 2970 | #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG |
3487 | #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG |
| 2971 | #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG |
3488 | #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG |
| 2972 | #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT |
3489 | #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT |
| 2973 | #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT |
3490 | #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT |
| 2974 | #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS |
3491 | #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS |
| 2975 | #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT |
3492 | #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT |
| 2976 | #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND |
3493 | #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND |
| 2977 | /* alias CMSIS for compatibilities */ |
3494 | /* alias CMSIS for compatibilities */ |
| 2978 | #define SDIO_IRQn SDMMC1_IRQn |
3495 | #define SDIO_IRQn SDMMC1_IRQn |
| 2979 | #define SDIO_IRQHandler SDMMC1_IRQHandler |
3496 | #define SDIO_IRQHandler SDMMC1_IRQHandler |
| 2980 | #endif |
3497 | #endif |
| 2981 | 3498 | ||
| 2982 | #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) |
3499 | #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2) || defined(STM32L4) || defined(STM32H7) |
| 2983 | #define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef |
3500 | #define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef |
| 2984 | #define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef |
3501 | #define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef |
| 2985 | #define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef |
3502 | #define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef |
| 2986 | #define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef |
3503 | #define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef |
| 2987 | #endif |
3504 | #endif |
| 2988 | 3505 | ||
| - | 3506 | #if defined(STM32H7) || defined(STM32L5) |
|
| - | 3507 | #define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback |
|
| - | 3508 | #define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback |
|
| - | 3509 | #define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback |
|
| - | 3510 | #define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback |
|
| - | 3511 | #define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback |
|
| - | 3512 | #define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback |
|
| - | 3513 | #define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback |
|
| - | 3514 | #define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback |
|
| - | 3515 | #define HAL_SD_DriveTransciver_1_8V_Callback HAL_SD_DriveTransceiver_1_8V_Callback |
|
| - | 3516 | #endif |
|
| 2989 | /** |
3517 | /** |
| 2990 | * @} |
3518 | * @} |
| 2991 | */ |
3519 | */ |
| 2992 | 3520 | ||
| 2993 | /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose |
3521 | /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose |
| Line 3002... | Line 3530... | ||
| 3002 | #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE |
3530 | #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE |
| 3003 | 3531 | ||
| 3004 | #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
3532 | #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
| 3005 | #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
3533 | #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE |
| 3006 | 3534 | ||
| 3007 | #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE |
3535 | #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE |
| 3008 | 3536 | ||
| 3009 | /** |
3537 | /** |
| 3010 | * @} |
3538 | * @} |
| 3011 | */ |
3539 | */ |
| 3012 | 3540 | ||
| Line 3034... | Line 3562... | ||
| 3034 | #define __HAL_SPI_RESET_CRC SPI_RESET_CRC |
3562 | #define __HAL_SPI_RESET_CRC SPI_RESET_CRC |
| 3035 | 3563 | ||
| 3036 | /** |
3564 | /** |
| 3037 | * @} |
3565 | * @} |
| 3038 | */ |
3566 | */ |
| 3039 | 3567 | ||
| 3040 | /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose |
3568 | /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose |
| 3041 | * @{ |
3569 | * @{ |
| 3042 | */ |
3570 | */ |
| 3043 | 3571 | ||
| 3044 | #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
3572 | #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
| Line 3046... | Line 3574... | ||
| 3046 | #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
3574 | #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE |
| 3047 | #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION |
3575 | #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION |
| 3048 | 3576 | ||
| 3049 | #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD |
3577 | #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD |
| 3050 | 3578 | ||
| 3051 | #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE |
3579 | #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE |
| 3052 | #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE |
3580 | #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE |
| 3053 | 3581 | ||
| 3054 | /** |
3582 | /** |
| 3055 | * @} |
3583 | * @} |
| 3056 | */ |
3584 | */ |
| 3057 | 3585 | ||
| Line 3152... | Line 3680... | ||
| 3152 | */ |
3680 | */ |
| 3153 | 3681 | ||
| 3154 | /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose |
3682 | /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose |
| 3155 | * @{ |
3683 | * @{ |
| 3156 | */ |
3684 | */ |
| 3157 | 3685 | ||
| 3158 | #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT |
3686 | #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT |
| 3159 | #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT |
3687 | #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT |
| 3160 | #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG |
3688 | #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG |
| 3161 | #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG |
3689 | #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG |
| 3162 | #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER |
3690 | #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER |
| 3163 | #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER |
3691 | #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER |
| 3164 | #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER |
3692 | #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER |
| 3165 | 3693 | ||
| 3166 | #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE |
3694 | #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE |
| 3167 | #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE |
3695 | #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE |
| 3168 | #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE |
3696 | #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE |
| 3169 | /** |
3697 | /** |
| 3170 | * @} |
3698 | * @} |
| 3171 | */ |
3699 | */ |
| Line 3198... | Line 3726... | ||
| 3198 | #define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE |
3726 | #define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE |
| 3199 | /** |
3727 | /** |
| 3200 | * @} |
3728 | * @} |
| 3201 | */ |
3729 | */ |
| 3202 | 3730 | ||
| - | 3731 | /** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose |
|
| - | 3732 | * @{ |
|
| - | 3733 | */ |
|
| - | 3734 | #if defined(STM32H7) |
|
| - | 3735 | #define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow |
|
| - | 3736 | #define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT |
|
| - | 3737 | #define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA |
|
| - | 3738 | #endif |
|
| - | 3739 | /** |
|
| - | 3740 | * @} |
|
| - | 3741 | */ |
|
| - | 3742 | ||
| - | 3743 | /** @defgroup HAL_HRTIM_Aliased_Functions HAL HRTIM Aliased Functions maintained for legacy purpose |
|
| - | 3744 | * @{ |
|
| - | 3745 | */ |
|
| - | 3746 | #if defined (STM32H7) || defined (STM32G4) || defined (STM32F3) |
|
| - | 3747 | #define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT |
|
| - | 3748 | #define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA |
|
| - | 3749 | #define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart |
|
| - | 3750 | #define HAL_HRTIM_WaveformCounterStop_IT HAL_HRTIM_WaveformCountStop_IT |
|
| - | 3751 | #define HAL_HRTIM_WaveformCounterStop_DMA HAL_HRTIM_WaveformCountStop_DMA |
|
| - | 3752 | #define HAL_HRTIM_WaveformCounterStop HAL_HRTIM_WaveformCountStop |
|
| - | 3753 | #endif |
|
| - | 3754 | /** |
|
| - | 3755 | * @} |
|
| - | 3756 | */ |
|
| - | 3757 | ||
| - | 3758 | /** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose |
|
| - | 3759 | * @{ |
|
| - | 3760 | */ |
|
| - | 3761 | #if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) || defined(STM32H7) |
|
| - | 3762 | #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE |
|
| - | 3763 | #endif /* STM32L4 || STM32F4 || STM32F7 */ |
|
| - | 3764 | /** |
|
| - | 3765 | * @} |
|
| - | 3766 | */ |
|
| 3203 | 3767 | ||
| 3204 | /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose |
3768 | /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose |
| 3205 | * @{ |
3769 | * @{ |
| 3206 | */ |
3770 | */ |
| 3207 | 3771 | ||
| 3208 | /** |
3772 | /** |
| 3209 | * @} |
3773 | * @} |
| 3210 | */ |
3774 | */ |
| 3211 | 3775 | ||
| 3212 | #ifdef __cplusplus |
3776 | #ifdef __cplusplus |
| 3213 | } |
3777 | } |
| 3214 | #endif |
3778 | #endif |
| 3215 | 3779 | ||
| 3216 | #endif /* ___STM32_HAL_LEGACY */ |
3780 | #endif /* STM32_HAL_LEGACY */ |
| 3217 | 3781 | ||
| 3218 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
3782 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| 3219 | 3783 | ||