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| 114 | /** @defgroup UTILS_LL_Private_Functions UTILS Private functions |
114 | /** @defgroup UTILS_LL_Private_Functions UTILS Private functions |
| 115 | * @{ |
115 | * @{ |
| 116 | */ |
116 | */ |
| 117 | static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, |
117 | static uint32_t UTILS_GetPLLOutputFrequency(uint32_t PLL_InputFrequency, |
| 118 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct); |
118 | LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct); |
| 119 | #if defined(FLASH_ACR_LATENCY) |
- | |
| 120 | static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency); |
- | |
| 121 | #endif /* FLASH_ACR_LATENCY */ |
- | |
| 122 | static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); |
119 | static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct); |
| 123 | static ErrorStatus UTILS_PLL_IsBusy(void); |
120 | static ErrorStatus UTILS_PLL_IsBusy(void); |
| 124 | /** |
121 | /** |
| 125 | * @} |
122 | * @} |
| 126 | */ |
123 | */ |
| Line 219... | Line 216... | ||
| 219 | /* HCLK clock frequency */ |
216 | /* HCLK clock frequency */ |
| 220 | SystemCoreClock = HCLKFrequency; |
217 | SystemCoreClock = HCLKFrequency; |
| 221 | } |
218 | } |
| 222 | 219 | ||
| 223 | /** |
220 | /** |
| - | 221 | * @brief Update number of Flash wait states in line with new frequency and current |
|
| - | 222 | voltage range. |
|
| - | 223 | * @param Frequency SYSCLK frequency |
|
| - | 224 | * @retval An ErrorStatus enumeration value: |
|
| - | 225 | * - SUCCESS: Latency has been modified |
|
| - | 226 | * - ERROR: Latency cannot be modified |
|
| - | 227 | */ |
|
| - | 228 | #if defined(FLASH_ACR_LATENCY) |
|
| - | 229 | ErrorStatus LL_SetFlashLatency(uint32_t Frequency) |
|
| - | 230 | { |
|
| - | 231 | uint32_t timeout; |
|
| - | 232 | uint32_t getlatency; |
|
| - | 233 | uint32_t latency; |
|
| - | 234 | ErrorStatus status = SUCCESS; |
|
| - | 235 | ||
| - | 236 | /* Frequency cannot be equal to 0 */ |
|
| - | 237 | if (Frequency == 0U) |
|
| - | 238 | { |
|
| - | 239 | status = ERROR; |
|
| - | 240 | } |
|
| - | 241 | else |
|
| - | 242 | { |
|
| - | 243 | if (Frequency > UTILS_LATENCY1_FREQ) |
|
| - | 244 | { |
|
| - | 245 | /* 24 < SYSCLK <= 48 => 1WS (2 CPU cycles) */ |
|
| - | 246 | latency = LL_FLASH_LATENCY_1; |
|
| - | 247 | } |
|
| - | 248 | else |
|
| - | 249 | { |
|
| - | 250 | /* else SYSCLK < 24MHz default LL_FLASH_LATENCY_0 0WS */ |
|
| - | 251 | latency = LL_FLASH_LATENCY_0; |
|
| - | 252 | } |
|
| - | 253 | if (status != ERROR) |
|
| - | 254 | { |
|
| - | 255 | LL_FLASH_SetLatency(latency); |
|
| - | 256 | ||
| - | 257 | /* Check that the new number of wait states is taken into account to access the Flash |
|
| - | 258 | memory by reading the FLASH_ACR register */ |
|
| - | 259 | timeout = 2; |
|
| - | 260 | do |
|
| - | 261 | { |
|
| - | 262 | /* Wait for Flash latency to be updated */ |
|
| - | 263 | getlatency = LL_FLASH_GetLatency(); |
|
| - | 264 | timeout--; |
|
| - | 265 | } while ((getlatency != latency) && (timeout > 0)); |
|
| - | 266 | ||
| - | 267 | if(getlatency != latency) |
|
| - | 268 | { |
|
| - | 269 | status = ERROR; |
|
| - | 270 | } |
|
| - | 271 | else |
|
| - | 272 | { |
|
| - | 273 | status = SUCCESS; |
|
| - | 274 | } |
|
| - | 275 | } |
|
| - | 276 | } |
|
| - | 277 | ||
| - | 278 | return status; |
|
| - | 279 | } |
|
| - | 280 | #endif /* FLASH_ACR_LATENCY */ |
|
| - | 281 | ||
| - | 282 | /** |
|
| 224 | * @brief This function configures system clock with HSI as clock source of the PLL |
283 | * @brief This function configures system clock with HSI as clock source of the PLL |
| 225 | * @note The application need to ensure that PLL is disabled. |
284 | * @note The application need to ensure that PLL is disabled. |
| 226 | * @note Function is based on the following formula: |
285 | * @note Function is based on the following formula: |
| 227 | * - PLL output frequency = ((HSI frequency / PREDIV) * PLLMUL) |
286 | * - PLL output frequency = ((HSI frequency / PREDIV) * PLLMUL) |
| 228 | * - PREDIV: Set to 2 for few devices |
287 | * - PREDIV: Set to 2 for few devices |
| Line 435... | Line 494... | ||
| 435 | 494 | ||
| 436 | /** @addtogroup UTILS_LL_Private_Functions |
495 | /** @addtogroup UTILS_LL_Private_Functions |
| 437 | * @{ |
496 | * @{ |
| 438 | */ |
497 | */ |
| 439 | /** |
498 | /** |
| 440 | * @brief Update number of Flash wait states in line with new frequency and current |
- | |
| 441 | voltage range. |
- | |
| 442 | * @param Frequency SYSCLK frequency |
- | |
| 443 | * @retval An ErrorStatus enumeration value: |
- | |
| 444 | * - SUCCESS: Latency has been modified |
- | |
| 445 | * - ERROR: Latency cannot be modified |
- | |
| 446 | */ |
- | |
| 447 | #if defined(FLASH_ACR_LATENCY) |
- | |
| 448 | static ErrorStatus UTILS_SetFlashLatency(uint32_t Frequency) |
- | |
| 449 | { |
- | |
| 450 | ErrorStatus status = SUCCESS; |
- | |
| 451 | - | ||
| 452 | uint32_t latency = LL_FLASH_LATENCY_0; /* default value 0WS */ |
- | |
| 453 | - | ||
| 454 | /* Frequency cannot be equal to 0 */ |
- | |
| 455 | if (Frequency == 0U) |
- | |
| 456 | { |
- | |
| 457 | status = ERROR; |
- | |
| 458 | } |
- | |
| 459 | else |
- | |
| 460 | { |
- | |
| 461 | if (Frequency > UTILS_LATENCY1_FREQ) |
- | |
| 462 | { |
- | |
| 463 | /* 24 < SYSCLK <= 48 => 1WS (2 CPU cycles) */ |
- | |
| 464 | latency = LL_FLASH_LATENCY_1; |
- | |
| 465 | } |
- | |
| 466 | /* else SYSCLK < 24MHz default LL_FLASH_LATENCY_0 0WS */ |
- | |
| 467 | - | ||
| 468 | LL_FLASH_SetLatency(latency); |
- | |
| 469 | - | ||
| 470 | /* Check that the new number of wait states is taken into account to access the Flash |
- | |
| 471 | memory by reading the FLASH_ACR register */ |
- | |
| 472 | if (LL_FLASH_GetLatency() != latency) |
- | |
| 473 | { |
- | |
| 474 | status = ERROR; |
- | |
| 475 | } |
- | |
| 476 | } |
- | |
| 477 | return status; |
- | |
| 478 | } |
- | |
| 479 | #endif /* FLASH_ACR_LATENCY */ |
- | |
| 480 | - | ||
| 481 | /** |
- | |
| 482 | * @brief Function to check that PLL can be modified |
499 | * @brief Function to check that PLL can be modified |
| 483 | * @param PLL_InputFrequency PLL input frequency (in Hz) |
500 | * @param PLL_InputFrequency PLL input frequency (in Hz) |
| 484 | * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains |
501 | * @param UTILS_PLLInitStruct pointer to a @ref LL_UTILS_PLLInitTypeDef structure that contains |
| 485 | * the configuration information for the PLL. |
502 | * the configuration information for the PLL. |
| 486 | * @retval PLL output frequency (in Hz) |
503 | * @retval PLL output frequency (in Hz) |
| Line 547... | Line 564... | ||
| 547 | 564 | ||
| 548 | /* Increasing the number of wait states because of higher CPU frequency */ |
565 | /* Increasing the number of wait states because of higher CPU frequency */ |
| 549 | if (sysclk_frequency_current < SYSCLK_Frequency) |
566 | if (sysclk_frequency_current < SYSCLK_Frequency) |
| 550 | { |
567 | { |
| 551 | /* Set FLASH latency to highest latency */ |
568 | /* Set FLASH latency to highest latency */ |
| 552 | status = UTILS_SetFlashLatency(SYSCLK_Frequency); |
569 | status = LL_SetFlashLatency(SYSCLK_Frequency); |
| 553 | } |
570 | } |
| 554 | 571 | ||
| 555 | /* Update system clock configuration */ |
572 | /* Update system clock configuration */ |
| 556 | if (status == SUCCESS) |
573 | if (status == SUCCESS) |
| 557 | { |
574 | { |
| Line 576... | Line 593... | ||
| 576 | 593 | ||
| 577 | /* Decreasing the number of wait states because of lower CPU frequency */ |
594 | /* Decreasing the number of wait states because of lower CPU frequency */ |
| 578 | if (sysclk_frequency_current > SYSCLK_Frequency) |
595 | if (sysclk_frequency_current > SYSCLK_Frequency) |
| 579 | { |
596 | { |
| 580 | /* Set FLASH latency to lowest latency */ |
597 | /* Set FLASH latency to lowest latency */ |
| 581 | status = UTILS_SetFlashLatency(SYSCLK_Frequency); |
598 | status = LL_SetFlashLatency(SYSCLK_Frequency); |
| 582 | } |
599 | } |
| 583 | 600 | ||
| 584 | /* Update SystemCoreClock variable */ |
601 | /* Update SystemCoreClock variable */ |
| 585 | if (status == SUCCESS) |
602 | if (status == SUCCESS) |
| 586 | { |
603 | { |