WebSVN – FuelGauge – Diff – /trunk/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c



  else if (TIMx == TIM2)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
  }
#endif /* TIM2 */
#if defined(TIM3)
  else if (TIMx == TIM3)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
  }
#endif /* TIM3 */
#if defined(TIM5)
  else if (TIMx == TIM5)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5);
  }
#endif /* TIM5 */
#if defined (TIM6)
  else if (TIMx == TIM6)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
  }
#endif /* TIM6 */
#if defined (TIM7)
  else if (TIMx == TIM7)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
  }
#endif /* TIM7 */
#if defined(TIM8)
  else if (TIMx == TIM8)
  {
    LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8);
    LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8);
  }
#endif /* TIM8 */
#if defined (TIM14)
  else if (TIMx == TIM14)
  {
    LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14);
    LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);
  }
#endif /* TIM14 */
#if defined (TIM15)
  else if (TIMx == TIM15)
  {
    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM15);
    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM15);
  }
#endif /* TIM15 */
#if defined (TIM16)
  else if (TIMx == TIM16)
  {
    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM16);
    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM16);
  }
#endif /* TIM16 */
#if defined(TIM17)
  else if (TIMx == TIM17)
  {
    LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM17);
    LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM17);
  }
#endif /* TIM17 */
  else
  {
    result = ERROR;
  }
 

  /* Set the default configuration */
  TIM_InitStruct->Prescaler         = (uint16_t)0x0000;
  TIM_InitStruct->CounterMode       = LL_TIM_COUNTERMODE_UP;
  TIM_InitStruct->Autoreload        = 0xFFFFFFFFU;
  TIM_InitStruct->ClockDivision     = LL_TIM_CLOCKDIVISION_DIV1;
  TIM_InitStruct->RepetitionCounter = 0x00000000U;
}
 
/**
  * @brief  Configure the TIMx time base unit.
  * @param  TIMx Timer Instance
  * @param  TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure
  *         (TIMx time base unit configuration data structure)
  * @retval An ErrorStatus enumeration value:
  *          - SUCCESS: TIMx registers are de-initialized
  *          - ERROR: not applicable
  */
ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct)

}
 
/**
  * @brief  Set the fields of the TIMx output channel configuration data
  *         structure to their default values.
  * @param  TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure
  *         (the output channel configuration data structure)
  * @retval None
  */
void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
{
  /* Set the default configuration */

  * @param  Channel This parameter can be one of the following values:
  *         @arg @ref LL_TIM_CHANNEL_CH1
  *         @arg @ref LL_TIM_CHANNEL_CH2
  *         @arg @ref LL_TIM_CHANNEL_CH3
  *         @arg @ref LL_TIM_CHANNEL_CH4
  * @param  TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration
  *         data structure)
  * @retval An ErrorStatus enumeration value:
  *          - SUCCESS: TIMx output channel is initialized
  *          - ERROR: TIMx output channel is not initialized
  */
ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)

}
 
/**
  * @brief  Set the fields of the TIMx input channel configuration data
  *         structure to their default values.
  * @param  TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration
  *         data structure)
  * @retval None
  */
void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
{
  /* Set the default configuration */

  * @param  Channel This parameter can be one of the following values:
  *         @arg @ref LL_TIM_CHANNEL_CH1
  *         @arg @ref LL_TIM_CHANNEL_CH2
  *         @arg @ref LL_TIM_CHANNEL_CH3
  *         @arg @ref LL_TIM_CHANNEL_CH4
  * @param  TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data
  *         structure)
  * @retval An ErrorStatus enumeration value:
  *          - SUCCESS: TIMx output channel is initialized
  *          - ERROR: TIMx output channel is not initialized
  */
ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct)

  return result;
}
 
/**
  * @brief  Fills each TIM_EncoderInitStruct field with its default value
  * @param  TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface
  *         configuration data structure)
  * @retval None
  */
void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
{
  /* Set the default configuration */

}
 
/**
  * @brief  Configure the encoder interface of the timer instance.
  * @param  TIMx Timer Instance
  * @param  TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface
  *         configuration data structure)
  * @retval An ErrorStatus enumeration value:
  *          - SUCCESS: TIMx registers are de-initialized
  *          - ERROR: not applicable
  */
ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)

}
 
/**
  * @brief  Set the fields of the TIMx Hall sensor interface configuration data
  *         structure to their default values.
  * @param  TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface
  *         configuration data structure)
  * @retval None
  */
void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
{
  /* Set the default configuration */

  * @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay.
  * @note OC2REF is selected as trigger output on TRGO.
  * @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used
  *       when TIMx operates in Hall sensor interface mode.
  * @param  TIMx Timer Instance
  * @param  TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor
  *         interface configuration data structure)
  * @retval An ErrorStatus enumeration value:
  *          - SUCCESS: TIMx registers are de-initialized
  *          - ERROR: not applicable
  */
ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)

}
 
/**
  * @brief  Set the fields of the Break and Dead Time configuration data structure
  *         to their default values.
  * @param  TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration
  *         data structure)
  * @retval None
  */
void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
{
  /* Set the default configuration */

  *  depending on the LOCK configuration, it can be necessary to configure all of
  *  them during the first write access to the TIMx_BDTR register.
  * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
  *       a timer instance provides a break input.
  * @param  TIMx Timer Instance
  * @param  TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration
  *         data structure)
  * @retval An ErrorStatus enumeration value:
  *          - SUCCESS: Break and Dead Time is initialized
  *          - ERROR: not applicable
  */
ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)

Rev 2	Rev 6
Line 182...	Line 182...
182	else if (TIMx == TIM2)	182	else if (TIMx == TIM2)
183	{	183	{
184	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);	184	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2);
185	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);	185	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
186	}	186	}
187	#endif	187	#endif /* TIM2 */
188	#if defined(TIM3)	188	#if defined(TIM3)
189	else if (TIMx == TIM3)	189	else if (TIMx == TIM3)
190	{	190	{
191	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);	191	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3);
192	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);	192	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3);
193	}	193	}
194	#endif	194	#endif /* TIM3 */
195	#if defined(TIM5)	195	#if defined(TIM5)
196	else if (TIMx == TIM5)	196	else if (TIMx == TIM5)
197	{	197	{
198	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5);	198	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5);
199	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5);	199	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5);
200	}	200	}
201	#endif	201	#endif /* TIM5 */
202	#if defined (TIM6)	202	#if defined (TIM6)
203	else if (TIMx == TIM6)	203	else if (TIMx == TIM6)
204	{	204	{
205	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);	205	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
206	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);	206	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
207	}	207	}
208	#endif	208	#endif /* TIM6 */
209	#if defined (TIM7)	209	#if defined (TIM7)
210	else if (TIMx == TIM7)	210	else if (TIMx == TIM7)
211	{	211	{
212	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);	212	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7);
213	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);	213	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7);
214	}	214	}
215	#endif	215	#endif /* TIM7 */
216	#if defined(TIM8)	216	#if defined(TIM8)
217	else if (TIMx == TIM8)	217	else if (TIMx == TIM8)
218	{	218	{
219	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8);	219	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8);
220	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8);	220	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8);
221	}	221	}
222	#endif	222	#endif /* TIM8 */
223	#if defined (TIM14)	223	#if defined (TIM14)
224	else if (TIMx == TIM14)	224	else if (TIMx == TIM14)
225	{	225	{
226	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14);	226	LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14);
227	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);	227	LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);
228	}	228	}
229	#endif	229	#endif /* TIM14 */
230	#if defined (TIM15)	230	#if defined (TIM15)
231	else if (TIMx == TIM15)	231	else if (TIMx == TIM15)
232	{	232	{
233	LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM15);	233	LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM15);
234	LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM15);	234	LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM15);
235	}	235	}
236	#endif	236	#endif /* TIM15 */
237	#if defined (TIM16)	237	#if defined (TIM16)
238	else if (TIMx == TIM16)	238	else if (TIMx == TIM16)
239	{	239	{
240	LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM16);	240	LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM16);
241	LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM16);	241	LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM16);
242	}	242	}
243	#endif	243	#endif /* TIM16 */
244	#if defined(TIM17)	244	#if defined(TIM17)
245	else if (TIMx == TIM17)	245	else if (TIMx == TIM17)
246	{	246	{
247	LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM17);	247	LL_APB1_GRP2_ForceReset(LL_APB1_GRP2_PERIPH_TIM17);
248	LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM17);	248	LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_TIM17);
249	}	249	}
250	#endif	250	#endif /* TIM17 */
251	else	251	else
252	{	252	{
253	result = ERROR;	253	result = ERROR;
254	}	254	}
255		255
Line 267...	Line 267...
267	/* Set the default configuration */	267	/* Set the default configuration */
268	TIM_InitStruct->Prescaler = (uint16_t)0x0000;	268	TIM_InitStruct->Prescaler = (uint16_t)0x0000;
269	TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP;	269	TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP;
270	TIM_InitStruct->Autoreload = 0xFFFFFFFFU;	270	TIM_InitStruct->Autoreload = 0xFFFFFFFFU;
271	TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;	271	TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
272	TIM_InitStruct->RepetitionCounter = (uint8_t)0x00;	272	TIM_InitStruct->RepetitionCounter = 0x00000000U;
273	}	273	}
274		274
275	/**	275	/**
276	* @brief Configure the TIMx time base unit.	276	* @brief Configure the TIMx time base unit.
277	* @param TIMx Timer Instance	277	* @param TIMx Timer Instance
278	* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure)	278	* @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure
-		279	* (TIMx time base unit configuration data structure)
279	* @retval An ErrorStatus enumeration value:	280	* @retval An ErrorStatus enumeration value:
280	* - SUCCESS: TIMx registers are de-initialized	281	* - SUCCESS: TIMx registers are de-initialized
281	* - ERROR: not applicable	282	* - ERROR: not applicable
282	*/	283	*/
283	ErrorStatus LL_TIM_Init(TIM_TypeDef TIMx, LL_TIM_InitTypeDef TIM_InitStruct)	284	ErrorStatus LL_TIM_Init(TIM_TypeDef TIMx, LL_TIM_InitTypeDef TIM_InitStruct)
Line 326...	Line 327...
326	}	327	}
327		328
328	/**	329	/**
329	* @brief Set the fields of the TIMx output channel configuration data	330	* @brief Set the fields of the TIMx output channel configuration data
330	* structure to their default values.	331	* structure to their default values.
331	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure)	332	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure
-		333	* (the output channel configuration data structure)
332	* @retval None	334	* @retval None
333	*/	335	*/
334	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)	336	void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct)
335	{	337	{
336	/* Set the default configuration */	338	/* Set the default configuration */
Line 350...	Line 352...
350	* @param Channel This parameter can be one of the following values:	352	* @param Channel This parameter can be one of the following values:
351	* @arg @ref LL_TIM_CHANNEL_CH1	353	* @arg @ref LL_TIM_CHANNEL_CH1
352	* @arg @ref LL_TIM_CHANNEL_CH2	354	* @arg @ref LL_TIM_CHANNEL_CH2
353	* @arg @ref LL_TIM_CHANNEL_CH3	355	* @arg @ref LL_TIM_CHANNEL_CH3
354	* @arg @ref LL_TIM_CHANNEL_CH4	356	* @arg @ref LL_TIM_CHANNEL_CH4
355	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure)	357	* @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration
-		358	* data structure)
356	* @retval An ErrorStatus enumeration value:	359	* @retval An ErrorStatus enumeration value:
357	* - SUCCESS: TIMx output channel is initialized	360	* - SUCCESS: TIMx output channel is initialized
358	* - ERROR: TIMx output channel is not initialized	361	* - ERROR: TIMx output channel is not initialized
359	*/	362	*/
360	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef TIM_OC_InitStruct)	363	ErrorStatus LL_TIM_OC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_OC_InitTypeDef TIM_OC_InitStruct)
Line 383...	Line 386...
383	}	386	}
384		387
385	/**	388	/**
386	* @brief Set the fields of the TIMx input channel configuration data	389	* @brief Set the fields of the TIMx input channel configuration data
387	* structure to their default values.	390	* structure to their default values.
388	* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure)	391	* @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration
-		392	* data structure)
389	* @retval None	393	* @retval None
390	*/	394	*/
391	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)	395	void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
392	{	396	{
393	/* Set the default configuration */	397	/* Set the default configuration */
Line 403...	Line 407...
403	* @param Channel This parameter can be one of the following values:	407	* @param Channel This parameter can be one of the following values:
404	* @arg @ref LL_TIM_CHANNEL_CH1	408	* @arg @ref LL_TIM_CHANNEL_CH1
405	* @arg @ref LL_TIM_CHANNEL_CH2	409	* @arg @ref LL_TIM_CHANNEL_CH2
406	* @arg @ref LL_TIM_CHANNEL_CH3	410	* @arg @ref LL_TIM_CHANNEL_CH3
407	* @arg @ref LL_TIM_CHANNEL_CH4	411	* @arg @ref LL_TIM_CHANNEL_CH4
408	* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure)	412	* @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data
-		413	* structure)
409	* @retval An ErrorStatus enumeration value:	414	* @retval An ErrorStatus enumeration value:
410	* - SUCCESS: TIMx output channel is initialized	415	* - SUCCESS: TIMx output channel is initialized
411	* - ERROR: TIMx output channel is not initialized	416	* - ERROR: TIMx output channel is not initialized
412	*/	417	*/
413	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef TIM_IC_InitStruct)	418	ErrorStatus LL_TIM_IC_Init(TIM_TypeDef TIMx, uint32_t Channel, LL_TIM_IC_InitTypeDef TIM_IC_InitStruct)
Line 435...	Line 440...
435	return result;	440	return result;
436	}	441	}
437		442
438	/**	443	/**
439	* @brief Fills each TIM_EncoderInitStruct field with its default value	444	* @brief Fills each TIM_EncoderInitStruct field with its default value
440	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure)	445	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface
-		446	* configuration data structure)
441	* @retval None	447	* @retval None
442	*/	448	*/
443	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)	449	void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct)
444	{	450	{
445	/* Set the default configuration */	451	/* Set the default configuration */
Line 455...	Line 461...
455	}	461	}
456		462
457	/**	463	/**
458	* @brief Configure the encoder interface of the timer instance.	464	* @brief Configure the encoder interface of the timer instance.
459	* @param TIMx Timer Instance	465	* @param TIMx Timer Instance
460	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure)	466	* @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface
-		467	* configuration data structure)
461	* @retval An ErrorStatus enumeration value:	468	* @retval An ErrorStatus enumeration value:
462	* - SUCCESS: TIMx registers are de-initialized	469	* - SUCCESS: TIMx registers are de-initialized
463	* - ERROR: not applicable	470	* - ERROR: not applicable
464	*/	471	*/
465	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef TIMx, LL_TIM_ENCODER_InitTypeDef TIM_EncoderInitStruct)	472	ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef TIMx, LL_TIM_ENCODER_InitTypeDef TIM_EncoderInitStruct)
Line 519...	Line 526...
519	}	526	}
520		527
521	/**	528	/**
522	* @brief Set the fields of the TIMx Hall sensor interface configuration data	529	* @brief Set the fields of the TIMx Hall sensor interface configuration data
523	* structure to their default values.	530	* structure to their default values.
524	* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface configuration data structure)	531	* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface
-		532	* configuration data structure)
525	* @retval None	533	* @retval None
526	*/	534	*/
527	void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)	535	void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct)
528	{	536	{
529	/* Set the default configuration */	537	/* Set the default configuration */
Line 546...	Line 554...
546	* @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay.	554	* @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay.
547	* @note OC2REF is selected as trigger output on TRGO.	555	* @note OC2REF is selected as trigger output on TRGO.
548	* @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used	556	* @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used
549	* when TIMx operates in Hall sensor interface mode.	557	* when TIMx operates in Hall sensor interface mode.
550	* @param TIMx Timer Instance	558	* @param TIMx Timer Instance
551	* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor interface configuration data structure)	559	* @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor
-		560	* interface configuration data structure)
552	* @retval An ErrorStatus enumeration value:	561	* @retval An ErrorStatus enumeration value:
553	* - SUCCESS: TIMx registers are de-initialized	562	* - SUCCESS: TIMx registers are de-initialized
554	* - ERROR: not applicable	563	* - ERROR: not applicable
555	*/	564	*/
556	ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef TIMx, LL_TIM_HALLSENSOR_InitTypeDef TIM_HallSensorInitStruct)	565	ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef TIMx, LL_TIM_HALLSENSOR_InitTypeDef TIM_HallSensorInitStruct)
Line 626...	Line 635...
626	}	635	}
627		636
628	/**	637	/**
629	* @brief Set the fields of the Break and Dead Time configuration data structure	638	* @brief Set the fields of the Break and Dead Time configuration data structure
630	* to their default values.	639	* to their default values.
631	* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)	640	* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration
-		641	* data structure)
632	* @retval None	642	* @retval None
633	*/	643	*/
634	void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)	644	void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct)
635	{	645	{
636	/* Set the default configuration */	646	/* Set the default configuration */
Line 649...	Line 659...
649	* depending on the LOCK configuration, it can be necessary to configure all of	659	* depending on the LOCK configuration, it can be necessary to configure all of
650	* them during the first write access to the TIMx_BDTR register.	660	* them during the first write access to the TIMx_BDTR register.
651	* @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not	661	* @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
652	* a timer instance provides a break input.	662	* a timer instance provides a break input.
653	* @param TIMx Timer Instance	663	* @param TIMx Timer Instance
654	* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure)	664	* @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration
-		665	* data structure)
655	* @retval An ErrorStatus enumeration value:	666	* @retval An ErrorStatus enumeration value:
656	* - SUCCESS: Break and Dead Time is initialized	667	* - SUCCESS: Break and Dead Time is initialized
657	* - ERROR: not applicable	668	* - ERROR: not applicable
658	*/	669	*/
659	ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef TIMx, LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct)	670	ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef TIMx, LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct)

Subversion Repositories FuelGauge

(root)/trunk/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_tim.c – Rev 2 → 6