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| 25 | 25 | ||
| 26 | #ifdef USE_FULL_ASSERT |
26 | #ifdef USE_FULL_ASSERT |
| 27 | #include "stm32_assert.h" |
27 | #include "stm32_assert.h" |
| 28 | #else |
28 | #else |
| 29 | #define assert_param(expr) ((void)0U) |
29 | #define assert_param(expr) ((void)0U) |
| 30 | #endif |
30 | #endif /* USE_FULL_ASSERT */ |
| 31 | 31 | ||
| 32 | /** @addtogroup STM32F0xx_LL_Driver |
32 | /** @addtogroup STM32F0xx_LL_Driver |
| 33 | * @{ |
33 | * @{ |
| 34 | */ |
34 | */ |
| 35 | 35 | ||
| Line 219... | Line 219... | ||
| 219 | */ |
219 | */ |
| 220 | MODIFY_REG(SPIx->CR2, |
220 | MODIFY_REG(SPIx->CR2, |
| 221 | SPI_CR2_DS | SPI_CR2_SSOE, |
221 | SPI_CR2_DS | SPI_CR2_SSOE, |
| 222 | SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U)); |
222 | SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U)); |
| 223 | 223 | ||
| - | 224 | /* Set Rx FIFO to Quarter (1 Byte) in case of 8 Bits mode. No DataPacking by default */ |
|
| - | 225 | if (SPI_InitStruct->DataWidth < LL_SPI_DATAWIDTH_9BIT) |
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| - | 226 | { |
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| - | 227 | LL_SPI_SetRxFIFOThreshold(SPIx, LL_SPI_RX_FIFO_TH_QUARTER); |
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| - | 228 | } |
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| - | 229 | ||
| 224 | /*---------------------------- SPIx CRCPR Configuration ---------------------- |
230 | /*---------------------------- SPIx CRCPR Configuration ---------------------- |
| 225 | * Configure SPIx CRCPR with parameters: |
231 | * Configure SPIx CRCPR with parameters: |
| 226 | * - CRCPoly: CRCPOLY[15:0] bits |
232 | * - CRCPoly: CRCPOLY[15:0] bits |
| 227 | */ |
233 | */ |
| 228 | if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE) |
234 | if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE) |