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Rev 2 | Rev 6 | ||
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Line 37... | Line 37... | ||
37 | (+++) Declare a DMA handle structure for the Tx/Rx channel. |
37 | (+++) Declare a DMA handle structure for the Tx/Rx channel. |
38 | (+++) Enable the DMAx interface clock. |
38 | (+++) Enable the DMAx interface clock. |
39 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
39 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
40 | (+++) Configure the DMA Tx/Rx channel. |
40 | (+++) Configure the DMA Tx/Rx channel. |
41 | (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. |
41 | (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle. |
42 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. |
42 | (+++) Configure the priority and enable the NVIC for the transfer complete |
- | 43 | interrupt on the DMA Tx/Rx channel. |
|
43 | 44 | ||
44 | (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware |
45 | (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware |
45 | flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. |
46 | flow control and Mode (Receiver/Transmitter) in the huart handle Init structure. |
46 | 47 | ||
47 | (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) |
48 | (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...) |
Line 73... | Line 74... | ||
73 | [..] |
74 | [..] |
74 | The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1 |
75 | The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1 |
75 | allows the user to configure dynamically the driver callbacks. |
76 | allows the user to configure dynamically the driver callbacks. |
76 | 77 | ||
77 | [..] |
78 | [..] |
78 | Use Function @ref HAL_UART_RegisterCallback() to register a user callback. |
79 | Use Function HAL_UART_RegisterCallback() to register a user callback. |
79 | Function @ref HAL_UART_RegisterCallback() allows to register following callbacks: |
80 | Function HAL_UART_RegisterCallback() allows to register following callbacks: |
80 | (+) TxHalfCpltCallback : Tx Half Complete Callback. |
81 | (+) TxHalfCpltCallback : Tx Half Complete Callback. |
81 | (+) TxCpltCallback : Tx Complete Callback. |
82 | (+) TxCpltCallback : Tx Complete Callback. |
82 | (+) RxHalfCpltCallback : Rx Half Complete Callback. |
83 | (+) RxHalfCpltCallback : Rx Half Complete Callback. |
83 | (+) RxCpltCallback : Rx Complete Callback. |
84 | (+) RxCpltCallback : Rx Complete Callback. |
84 | (+) ErrorCallback : Error Callback. |
85 | (+) ErrorCallback : Error Callback. |
85 | (+) AbortCpltCallback : Abort Complete Callback. |
86 | (+) AbortCpltCallback : Abort Complete Callback. |
86 | (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. |
87 | (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. |
87 | (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. |
88 | (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. |
88 | (+) WakeupCallback : Wakeup Callback. |
89 | (+) WakeupCallback : Wakeup Callback. |
89 | (+) RxFifoFullCallback : Rx Fifo Full Callback. |
- | |
90 | (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. |
- | |
91 | (+) MspInitCallback : UART MspInit. |
90 | (+) MspInitCallback : UART MspInit. |
92 | (+) MspDeInitCallback : UART MspDeInit. |
91 | (+) MspDeInitCallback : UART MspDeInit. |
93 | This function takes as parameters the HAL peripheral handle, the Callback ID |
92 | This function takes as parameters the HAL peripheral handle, the Callback ID |
94 | and a pointer to the user callback function. |
93 | and a pointer to the user callback function. |
95 | 94 | ||
96 | [..] |
95 | [..] |
97 | Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default |
96 | Use function HAL_UART_UnRegisterCallback() to reset a callback to the default |
98 | weak (surcharged) function. |
97 | weak (surcharged) function. |
99 | @ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, |
98 | HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, |
100 | and the Callback ID. |
99 | and the Callback ID. |
101 | This function allows to reset following callbacks: |
100 | This function allows to reset following callbacks: |
102 | (+) TxHalfCpltCallback : Tx Half Complete Callback. |
101 | (+) TxHalfCpltCallback : Tx Half Complete Callback. |
103 | (+) TxCpltCallback : Tx Complete Callback. |
102 | (+) TxCpltCallback : Tx Complete Callback. |
104 | (+) RxHalfCpltCallback : Rx Half Complete Callback. |
103 | (+) RxHalfCpltCallback : Rx Half Complete Callback. |
Line 106... | Line 105... | ||
106 | (+) ErrorCallback : Error Callback. |
105 | (+) ErrorCallback : Error Callback. |
107 | (+) AbortCpltCallback : Abort Complete Callback. |
106 | (+) AbortCpltCallback : Abort Complete Callback. |
108 | (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. |
107 | (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback. |
109 | (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. |
108 | (+) AbortReceiveCpltCallback : Abort Receive Complete Callback. |
110 | (+) WakeupCallback : Wakeup Callback. |
109 | (+) WakeupCallback : Wakeup Callback. |
111 | (+) RxFifoFullCallback : Rx Fifo Full Callback. |
- | |
112 | (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. |
- | |
113 | (+) MspInitCallback : UART MspInit. |
110 | (+) MspInitCallback : UART MspInit. |
114 | (+) MspDeInitCallback : UART MspDeInit. |
111 | (+) MspDeInitCallback : UART MspDeInit. |
115 | 112 | ||
116 | [..] |
113 | [..] |
- | 114 | For specific callback RxEventCallback, use dedicated registration/reset functions: |
|
- | 115 | respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback(). |
|
- | 116 | ||
- | 117 | [..] |
|
117 | By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET |
118 | By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET |
118 | all callbacks are set to the corresponding weak (surcharged) functions: |
119 | all callbacks are set to the corresponding weak (surcharged) functions: |
119 | examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback(). |
120 | examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). |
120 | Exception done for MspInit and MspDeInit functions that are respectively |
121 | Exception done for MspInit and MspDeInit functions that are respectively |
121 | reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init() |
122 | reset to the legacy weak (surcharged) functions in the HAL_UART_Init() |
122 | and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). |
123 | and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). |
123 | If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit() |
124 | If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() |
124 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand). |
125 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand). |
125 | 126 | ||
126 | [..] |
127 | [..] |
127 | Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only. |
128 | Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only. |
128 | Exception done MspInit/MspDeInit that can be registered/unregistered |
129 | Exception done MspInit/MspDeInit that can be registered/unregistered |
129 | in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) |
130 | in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) |
130 | MspInit/DeInit callbacks can be used during the Init/DeInit. |
131 | MspInit/DeInit callbacks can be used during the Init/DeInit. |
131 | In that case first register the MspInit/MspDeInit user callbacks |
132 | In that case first register the MspInit/MspDeInit user callbacks |
132 | using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit() |
133 | using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit() |
133 | or @ref HAL_UART_Init() function. |
134 | or HAL_UART_Init() function. |
134 | 135 | ||
135 | [..] |
136 | [..] |
136 | When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or |
137 | When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or |
137 | not defined, the callback registration feature is not available |
138 | not defined, the callback registration feature is not available |
138 | and weak (surcharged) callbacks are used. |
139 | and weak (surcharged) callbacks are used. |
Line 170... | Line 171... | ||
170 | /* Private typedef -----------------------------------------------------------*/ |
171 | /* Private typedef -----------------------------------------------------------*/ |
171 | /* Private define ------------------------------------------------------------*/ |
172 | /* Private define ------------------------------------------------------------*/ |
172 | /** @defgroup UART_Private_Constants UART Private Constants |
173 | /** @defgroup UART_Private_Constants UART Private Constants |
173 | * @{ |
174 | * @{ |
174 | */ |
175 | */ |
175 | #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ |
176 | #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | \ |
176 | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8 )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ |
177 | USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */ |
177 | 178 | ||
- | 179 | #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE |\ |
|
178 | #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ |
180 | USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */ |
179 | 181 | ||
180 | 182 | ||
181 | #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ |
183 | #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */ |
182 | #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ |
184 | #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */ |
183 | - | ||
184 | /** |
185 | /** |
185 | * @} |
186 | * @} |
186 | */ |
187 | */ |
187 | 188 | ||
188 | /* Private macros ------------------------------------------------------------*/ |
189 | /* Private macros ------------------------------------------------------------*/ |
189 | /* Private variables ---------------------------------------------------------*/ |
- | |
190 | /* Private function prototypes -----------------------------------------------*/ |
190 | /* Private function prototypes -----------------------------------------------*/ |
191 | /** @addtogroup UART_Private_Functions |
191 | /** @addtogroup UART_Private_Functions |
192 | * @{ |
192 | * @{ |
193 | */ |
193 | */ |
194 | static void UART_EndTxTransfer(UART_HandleTypeDef *huart); |
194 | static void UART_EndTxTransfer(UART_HandleTypeDef *huart); |
Line 210... | Line 210... | ||
210 | static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); |
210 | static void UART_RxISR_16BIT(UART_HandleTypeDef *huart); |
211 | /** |
211 | /** |
212 | * @} |
212 | * @} |
213 | */ |
213 | */ |
214 | 214 | ||
- | 215 | /* Private variables ---------------------------------------------------------*/ |
|
- | 216 | /* Exported Constants --------------------------------------------------------*/ |
|
215 | /* Exported functions --------------------------------------------------------*/ |
217 | /* Exported functions --------------------------------------------------------*/ |
216 | 218 | ||
217 | /** @defgroup UART_Exported_Functions UART Exported Functions |
219 | /** @defgroup UART_Exported_Functions UART Exported Functions |
218 | * @{ |
220 | * @{ |
219 | */ |
221 | */ |
Line 693... | Line 695... | ||
693 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ |
695 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ |
694 | 696 | ||
695 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
697 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
696 | huart->gState = HAL_UART_STATE_RESET; |
698 | huart->gState = HAL_UART_STATE_RESET; |
697 | huart->RxState = HAL_UART_STATE_RESET; |
699 | huart->RxState = HAL_UART_STATE_RESET; |
- | 700 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
698 | 701 | ||
699 | __HAL_UNLOCK(huart); |
702 | __HAL_UNLOCK(huart); |
700 | 703 | ||
701 | return HAL_OK; |
704 | return HAL_OK; |
702 | } |
705 | } |
Line 745... | Line 748... | ||
745 | * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID |
748 | * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID |
746 | * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID |
749 | * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID |
747 | * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID |
750 | * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID |
748 | * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID |
751 | * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID |
749 | * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID |
752 | * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID |
750 | * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID |
- | |
751 | * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID |
- | |
752 | * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID |
753 | * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID |
753 | * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID |
754 | * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID |
754 | * @param pCallback pointer to the Callback function |
755 | * @param pCallback pointer to the Callback function |
755 | * @retval HAL status |
756 | * @retval HAL status |
756 | */ |
757 | */ |
Line 802... | Line 803... | ||
802 | 803 | ||
803 | case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : |
804 | case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : |
804 | huart->AbortReceiveCpltCallback = pCallback; |
805 | huart->AbortReceiveCpltCallback = pCallback; |
805 | break; |
806 | break; |
806 | 807 | ||
- | 808 | #if defined(USART_CR1_UESM) |
|
- | 809 | #if defined(USART_CR3_WUFIE) |
|
807 | case HAL_UART_WAKEUP_CB_ID : |
810 | case HAL_UART_WAKEUP_CB_ID : |
808 | huart->WakeupCallback = pCallback; |
811 | huart->WakeupCallback = pCallback; |
809 | break; |
812 | break; |
810 | 813 | ||
- | 814 | #endif /* USART_CR3_WUFIE */ |
|
- | 815 | #endif /* USART_CR1_UESM */ |
|
811 | 816 | ||
812 | case HAL_UART_MSPINIT_CB_ID : |
817 | case HAL_UART_MSPINIT_CB_ID : |
813 | huart->MspInitCallback = pCallback; |
818 | huart->MspInitCallback = pCallback; |
814 | break; |
819 | break; |
815 | 820 | ||
Line 868... | Line 873... | ||
868 | * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID |
873 | * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID |
869 | * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID |
874 | * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID |
870 | * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID |
875 | * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID |
871 | * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID |
876 | * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID |
872 | * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID |
877 | * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID |
873 | * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID |
- | |
874 | * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID |
- | |
875 | * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID |
878 | * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID |
876 | * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID |
879 | * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID |
877 | * @retval HAL status |
880 | * @retval HAL status |
878 | */ |
881 | */ |
879 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID) |
882 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID) |
Line 885... | Line 888... | ||
885 | if (HAL_UART_STATE_READY == huart->gState) |
888 | if (HAL_UART_STATE_READY == huart->gState) |
886 | { |
889 | { |
887 | switch (CallbackID) |
890 | switch (CallbackID) |
888 | { |
891 | { |
889 | case HAL_UART_TX_HALFCOMPLETE_CB_ID : |
892 | case HAL_UART_TX_HALFCOMPLETE_CB_ID : |
890 | huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ |
893 | huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */ |
891 | break; |
894 | break; |
892 | 895 | ||
893 | case HAL_UART_TX_COMPLETE_CB_ID : |
896 | case HAL_UART_TX_COMPLETE_CB_ID : |
894 | huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ |
897 | huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */ |
895 | break; |
898 | break; |
896 | 899 | ||
897 | case HAL_UART_RX_HALFCOMPLETE_CB_ID : |
900 | case HAL_UART_RX_HALFCOMPLETE_CB_ID : |
898 | huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ |
901 | huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */ |
899 | break; |
902 | break; |
900 | 903 | ||
901 | case HAL_UART_RX_COMPLETE_CB_ID : |
904 | case HAL_UART_RX_COMPLETE_CB_ID : |
902 | huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ |
905 | huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */ |
903 | break; |
906 | break; |
904 | 907 | ||
905 | case HAL_UART_ERROR_CB_ID : |
908 | case HAL_UART_ERROR_CB_ID : |
906 | huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ |
909 | huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ |
907 | break; |
910 | break; |
908 | 911 | ||
909 | case HAL_UART_ABORT_COMPLETE_CB_ID : |
912 | case HAL_UART_ABORT_COMPLETE_CB_ID : |
910 | huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ |
913 | huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ |
911 | break; |
914 | break; |
912 | 915 | ||
913 | case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : |
916 | case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID : |
914 | huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ |
917 | huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak |
- | 918 | AbortTransmitCpltCallback */ |
|
915 | break; |
919 | break; |
916 | 920 | ||
917 | case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : |
921 | case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID : |
918 | huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ |
922 | huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak |
- | 923 | AbortReceiveCpltCallback */ |
|
919 | break; |
924 | break; |
920 | 925 | ||
921 | #if defined(USART_CR1_UESM) |
926 | #if defined(USART_CR1_UESM) |
- | 927 | #if defined(USART_CR3_WUFIE) |
|
922 | case HAL_UART_WAKEUP_CB_ID : |
928 | case HAL_UART_WAKEUP_CB_ID : |
923 | huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ |
929 | huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ |
924 | break; |
930 | break; |
925 | 931 | ||
- | 932 | #endif /* USART_CR3_WUFIE */ |
|
926 | #endif /* USART_CR1_UESM */ |
933 | #endif /* USART_CR1_UESM */ |
927 | case HAL_UART_MSPINIT_CB_ID : |
934 | case HAL_UART_MSPINIT_CB_ID : |
928 | huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */ |
935 | huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */ |
929 | break; |
936 | break; |
930 | 937 | ||
931 | case HAL_UART_MSPDEINIT_CB_ID : |
938 | case HAL_UART_MSPDEINIT_CB_ID : |
932 | huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */ |
939 | huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */ |
933 | break; |
940 | break; |
934 | 941 | ||
935 | default : |
942 | default : |
936 | huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; |
943 | huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; |
937 | 944 | ||
Line 967... | Line 974... | ||
967 | 974 | ||
968 | __HAL_UNLOCK(huart); |
975 | __HAL_UNLOCK(huart); |
969 | 976 | ||
970 | return status; |
977 | return status; |
971 | } |
978 | } |
- | 979 | ||
- | 980 | /** |
|
- | 981 | * @brief Register a User UART Rx Event Callback |
|
- | 982 | * To be used instead of the weak predefined callback |
|
- | 983 | * @param huart Uart handle |
|
- | 984 | * @param pCallback Pointer to the Rx Event Callback function |
|
- | 985 | * @retval HAL status |
|
- | 986 | */ |
|
- | 987 | HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback) |
|
- | 988 | { |
|
- | 989 | HAL_StatusTypeDef status = HAL_OK; |
|
- | 990 | ||
- | 991 | if (pCallback == NULL) |
|
- | 992 | { |
|
- | 993 | huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; |
|
- | 994 | ||
- | 995 | return HAL_ERROR; |
|
- | 996 | } |
|
- | 997 | ||
- | 998 | /* Process locked */ |
|
- | 999 | __HAL_LOCK(huart); |
|
- | 1000 | ||
- | 1001 | if (huart->gState == HAL_UART_STATE_READY) |
|
- | 1002 | { |
|
- | 1003 | huart->RxEventCallback = pCallback; |
|
- | 1004 | } |
|
- | 1005 | else |
|
- | 1006 | { |
|
- | 1007 | huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; |
|
- | 1008 | ||
- | 1009 | status = HAL_ERROR; |
|
- | 1010 | } |
|
- | 1011 | ||
- | 1012 | /* Release Lock */ |
|
- | 1013 | __HAL_UNLOCK(huart); |
|
- | 1014 | ||
- | 1015 | return status; |
|
- | 1016 | } |
|
- | 1017 | ||
- | 1018 | /** |
|
- | 1019 | * @brief UnRegister the UART Rx Event Callback |
|
- | 1020 | * UART Rx Event Callback is redirected to the weak HAL_UARTEx_RxEventCallback() predefined callback |
|
- | 1021 | * @param huart Uart handle |
|
- | 1022 | * @retval HAL status |
|
- | 1023 | */ |
|
- | 1024 | HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) |
|
- | 1025 | { |
|
- | 1026 | HAL_StatusTypeDef status = HAL_OK; |
|
- | 1027 | ||
- | 1028 | /* Process locked */ |
|
- | 1029 | __HAL_LOCK(huart); |
|
- | 1030 | ||
- | 1031 | if (huart->gState == HAL_UART_STATE_READY) |
|
- | 1032 | { |
|
- | 1033 | huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ |
|
- | 1034 | } |
|
- | 1035 | else |
|
- | 1036 | { |
|
- | 1037 | huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; |
|
- | 1038 | ||
- | 1039 | status = HAL_ERROR; |
|
- | 1040 | } |
|
- | 1041 | ||
- | 1042 | /* Release Lock */ |
|
- | 1043 | __HAL_UNLOCK(huart); |
|
- | 1044 | return status; |
|
- | 1045 | } |
|
- | 1046 | ||
972 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
1047 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
973 | 1048 | ||
974 | /** |
1049 | /** |
975 | * @} |
1050 | * @} |
976 | */ |
1051 | */ |
Line 1032... | Line 1107... | ||
1032 | (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: |
1107 | (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided: |
1033 | (+) HAL_UART_AbortCpltCallback() |
1108 | (+) HAL_UART_AbortCpltCallback() |
1034 | (+) HAL_UART_AbortTransmitCpltCallback() |
1109 | (+) HAL_UART_AbortTransmitCpltCallback() |
1035 | (+) HAL_UART_AbortReceiveCpltCallback() |
1110 | (+) HAL_UART_AbortReceiveCpltCallback() |
1036 | 1111 | ||
- | 1112 | (#) A Rx Event Reception Callback (Rx event notification) is available for Non_Blocking modes of enhanced |
|
- | 1113 | reception services: |
|
- | 1114 | (+) HAL_UARTEx_RxEventCallback() |
|
- | 1115 | ||
1037 | (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. |
1116 | (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. |
1038 | Errors are handled as follows : |
1117 | Errors are handled as follows : |
1039 | (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is |
1118 | (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is |
1040 | to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception . |
1119 | to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error |
- | 1120 | in Interrupt mode reception . |
|
1041 | Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type, |
1121 | Received character is then retrieved and stored in Rx buffer, Error code is set to allow user |
1042 | and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side. |
1122 | to identify error type, and HAL_UART_ErrorCallback() user callback is executed. |
- | 1123 | Transfer is kept ongoing on UART side. |
|
1043 | If user wants to abort it, Abort services should be called by user. |
1124 | If user wants to abort it, Abort services should be called by user. |
1044 | (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. |
1125 | (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted. |
1045 | This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. |
1126 | This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode. |
1046 | Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed. |
1127 | Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() |
- | 1128 | user callback is executed. |
|
1047 | 1129 | ||
1048 | -@- In the Half duplex communication, it is forbidden to run the transmit |
1130 | -@- In the Half duplex communication, it is forbidden to run the transmit |
1049 | and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. |
1131 | and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful. |
1050 | 1132 | ||
1051 | @endverbatim |
1133 | @endverbatim |
Line 1058... | Line 1140... | ||
1058 | * the sent data is handled as a set of u16. In this case, Size must indicate the number |
1140 | * the sent data is handled as a set of u16. In this case, Size must indicate the number |
1059 | * of u16 provided through pData. |
1141 | * of u16 provided through pData. |
1060 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1142 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1061 | * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) |
1143 | * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) |
1062 | * (as sent data will be handled using u16 pointer cast). Depending on compilation chain, |
1144 | * (as sent data will be handled using u16 pointer cast). Depending on compilation chain, |
1063 | * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData. |
1145 | * use of specific alignment compilation directives or pragmas might be required |
- | 1146 | * to ensure proper alignment for pData. |
|
1064 | * @param huart UART handle. |
1147 | * @param huart UART handle. |
1065 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1148 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1066 | * @param Size Amount of data elements (u8 or u16) to be sent. |
1149 | * @param Size Amount of data elements (u8 or u16) to be sent. |
1067 | * @param Timeout Timeout duration. |
1150 | * @param Timeout Timeout duration. |
1068 | * @retval HAL status |
1151 | * @retval HAL status |
Line 1095... | Line 1178... | ||
1095 | __HAL_LOCK(huart); |
1178 | __HAL_LOCK(huart); |
1096 | 1179 | ||
1097 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1180 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1098 | huart->gState = HAL_UART_STATE_BUSY_TX; |
1181 | huart->gState = HAL_UART_STATE_BUSY_TX; |
1099 | 1182 | ||
1100 | /* Init tickstart for timeout managment*/ |
1183 | /* Init tickstart for timeout management */ |
1101 | tickstart = HAL_GetTick(); |
1184 | tickstart = HAL_GetTick(); |
1102 | 1185 | ||
1103 | huart->TxXferSize = Size; |
1186 | huart->TxXferSize = Size; |
1104 | huart->TxXferCount = Size; |
1187 | huart->TxXferCount = Size; |
1105 | 1188 | ||
Line 1113... | Line 1196... | ||
1113 | { |
1196 | { |
1114 | pdata8bits = pData; |
1197 | pdata8bits = pData; |
1115 | pdata16bits = NULL; |
1198 | pdata16bits = NULL; |
1116 | } |
1199 | } |
1117 | 1200 | ||
- | 1201 | __HAL_UNLOCK(huart); |
|
- | 1202 | ||
1118 | while (huart->TxXferCount > 0U) |
1203 | while (huart->TxXferCount > 0U) |
1119 | { |
1204 | { |
1120 | if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) |
1205 | if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) |
1121 | { |
1206 | { |
1122 | return HAL_TIMEOUT; |
1207 | return HAL_TIMEOUT; |
Line 1140... | Line 1225... | ||
1140 | } |
1225 | } |
1141 | 1226 | ||
1142 | /* At end of Tx process, restore huart->gState to Ready */ |
1227 | /* At end of Tx process, restore huart->gState to Ready */ |
1143 | huart->gState = HAL_UART_STATE_READY; |
1228 | huart->gState = HAL_UART_STATE_READY; |
1144 | 1229 | ||
1145 | __HAL_UNLOCK(huart); |
- | |
1146 | - | ||
1147 | return HAL_OK; |
1230 | return HAL_OK; |
1148 | } |
1231 | } |
1149 | else |
1232 | else |
1150 | { |
1233 | { |
1151 | return HAL_BUSY; |
1234 | return HAL_BUSY; |
Line 1156... | Line 1239... | ||
1156 | * @brief Receive an amount of data in blocking mode. |
1239 | * @brief Receive an amount of data in blocking mode. |
1157 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1240 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1158 | * the received data is handled as a set of u16. In this case, Size must indicate the number |
1241 | * the received data is handled as a set of u16. In this case, Size must indicate the number |
1159 | * of u16 available through pData. |
1242 | * of u16 available through pData. |
1160 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1243 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1161 | * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits) |
1244 | * address of user data buffer for storing data to be received, should be aligned on a half word frontier |
1162 | * (as received data will be handled using u16 pointer cast). Depending on compilation chain, |
1245 | * (16 bits) (as received data will be handled using u16 pointer cast). Depending on compilation chain, |
1163 | * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData. |
1246 | * use of specific alignment compilation directives or pragmas might be required |
- | 1247 | * to ensure proper alignment for pData. |
|
1164 | * @param huart UART handle. |
1248 | * @param huart UART handle. |
1165 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1249 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1166 | * @param Size Amount of data elements (u8 or u16) to be received. |
1250 | * @param Size Amount of data elements (u8 or u16) to be received. |
1167 | * @param Timeout Timeout duration. |
1251 | * @param Timeout Timeout duration. |
1168 | * @retval HAL status |
1252 | * @retval HAL status |
Line 1195... | Line 1279... | ||
1195 | 1279 | ||
1196 | __HAL_LOCK(huart); |
1280 | __HAL_LOCK(huart); |
1197 | 1281 | ||
1198 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1282 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1199 | huart->RxState = HAL_UART_STATE_BUSY_RX; |
1283 | huart->RxState = HAL_UART_STATE_BUSY_RX; |
- | 1284 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
1200 | 1285 | ||
1201 | /* Init tickstart for timeout managment*/ |
1286 | /* Init tickstart for timeout management */ |
1202 | tickstart = HAL_GetTick(); |
1287 | tickstart = HAL_GetTick(); |
1203 | 1288 | ||
1204 | huart->RxXferSize = Size; |
1289 | huart->RxXferSize = Size; |
1205 | huart->RxXferCount = Size; |
1290 | huart->RxXferCount = Size; |
1206 | 1291 | ||
Line 1218... | Line 1303... | ||
1218 | { |
1303 | { |
1219 | pdata8bits = pData; |
1304 | pdata8bits = pData; |
1220 | pdata16bits = NULL; |
1305 | pdata16bits = NULL; |
1221 | } |
1306 | } |
1222 | 1307 | ||
- | 1308 | __HAL_UNLOCK(huart); |
|
- | 1309 | ||
1223 | /* as long as data have to be received */ |
1310 | /* as long as data have to be received */ |
1224 | while (huart->RxXferCount > 0U) |
1311 | while (huart->RxXferCount > 0U) |
1225 | { |
1312 | { |
1226 | if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) |
1313 | if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) |
1227 | { |
1314 | { |
Line 1241... | Line 1328... | ||
1241 | } |
1328 | } |
1242 | 1329 | ||
1243 | /* At end of Rx process, restore huart->RxState to Ready */ |
1330 | /* At end of Rx process, restore huart->RxState to Ready */ |
1244 | huart->RxState = HAL_UART_STATE_READY; |
1331 | huart->RxState = HAL_UART_STATE_READY; |
1245 | 1332 | ||
1246 | __HAL_UNLOCK(huart); |
- | |
1247 | - | ||
1248 | return HAL_OK; |
1333 | return HAL_OK; |
1249 | } |
1334 | } |
1250 | else |
1335 | else |
1251 | { |
1336 | { |
1252 | return HAL_BUSY; |
1337 | return HAL_BUSY; |
Line 1259... | Line 1344... | ||
1259 | * the sent data is handled as a set of u16. In this case, Size must indicate the number |
1344 | * the sent data is handled as a set of u16. In this case, Size must indicate the number |
1260 | * of u16 provided through pData. |
1345 | * of u16 provided through pData. |
1261 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1346 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1262 | * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) |
1347 | * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) |
1263 | * (as sent data will be handled using u16 pointer cast). Depending on compilation chain, |
1348 | * (as sent data will be handled using u16 pointer cast). Depending on compilation chain, |
1264 | * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData. |
1349 | * use of specific alignment compilation directives or pragmas might be required |
- | 1350 | * to ensure proper alignment for pData. |
|
1265 | * @param huart UART handle. |
1351 | * @param huart UART handle. |
1266 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1352 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1267 | * @param Size Amount of data elements (u8 or u16) to be sent. |
1353 | * @param Size Amount of data elements (u8 or u16) to be sent. |
1268 | * @retval HAL status |
1354 | * @retval HAL status |
1269 | */ |
1355 | */ |
Line 1309... | Line 1395... | ||
1309 | } |
1395 | } |
1310 | 1396 | ||
1311 | __HAL_UNLOCK(huart); |
1397 | __HAL_UNLOCK(huart); |
1312 | 1398 | ||
1313 | /* Enable the Transmit Data Register Empty interrupt */ |
1399 | /* Enable the Transmit Data Register Empty interrupt */ |
1314 | SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); |
1400 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); |
1315 | 1401 | ||
1316 | return HAL_OK; |
1402 | return HAL_OK; |
1317 | } |
1403 | } |
1318 | else |
1404 | else |
1319 | { |
1405 | { |
Line 1325... | Line 1411... | ||
1325 | * @brief Receive an amount of data in interrupt mode. |
1411 | * @brief Receive an amount of data in interrupt mode. |
1326 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1412 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1327 | * the received data is handled as a set of u16. In this case, Size must indicate the number |
1413 | * the received data is handled as a set of u16. In this case, Size must indicate the number |
1328 | * of u16 available through pData. |
1414 | * of u16 available through pData. |
1329 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1415 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1330 | * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits) |
1416 | * address of user data buffer for storing data to be received, should be aligned on a half word frontier |
1331 | * (as received data will be handled using u16 pointer cast). Depending on compilation chain, |
1417 | * (16 bits) (as received data will be handled using u16 pointer cast). Depending on compilation chain, |
1332 | * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData. |
1418 | * use of specific alignment compilation directives or pragmas might be required |
- | 1419 | * to ensure proper alignment for pData. |
|
1333 | * @param huart UART handle. |
1420 | * @param huart UART handle. |
1334 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1421 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1335 | * @param Size Amount of data elements (u8 or u16) to be received. |
1422 | * @param Size Amount of data elements (u8 or u16) to be received. |
1336 | * @retval HAL status |
1423 | * @retval HAL status |
1337 | */ |
1424 | */ |
Line 1356... | Line 1443... | ||
1356 | } |
1443 | } |
1357 | } |
1444 | } |
1358 | 1445 | ||
1359 | __HAL_LOCK(huart); |
1446 | __HAL_LOCK(huart); |
1360 | 1447 | ||
1361 | huart->pRxBuffPtr = pData; |
- | |
1362 | huart->RxXferSize = Size; |
1448 | /* Set Reception type to Standard reception */ |
1363 | huart->RxXferCount = Size; |
1449 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
1364 | huart->RxISR = NULL; |
- | |
1365 | 1450 | ||
1366 | /* Computation of UART mask to apply to RDR register */ |
1451 | /* Check that USART RTOEN bit is set */ |
1367 | UART_MASK_COMPUTATION(huart); |
- | |
1368 | - | ||
1369 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
- | |
1370 | huart->RxState = HAL_UART_STATE_BUSY_RX; |
- | |
1371 | - | ||
1372 | /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
- | |
1373 | SET_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1452 | if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) |
1374 | - | ||
1375 | /* Set the Rx ISR function pointer according to the data word length */ |
- | |
1376 | if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) |
- | |
1377 | { |
1453 | { |
1378 | huart->RxISR = UART_RxISR_16BIT; |
1454 | /* Enable the UART Receiver Timeout Interrupt */ |
1379 | } |
- | |
1380 | else |
- | |
1381 | { |
- | |
1382 | huart->RxISR = UART_RxISR_8BIT; |
1455 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); |
1383 | } |
1456 | } |
1384 | 1457 | ||
1385 | __HAL_UNLOCK(huart); |
- | |
1386 | - | ||
1387 | /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ |
- | |
1388 | SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); |
1458 | return (UART_Start_Receive_IT(huart, pData, Size)); |
1389 | - | ||
1390 | return HAL_OK; |
- | |
1391 | } |
1459 | } |
1392 | else |
1460 | else |
1393 | { |
1461 | { |
1394 | return HAL_BUSY; |
1462 | return HAL_BUSY; |
1395 | } |
1463 | } |
Line 1401... | Line 1469... | ||
1401 | * the sent data is handled as a set of u16. In this case, Size must indicate the number |
1469 | * the sent data is handled as a set of u16. In this case, Size must indicate the number |
1402 | * of u16 provided through pData. |
1470 | * of u16 provided through pData. |
1403 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1471 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1404 | * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) |
1472 | * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits) |
1405 | * (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain, |
1473 | * (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain, |
1406 | * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData. |
1474 | * use of specific alignment compilation directives or pragmas might be required |
- | 1475 | * to ensure proper alignment for pData. |
|
1407 | * @param huart UART handle. |
1476 | * @param huart UART handle. |
1408 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1477 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1409 | * @param Size Amount of data elements (u8 or u16) to be sent. |
1478 | * @param Size Amount of data elements (u8 or u16) to be sent. |
1410 | * @retval HAL status |
1479 | * @retval HAL status |
1411 | */ |
1480 | */ |
Line 1472... | Line 1541... | ||
1472 | 1541 | ||
1473 | __HAL_UNLOCK(huart); |
1542 | __HAL_UNLOCK(huart); |
1474 | 1543 | ||
1475 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
1544 | /* Enable the DMA transfer for transmit request by setting the DMAT bit |
1476 | in the UART CR3 register */ |
1545 | in the UART CR3 register */ |
1477 | SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1546 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1478 | 1547 | ||
1479 | return HAL_OK; |
1548 | return HAL_OK; |
1480 | } |
1549 | } |
1481 | else |
1550 | else |
1482 | { |
1551 | { |
Line 1490... | Line 1559... | ||
1490 | * the parity bit (MSB position). |
1559 | * the parity bit (MSB position). |
1491 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1560 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1492 | * the received data is handled as a set of u16. In this case, Size must indicate the number |
1561 | * the received data is handled as a set of u16. In this case, Size must indicate the number |
1493 | * of u16 available through pData. |
1562 | * of u16 available through pData. |
1494 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1563 | * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01), |
1495 | * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits) |
1564 | * address of user data buffer for storing data to be received, should be aligned on a half word frontier |
1496 | * (as received data will be handled by DMA from halfword frontier). Depending on compilation chain, |
1565 | * (16 bits) (as received data will be handled by DMA from halfword frontier). Depending on compilation chain, |
1497 | * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData. |
1566 | * use of specific alignment compilation directives or pragmas might be required |
- | 1567 | * to ensure proper alignment for pData. |
|
1498 | * @param huart UART handle. |
1568 | * @param huart UART handle. |
1499 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1569 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
1500 | * @param Size Amount of data elements (u8 or u16) to be received. |
1570 | * @param Size Amount of data elements (u8 or u16) to be received. |
1501 | * @retval HAL status |
1571 | * @retval HAL status |
1502 | */ |
1572 | */ |
Line 1521... | Line 1591... | ||
1521 | } |
1591 | } |
1522 | } |
1592 | } |
1523 | 1593 | ||
1524 | __HAL_LOCK(huart); |
1594 | __HAL_LOCK(huart); |
1525 | 1595 | ||
1526 | huart->pRxBuffPtr = pData; |
1596 | /* Set Reception type to Standard reception */ |
1527 | huart->RxXferSize = Size; |
1597 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
1528 | 1598 | ||
1529 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1599 | /* Check that USART RTOEN bit is set */ |
1530 | huart->RxState = HAL_UART_STATE_BUSY_RX; |
1600 | if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) |
1531 | - | ||
1532 | if (huart->hdmarx != NULL) |
- | |
1533 | { |
1601 | { |
1534 | /* Set the UART DMA transfer complete callback */ |
1602 | /* Enable the UART Receiver Timeout Interrupt */ |
1535 | huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; |
- | |
1536 | - | ||
1537 | /* Set the UART DMA Half transfer complete callback */ |
- | |
1538 | huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; |
- | |
1539 | - | ||
1540 | /* Set the DMA error callback */ |
- | |
1541 | huart->hdmarx->XferErrorCallback = UART_DMAError; |
- | |
1542 | - | ||
1543 | /* Set the DMA abort callback */ |
- | |
1544 | huart->hdmarx->XferAbortCallback = NULL; |
- | |
1545 | - | ||
1546 | /* Enable the DMA channel */ |
- | |
1547 | if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) |
- | |
1548 | { |
- | |
1549 | /* Set error code to DMA */ |
- | |
1550 | huart->ErrorCode = HAL_UART_ERROR_DMA; |
- | |
1551 | - | ||
1552 | __HAL_UNLOCK(huart); |
- | |
1553 | - | ||
1554 | /* Restore huart->gState to ready */ |
- | |
1555 | huart->gState = HAL_UART_STATE_READY; |
1603 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); |
1556 | - | ||
1557 | return HAL_ERROR; |
- | |
1558 | } |
- | |
1559 | } |
1604 | } |
1560 | __HAL_UNLOCK(huart); |
- | |
1561 | - | ||
1562 | /* Enable the UART Parity Error Interrupt */ |
- | |
1563 | SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
- | |
1564 | - | ||
1565 | /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
- | |
1566 | SET_BIT(huart->Instance->CR3, USART_CR3_EIE); |
- | |
1567 | - | ||
1568 | /* Enable the DMA transfer for the receiver request by setting the DMAR bit |
- | |
1569 | in the UART CR3 register */ |
- | |
1570 | SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
- | |
1571 | 1605 | ||
1572 | return HAL_OK; |
1606 | return (UART_Start_Receive_DMA(huart, pData, Size)); |
1573 | } |
1607 | } |
1574 | else |
1608 | else |
1575 | { |
1609 | { |
1576 | return HAL_BUSY; |
1610 | return HAL_BUSY; |
1577 | } |
1611 | } |
Line 1591... | Line 1625... | ||
1591 | 1625 | ||
1592 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && |
1626 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && |
1593 | (gstate == HAL_UART_STATE_BUSY_TX)) |
1627 | (gstate == HAL_UART_STATE_BUSY_TX)) |
1594 | { |
1628 | { |
1595 | /* Disable the UART DMA Tx request */ |
1629 | /* Disable the UART DMA Tx request */ |
1596 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1630 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1597 | } |
1631 | } |
1598 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && |
1632 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && |
1599 | (rxstate == HAL_UART_STATE_BUSY_RX)) |
1633 | (rxstate == HAL_UART_STATE_BUSY_RX)) |
1600 | { |
1634 | { |
1601 | /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1635 | /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1602 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
1636 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
1603 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1637 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1604 | 1638 | ||
1605 | /* Disable the UART DMA Rx request */ |
1639 | /* Disable the UART DMA Rx request */ |
1606 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1640 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1607 | } |
1641 | } |
1608 | 1642 | ||
1609 | __HAL_UNLOCK(huart); |
1643 | __HAL_UNLOCK(huart); |
1610 | 1644 | ||
1611 | return HAL_OK; |
1645 | return HAL_OK; |
Line 1621... | Line 1655... | ||
1621 | __HAL_LOCK(huart); |
1655 | __HAL_LOCK(huart); |
1622 | 1656 | ||
1623 | if (huart->gState == HAL_UART_STATE_BUSY_TX) |
1657 | if (huart->gState == HAL_UART_STATE_BUSY_TX) |
1624 | { |
1658 | { |
1625 | /* Enable the UART DMA Tx request */ |
1659 | /* Enable the UART DMA Tx request */ |
1626 | SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1660 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1627 | } |
1661 | } |
1628 | if (huart->RxState == HAL_UART_STATE_BUSY_RX) |
1662 | if (huart->RxState == HAL_UART_STATE_BUSY_RX) |
1629 | { |
1663 | { |
1630 | /* Clear the Overrun flag before resuming the Rx transfer */ |
1664 | /* Clear the Overrun flag before resuming the Rx transfer */ |
1631 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); |
1665 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); |
1632 | 1666 | ||
1633 | /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1667 | /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1634 | SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
1668 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
1635 | SET_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1669 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1636 | 1670 | ||
1637 | /* Enable the UART DMA Rx request */ |
1671 | /* Enable the UART DMA Rx request */ |
1638 | SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1672 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1639 | } |
1673 | } |
1640 | 1674 | ||
1641 | __HAL_UNLOCK(huart); |
1675 | __HAL_UNLOCK(huart); |
1642 | 1676 | ||
1643 | return HAL_OK; |
1677 | return HAL_OK; |
Line 1662... | Line 1696... | ||
1662 | 1696 | ||
1663 | /* Stop UART DMA Tx request if ongoing */ |
1697 | /* Stop UART DMA Tx request if ongoing */ |
1664 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && |
1698 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && |
1665 | (gstate == HAL_UART_STATE_BUSY_TX)) |
1699 | (gstate == HAL_UART_STATE_BUSY_TX)) |
1666 | { |
1700 | { |
1667 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1701 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1668 | 1702 | ||
1669 | /* Abort the UART DMA Tx channel */ |
1703 | /* Abort the UART DMA Tx channel */ |
1670 | if (huart->hdmatx != NULL) |
1704 | if (huart->hdmatx != NULL) |
1671 | { |
1705 | { |
1672 | if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) |
1706 | if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK) |
Line 1686... | Line 1720... | ||
1686 | 1720 | ||
1687 | /* Stop UART DMA Rx request if ongoing */ |
1721 | /* Stop UART DMA Rx request if ongoing */ |
1688 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && |
1722 | if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && |
1689 | (rxstate == HAL_UART_STATE_BUSY_RX)) |
1723 | (rxstate == HAL_UART_STATE_BUSY_RX)) |
1690 | { |
1724 | { |
1691 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1725 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1692 | 1726 | ||
1693 | /* Abort the UART DMA Rx channel */ |
1727 | /* Abort the UART DMA Rx channel */ |
1694 | if (huart->hdmarx != NULL) |
1728 | if (huart->hdmarx != NULL) |
1695 | { |
1729 | { |
1696 | if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) |
1730 | if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK) |
Line 1724... | Line 1758... | ||
1724 | * @retval HAL status |
1758 | * @retval HAL status |
1725 | */ |
1759 | */ |
1726 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) |
1760 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) |
1727 | { |
1761 | { |
1728 | /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1762 | /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1729 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); |
1763 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); |
1730 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1764 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
- | 1765 | ||
- | 1766 | /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ |
|
- | 1767 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 1768 | { |
|
- | 1769 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); |
|
- | 1770 | } |
|
1731 | 1771 | ||
1732 | /* Disable the UART DMA Tx request if enabled */ |
1772 | /* Disable the UART DMA Tx request if enabled */ |
1733 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
1773 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
1734 | { |
1774 | { |
1735 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1775 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1736 | 1776 | ||
1737 | /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ |
1777 | /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ |
1738 | if (huart->hdmatx != NULL) |
1778 | if (huart->hdmatx != NULL) |
1739 | { |
1779 | { |
1740 | /* Set the UART DMA Abort callback to Null. |
1780 | /* Set the UART DMA Abort callback to Null. |
Line 1755... | Line 1795... | ||
1755 | } |
1795 | } |
1756 | 1796 | ||
1757 | /* Disable the UART DMA Rx request if enabled */ |
1797 | /* Disable the UART DMA Rx request if enabled */ |
1758 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
1798 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
1759 | { |
1799 | { |
1760 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1800 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1761 | 1801 | ||
1762 | /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ |
1802 | /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ |
1763 | if (huart->hdmarx != NULL) |
1803 | if (huart->hdmarx != NULL) |
1764 | { |
1804 | { |
1765 | /* Set the UART DMA Abort callback to Null. |
1805 | /* Set the UART DMA Abort callback to Null. |
Line 1791... | Line 1831... | ||
1791 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
1831 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
1792 | 1832 | ||
1793 | /* Restore huart->gState and huart->RxState to Ready */ |
1833 | /* Restore huart->gState and huart->RxState to Ready */ |
1794 | huart->gState = HAL_UART_STATE_READY; |
1834 | huart->gState = HAL_UART_STATE_READY; |
1795 | huart->RxState = HAL_UART_STATE_READY; |
1835 | huart->RxState = HAL_UART_STATE_READY; |
- | 1836 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
1796 | 1837 | ||
1797 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1838 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
1798 | 1839 | ||
1799 | return HAL_OK; |
1840 | return HAL_OK; |
1800 | } |
1841 | } |
Line 1812... | Line 1853... | ||
1812 | * @retval HAL status |
1853 | * @retval HAL status |
1813 | */ |
1854 | */ |
1814 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) |
1855 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) |
1815 | { |
1856 | { |
1816 | /* Disable TXEIE and TCIE interrupts */ |
1857 | /* Disable TXEIE and TCIE interrupts */ |
1817 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
1858 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
1818 | 1859 | ||
1819 | /* Disable the UART DMA Tx request if enabled */ |
1860 | /* Disable the UART DMA Tx request if enabled */ |
1820 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
1861 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
1821 | { |
1862 | { |
1822 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1863 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1823 | 1864 | ||
1824 | /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ |
1865 | /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ |
1825 | if (huart->hdmatx != NULL) |
1866 | if (huart->hdmatx != NULL) |
1826 | { |
1867 | { |
1827 | /* Set the UART DMA Abort callback to Null. |
1868 | /* Set the UART DMA Abort callback to Null. |
Line 1864... | Line 1905... | ||
1864 | * @retval HAL status |
1905 | * @retval HAL status |
1865 | */ |
1906 | */ |
1866 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) |
1907 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) |
1867 | { |
1908 | { |
1868 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1909 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
1869 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
1910 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
1870 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1911 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
- | 1912 | ||
- | 1913 | /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ |
|
- | 1914 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 1915 | { |
|
- | 1916 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); |
|
- | 1917 | } |
|
1871 | 1918 | ||
1872 | /* Disable the UART DMA Rx request if enabled */ |
1919 | /* Disable the UART DMA Rx request if enabled */ |
1873 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
1920 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
1874 | { |
1921 | { |
1875 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1922 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1876 | 1923 | ||
1877 | /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ |
1924 | /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ |
1878 | if (huart->hdmarx != NULL) |
1925 | if (huart->hdmarx != NULL) |
1879 | { |
1926 | { |
1880 | /* Set the UART DMA Abort callback to Null. |
1927 | /* Set the UART DMA Abort callback to Null. |
Line 1903... | Line 1950... | ||
1903 | /* Discard the received data */ |
1950 | /* Discard the received data */ |
1904 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
1951 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
1905 | 1952 | ||
1906 | /* Restore huart->RxState to Ready */ |
1953 | /* Restore huart->RxState to Ready */ |
1907 | huart->RxState = HAL_UART_STATE_READY; |
1954 | huart->RxState = HAL_UART_STATE_READY; |
- | 1955 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
1908 | 1956 | ||
1909 | return HAL_OK; |
1957 | return HAL_OK; |
1910 | } |
1958 | } |
1911 | 1959 | ||
1912 | /** |
1960 | /** |
Line 1926... | Line 1974... | ||
1926 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) |
1974 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) |
1927 | { |
1975 | { |
1928 | uint32_t abortcplt = 1U; |
1976 | uint32_t abortcplt = 1U; |
1929 | 1977 | ||
1930 | /* Disable interrupts */ |
1978 | /* Disable interrupts */ |
1931 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); |
1979 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE)); |
1932 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
1980 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
- | 1981 | ||
- | 1982 | /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ |
|
- | 1983 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 1984 | { |
|
- | 1985 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); |
|
- | 1986 | } |
|
1933 | 1987 | ||
1934 | /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised |
1988 | /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised |
1935 | before any call to DMA Abort functions */ |
1989 | before any call to DMA Abort functions */ |
1936 | /* DMA Tx Handle is valid */ |
1990 | /* DMA Tx Handle is valid */ |
1937 | if (huart->hdmatx != NULL) |
1991 | if (huart->hdmatx != NULL) |
Line 1964... | Line 2018... | ||
1964 | 2018 | ||
1965 | /* Disable the UART DMA Tx request if enabled */ |
2019 | /* Disable the UART DMA Tx request if enabled */ |
1966 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
2020 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
1967 | { |
2021 | { |
1968 | /* Disable DMA Tx at UART level */ |
2022 | /* Disable DMA Tx at UART level */ |
1969 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
2023 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
1970 | 2024 | ||
1971 | /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ |
2025 | /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ |
1972 | if (huart->hdmatx != NULL) |
2026 | if (huart->hdmatx != NULL) |
1973 | { |
2027 | { |
1974 | /* UART Tx DMA Abort callback has already been initialised : |
2028 | /* UART Tx DMA Abort callback has already been initialised : |
Line 1987... | Line 2041... | ||
1987 | } |
2041 | } |
1988 | 2042 | ||
1989 | /* Disable the UART DMA Rx request if enabled */ |
2043 | /* Disable the UART DMA Rx request if enabled */ |
1990 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
2044 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
1991 | { |
2045 | { |
1992 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
2046 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
1993 | 2047 | ||
1994 | /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ |
2048 | /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ |
1995 | if (huart->hdmarx != NULL) |
2049 | if (huart->hdmarx != NULL) |
1996 | { |
2050 | { |
1997 | /* UART Rx DMA Abort callback has already been initialised : |
2051 | /* UART Rx DMA Abort callback has already been initialised : |
Line 2032... | Line 2086... | ||
2032 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
2086 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
2033 | 2087 | ||
2034 | /* Restore huart->gState and huart->RxState to Ready */ |
2088 | /* Restore huart->gState and huart->RxState to Ready */ |
2035 | huart->gState = HAL_UART_STATE_READY; |
2089 | huart->gState = HAL_UART_STATE_READY; |
2036 | huart->RxState = HAL_UART_STATE_READY; |
2090 | huart->RxState = HAL_UART_STATE_READY; |
- | 2091 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
2037 | 2092 | ||
2038 | /* As no DMA to be aborted, call directly user Abort complete callback */ |
2093 | /* As no DMA to be aborted, call directly user Abort complete callback */ |
2039 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
2094 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
2040 | /* Call registered Abort complete callback */ |
2095 | /* Call registered Abort complete callback */ |
2041 | huart->AbortCpltCallback(huart); |
2096 | huart->AbortCpltCallback(huart); |
Line 2063... | Line 2118... | ||
2063 | * @retval HAL status |
2118 | * @retval HAL status |
2064 | */ |
2119 | */ |
2065 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) |
2120 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) |
2066 | { |
2121 | { |
2067 | /* Disable interrupts */ |
2122 | /* Disable interrupts */ |
2068 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
2123 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
2069 | 2124 | ||
2070 | /* Disable the UART DMA Tx request if enabled */ |
2125 | /* Disable the UART DMA Tx request if enabled */ |
2071 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
2126 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) |
2072 | { |
2127 | { |
2073 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
2128 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
2074 | 2129 | ||
2075 | /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ |
2130 | /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ |
2076 | if (huart->hdmatx != NULL) |
2131 | if (huart->hdmatx != NULL) |
2077 | { |
2132 | { |
2078 | /* Set the UART DMA Abort callback : |
2133 | /* Set the UART DMA Abort callback : |
Line 2147... | Line 2202... | ||
2147 | * @retval HAL status |
2202 | * @retval HAL status |
2148 | */ |
2203 | */ |
2149 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) |
2204 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) |
2150 | { |
2205 | { |
2151 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
2206 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
2152 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
2207 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
2153 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
2208 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
- | 2209 | ||
- | 2210 | /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ |
|
- | 2211 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 2212 | { |
|
- | 2213 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); |
|
- | 2214 | } |
|
2154 | 2215 | ||
2155 | /* Disable the UART DMA Rx request if enabled */ |
2216 | /* Disable the UART DMA Rx request if enabled */ |
2156 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
2217 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
2157 | { |
2218 | { |
2158 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
2219 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
2159 | 2220 | ||
2160 | /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ |
2221 | /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ |
2161 | if (huart->hdmarx != NULL) |
2222 | if (huart->hdmarx != NULL) |
2162 | { |
2223 | { |
2163 | /* Set the UART DMA Abort callback : |
2224 | /* Set the UART DMA Abort callback : |
Line 2185... | Line 2246... | ||
2185 | /* Discard the received data */ |
2246 | /* Discard the received data */ |
2186 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
2247 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
2187 | 2248 | ||
2188 | /* Restore huart->RxState to Ready */ |
2249 | /* Restore huart->RxState to Ready */ |
2189 | huart->RxState = HAL_UART_STATE_READY; |
2250 | huart->RxState = HAL_UART_STATE_READY; |
- | 2251 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
2190 | 2252 | ||
2191 | /* As no DMA to be aborted, call directly user Abort complete callback */ |
2253 | /* As no DMA to be aborted, call directly user Abort complete callback */ |
2192 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
2254 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
2193 | /* Call registered Abort Receive Complete Callback */ |
2255 | /* Call registered Abort Receive Complete Callback */ |
2194 | huart->AbortReceiveCpltCallback(huart); |
2256 | huart->AbortReceiveCpltCallback(huart); |
Line 2209... | Line 2271... | ||
2209 | /* Clear the Error flags in the ICR register */ |
2271 | /* Clear the Error flags in the ICR register */ |
2210 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); |
2272 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF); |
2211 | 2273 | ||
2212 | /* Restore huart->RxState to Ready */ |
2274 | /* Restore huart->RxState to Ready */ |
2213 | huart->RxState = HAL_UART_STATE_READY; |
2275 | huart->RxState = HAL_UART_STATE_READY; |
- | 2276 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
2214 | 2277 | ||
2215 | /* As no DMA to be aborted, call directly user Abort complete callback */ |
2278 | /* As no DMA to be aborted, call directly user Abort complete callback */ |
2216 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
2279 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
2217 | /* Call registered Abort Receive Complete Callback */ |
2280 | /* Call registered Abort Receive Complete Callback */ |
2218 | huart->AbortReceiveCpltCallback(huart); |
2281 | huart->AbortReceiveCpltCallback(huart); |
Line 2256... | Line 2319... | ||
2256 | } |
2319 | } |
2257 | 2320 | ||
2258 | /* If some errors occur */ |
2321 | /* If some errors occur */ |
2259 | if ((errorflags != 0U) |
2322 | if ((errorflags != 0U) |
2260 | && (((cr3its & USART_CR3_EIE) != 0U) |
2323 | && (((cr3its & USART_CR3_EIE) != 0U) |
2261 | || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U))) |
2324 | || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) |
2262 | { |
2325 | { |
2263 | /* UART parity error interrupt occurred -------------------------------------*/ |
2326 | /* UART parity error interrupt occurred -------------------------------------*/ |
2264 | if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) |
2327 | if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) |
2265 | { |
2328 | { |
2266 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); |
2329 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); |
Line 2330... | Line 2393... | ||
2330 | UART_EndRxTransfer(huart); |
2393 | UART_EndRxTransfer(huart); |
2331 | 2394 | ||
2332 | /* Disable the UART DMA Rx request if enabled */ |
2395 | /* Disable the UART DMA Rx request if enabled */ |
2333 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
2396 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
2334 | { |
2397 | { |
2335 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
2398 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
2336 | 2399 | ||
2337 | /* Abort the UART DMA Rx channel */ |
2400 | /* Abort the UART DMA Rx channel */ |
2338 | if (huart->hdmarx != NULL) |
2401 | if (huart->hdmarx != NULL) |
2339 | { |
2402 | { |
2340 | /* Set the UART DMA Abort callback : |
2403 | /* Set the UART DMA Abort callback : |
Line 2388... | Line 2451... | ||
2388 | } |
2451 | } |
2389 | } |
2452 | } |
2390 | return; |
2453 | return; |
2391 | 2454 | ||
2392 | } /* End if some error occurs */ |
2455 | } /* End if some error occurs */ |
- | 2456 | ||
- | 2457 | /* Check current reception Mode : |
|
- | 2458 | If Reception till IDLE event has been selected : */ |
|
- | 2459 | if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 2460 | && ((isrflags & USART_ISR_IDLE) != 0U) |
|
- | 2461 | && ((cr1its & USART_ISR_IDLE) != 0U)) |
|
- | 2462 | { |
|
- | 2463 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); |
|
- | 2464 | ||
- | 2465 | /* Check if DMA mode is enabled in UART */ |
|
- | 2466 | if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) |
|
- | 2467 | { |
|
- | 2468 | /* DMA mode enabled */ |
|
- | 2469 | /* Check received length : If all expected data are received, do nothing, |
|
- | 2470 | (DMA cplt callback will be called). |
|
- | 2471 | Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ |
|
- | 2472 | uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); |
|
- | 2473 | if ((nb_remaining_rx_data > 0U) |
|
- | 2474 | && (nb_remaining_rx_data < huart->RxXferSize)) |
|
- | 2475 | { |
|
- | 2476 | /* Reception is not complete */ |
|
- | 2477 | huart->RxXferCount = nb_remaining_rx_data; |
|
- | 2478 | ||
- | 2479 | /* In Normal mode, end DMA xfer and HAL UART Rx process*/ |
|
- | 2480 | if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) |
|
- | 2481 | { |
|
- | 2482 | /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
|
- | 2483 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
|
- | 2484 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
|
- | 2485 | ||
- | 2486 | /* Disable the DMA transfer for the receiver request by resetting the DMAR bit |
|
- | 2487 | in the UART CR3 register */ |
|
- | 2488 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
|
- | 2489 | ||
- | 2490 | /* At end of Rx process, restore huart->RxState to Ready */ |
|
- | 2491 | huart->RxState = HAL_UART_STATE_READY; |
|
- | 2492 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
- | 2493 | ||
- | 2494 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); |
|
- | 2495 | ||
- | 2496 | /* Last bytes received, so no need as the abort is immediate */ |
|
- | 2497 | (void)HAL_DMA_Abort(huart->hdmarx); |
|
- | 2498 | } |
|
- | 2499 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|
- | 2500 | /*Call registered Rx Event callback*/ |
|
- | 2501 | huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); |
|
- | 2502 | #else |
|
- | 2503 | /*Call legacy weak Rx Event callback*/ |
|
- | 2504 | HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); |
|
- | 2505 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ |
|
- | 2506 | } |
|
- | 2507 | return; |
|
- | 2508 | } |
|
- | 2509 | else |
|
- | 2510 | { |
|
- | 2511 | /* DMA mode not enabled */ |
|
- | 2512 | /* Check received length : If all expected data are received, do nothing. |
|
- | 2513 | Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ |
|
- | 2514 | uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; |
|
- | 2515 | if ((huart->RxXferCount > 0U) |
|
- | 2516 | && (nb_rx_data > 0U)) |
|
- | 2517 | { |
|
- | 2518 | /* Disable the UART Parity Error Interrupt and RXNE interrupts */ |
|
- | 2519 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
|
- | 2520 | ||
- | 2521 | /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
|
- | 2522 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
|
- | 2523 | ||
- | 2524 | /* Rx process is completed, restore huart->RxState to Ready */ |
|
- | 2525 | huart->RxState = HAL_UART_STATE_READY; |
|
- | 2526 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
- | 2527 | ||
- | 2528 | /* Clear RxISR function pointer */ |
|
- | 2529 | huart->RxISR = NULL; |
|
- | 2530 | ||
- | 2531 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); |
|
- | 2532 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|
- | 2533 | /*Call registered Rx complete callback*/ |
|
- | 2534 | huart->RxEventCallback(huart, nb_rx_data); |
|
- | 2535 | #else |
|
- | 2536 | /*Call legacy weak Rx Event callback*/ |
|
- | 2537 | HAL_UARTEx_RxEventCallback(huart, nb_rx_data); |
|
- | 2538 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ |
|
- | 2539 | } |
|
- | 2540 | return; |
|
- | 2541 | } |
|
- | 2542 | } |
|
2393 | #if defined(USART_CR1_UESM) |
2543 | #if defined(USART_CR1_UESM) |
- | 2544 | #if defined(USART_CR3_WUFIE) |
|
2394 | 2545 | ||
2395 | /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ |
2546 | /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ |
2396 | if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) |
2547 | if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) |
2397 | { |
2548 | { |
2398 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); |
2549 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); |
Line 2407... | Line 2558... | ||
2407 | /* Call legacy weak Wakeup Callback */ |
2558 | /* Call legacy weak Wakeup Callback */ |
2408 | HAL_UARTEx_WakeupCallback(huart); |
2559 | HAL_UARTEx_WakeupCallback(huart); |
2409 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
2560 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
2410 | return; |
2561 | return; |
2411 | } |
2562 | } |
- | 2563 | #endif /* USART_CR3_WUFIE */ |
|
2412 | #endif /* USART_CR1_UESM */ |
2564 | #endif /* USART_CR1_UESM */ |
2413 | 2565 | ||
2414 | /* UART in mode Transmitter ------------------------------------------------*/ |
2566 | /* UART in mode Transmitter ------------------------------------------------*/ |
2415 | if (((isrflags & USART_ISR_TXE) != 0U) |
2567 | if (((isrflags & USART_ISR_TXE) != 0U) |
2416 | && ((cr1its & USART_CR1_TXEIE) != 0U)) |
2568 | && ((cr1its & USART_CR1_TXEIE) != 0U)) |
Line 2550... | Line 2702... | ||
2550 | the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. |
2702 | the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file. |
2551 | */ |
2703 | */ |
2552 | } |
2704 | } |
2553 | 2705 | ||
2554 | /** |
2706 | /** |
- | 2707 | * @brief Reception Event Callback (Rx event notification called after use of advanced reception service). |
|
- | 2708 | * @param huart UART handle |
|
- | 2709 | * @param Size Number of data available in application reception buffer (indicates a position in |
|
- | 2710 | * reception buffer until which, data are available) |
|
- | 2711 | * @retval None |
|
- | 2712 | */ |
|
- | 2713 | __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) |
|
- | 2714 | { |
|
- | 2715 | /* Prevent unused argument(s) compilation warning */ |
|
- | 2716 | UNUSED(huart); |
|
- | 2717 | UNUSED(Size); |
|
- | 2718 | ||
- | 2719 | /* NOTE : This function should not be modified, when the callback is needed, |
|
- | 2720 | the HAL_UARTEx_RxEventCallback can be implemented in the user file. |
|
- | 2721 | */ |
|
- | 2722 | } |
|
- | 2723 | ||
- | 2724 | /** |
|
2555 | * @} |
2725 | * @} |
2556 | */ |
2726 | */ |
2557 | 2727 | ||
2558 | /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions |
2728 | /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions |
2559 | * @brief UART control functions |
2729 | * @brief UART control functions |
Line 2667... | Line 2837... | ||
2667 | __HAL_LOCK(huart); |
2837 | __HAL_LOCK(huart); |
2668 | 2838 | ||
2669 | huart->gState = HAL_UART_STATE_BUSY; |
2839 | huart->gState = HAL_UART_STATE_BUSY; |
2670 | 2840 | ||
2671 | /* Enable USART mute mode by setting the MME bit in the CR1 register */ |
2841 | /* Enable USART mute mode by setting the MME bit in the CR1 register */ |
2672 | SET_BIT(huart->Instance->CR1, USART_CR1_MME); |
2842 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME); |
2673 | 2843 | ||
2674 | huart->gState = HAL_UART_STATE_READY; |
2844 | huart->gState = HAL_UART_STATE_READY; |
2675 | 2845 | ||
2676 | return (UART_CheckIdleState(huart)); |
2846 | return (UART_CheckIdleState(huart)); |
2677 | } |
2847 | } |
Line 2687... | Line 2857... | ||
2687 | __HAL_LOCK(huart); |
2857 | __HAL_LOCK(huart); |
2688 | 2858 | ||
2689 | huart->gState = HAL_UART_STATE_BUSY; |
2859 | huart->gState = HAL_UART_STATE_BUSY; |
2690 | 2860 | ||
2691 | /* Disable USART mute mode by clearing the MME bit in the CR1 register */ |
2861 | /* Disable USART mute mode by clearing the MME bit in the CR1 register */ |
2692 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); |
2862 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); |
2693 | 2863 | ||
2694 | huart->gState = HAL_UART_STATE_READY; |
2864 | huart->gState = HAL_UART_STATE_READY; |
2695 | 2865 | ||
2696 | return (UART_CheckIdleState(huart)); |
2866 | return (UART_CheckIdleState(huart)); |
2697 | } |
2867 | } |
Line 2716... | Line 2886... | ||
2716 | { |
2886 | { |
2717 | __HAL_LOCK(huart); |
2887 | __HAL_LOCK(huart); |
2718 | huart->gState = HAL_UART_STATE_BUSY; |
2888 | huart->gState = HAL_UART_STATE_BUSY; |
2719 | 2889 | ||
2720 | /* Clear TE and RE bits */ |
2890 | /* Clear TE and RE bits */ |
2721 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); |
2891 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); |
2722 | 2892 | ||
2723 | /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ |
2893 | /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ |
2724 | SET_BIT(huart->Instance->CR1, USART_CR1_TE); |
2894 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE); |
2725 | 2895 | ||
2726 | huart->gState = HAL_UART_STATE_READY; |
2896 | huart->gState = HAL_UART_STATE_READY; |
2727 | 2897 | ||
2728 | __HAL_UNLOCK(huart); |
2898 | __HAL_UNLOCK(huart); |
2729 | 2899 | ||
Line 2739... | Line 2909... | ||
2739 | { |
2909 | { |
2740 | __HAL_LOCK(huart); |
2910 | __HAL_LOCK(huart); |
2741 | huart->gState = HAL_UART_STATE_BUSY; |
2911 | huart->gState = HAL_UART_STATE_BUSY; |
2742 | 2912 | ||
2743 | /* Clear TE and RE bits */ |
2913 | /* Clear TE and RE bits */ |
2744 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); |
2914 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); |
2745 | 2915 | ||
2746 | /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ |
2916 | /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ |
2747 | SET_BIT(huart->Instance->CR1, USART_CR1_RE); |
2917 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE); |
2748 | 2918 | ||
2749 | huart->gState = HAL_UART_STATE_READY; |
2919 | huart->gState = HAL_UART_STATE_READY; |
2750 | 2920 | ||
2751 | __HAL_UNLOCK(huart); |
2921 | __HAL_UNLOCK(huart); |
2752 | 2922 | ||
Line 2854... | Line 3024... | ||
2854 | huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ |
3024 | huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */ |
2855 | huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ |
3025 | huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */ |
2856 | huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ |
3026 | huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */ |
2857 | huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ |
3027 | huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */ |
2858 | #if defined(USART_CR1_UESM) |
3028 | #if defined(USART_CR1_UESM) |
- | 3029 | #if defined(USART_CR3_WUFIE) |
|
2859 | huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ |
3030 | huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */ |
- | 3031 | #endif /* USART_CR3_WUFIE */ |
|
2860 | #endif /* USART_CR1_UESM */ |
3032 | #endif /* USART_CR1_UESM */ |
- | 3033 | huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak RxEventCallback */ |
|
2861 | 3034 | ||
2862 | } |
3035 | } |
2863 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3036 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
2864 | 3037 | ||
2865 | /** |
3038 | /** |
Line 2870... | Line 3043... | ||
2870 | HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) |
3043 | HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) |
2871 | { |
3044 | { |
2872 | uint32_t tmpreg; |
3045 | uint32_t tmpreg; |
2873 | uint16_t brrtemp; |
3046 | uint16_t brrtemp; |
2874 | UART_ClockSourceTypeDef clocksource; |
3047 | UART_ClockSourceTypeDef clocksource; |
2875 | uint32_t usartdiv = 0x00000000U; |
3048 | uint32_t usartdiv; |
2876 | HAL_StatusTypeDef ret = HAL_OK; |
3049 | HAL_StatusTypeDef ret = HAL_OK; |
2877 | uint32_t pclk; |
3050 | uint32_t pclk; |
2878 | 3051 | ||
2879 | /* Check the parameters */ |
3052 | /* Check the parameters */ |
2880 | assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); |
3053 | assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate)); |
Line 2921... | Line 3094... | ||
2921 | { |
3094 | { |
2922 | switch (clocksource) |
3095 | switch (clocksource) |
2923 | { |
3096 | { |
2924 | case UART_CLOCKSOURCE_PCLK1: |
3097 | case UART_CLOCKSOURCE_PCLK1: |
2925 | pclk = HAL_RCC_GetPCLK1Freq(); |
3098 | pclk = HAL_RCC_GetPCLK1Freq(); |
2926 | usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); |
- | |
2927 | break; |
3099 | break; |
2928 | case UART_CLOCKSOURCE_HSI: |
3100 | case UART_CLOCKSOURCE_HSI: |
2929 | usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate)); |
3101 | pclk = (uint32_t) HSI_VALUE; |
2930 | break; |
3102 | break; |
2931 | case UART_CLOCKSOURCE_SYSCLK: |
3103 | case UART_CLOCKSOURCE_SYSCLK: |
2932 | pclk = HAL_RCC_GetSysClockFreq(); |
3104 | pclk = HAL_RCC_GetSysClockFreq(); |
2933 | usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); |
- | |
2934 | break; |
3105 | break; |
2935 | case UART_CLOCKSOURCE_LSE: |
3106 | case UART_CLOCKSOURCE_LSE: |
2936 | usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate)); |
3107 | pclk = (uint32_t) LSE_VALUE; |
2937 | break; |
3108 | break; |
2938 | default: |
3109 | default: |
- | 3110 | pclk = 0U; |
|
2939 | ret = HAL_ERROR; |
3111 | ret = HAL_ERROR; |
2940 | break; |
3112 | break; |
2941 | } |
3113 | } |
2942 | 3114 | ||
2943 | /* USARTDIV must be greater than or equal to 0d16 */ |
3115 | /* USARTDIV must be greater than or equal to 0d16 */ |
2944 | if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) |
- | |
2945 | { |
- | |
2946 | brrtemp = (uint16_t)(usartdiv & 0xFFF0U); |
- | |
2947 | brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); |
- | |
2948 | huart->Instance->BRR = brrtemp; |
- | |
2949 | } |
- | |
2950 | else |
3116 | if (pclk != 0U) |
2951 | { |
3117 | { |
- | 3118 | usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); |
|
- | 3119 | if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) |
|
- | 3120 | { |
|
- | 3121 | brrtemp = (uint16_t)(usartdiv & 0xFFF0U); |
|
- | 3122 | brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); |
|
- | 3123 | huart->Instance->BRR = brrtemp; |
|
- | 3124 | } |
|
- | 3125 | else |
|
- | 3126 | { |
|
2952 | ret = HAL_ERROR; |
3127 | ret = HAL_ERROR; |
- | 3128 | } |
|
2953 | } |
3129 | } |
2954 | } |
3130 | } |
2955 | else |
3131 | else |
2956 | { |
3132 | { |
2957 | switch (clocksource) |
3133 | switch (clocksource) |
2958 | { |
3134 | { |
2959 | case UART_CLOCKSOURCE_PCLK1: |
3135 | case UART_CLOCKSOURCE_PCLK1: |
2960 | pclk = HAL_RCC_GetPCLK1Freq(); |
3136 | pclk = HAL_RCC_GetPCLK1Freq(); |
2961 | usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); |
- | |
2962 | break; |
3137 | break; |
2963 | case UART_CLOCKSOURCE_HSI: |
3138 | case UART_CLOCKSOURCE_HSI: |
2964 | usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate)); |
3139 | pclk = (uint32_t) HSI_VALUE; |
2965 | break; |
3140 | break; |
2966 | case UART_CLOCKSOURCE_SYSCLK: |
3141 | case UART_CLOCKSOURCE_SYSCLK: |
2967 | pclk = HAL_RCC_GetSysClockFreq(); |
3142 | pclk = HAL_RCC_GetSysClockFreq(); |
2968 | usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); |
- | |
2969 | break; |
3143 | break; |
2970 | case UART_CLOCKSOURCE_LSE: |
3144 | case UART_CLOCKSOURCE_LSE: |
2971 | usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate)); |
3145 | pclk = (uint32_t) LSE_VALUE; |
2972 | break; |
3146 | break; |
2973 | default: |
3147 | default: |
- | 3148 | pclk = 0U; |
|
2974 | ret = HAL_ERROR; |
3149 | ret = HAL_ERROR; |
2975 | break; |
3150 | break; |
2976 | } |
3151 | } |
2977 | 3152 | ||
2978 | /* USARTDIV must be greater than or equal to 0d16 */ |
- | |
2979 | if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) |
3153 | if (pclk != 0U) |
2980 | { |
3154 | { |
- | 3155 | /* USARTDIV must be greater than or equal to 0d16 */ |
|
- | 3156 | usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); |
|
- | 3157 | if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) |
|
- | 3158 | { |
|
2981 | huart->Instance->BRR = usartdiv; |
3159 | huart->Instance->BRR = usartdiv; |
2982 | } |
3160 | } |
2983 | else |
3161 | else |
2984 | { |
3162 | { |
2985 | ret = HAL_ERROR; |
3163 | ret = HAL_ERROR; |
- | 3164 | } |
|
2986 | } |
3165 | } |
2987 | } |
3166 | } |
2988 | 3167 | ||
2989 | 3168 | ||
2990 | /* Clear ISR function pointers */ |
3169 | /* Clear ISR function pointers */ |
Line 3078... | Line 3257... | ||
3078 | uint32_t tickstart; |
3257 | uint32_t tickstart; |
3079 | 3258 | ||
3080 | /* Initialize the UART ErrorCode */ |
3259 | /* Initialize the UART ErrorCode */ |
3081 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
3260 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
3082 | 3261 | ||
3083 | /* Init tickstart for timeout managment*/ |
3262 | /* Init tickstart for timeout management */ |
3084 | tickstart = HAL_GetTick(); |
3263 | tickstart = HAL_GetTick(); |
3085 | 3264 | ||
3086 | /* Check if the Transmitter is enabled */ |
3265 | /* Check if the Transmitter is enabled */ |
3087 | if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) |
3266 | if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) |
3088 | { |
3267 | { |
Line 3106... | Line 3285... | ||
3106 | } |
3285 | } |
3107 | 3286 | ||
3108 | /* Initialize the UART State */ |
3287 | /* Initialize the UART State */ |
3109 | huart->gState = HAL_UART_STATE_READY; |
3288 | huart->gState = HAL_UART_STATE_READY; |
3110 | huart->RxState = HAL_UART_STATE_READY; |
3289 | huart->RxState = HAL_UART_STATE_READY; |
- | 3290 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
3111 | 3291 | ||
3112 | __HAL_UNLOCK(huart); |
3292 | __HAL_UNLOCK(huart); |
3113 | 3293 | ||
3114 | return HAL_OK; |
3294 | return HAL_OK; |
3115 | } |
3295 | } |
Line 3132... | Line 3312... | ||
3132 | /* Check for the Timeout */ |
3312 | /* Check for the Timeout */ |
3133 | if (Timeout != HAL_MAX_DELAY) |
3313 | if (Timeout != HAL_MAX_DELAY) |
3134 | { |
3314 | { |
3135 | if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) |
3315 | if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) |
3136 | { |
3316 | { |
3137 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ |
3317 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) |
- | 3318 | interrupts for the interrupt process */ |
|
3138 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); |
3319 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); |
3139 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3320 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3140 | 3321 | ||
3141 | huart->gState = HAL_UART_STATE_READY; |
3322 | huart->gState = HAL_UART_STATE_READY; |
3142 | huart->RxState = HAL_UART_STATE_READY; |
3323 | huart->RxState = HAL_UART_STATE_READY; |
3143 | 3324 | ||
3144 | __HAL_UNLOCK(huart); |
3325 | __HAL_UNLOCK(huart); |
Line 3150... | Line 3331... | ||
3150 | { |
3331 | { |
3151 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) |
3332 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) |
3152 | { |
3333 | { |
3153 | /* Clear Receiver Timeout flag*/ |
3334 | /* Clear Receiver Timeout flag*/ |
3154 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); |
3335 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); |
3155 | 3336 | ||
3156 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ |
3337 | /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) |
- | 3338 | interrupts for the interrupt process */ |
|
3157 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); |
3339 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE)); |
3158 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3340 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3159 | 3341 | ||
3160 | huart->gState = HAL_UART_STATE_READY; |
3342 | huart->gState = HAL_UART_STATE_READY; |
3161 | huart->RxState = HAL_UART_STATE_READY; |
3343 | huart->RxState = HAL_UART_STATE_READY; |
3162 | huart->ErrorCode = HAL_UART_ERROR_RTO; |
3344 | huart->ErrorCode = HAL_UART_ERROR_RTO; |
3163 | 3345 | ||
3164 | /* Process Unlocked */ |
3346 | /* Process Unlocked */ |
3165 | __HAL_UNLOCK(huart); |
3347 | __HAL_UNLOCK(huart); |
3166 | 3348 | ||
3167 | return HAL_TIMEOUT; |
3349 | return HAL_TIMEOUT; |
3168 | } |
3350 | } |
3169 | } |
3351 | } |
3170 | } |
3352 | } |
3171 | } |
3353 | } |
3172 | return HAL_OK; |
3354 | return HAL_OK; |
3173 | } |
3355 | } |
3174 | 3356 | ||
- | 3357 | /** |
|
- | 3358 | * @brief Start Receive operation in interrupt mode. |
|
- | 3359 | * @note This function could be called by all HAL UART API providing reception in Interrupt mode. |
|
- | 3360 | * @note When calling this function, parameters validity is considered as already checked, |
|
- | 3361 | * i.e. Rx State, buffer address, ... |
|
- | 3362 | * UART Handle is assumed as Locked. |
|
- | 3363 | * @param huart UART handle. |
|
- | 3364 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
|
- | 3365 | * @param Size Amount of data elements (u8 or u16) to be received. |
|
- | 3366 | * @retval HAL status |
|
- | 3367 | */ |
|
- | 3368 | HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) |
|
- | 3369 | { |
|
- | 3370 | huart->pRxBuffPtr = pData; |
|
- | 3371 | huart->RxXferSize = Size; |
|
- | 3372 | huart->RxXferCount = Size; |
|
- | 3373 | huart->RxISR = NULL; |
|
- | 3374 | ||
- | 3375 | /* Computation of UART mask to apply to RDR register */ |
|
- | 3376 | UART_MASK_COMPUTATION(huart); |
|
- | 3377 | ||
- | 3378 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
|
- | 3379 | huart->RxState = HAL_UART_STATE_BUSY_RX; |
|
- | 3380 | ||
- | 3381 | /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
|
- | 3382 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); |
|
- | 3383 | ||
- | 3384 | /* Set the Rx ISR function pointer according to the data word length */ |
|
- | 3385 | if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) |
|
- | 3386 | { |
|
- | 3387 | huart->RxISR = UART_RxISR_16BIT; |
|
- | 3388 | } |
|
- | 3389 | else |
|
- | 3390 | { |
|
- | 3391 | huart->RxISR = UART_RxISR_8BIT; |
|
- | 3392 | } |
|
- | 3393 | ||
- | 3394 | __HAL_UNLOCK(huart); |
|
- | 3395 | ||
- | 3396 | /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ |
|
- | 3397 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE); |
|
- | 3398 | return HAL_OK; |
|
- | 3399 | } |
|
- | 3400 | ||
- | 3401 | /** |
|
- | 3402 | * @brief Start Receive operation in DMA mode. |
|
- | 3403 | * @note This function could be called by all HAL UART API providing reception in DMA mode. |
|
- | 3404 | * @note When calling this function, parameters validity is considered as already checked, |
|
- | 3405 | * i.e. Rx State, buffer address, ... |
|
- | 3406 | * UART Handle is assumed as Locked. |
|
- | 3407 | * @param huart UART handle. |
|
- | 3408 | * @param pData Pointer to data buffer (u8 or u16 data elements). |
|
- | 3409 | * @param Size Amount of data elements (u8 or u16) to be received. |
|
- | 3410 | * @retval HAL status |
|
- | 3411 | */ |
|
- | 3412 | HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) |
|
- | 3413 | { |
|
- | 3414 | huart->pRxBuffPtr = pData; |
|
- | 3415 | huart->RxXferSize = Size; |
|
- | 3416 | ||
- | 3417 | huart->ErrorCode = HAL_UART_ERROR_NONE; |
|
- | 3418 | huart->RxState = HAL_UART_STATE_BUSY_RX; |
|
- | 3419 | ||
- | 3420 | if (huart->hdmarx != NULL) |
|
- | 3421 | { |
|
- | 3422 | /* Set the UART DMA transfer complete callback */ |
|
- | 3423 | huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; |
|
- | 3424 | ||
- | 3425 | /* Set the UART DMA Half transfer complete callback */ |
|
- | 3426 | huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; |
|
- | 3427 | ||
- | 3428 | /* Set the DMA error callback */ |
|
- | 3429 | huart->hdmarx->XferErrorCallback = UART_DMAError; |
|
- | 3430 | ||
- | 3431 | /* Set the DMA abort callback */ |
|
- | 3432 | huart->hdmarx->XferAbortCallback = NULL; |
|
- | 3433 | ||
- | 3434 | /* Enable the DMA channel */ |
|
- | 3435 | if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK) |
|
- | 3436 | { |
|
- | 3437 | /* Set error code to DMA */ |
|
- | 3438 | huart->ErrorCode = HAL_UART_ERROR_DMA; |
|
- | 3439 | ||
- | 3440 | __HAL_UNLOCK(huart); |
|
- | 3441 | ||
- | 3442 | /* Restore huart->RxState to ready */ |
|
- | 3443 | huart->RxState = HAL_UART_STATE_READY; |
|
- | 3444 | ||
- | 3445 | return HAL_ERROR; |
|
- | 3446 | } |
|
- | 3447 | } |
|
- | 3448 | __HAL_UNLOCK(huart); |
|
- | 3449 | ||
- | 3450 | /* Enable the UART Parity Error Interrupt */ |
|
- | 3451 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
|
- | 3452 | ||
- | 3453 | /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
|
- | 3454 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); |
|
- | 3455 | ||
- | 3456 | /* Enable the DMA transfer for the receiver request by setting the DMAR bit |
|
- | 3457 | in the UART CR3 register */ |
|
- | 3458 | ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
|
- | 3459 | ||
- | 3460 | return HAL_OK; |
|
- | 3461 | } |
|
- | 3462 | ||
3175 | 3463 | ||
3176 | /** |
3464 | /** |
3177 | * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). |
3465 | * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). |
3178 | * @param huart UART handle. |
3466 | * @param huart UART handle. |
3179 | * @retval None |
3467 | * @retval None |
3180 | */ |
3468 | */ |
3181 | static void UART_EndTxTransfer(UART_HandleTypeDef *huart) |
3469 | static void UART_EndTxTransfer(UART_HandleTypeDef *huart) |
3182 | { |
3470 | { |
3183 | /* Disable TXEIE and TCIE interrupts */ |
3471 | /* Disable TXEIE and TCIE interrupts */ |
3184 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
3472 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); |
3185 | 3473 | ||
3186 | /* At end of Tx process, restore huart->gState to Ready */ |
3474 | /* At end of Tx process, restore huart->gState to Ready */ |
3187 | huart->gState = HAL_UART_STATE_READY; |
3475 | huart->gState = HAL_UART_STATE_READY; |
3188 | } |
3476 | } |
3189 | 3477 | ||
Line 3194... | Line 3482... | ||
3194 | * @retval None |
3482 | * @retval None |
3195 | */ |
3483 | */ |
3196 | static void UART_EndRxTransfer(UART_HandleTypeDef *huart) |
3484 | static void UART_EndRxTransfer(UART_HandleTypeDef *huart) |
3197 | { |
3485 | { |
3198 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
3486 | /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ |
3199 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
3487 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
3200 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3488 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
- | 3489 | ||
- | 3490 | /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ |
|
- | 3491 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 3492 | { |
|
- | 3493 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); |
|
- | 3494 | } |
|
3201 | 3495 | ||
3202 | /* At end of Rx process, restore huart->RxState to Ready */ |
3496 | /* At end of Rx process, restore huart->RxState to Ready */ |
3203 | huart->RxState = HAL_UART_STATE_READY; |
3497 | huart->RxState = HAL_UART_STATE_READY; |
- | 3498 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
3204 | 3499 | ||
3205 | /* Reset RxIsr function pointer */ |
3500 | /* Reset RxIsr function pointer */ |
3206 | huart->RxISR = NULL; |
3501 | huart->RxISR = NULL; |
3207 | } |
3502 | } |
3208 | 3503 | ||
Line 3221... | Line 3516... | ||
3221 | { |
3516 | { |
3222 | huart->TxXferCount = 0U; |
3517 | huart->TxXferCount = 0U; |
3223 | 3518 | ||
3224 | /* Disable the DMA transfer for transmit request by resetting the DMAT bit |
3519 | /* Disable the DMA transfer for transmit request by resetting the DMAT bit |
3225 | in the UART CR3 register */ |
3520 | in the UART CR3 register */ |
3226 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
3521 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); |
3227 | 3522 | ||
3228 | /* Enable the UART Transmit Complete Interrupt */ |
3523 | /* Enable the UART Transmit Complete Interrupt */ |
3229 | SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3524 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3230 | } |
3525 | } |
3231 | /* DMA Circular mode */ |
3526 | /* DMA Circular mode */ |
3232 | else |
3527 | else |
3233 | { |
3528 | { |
3234 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3529 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
Line 3272... | Line 3567... | ||
3272 | if (hdma->Init.Mode != DMA_CIRCULAR) |
3567 | if (hdma->Init.Mode != DMA_CIRCULAR) |
3273 | { |
3568 | { |
3274 | huart->RxXferCount = 0U; |
3569 | huart->RxXferCount = 0U; |
3275 | 3570 | ||
3276 | /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
3571 | /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ |
3277 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
3572 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); |
3278 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3573 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3279 | 3574 | ||
3280 | /* Disable the DMA transfer for the receiver request by resetting the DMAR bit |
3575 | /* Disable the DMA transfer for the receiver request by resetting the DMAR bit |
3281 | in the UART CR3 register */ |
3576 | in the UART CR3 register */ |
3282 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
3577 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); |
3283 | 3578 | ||
3284 | /* At end of Rx process, restore huart->RxState to Ready */ |
3579 | /* At end of Rx process, restore huart->RxState to Ready */ |
3285 | huart->RxState = HAL_UART_STATE_READY; |
3580 | huart->RxState = HAL_UART_STATE_READY; |
- | 3581 | ||
- | 3582 | /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ |
|
- | 3583 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 3584 | { |
|
- | 3585 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); |
|
- | 3586 | } |
|
3286 | } |
3587 | } |
3287 | 3588 | ||
- | 3589 | /* Check current reception Mode : |
|
- | 3590 | If Reception till IDLE event has been selected : use Rx Event callback */ |
|
- | 3591 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 3592 | { |
|
3288 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3593 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3289 | /*Call registered Rx complete callback*/ |
3594 | /*Call registered Rx Event callback*/ |
3290 | huart->RxCpltCallback(huart); |
3595 | huart->RxEventCallback(huart, huart->RxXferSize); |
3291 | #else |
3596 | #else |
3292 | /*Call legacy weak Rx complete callback*/ |
3597 | /*Call legacy weak Rx Event callback*/ |
3293 | HAL_UART_RxCpltCallback(huart); |
3598 | HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); |
3294 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3599 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
- | 3600 | } |
|
- | 3601 | else |
|
- | 3602 | { |
|
- | 3603 | /* In other cases : use Rx Complete callback */ |
|
- | 3604 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|
- | 3605 | /*Call registered Rx complete callback*/ |
|
- | 3606 | huart->RxCpltCallback(huart); |
|
- | 3607 | #else |
|
- | 3608 | /*Call legacy weak Rx complete callback*/ |
|
- | 3609 | HAL_UART_RxCpltCallback(huart); |
|
- | 3610 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|
- | 3611 | } |
|
3295 | } |
3612 | } |
3296 | 3613 | ||
3297 | /** |
3614 | /** |
3298 | * @brief DMA UART receive process half complete callback. |
3615 | * @brief DMA UART receive process half complete callback. |
3299 | * @param hdma DMA handle. |
3616 | * @param hdma DMA handle. |
Line 3301... | Line 3618... | ||
3301 | */ |
3618 | */ |
3302 | static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
3619 | static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
3303 | { |
3620 | { |
3304 | UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); |
3621 | UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); |
3305 | 3622 | ||
- | 3623 | /* Check current reception Mode : |
|
- | 3624 | If Reception till IDLE event has been selected : use Rx Event callback */ |
|
- | 3625 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 3626 | { |
|
- | 3627 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|
- | 3628 | /*Call registered Rx Event callback*/ |
|
- | 3629 | huart->RxEventCallback(huart, huart->RxXferSize / 2U); |
|
- | 3630 | #else |
|
- | 3631 | /*Call legacy weak Rx Event callback*/ |
|
- | 3632 | HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); |
|
- | 3633 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
|
- | 3634 | } |
|
- | 3635 | else |
|
- | 3636 | { |
|
- | 3637 | /* In other cases : use Rx Half Complete callback */ |
|
3306 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3638 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3307 | /*Call registered Rx Half complete callback*/ |
3639 | /*Call registered Rx Half complete callback*/ |
3308 | huart->RxHalfCpltCallback(huart); |
3640 | huart->RxHalfCpltCallback(huart); |
3309 | #else |
3641 | #else |
3310 | /*Call legacy weak Rx Half complete callback*/ |
3642 | /*Call legacy weak Rx Half complete callback*/ |
3311 | HAL_UART_RxHalfCpltCallback(huart); |
3643 | HAL_UART_RxHalfCpltCallback(huart); |
3312 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3644 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
- | 3645 | } |
|
3313 | } |
3646 | } |
3314 | 3647 | ||
3315 | /** |
3648 | /** |
3316 | * @brief DMA UART communication error callback. |
3649 | * @brief DMA UART communication error callback. |
3317 | * @param hdma DMA handle. |
3650 | * @param hdma DMA handle. |
Line 3407... | Line 3740... | ||
3407 | 3740 | ||
3408 | 3741 | ||
3409 | /* Restore huart->gState and huart->RxState to Ready */ |
3742 | /* Restore huart->gState and huart->RxState to Ready */ |
3410 | huart->gState = HAL_UART_STATE_READY; |
3743 | huart->gState = HAL_UART_STATE_READY; |
3411 | huart->RxState = HAL_UART_STATE_READY; |
3744 | huart->RxState = HAL_UART_STATE_READY; |
- | 3745 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
3412 | 3746 | ||
3413 | /* Call user Abort complete callback */ |
3747 | /* Call user Abort complete callback */ |
3414 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3748 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3415 | /* Call registered Abort complete callback */ |
3749 | /* Call registered Abort complete callback */ |
3416 | huart->AbortCpltCallback(huart); |
3750 | huart->AbortCpltCallback(huart); |
Line 3458... | Line 3792... | ||
3458 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
3792 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
3459 | 3793 | ||
3460 | /* Restore huart->gState and huart->RxState to Ready */ |
3794 | /* Restore huart->gState and huart->RxState to Ready */ |
3461 | huart->gState = HAL_UART_STATE_READY; |
3795 | huart->gState = HAL_UART_STATE_READY; |
3462 | huart->RxState = HAL_UART_STATE_READY; |
3796 | huart->RxState = HAL_UART_STATE_READY; |
- | 3797 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
3463 | 3798 | ||
3464 | /* Call user Abort complete callback */ |
3799 | /* Call user Abort complete callback */ |
3465 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3800 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3466 | /* Call registered Abort complete callback */ |
3801 | /* Call registered Abort complete callback */ |
3467 | huart->AbortCpltCallback(huart); |
3802 | huart->AbortCpltCallback(huart); |
Line 3520... | Line 3855... | ||
3520 | /* Discard the received data */ |
3855 | /* Discard the received data */ |
3521 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
3856 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
3522 | 3857 | ||
3523 | /* Restore huart->RxState to Ready */ |
3858 | /* Restore huart->RxState to Ready */ |
3524 | huart->RxState = HAL_UART_STATE_READY; |
3859 | huart->RxState = HAL_UART_STATE_READY; |
- | 3860 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
3525 | 3861 | ||
3526 | /* Call user Abort complete callback */ |
3862 | /* Call user Abort complete callback */ |
3527 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3863 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3528 | /* Call registered Abort Receive Complete Callback */ |
3864 | /* Call registered Abort Receive Complete Callback */ |
3529 | huart->AbortReceiveCpltCallback(huart); |
3865 | huart->AbortReceiveCpltCallback(huart); |
Line 3532... | Line 3868... | ||
3532 | HAL_UART_AbortReceiveCpltCallback(huart); |
3868 | HAL_UART_AbortReceiveCpltCallback(huart); |
3533 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3869 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3534 | } |
3870 | } |
3535 | 3871 | ||
3536 | /** |
3872 | /** |
3537 | * @brief TX interrrupt handler for 7 or 8 bits data word length . |
3873 | * @brief TX interrupt handler for 7 or 8 bits data word length . |
3538 | * @note Function is called under interruption only, once |
3874 | * @note Function is called under interruption only, once |
3539 | * interruptions have been enabled by HAL_UART_Transmit_IT(). |
3875 | * interruptions have been enabled by HAL_UART_Transmit_IT(). |
3540 | * @param huart UART handle. |
3876 | * @param huart UART handle. |
3541 | * @retval None |
3877 | * @retval None |
3542 | */ |
3878 | */ |
Line 3546... | Line 3882... | ||
3546 | if (huart->gState == HAL_UART_STATE_BUSY_TX) |
3882 | if (huart->gState == HAL_UART_STATE_BUSY_TX) |
3547 | { |
3883 | { |
3548 | if (huart->TxXferCount == 0U) |
3884 | if (huart->TxXferCount == 0U) |
3549 | { |
3885 | { |
3550 | /* Disable the UART Transmit Data Register Empty Interrupt */ |
3886 | /* Disable the UART Transmit Data Register Empty Interrupt */ |
3551 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); |
3887 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); |
3552 | 3888 | ||
3553 | /* Enable the UART Transmit Complete Interrupt */ |
3889 | /* Enable the UART Transmit Complete Interrupt */ |
3554 | SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3890 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3555 | } |
3891 | } |
3556 | else |
3892 | else |
3557 | { |
3893 | { |
3558 | huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); |
3894 | huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); |
3559 | huart->pTxBuffPtr++; |
3895 | huart->pTxBuffPtr++; |
Line 3561... | Line 3897... | ||
3561 | } |
3897 | } |
3562 | } |
3898 | } |
3563 | } |
3899 | } |
3564 | 3900 | ||
3565 | /** |
3901 | /** |
3566 | * @brief TX interrrupt handler for 9 bits data word length. |
3902 | * @brief TX interrupt handler for 9 bits data word length. |
3567 | * @note Function is called under interruption only, once |
3903 | * @note Function is called under interruption only, once |
3568 | * interruptions have been enabled by HAL_UART_Transmit_IT(). |
3904 | * interruptions have been enabled by HAL_UART_Transmit_IT(). |
3569 | * @param huart UART handle. |
3905 | * @param huart UART handle. |
3570 | * @retval None |
3906 | * @retval None |
3571 | */ |
3907 | */ |
Line 3577... | Line 3913... | ||
3577 | if (huart->gState == HAL_UART_STATE_BUSY_TX) |
3913 | if (huart->gState == HAL_UART_STATE_BUSY_TX) |
3578 | { |
3914 | { |
3579 | if (huart->TxXferCount == 0U) |
3915 | if (huart->TxXferCount == 0U) |
3580 | { |
3916 | { |
3581 | /* Disable the UART Transmit Data Register Empty Interrupt */ |
3917 | /* Disable the UART Transmit Data Register Empty Interrupt */ |
3582 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); |
3918 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); |
3583 | 3919 | ||
3584 | /* Enable the UART Transmit Complete Interrupt */ |
3920 | /* Enable the UART Transmit Complete Interrupt */ |
3585 | SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3921 | ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3586 | } |
3922 | } |
3587 | else |
3923 | else |
3588 | { |
3924 | { |
3589 | tmp = (uint16_t *) huart->pTxBuffPtr; |
3925 | tmp = (uint16_t *) huart->pTxBuffPtr; |
3590 | huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); |
3926 | huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); |
Line 3602... | Line 3938... | ||
3602 | * @retval None |
3938 | * @retval None |
3603 | */ |
3939 | */ |
3604 | static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) |
3940 | static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) |
3605 | { |
3941 | { |
3606 | /* Disable the UART Transmit Complete Interrupt */ |
3942 | /* Disable the UART Transmit Complete Interrupt */ |
3607 | CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3943 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); |
3608 | 3944 | ||
3609 | /* Tx process is ended, restore huart->gState to Ready */ |
3945 | /* Tx process is ended, restore huart->gState to Ready */ |
3610 | huart->gState = HAL_UART_STATE_READY; |
3946 | huart->gState = HAL_UART_STATE_READY; |
3611 | 3947 | ||
3612 | /* Cleat TxISR function pointer */ |
3948 | /* Cleat TxISR function pointer */ |
Line 3620... | Line 3956... | ||
3620 | HAL_UART_TxCpltCallback(huart); |
3956 | HAL_UART_TxCpltCallback(huart); |
3621 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3957 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
3622 | } |
3958 | } |
3623 | 3959 | ||
3624 | /** |
3960 | /** |
3625 | * @brief RX interrrupt handler for 7 or 8 bits data word length . |
3961 | * @brief RX interrupt handler for 7 or 8 bits data word length . |
3626 | * @param huart UART handle. |
3962 | * @param huart UART handle. |
3627 | * @retval None |
3963 | * @retval None |
3628 | */ |
3964 | */ |
3629 | static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) |
3965 | static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) |
3630 | { |
3966 | { |
Line 3640... | Line 3976... | ||
3640 | huart->RxXferCount--; |
3976 | huart->RxXferCount--; |
3641 | 3977 | ||
3642 | if (huart->RxXferCount == 0U) |
3978 | if (huart->RxXferCount == 0U) |
3643 | { |
3979 | { |
3644 | /* Disable the UART Parity Error Interrupt and RXNE interrupts */ |
3980 | /* Disable the UART Parity Error Interrupt and RXNE interrupts */ |
3645 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
3981 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
3646 | 3982 | ||
3647 | /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
3983 | /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
3648 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3984 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3649 | 3985 | ||
3650 | /* Rx process is completed, restore huart->RxState to Ready */ |
3986 | /* Rx process is completed, restore huart->RxState to Ready */ |
3651 | huart->RxState = HAL_UART_STATE_READY; |
3987 | huart->RxState = HAL_UART_STATE_READY; |
3652 | 3988 | ||
3653 | /* Clear RxISR function pointer */ |
3989 | /* Clear RxISR function pointer */ |
3654 | huart->RxISR = NULL; |
3990 | huart->RxISR = NULL; |
3655 | 3991 | ||
- | 3992 | /* Check current reception Mode : |
|
- | 3993 | If Reception till IDLE event has been selected : */ |
|
- | 3994 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 3995 | { |
|
- | 3996 | /* Set reception type to Standard */ |
|
- | 3997 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
- | 3998 | ||
- | 3999 | /* Disable IDLE interrupt */ |
|
- | 4000 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); |
|
- | 4001 | ||
- | 4002 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) |
|
- | 4003 | { |
|
- | 4004 | /* Clear IDLE Flag */ |
|
- | 4005 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); |
|
- | 4006 | } |
|
- | 4007 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|
- | 4008 | /*Call registered Rx Event callback*/ |
|
- | 4009 | huart->RxEventCallback(huart, huart->RxXferSize); |
|
- | 4010 | #else |
|
- | 4011 | /*Call legacy weak Rx Event callback*/ |
|
- | 4012 | HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); |
|
- | 4013 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ |
|
- | 4014 | } |
|
- | 4015 | else |
|
- | 4016 | { |
|
- | 4017 | /* Standard reception API called */ |
|
3656 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
4018 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3657 | /*Call registered Rx complete callback*/ |
4019 | /*Call registered Rx complete callback*/ |
3658 | huart->RxCpltCallback(huart); |
4020 | huart->RxCpltCallback(huart); |
3659 | #else |
4021 | #else |
3660 | /*Call legacy weak Rx complete callback*/ |
4022 | /*Call legacy weak Rx complete callback*/ |
3661 | HAL_UART_RxCpltCallback(huart); |
4023 | HAL_UART_RxCpltCallback(huart); |
3662 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
4024 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
- | 4025 | } |
|
3663 | } |
4026 | } |
3664 | } |
4027 | } |
3665 | else |
4028 | else |
3666 | { |
4029 | { |
3667 | /* Clear RXNE interrupt flag */ |
4030 | /* Clear RXNE interrupt flag */ |
3668 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
4031 | __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST); |
3669 | } |
4032 | } |
3670 | } |
4033 | } |
3671 | 4034 | ||
3672 | /** |
4035 | /** |
3673 | * @brief RX interrrupt handler for 9 bits data word length . |
4036 | * @brief RX interrupt handler for 9 bits data word length . |
3674 | * @note Function is called under interruption only, once |
4037 | * @note Function is called under interruption only, once |
3675 | * interruptions have been enabled by HAL_UART_Receive_IT() |
4038 | * interruptions have been enabled by HAL_UART_Receive_IT() |
3676 | * @param huart UART handle. |
4039 | * @param huart UART handle. |
3677 | * @retval None |
4040 | * @retval None |
3678 | */ |
4041 | */ |
Line 3692... | Line 4055... | ||
3692 | huart->RxXferCount--; |
4055 | huart->RxXferCount--; |
3693 | 4056 | ||
3694 | if (huart->RxXferCount == 0U) |
4057 | if (huart->RxXferCount == 0U) |
3695 | { |
4058 | { |
3696 | /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ |
4059 | /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ |
3697 | CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
4060 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); |
3698 | 4061 | ||
3699 | /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
4062 | /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ |
3700 | CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
4063 | ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); |
3701 | 4064 | ||
3702 | /* Rx process is completed, restore huart->RxState to Ready */ |
4065 | /* Rx process is completed, restore huart->RxState to Ready */ |
3703 | huart->RxState = HAL_UART_STATE_READY; |
4066 | huart->RxState = HAL_UART_STATE_READY; |
3704 | 4067 | ||
3705 | /* Clear RxISR function pointer */ |
4068 | /* Clear RxISR function pointer */ |
3706 | huart->RxISR = NULL; |
4069 | huart->RxISR = NULL; |
3707 | 4070 | ||
- | 4071 | /* Check current reception Mode : |
|
- | 4072 | If Reception till IDLE event has been selected : */ |
|
- | 4073 | if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) |
|
- | 4074 | { |
|
- | 4075 | /* Set reception type to Standard */ |
|
- | 4076 | huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; |
|
- | 4077 | ||
- | 4078 | /* Disable IDLE interrupt */ |
|
- | 4079 | ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); |
|
- | 4080 | ||
- | 4081 | if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) |
|
- | 4082 | { |
|
- | 4083 | /* Clear IDLE Flag */ |
|
- | 4084 | __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); |
|
- | 4085 | } |
|
3708 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
4086 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
3709 | /*Call registered Rx complete callback*/ |
4087 | /*Call registered Rx Event callback*/ |
3710 | huart->RxCpltCallback(huart); |
4088 | huart->RxEventCallback(huart, huart->RxXferSize); |
3711 | #else |
4089 | #else |
- | 4090 | /*Call legacy weak Rx Event callback*/ |
|
- | 4091 | HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); |
|
- | 4092 | #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ |
|
- | 4093 | } |
|
- | 4094 | else |
|
- | 4095 | { |
|
- | 4096 | /* Standard reception API called */ |
|
- | 4097 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
|
- | 4098 | /*Call registered Rx complete callback*/ |
|
- | 4099 | huart->RxCpltCallback(huart); |
|
- | 4100 | #else |
|
3712 | /*Call legacy weak Rx complete callback*/ |
4101 | /*Call legacy weak Rx complete callback*/ |
3713 | HAL_UART_RxCpltCallback(huart); |
4102 | HAL_UART_RxCpltCallback(huart); |
3714 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
4103 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
- | 4104 | } |
|
3715 | } |
4105 | } |
3716 | } |
4106 | } |
3717 | else |
4107 | else |
3718 | { |
4108 | { |
3719 | /* Clear RXNE interrupt flag */ |
4109 | /* Clear RXNE interrupt flag */ |