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18 | The SMBUS HAL driver can be used as follows: |
18 | The SMBUS HAL driver can be used as follows: |
19 | 19 | ||
20 | (#) Declare a SMBUS_HandleTypeDef handle structure, for example: |
20 | (#) Declare a SMBUS_HandleTypeDef handle structure, for example: |
21 | SMBUS_HandleTypeDef hsmbus; |
21 | SMBUS_HandleTypeDef hsmbus; |
22 | 22 | ||
23 | (#)Initialize the SMBUS low level resources by implementing the @ref HAL_SMBUS_MspInit() API: |
23 | (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API: |
24 | (##) Enable the SMBUSx interface clock |
24 | (##) Enable the SMBUSx interface clock |
25 | (##) SMBUS pins configuration |
25 | (##) SMBUS pins configuration |
26 | (+++) Enable the clock for the SMBUS GPIOs |
26 | (+++) Enable the clock for the SMBUS GPIOs |
27 | (+++) Configure SMBUS pins as alternate function open-drain |
27 | (+++) Configure SMBUS pins as alternate function open-drain |
28 | (##) NVIC configuration if you need to use interrupt process |
28 | (##) NVIC configuration if you need to use interrupt process |
Line 31... | Line 31... | ||
31 | 31 | ||
32 | (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode, |
32 | (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode, |
33 | Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode, |
33 | Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode, |
34 | Peripheral mode and Packet Error Check mode in the hsmbus Init structure. |
34 | Peripheral mode and Packet Error Check mode in the hsmbus Init structure. |
35 | 35 | ||
36 | (#) Initialize the SMBUS registers by calling the @ref HAL_SMBUS_Init() API: |
36 | (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API: |
37 | (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
37 | (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) |
38 | by calling the customized @ref HAL_SMBUS_MspInit(&hsmbus) API. |
38 | by calling the customized HAL_SMBUS_MspInit(&hsmbus) API. |
39 | 39 | ||
40 | (#) To check if target device is ready for communication, use the function @ref HAL_SMBUS_IsDeviceReady() |
40 | (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady() |
41 | 41 | ||
42 | (#) For SMBUS IO operations, only one mode of operations is available within this driver |
42 | (#) For SMBUS IO operations, only one mode of operations is available within this driver |
43 | 43 | ||
44 | *** Interrupt mode IO operation *** |
44 | *** Interrupt mode IO operation *** |
45 | =================================== |
45 | =================================== |
46 | [..] |
46 | [..] |
47 | (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Master_Transmit_IT() |
47 | (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode |
- | 48 | using HAL_SMBUS_Master_Transmit_IT() |
|
48 | (++) At transmission end of transfer @ref HAL_SMBUS_MasterTxCpltCallback() is executed and user can |
49 | (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and users can |
49 | add his own code by customization of function pointer @ref HAL_SMBUS_MasterTxCpltCallback() |
50 | add their own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback() |
50 | (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Master_Receive_IT() |
51 | (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode |
- | 52 | using HAL_SMBUS_Master_Receive_IT() |
|
51 | (++) At reception end of transfer @ref HAL_SMBUS_MasterRxCpltCallback() is executed and user can |
53 | (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and users can |
52 | add his own code by customization of function pointer @ref HAL_SMBUS_MasterRxCpltCallback() |
54 | add their own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback() |
53 | (+) Abort a master/host SMBUS process communication with Interrupt using @ref HAL_SMBUS_Master_Abort_IT() |
55 | (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT() |
54 | (++) The associated previous transfer callback is called at the end of abort process |
56 | (++) The associated previous transfer callback is called at the end of abort process |
55 | (++) mean @ref HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit |
57 | (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit |
56 | (++) mean @ref HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive |
58 | (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive |
57 | (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode |
59 | (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode |
58 | using @ref HAL_SMBUS_EnableListen_IT() @ref HAL_SMBUS_DisableListen_IT() |
60 | using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT() |
59 | (++) When address slave/device SMBUS match, @ref HAL_SMBUS_AddrCallback() is executed and user can |
61 | (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and users can |
60 | add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read). |
62 | add their own code to check the Address Match Code and the transmission direction |
- | 63 | request by master/host (Write/Read). |
|
61 | (++) At Listen mode end @ref HAL_SMBUS_ListenCpltCallback() is executed and user can |
64 | (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and users can |
62 | add his own code by customization of function pointer @ref HAL_SMBUS_ListenCpltCallback() |
65 | add their own code by customization of function pointer HAL_SMBUS_ListenCpltCallback() |
63 | (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Slave_Transmit_IT() |
66 | (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode |
- | 67 | using HAL_SMBUS_Slave_Transmit_IT() |
|
64 | (++) At transmission end of transfer @ref HAL_SMBUS_SlaveTxCpltCallback() is executed and user can |
68 | (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and users can |
65 | add his own code by customization of function pointer @ref HAL_SMBUS_SlaveTxCpltCallback() |
69 | add their own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback() |
66 | (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Slave_Receive_IT() |
70 | (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode |
- | 71 | using HAL_SMBUS_Slave_Receive_IT() |
|
67 | (++) At reception end of transfer @ref HAL_SMBUS_SlaveRxCpltCallback() is executed and user can |
72 | (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and users can |
68 | add his own code by customization of function pointer @ref HAL_SMBUS_SlaveRxCpltCallback() |
73 | add their own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback() |
- | 74 | (+) Enable/Disable the SMBUS alert mode using |
|
69 | (+) Enable/Disable the SMBUS alert mode using @ref HAL_SMBUS_EnableAlert_IT() @ref HAL_SMBUS_DisableAlert_IT() |
75 | HAL_SMBUS_EnableAlert_IT() or HAL_SMBUS_DisableAlert_IT() |
70 | (++) When SMBUS Alert is generated @ref HAL_SMBUS_ErrorCallback() is executed and user can |
76 | (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and users can |
71 | add his own code by customization of function pointer @ref HAL_SMBUS_ErrorCallback() |
77 | add their own code by customization of function pointer HAL_SMBUS_ErrorCallback() |
72 | to check the Alert Error Code using function @ref HAL_SMBUS_GetError() |
78 | to check the Alert Error Code using function HAL_SMBUS_GetError() |
73 | (+) Get HAL state machine or error values using @ref HAL_SMBUS_GetState() or @ref HAL_SMBUS_GetError() |
79 | (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError() |
74 | (+) In case of transfer Error, @ref HAL_SMBUS_ErrorCallback() function is executed and user can |
80 | (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and users can |
75 | add his own code by customization of function pointer @ref HAL_SMBUS_ErrorCallback() |
81 | add their own code by customization of function pointer HAL_SMBUS_ErrorCallback() |
76 | to check the Error Code using function @ref HAL_SMBUS_GetError() |
82 | to check the Error Code using function HAL_SMBUS_GetError() |
77 | 83 | ||
78 | *** SMBUS HAL driver macros list *** |
84 | *** SMBUS HAL driver macros list *** |
79 | ================================== |
85 | ================================== |
80 | [..] |
86 | [..] |
81 | Below the list of most used macros in SMBUS HAL driver. |
87 | Below the list of most used macros in SMBUS HAL driver. |
82 | 88 | ||
83 | (+) @ref __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral |
89 | (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral |
84 | (+) @ref __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral |
90 | (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral |
85 | (+) @ref __HAL_SMBUS_GET_FLAG: Check whether the specified SMBUS flag is set or not |
91 | (+) __HAL_SMBUS_GET_FLAG: Check whether the specified SMBUS flag is set or not |
86 | (+) @ref __HAL_SMBUS_CLEAR_FLAG: Clear the specified SMBUS pending flag |
92 | (+) __HAL_SMBUS_CLEAR_FLAG: Clear the specified SMBUS pending flag |
87 | (+) @ref __HAL_SMBUS_ENABLE_IT: Enable the specified SMBUS interrupt |
93 | (+) __HAL_SMBUS_ENABLE_IT: Enable the specified SMBUS interrupt |
88 | (+) @ref __HAL_SMBUS_DISABLE_IT: Disable the specified SMBUS interrupt |
94 | (+) __HAL_SMBUS_DISABLE_IT: Disable the specified SMBUS interrupt |
89 | 95 | ||
90 | *** Callback registration *** |
96 | *** Callback registration *** |
91 | ============================================= |
97 | ============================================= |
92 | [..] |
98 | [..] |
93 | The compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS when set to 1 |
99 | The compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS when set to 1 |
94 | allows the user to configure dynamically the driver callbacks. |
100 | allows the user to configure dynamically the driver callbacks. |
95 | Use Functions @ref HAL_SMBUS_RegisterCallback() or @ref HAL_SMBUS_RegisterAddrCallback() |
101 | Use Functions HAL_SMBUS_RegisterCallback() or HAL_SMBUS_RegisterAddrCallback() |
96 | to register an interrupt callback. |
102 | to register an interrupt callback. |
97 | [..] |
103 | [..] |
98 | Function @ref HAL_SMBUS_RegisterCallback() allows to register following callbacks: |
104 | Function HAL_SMBUS_RegisterCallback() allows to register following callbacks: |
99 | (+) MasterTxCpltCallback : callback for Master transmission end of transfer. |
105 | (+) MasterTxCpltCallback : callback for Master transmission end of transfer. |
100 | (+) MasterRxCpltCallback : callback for Master reception end of transfer. |
106 | (+) MasterRxCpltCallback : callback for Master reception end of transfer. |
101 | (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. |
107 | (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. |
102 | (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. |
108 | (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. |
103 | (+) ListenCpltCallback : callback for end of listen mode. |
109 | (+) ListenCpltCallback : callback for end of listen mode. |
Line 105... | Line 111... | ||
105 | (+) MspInitCallback : callback for Msp Init. |
111 | (+) MspInitCallback : callback for Msp Init. |
106 | (+) MspDeInitCallback : callback for Msp DeInit. |
112 | (+) MspDeInitCallback : callback for Msp DeInit. |
107 | This function takes as parameters the HAL peripheral handle, the Callback ID |
113 | This function takes as parameters the HAL peripheral handle, the Callback ID |
108 | and a pointer to the user callback function. |
114 | and a pointer to the user callback function. |
109 | [..] |
115 | [..] |
110 | For specific callback AddrCallback use dedicated register callbacks : @ref HAL_SMBUS_RegisterAddrCallback. |
116 | For specific callback AddrCallback use dedicated register callbacks : HAL_SMBUS_RegisterAddrCallback. |
111 | [..] |
117 | [..] |
112 | Use function @ref HAL_SMBUS_UnRegisterCallback to reset a callback to the default |
118 | Use function HAL_SMBUS_UnRegisterCallback to reset a callback to the default |
113 | weak function. |
119 | weak function. |
114 | @ref HAL_SMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle, |
120 | HAL_SMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle, |
115 | and the Callback ID. |
121 | and the Callback ID. |
116 | This function allows to reset following callbacks: |
122 | This function allows to reset following callbacks: |
117 | (+) MasterTxCpltCallback : callback for Master transmission end of transfer. |
123 | (+) MasterTxCpltCallback : callback for Master transmission end of transfer. |
118 | (+) MasterRxCpltCallback : callback for Master reception end of transfer. |
124 | (+) MasterRxCpltCallback : callback for Master reception end of transfer. |
119 | (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. |
125 | (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. |
Line 121... | Line 127... | ||
121 | (+) ListenCpltCallback : callback for end of listen mode. |
127 | (+) ListenCpltCallback : callback for end of listen mode. |
122 | (+) ErrorCallback : callback for error detection. |
128 | (+) ErrorCallback : callback for error detection. |
123 | (+) MspInitCallback : callback for Msp Init. |
129 | (+) MspInitCallback : callback for Msp Init. |
124 | (+) MspDeInitCallback : callback for Msp DeInit. |
130 | (+) MspDeInitCallback : callback for Msp DeInit. |
125 | [..] |
131 | [..] |
126 | For callback AddrCallback use dedicated register callbacks : @ref HAL_SMBUS_UnRegisterAddrCallback. |
132 | For callback AddrCallback use dedicated register callbacks : HAL_SMBUS_UnRegisterAddrCallback. |
127 | [..] |
133 | [..] |
128 | By default, after the @ref HAL_SMBUS_Init() and when the state is @ref HAL_I2C_STATE_RESET |
134 | By default, after the HAL_SMBUS_Init() and when the state is HAL_I2C_STATE_RESET |
129 | all callbacks are set to the corresponding weak functions: |
135 | all callbacks are set to the corresponding weak functions: |
130 | examples @ref HAL_SMBUS_MasterTxCpltCallback(), @ref HAL_SMBUS_MasterRxCpltCallback(). |
136 | examples HAL_SMBUS_MasterTxCpltCallback(), HAL_SMBUS_MasterRxCpltCallback(). |
131 | Exception done for MspInit and MspDeInit functions that are |
137 | Exception done for MspInit and MspDeInit functions that are |
132 | reset to the legacy weak functions in the @ref HAL_SMBUS_Init()/ @ref HAL_SMBUS_DeInit() only when |
138 | reset to the legacy weak functions in the HAL_SMBUS_Init()/ HAL_SMBUS_DeInit() only when |
133 | these callbacks are null (not registered beforehand). |
139 | these callbacks are null (not registered beforehand). |
134 | If MspInit or MspDeInit are not null, the @ref HAL_SMBUS_Init()/ @ref HAL_SMBUS_DeInit() |
140 | If MspInit or MspDeInit are not null, the HAL_SMBUS_Init()/ HAL_SMBUS_DeInit() |
135 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. |
141 | keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. |
136 | [..] |
142 | [..] |
137 | Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only. |
143 | Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. |
138 | Exception done MspInit/MspDeInit functions that can be registered/unregistered |
144 | Exception done MspInit/MspDeInit functions that can be registered/unregistered |
139 | in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state, |
145 | in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, |
140 | thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. |
146 | thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. |
141 | Then, the user first registers the MspInit/MspDeInit user callbacks |
147 | Then, the user first registers the MspInit/MspDeInit user callbacks |
142 | using @ref HAL_SMBUS_RegisterCallback() before calling @ref HAL_SMBUS_DeInit() |
148 | using HAL_SMBUS_RegisterCallback() before calling HAL_SMBUS_DeInit() |
143 | or @ref HAL_SMBUS_Init() function. |
149 | or HAL_SMBUS_Init() function. |
144 | [..] |
150 | [..] |
145 | When the compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS is set to 0 or |
151 | When the compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS is set to 0 or |
146 | not defined, the callback registration feature is not available and all callbacks |
152 | not defined, the callback registration feature is not available and all callbacks |
147 | are set to the corresponding weak functions. |
153 | are set to the corresponding weak functions. |
148 | 154 | ||
Line 201... | Line 207... | ||
201 | /* Private variables ---------------------------------------------------------*/ |
207 | /* Private variables ---------------------------------------------------------*/ |
202 | /* Private function prototypes -----------------------------------------------*/ |
208 | /* Private function prototypes -----------------------------------------------*/ |
203 | /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions |
209 | /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions |
204 | * @{ |
210 | * @{ |
205 | */ |
211 | */ |
206 | static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout); |
212 | static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, |
- | 213 | FlagStatus Status, uint32_t Timeout); |
|
207 | 214 | ||
208 | static void SMBUS_Enable_IRQ(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); |
215 | static void SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); |
209 | static void SMBUS_Disable_IRQ(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); |
216 | static void SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); |
210 | static HAL_StatusTypeDef SMBUS_Master_ISR(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags); |
217 | static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags); |
211 | static HAL_StatusTypeDef SMBUS_Slave_ISR(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags); |
218 | static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags); |
212 | 219 | ||
213 | static void SMBUS_ConvertOtherXferOptions(struct __SMBUS_HandleTypeDef *hsmbus); |
220 | static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus); |
214 | 221 | ||
215 | static void SMBUS_ITErrorHandler(struct __SMBUS_HandleTypeDef *hsmbus); |
222 | static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus); |
216 | 223 | ||
217 | static void SMBUS_TransferConfig(struct __SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); |
224 | static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, |
- | 225 | uint32_t Mode, uint32_t Request); |
|
218 | /** |
226 | /** |
219 | * @} |
227 | * @} |
220 | */ |
228 | */ |
221 | 229 | ||
222 | /* Exported functions --------------------------------------------------------*/ |
230 | /* Exported functions --------------------------------------------------------*/ |
Line 224... | Line 232... | ||
224 | /** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions |
232 | /** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions |
225 | * @{ |
233 | * @{ |
226 | */ |
234 | */ |
227 | 235 | ||
228 | /** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions |
236 | /** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions |
229 | * @brief Initialization and Configuration functions |
237 | * @brief Initialization and Configuration functions |
230 | * |
238 | * |
231 | @verbatim |
239 | @verbatim |
232 | =============================================================================== |
240 | =============================================================================== |
233 | ##### Initialization and de-initialization functions ##### |
241 | ##### Initialization and de-initialization functions ##### |
234 | =============================================================================== |
242 | =============================================================================== |
235 | [..] This subsection provides a set of functions allowing to initialize and |
243 | [..] This subsection provides a set of functions allowing to initialize and |
Line 360... | Line 368... | ||
360 | /* AUTOEND and NACK bit will be manage during Transfer process */ |
368 | /* AUTOEND and NACK bit will be manage during Transfer process */ |
361 | hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); |
369 | hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); |
362 | 370 | ||
363 | /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/ |
371 | /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/ |
364 | /* Configure SMBUSx: Dual mode and Own Address2 */ |
372 | /* Configure SMBUSx: Dual mode and Own Address2 */ |
365 | hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U)); |
373 | hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | \ |
- | 374 | (hsmbus->Init.OwnAddress2Masks << 8U)); |
|
366 | 375 | ||
367 | /*---------------------------- SMBUSx CR1 Configuration ------------------------*/ |
376 | /*---------------------------- SMBUSx CR1 Configuration ------------------------*/ |
368 | /* Configure SMBUSx: Generalcall and NoStretch mode */ |
377 | /* Configure SMBUSx: Generalcall and NoStretch mode */ |
369 | hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter); |
378 | hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | \ |
- | 379 | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | \ |
|
- | 380 | hsmbus->Init.AnalogFilter); |
|
370 | 381 | ||
371 | /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */ |
382 | /* Enable Slave Byte Control only in case of Packet Error Check is enabled |
- | 383 | and SMBUS Peripheral is set in Slave mode */ |
|
372 | if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE) |
384 | if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE) && \ |
- | 385 | ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ |
|
373 | && ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))) |
386 | (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))) |
374 | { |
387 | { |
375 | hsmbus->Instance->CR1 |= I2C_CR1_SBC; |
388 | hsmbus->Instance->CR1 |= I2C_CR1_SBC; |
376 | } |
389 | } |
377 | 390 | ||
378 | /* Enable the selected SMBUS peripheral */ |
391 | /* Enable the selected SMBUS peripheral */ |
Line 577... | Line 590... | ||
577 | * @arg @ref HAL_SMBUS_MSPINIT_CB_ID MspInit callback ID |
590 | * @arg @ref HAL_SMBUS_MSPINIT_CB_ID MspInit callback ID |
578 | * @arg @ref HAL_SMBUS_MSPDEINIT_CB_ID MspDeInit callback ID |
591 | * @arg @ref HAL_SMBUS_MSPDEINIT_CB_ID MspDeInit callback ID |
579 | * @param pCallback pointer to the Callback function |
592 | * @param pCallback pointer to the Callback function |
580 | * @retval HAL status |
593 | * @retval HAL status |
581 | */ |
594 | */ |
582 | HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback) |
595 | HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, |
- | 596 | HAL_SMBUS_CallbackIDTypeDef CallbackID, |
|
- | 597 | pSMBUS_CallbackTypeDef pCallback) |
|
583 | { |
598 | { |
584 | HAL_StatusTypeDef status = HAL_OK; |
599 | HAL_StatusTypeDef status = HAL_OK; |
585 | 600 | ||
586 | if (pCallback == NULL) |
601 | if (pCallback == NULL) |
587 | { |
602 | { |
Line 690... | Line 705... | ||
690 | * @arg @ref HAL_SMBUS_ERROR_CB_ID Error callback ID |
705 | * @arg @ref HAL_SMBUS_ERROR_CB_ID Error callback ID |
691 | * @arg @ref HAL_SMBUS_MSPINIT_CB_ID MspInit callback ID |
706 | * @arg @ref HAL_SMBUS_MSPINIT_CB_ID MspInit callback ID |
692 | * @arg @ref HAL_SMBUS_MSPDEINIT_CB_ID MspDeInit callback ID |
707 | * @arg @ref HAL_SMBUS_MSPDEINIT_CB_ID MspDeInit callback ID |
693 | * @retval HAL status |
708 | * @retval HAL status |
694 | */ |
709 | */ |
695 | HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID) |
710 | HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, |
- | 711 | HAL_SMBUS_CallbackIDTypeDef CallbackID) |
|
696 | { |
712 | { |
697 | HAL_StatusTypeDef status = HAL_OK; |
713 | HAL_StatusTypeDef status = HAL_OK; |
698 | 714 | ||
699 | /* Process locked */ |
715 | /* Process locked */ |
700 | __HAL_LOCK(hsmbus); |
716 | __HAL_LOCK(hsmbus); |
Line 785... | Line 801... | ||
785 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
801 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
786 | * the configuration information for the specified SMBUS. |
802 | * the configuration information for the specified SMBUS. |
787 | * @param pCallback pointer to the Address Match Callback function |
803 | * @param pCallback pointer to the Address Match Callback function |
788 | * @retval HAL status |
804 | * @retval HAL status |
789 | */ |
805 | */ |
790 | HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback) |
806 | HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, |
- | 807 | pSMBUS_AddrCallbackTypeDef pCallback) |
|
791 | { |
808 | { |
792 | HAL_StatusTypeDef status = HAL_OK; |
809 | HAL_StatusTypeDef status = HAL_OK; |
793 | 810 | ||
794 | if (pCallback == NULL) |
811 | if (pCallback == NULL) |
795 | { |
812 | { |
Line 856... | Line 873... | ||
856 | /** |
873 | /** |
857 | * @} |
874 | * @} |
858 | */ |
875 | */ |
859 | 876 | ||
860 | /** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions |
877 | /** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions |
861 | * @brief Data transfers functions |
878 | * @brief Data transfers functions |
862 | * |
879 | * |
863 | @verbatim |
880 | @verbatim |
864 | =============================================================================== |
881 | =============================================================================== |
865 | ##### IO operation functions ##### |
882 | ##### IO operation functions ##### |
866 | =============================================================================== |
883 | =============================================================================== |
867 | [..] |
884 | [..] |
Line 909... | Line 926... | ||
909 | * @param pData Pointer to data buffer |
926 | * @param pData Pointer to data buffer |
910 | * @param Size Amount of data to be sent |
927 | * @param Size Amount of data to be sent |
911 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
928 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
912 | * @retval HAL status |
929 | * @retval HAL status |
913 | */ |
930 | */ |
914 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
931 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, |
- | 932 | uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
|
915 | { |
933 | { |
916 | uint32_t tmp; |
934 | uint32_t tmp; |
917 | 935 | ||
918 | /* Check the parameters */ |
936 | /* Check the parameters */ |
919 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
937 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
Line 948... | Line 966... | ||
948 | 966 | ||
949 | /* Send Slave Address */ |
967 | /* Send Slave Address */ |
950 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
968 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
951 | if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) |
969 | if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) |
952 | { |
970 | { |
- | 971 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, |
|
953 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE); |
972 | SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), |
- | 973 | SMBUS_GENERATE_START_WRITE); |
|
954 | } |
974 | } |
955 | else |
975 | else |
956 | { |
976 | { |
957 | /* If transfer direction not change, do not generate Restart Condition */ |
977 | /* If transfer direction not change, do not generate Restart Condition */ |
958 | /* Mean Previous state is same as current state */ |
978 | /* Mean Previous state is same as current state */ |
959 | 979 | ||
960 | /* Store current volatile XferOptions, misra rule */ |
980 | /* Store current volatile XferOptions, misra rule */ |
961 | tmp = hsmbus->XferOptions; |
981 | tmp = hsmbus->XferOptions; |
962 | 982 | ||
963 | if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) |
983 | if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && \ |
- | 984 | (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) |
|
964 | { |
985 | { |
965 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
986 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, |
- | 987 | SMBUS_NO_STARTSTOP); |
|
966 | } |
988 | } |
967 | /* Else transfer direction change, so generate Restart with new transfer direction */ |
989 | /* Else transfer direction change, so generate Restart with new transfer direction */ |
968 | else |
990 | else |
969 | { |
991 | { |
970 | /* Convert OTHER_xxx XferOptions if any */ |
992 | /* Convert OTHER_xxx XferOptions if any */ |
971 | SMBUS_ConvertOtherXferOptions(hsmbus); |
993 | SMBUS_ConvertOtherXferOptions(hsmbus); |
972 | 994 | ||
973 | /* Handle Transfer */ |
995 | /* Handle Transfer */ |
974 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE); |
996 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, |
- | 997 | hsmbus->XferOptions, |
|
- | 998 | SMBUS_GENERATE_START_WRITE); |
|
975 | } |
999 | } |
976 | 1000 | ||
977 | /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */ |
1001 | /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */ |
978 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
1002 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
979 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
1003 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
Line 1008... | Line 1032... | ||
1008 | * @param pData Pointer to data buffer |
1032 | * @param pData Pointer to data buffer |
1009 | * @param Size Amount of data to be sent |
1033 | * @param Size Amount of data to be sent |
1010 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
1034 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
1011 | * @retval HAL status |
1035 | * @retval HAL status |
1012 | */ |
1036 | */ |
1013 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
1037 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, |
- | 1038 | uint16_t Size, uint32_t XferOptions) |
|
1014 | { |
1039 | { |
1015 | uint32_t tmp; |
1040 | uint32_t tmp; |
1016 | 1041 | ||
1017 | /* Check the parameters */ |
1042 | /* Check the parameters */ |
1018 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
1043 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
Line 1048... | Line 1073... | ||
1048 | 1073 | ||
1049 | /* Send Slave Address */ |
1074 | /* Send Slave Address */ |
1050 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
1075 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
1051 | if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) |
1076 | if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) |
1052 | { |
1077 | { |
- | 1078 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, |
|
1053 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ); |
1079 | SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), |
- | 1080 | SMBUS_GENERATE_START_READ); |
|
1054 | } |
1081 | } |
1055 | else |
1082 | else |
1056 | { |
1083 | { |
1057 | /* If transfer direction not change, do not generate Restart Condition */ |
1084 | /* If transfer direction not change, do not generate Restart Condition */ |
1058 | /* Mean Previous state is same as current state */ |
1085 | /* Mean Previous state is same as current state */ |
1059 | 1086 | ||
1060 | /* Store current volatile XferOptions, Misra rule */ |
1087 | /* Store current volatile XferOptions, Misra rule */ |
1061 | tmp = hsmbus->XferOptions; |
1088 | tmp = hsmbus->XferOptions; |
1062 | 1089 | ||
1063 | if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) |
1090 | if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && \ |
- | 1091 | (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) |
|
1064 | { |
1092 | { |
1065 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
1093 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, |
- | 1094 | SMBUS_NO_STARTSTOP); |
|
1066 | } |
1095 | } |
1067 | /* Else transfer direction change, so generate Restart with new transfer direction */ |
1096 | /* Else transfer direction change, so generate Restart with new transfer direction */ |
1068 | else |
1097 | else |
1069 | { |
1098 | { |
1070 | /* Convert OTHER_xxx XferOptions if any */ |
1099 | /* Convert OTHER_xxx XferOptions if any */ |
1071 | SMBUS_ConvertOtherXferOptions(hsmbus); |
1100 | SMBUS_ConvertOtherXferOptions(hsmbus); |
1072 | 1101 | ||
1073 | /* Handle Transfer */ |
1102 | /* Handle Transfer */ |
1074 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ); |
1103 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, |
- | 1104 | hsmbus->XferOptions, |
|
- | 1105 | SMBUS_GENERATE_START_READ); |
|
1075 | } |
1106 | } |
1076 | } |
1107 | } |
1077 | 1108 | ||
1078 | /* Process Unlocked */ |
1109 | /* Process Unlocked */ |
1079 | __HAL_UNLOCK(hsmbus); |
1110 | __HAL_UNLOCK(hsmbus); |
Line 1163... | Line 1194... | ||
1163 | * @param pData Pointer to data buffer |
1194 | * @param pData Pointer to data buffer |
1164 | * @param Size Amount of data to be sent |
1195 | * @param Size Amount of data to be sent |
1165 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
1196 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
1166 | * @retval HAL status |
1197 | * @retval HAL status |
1167 | */ |
1198 | */ |
1168 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
1199 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, |
- | 1200 | uint32_t XferOptions) |
|
1169 | { |
1201 | { |
1170 | /* Check the parameters */ |
1202 | /* Check the parameters */ |
1171 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
1203 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
1172 | 1204 | ||
1173 | if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) |
1205 | if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) |
Line 1211... | Line 1243... | ||
1211 | } |
1243 | } |
1212 | 1244 | ||
1213 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
1245 | /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ |
1214 | if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) |
1246 | if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) |
1215 | { |
1247 | { |
- | 1248 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, |
|
1216 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP); |
1249 | SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), |
- | 1250 | SMBUS_NO_STARTSTOP); |
|
1217 | } |
1251 | } |
1218 | else |
1252 | else |
1219 | { |
1253 | { |
1220 | /* Set NBYTE to transmit */ |
1254 | /* Set NBYTE to transmit */ |
1221 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
1255 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, |
- | 1256 | SMBUS_NO_STARTSTOP); |
|
1222 | 1257 | ||
1223 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
1258 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
1224 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
1259 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
1225 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
1260 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
1226 | { |
1261 | { |
Line 1257... | Line 1292... | ||
1257 | * @param pData Pointer to data buffer |
1292 | * @param pData Pointer to data buffer |
1258 | * @param Size Amount of data to be sent |
1293 | * @param Size Amount of data to be sent |
1259 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
1294 | * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition |
1260 | * @retval HAL status |
1295 | * @retval HAL status |
1261 | */ |
1296 | */ |
1262 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) |
1297 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, |
- | 1298 | uint32_t XferOptions) |
|
1263 | { |
1299 | { |
1264 | /* Check the parameters */ |
1300 | /* Check the parameters */ |
1265 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
1301 | assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); |
1266 | 1302 | ||
1267 | if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) |
1303 | if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) |
Line 1301... | Line 1337... | ||
1301 | /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */ |
1337 | /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */ |
1302 | /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */ |
1338 | /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */ |
1303 | /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */ |
1339 | /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */ |
1304 | if (((SMBUS_GET_PEC_MODE(hsmbus) != 0UL) && (hsmbus->XferSize == 2U)) || (hsmbus->XferSize == 1U)) |
1340 | if (((SMBUS_GET_PEC_MODE(hsmbus) != 0UL) && (hsmbus->XferSize == 2U)) || (hsmbus->XferSize == 1U)) |
1305 | { |
1341 | { |
1306 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
1342 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, |
- | 1343 | SMBUS_NO_STARTSTOP); |
|
1307 | } |
1344 | } |
1308 | else |
1345 | else |
1309 | { |
1346 | { |
1310 | SMBUS_TransferConfig(hsmbus, 0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP); |
1347 | SMBUS_TransferConfig(hsmbus, 0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP); |
1311 | } |
1348 | } |
Line 1415... | Line 1452... | ||
1415 | * in datasheet must be shifted to the left before calling the interface |
1452 | * in datasheet must be shifted to the left before calling the interface |
1416 | * @param Trials Number of trials |
1453 | * @param Trials Number of trials |
1417 | * @param Timeout Timeout duration |
1454 | * @param Timeout Timeout duration |
1418 | * @retval HAL status |
1455 | * @retval HAL status |
1419 | */ |
1456 | */ |
1420 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) |
1457 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, |
- | 1458 | uint32_t Timeout) |
|
1421 | { |
1459 | { |
1422 | uint32_t tickstart; |
1460 | uint32_t tickstart; |
1423 | 1461 | ||
1424 | __IO uint32_t SMBUS_Trials = 0UL; |
1462 | __IO uint32_t SMBUS_Trials = 0UL; |
1425 | 1463 | ||
Line 1524... | Line 1562... | ||
1524 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
1562 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); |
1525 | } |
1563 | } |
1526 | 1564 | ||
1527 | /* Increment Trials */ |
1565 | /* Increment Trials */ |
1528 | SMBUS_Trials++; |
1566 | SMBUS_Trials++; |
1529 | } |
- | |
1530 | while (SMBUS_Trials < Trials); |
1567 | } while (SMBUS_Trials < Trials); |
1531 | 1568 | ||
1532 | hsmbus->State = HAL_SMBUS_STATE_READY; |
1569 | hsmbus->State = HAL_SMBUS_STATE_READY; |
1533 | 1570 | ||
1534 | /* Update SMBUS error code */ |
1571 | /* Update SMBUS error code */ |
1535 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_HALTIMEOUT; |
1572 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_HALTIMEOUT; |
Line 1547... | Line 1584... | ||
1547 | /** |
1584 | /** |
1548 | * @} |
1585 | * @} |
1549 | */ |
1586 | */ |
1550 | 1587 | ||
1551 | /** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
1588 | /** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
1552 | * @{ |
1589 | * @{ |
1553 | */ |
1590 | */ |
1554 | 1591 | ||
1555 | /** |
1592 | /** |
1556 | * @brief Handle SMBUS event interrupt request. |
1593 | * @brief Handle SMBUS event interrupt request. |
1557 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
1594 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
1558 | * the configuration information for the specified SMBUS. |
1595 | * the configuration information for the specified SMBUS. |
Line 1564... | Line 1601... | ||
1564 | /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */ |
1601 | /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */ |
1565 | uint32_t tmpisrvalue = READ_REG(hsmbus->Instance->ISR); |
1602 | uint32_t tmpisrvalue = READ_REG(hsmbus->Instance->ISR); |
1566 | uint32_t tmpcr1value = READ_REG(hsmbus->Instance->CR1); |
1603 | uint32_t tmpcr1value = READ_REG(hsmbus->Instance->CR1); |
1567 | 1604 | ||
1568 | /* SMBUS in mode Transmitter ---------------------------------------------------*/ |
1605 | /* SMBUS in mode Transmitter ---------------------------------------------------*/ |
1569 | if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) && ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) |
1606 | if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | |
- | 1607 | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) && |
|
- | 1608 | ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || |
|
- | 1609 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || |
|
- | 1610 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || |
|
- | 1611 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || |
|
- | 1612 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) |
|
1570 | { |
1613 | { |
1571 | /* Slave mode selected */ |
1614 | /* Slave mode selected */ |
1572 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX) |
1615 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX) |
1573 | { |
1616 | { |
1574 | (void)SMBUS_Slave_ISR(hsmbus, tmpisrvalue); |
1617 | (void)SMBUS_Slave_ISR(hsmbus, tmpisrvalue); |
Line 1583... | Line 1626... | ||
1583 | /* Nothing to do */ |
1626 | /* Nothing to do */ |
1584 | } |
1627 | } |
1585 | } |
1628 | } |
1586 | 1629 | ||
1587 | /* SMBUS in mode Receiver ----------------------------------------------------*/ |
1630 | /* SMBUS in mode Receiver ----------------------------------------------------*/ |
1588 | if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET) && ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) |
1631 | if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | |
- | 1632 | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET) && |
|
- | 1633 | ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || |
|
- | 1634 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || |
|
- | 1635 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || |
|
- | 1636 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || |
|
- | 1637 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) |
|
1589 | { |
1638 | { |
1590 | /* Slave mode selected */ |
1639 | /* Slave mode selected */ |
1591 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) |
1640 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) |
1592 | { |
1641 | { |
1593 | (void)SMBUS_Slave_ISR(hsmbus, tmpisrvalue); |
1642 | (void)SMBUS_Slave_ISR(hsmbus, tmpisrvalue); |
Line 1602... | Line 1651... | ||
1602 | /* Nothing to do */ |
1651 | /* Nothing to do */ |
1603 | } |
1652 | } |
1604 | } |
1653 | } |
1605 | 1654 | ||
1606 | /* SMBUS in mode Listener Only --------------------------------------------------*/ |
1655 | /* SMBUS in mode Listener Only --------------------------------------------------*/ |
1607 | if (((SMBUS_CHECK_IT_SOURCE(tmpcr1value, SMBUS_IT_ADDRI) != RESET) || (SMBUS_CHECK_IT_SOURCE(tmpcr1value, SMBUS_IT_STOPI) != RESET) || (SMBUS_CHECK_IT_SOURCE(tmpcr1value, SMBUS_IT_NACKI) != RESET)) && ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) |
1656 | if (((SMBUS_CHECK_IT_SOURCE(tmpcr1value, SMBUS_IT_ADDRI) != RESET) || |
- | 1657 | (SMBUS_CHECK_IT_SOURCE(tmpcr1value, SMBUS_IT_STOPI) != RESET) || |
|
- | 1658 | (SMBUS_CHECK_IT_SOURCE(tmpcr1value, SMBUS_IT_NACKI) != RESET)) && |
|
- | 1659 | ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || |
|
- | 1660 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || |
|
- | 1661 | (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) |
|
1608 | { |
1662 | { |
1609 | if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) |
1663 | if ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) |
1610 | { |
1664 | { |
1611 | (void)SMBUS_Slave_ISR(hsmbus, tmpisrvalue); |
1665 | (void)SMBUS_Slave_ISR(hsmbus, tmpisrvalue); |
1612 | } |
1666 | } |
Line 1693... | Line 1747... | ||
1693 | * the configuration information for the specified SMBUS. |
1747 | * the configuration information for the specified SMBUS. |
1694 | * @param TransferDirection Master request Transfer Direction (Write/Read) |
1748 | * @param TransferDirection Master request Transfer Direction (Write/Read) |
1695 | * @param AddrMatchCode Address Match Code |
1749 | * @param AddrMatchCode Address Match Code |
1696 | * @retval None |
1750 | * @retval None |
1697 | */ |
1751 | */ |
1698 | __weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode) |
1752 | __weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, |
- | 1753 | uint16_t AddrMatchCode) |
|
1699 | { |
1754 | { |
1700 | /* Prevent unused argument(s) compilation warning */ |
1755 | /* Prevent unused argument(s) compilation warning */ |
1701 | UNUSED(hsmbus); |
1756 | UNUSED(hsmbus); |
1702 | UNUSED(TransferDirection); |
1757 | UNUSED(TransferDirection); |
1703 | UNUSED(AddrMatchCode); |
1758 | UNUSED(AddrMatchCode); |
Line 1742... | Line 1797... | ||
1742 | /** |
1797 | /** |
1743 | * @} |
1798 | * @} |
1744 | */ |
1799 | */ |
1745 | 1800 | ||
1746 | /** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions |
1801 | /** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions |
1747 | * @brief Peripheral State and Errors functions |
1802 | * @brief Peripheral State and Errors functions |
1748 | * |
1803 | * |
1749 | @verbatim |
1804 | @verbatim |
1750 | =============================================================================== |
1805 | =============================================================================== |
1751 | ##### Peripheral State and Errors functions ##### |
1806 | ##### Peripheral State and Errors functions ##### |
1752 | =============================================================================== |
1807 | =============================================================================== |
1753 | [..] |
1808 | [..] |
Line 1769... | Line 1824... | ||
1769 | /* Return SMBUS handle state */ |
1824 | /* Return SMBUS handle state */ |
1770 | return hsmbus->State; |
1825 | return hsmbus->State; |
1771 | } |
1826 | } |
1772 | 1827 | ||
1773 | /** |
1828 | /** |
1774 | * @brief Return the SMBUS error code. |
1829 | * @brief Return the SMBUS error code. |
1775 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
1830 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
1776 | * the configuration information for the specified SMBUS. |
1831 | * the configuration information for the specified SMBUS. |
1777 | * @retval SMBUS Error Code |
1832 | * @retval SMBUS Error Code |
1778 | */ |
1833 | */ |
1779 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus) |
1834 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus) |
1780 | { |
1835 | { |
1781 | return hsmbus->ErrorCode; |
1836 | return hsmbus->ErrorCode; |
1782 | } |
1837 | } |
1783 | 1838 | ||
Line 1788... | Line 1843... | ||
1788 | /** |
1843 | /** |
1789 | * @} |
1844 | * @} |
1790 | */ |
1845 | */ |
1791 | 1846 | ||
1792 | /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions |
1847 | /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions |
1793 | * @brief Data transfers Private functions |
1848 | * @brief Data transfers Private functions |
1794 | * @{ |
1849 | * @{ |
1795 | */ |
1850 | */ |
1796 | 1851 | ||
1797 | /** |
1852 | /** |
1798 | * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode. |
1853 | * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode. |
1799 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
1854 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
1800 | * the configuration information for the specified SMBUS. |
1855 | * the configuration information for the specified SMBUS. |
1801 | * @param StatusFlags Value of Interrupt Flags. |
1856 | * @param StatusFlags Value of Interrupt Flags. |
1802 | * @retval HAL status |
1857 | * @retval HAL status |
1803 | */ |
1858 | */ |
1804 | static HAL_StatusTypeDef SMBUS_Master_ISR(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags) |
1859 | static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags) |
1805 | { |
1860 | { |
1806 | uint16_t DevAddress; |
1861 | uint16_t DevAddress; |
1807 | 1862 | ||
1808 | /* Process Locked */ |
1863 | /* Process Locked */ |
1809 | __HAL_LOCK(hsmbus); |
1864 | __HAL_LOCK(hsmbus); |
Line 1852... | Line 1907... | ||
1852 | hsmbus->State = HAL_SMBUS_STATE_READY; |
1907 | hsmbus->State = HAL_SMBUS_STATE_READY; |
1853 | 1908 | ||
1854 | /* Process Unlocked */ |
1909 | /* Process Unlocked */ |
1855 | __HAL_UNLOCK(hsmbus); |
1910 | __HAL_UNLOCK(hsmbus); |
1856 | 1911 | ||
1857 | /* REenable the selected SMBUS peripheral */ |
1912 | /* Re-enable the selected SMBUS peripheral */ |
1858 | __HAL_SMBUS_ENABLE(hsmbus); |
1913 | __HAL_SMBUS_ENABLE(hsmbus); |
1859 | 1914 | ||
1860 | /* Call the corresponding callback to inform upper layer of End of Transfer */ |
1915 | /* Call the corresponding callback to inform upper layer of End of Transfer */ |
1861 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
1916 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
1862 | hsmbus->MasterTxCpltCallback(hsmbus); |
1917 | hsmbus->MasterTxCpltCallback(hsmbus); |
Line 1939... | Line 1994... | ||
1939 | { |
1994 | { |
1940 | DevAddress = (uint16_t)(hsmbus->Instance->CR2 & I2C_CR2_SADD); |
1995 | DevAddress = (uint16_t)(hsmbus->Instance->CR2 & I2C_CR2_SADD); |
1941 | 1996 | ||
1942 | if (hsmbus->XferCount > MAX_NBYTE_SIZE) |
1997 | if (hsmbus->XferCount > MAX_NBYTE_SIZE) |
1943 | { |
1998 | { |
- | 1999 | SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, |
|
1944 | SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP); |
2000 | (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), |
- | 2001 | SMBUS_NO_STARTSTOP); |
|
1945 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
2002 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
1946 | } |
2003 | } |
1947 | else |
2004 | else |
1948 | { |
2005 | { |
1949 | hsmbus->XferSize = hsmbus->XferCount; |
2006 | hsmbus->XferSize = hsmbus->XferCount; |
1950 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
2007 | SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, |
- | 2008 | SMBUS_NO_STARTSTOP); |
|
1951 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
2009 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
1952 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
2010 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
1953 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
2011 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
1954 | { |
2012 | { |
1955 | hsmbus->XferSize--; |
2013 | hsmbus->XferSize--; |
Line 2083... | Line 2141... | ||
2083 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
2141 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
2084 | * the configuration information for the specified SMBUS. |
2142 | * the configuration information for the specified SMBUS. |
2085 | * @param StatusFlags Value of Interrupt Flags. |
2143 | * @param StatusFlags Value of Interrupt Flags. |
2086 | * @retval HAL status |
2144 | * @retval HAL status |
2087 | */ |
2145 | */ |
2088 | static HAL_StatusTypeDef SMBUS_Slave_ISR(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags) |
2146 | static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags) |
2089 | { |
2147 | { |
2090 | uint8_t TransferDirection; |
2148 | uint8_t TransferDirection; |
2091 | uint16_t SlaveAddrCode; |
2149 | uint16_t SlaveAddrCode; |
2092 | 2150 | ||
2093 | /* Process Locked */ |
2151 | /* Process Locked */ |
Line 2153... | Line 2211... | ||
2153 | hsmbus->AddrCallback(hsmbus, TransferDirection, SlaveAddrCode); |
2211 | hsmbus->AddrCallback(hsmbus, TransferDirection, SlaveAddrCode); |
2154 | #else |
2212 | #else |
2155 | HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode); |
2213 | HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode); |
2156 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
2214 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
2157 | } |
2215 | } |
2158 | else if ((SMBUS_CHECK_FLAG(StatusFlags, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(StatusFlags, SMBUS_FLAG_TCR) != RESET)) |
2216 | else if ((SMBUS_CHECK_FLAG(StatusFlags, SMBUS_FLAG_RXNE) != RESET) || |
- | 2217 | (SMBUS_CHECK_FLAG(StatusFlags, SMBUS_FLAG_TCR) != RESET)) |
|
2159 | { |
2218 | { |
2160 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) |
2219 | if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) |
2161 | { |
2220 | { |
2162 | /* Read data from RXDR */ |
2221 | /* Read data from RXDR */ |
2163 | *hsmbus->pBuffPtr = (uint8_t)(hsmbus->Instance->RXDR); |
2222 | *hsmbus->pBuffPtr = (uint8_t)(hsmbus->Instance->RXDR); |
Line 2196... | Line 2255... | ||
2196 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
2255 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
2197 | } |
2256 | } |
2198 | else |
2257 | else |
2199 | { |
2258 | { |
2200 | /* Set Reload for next Bytes */ |
2259 | /* Set Reload for next Bytes */ |
- | 2260 | SMBUS_TransferConfig(hsmbus, 0, 1, |
|
2201 | SMBUS_TransferConfig(hsmbus, 0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP); |
2261 | SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), |
- | 2262 | SMBUS_NO_STARTSTOP); |
|
2202 | 2263 | ||
2203 | /* Ack last Byte Read */ |
2264 | /* Ack last Byte Read */ |
2204 | hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; |
2265 | hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; |
2205 | } |
2266 | } |
2206 | } |
2267 | } |
Line 2208... | Line 2269... | ||
2208 | { |
2269 | { |
2209 | if ((hsmbus->XferCount != 0U) && (hsmbus->XferSize == 0U)) |
2270 | if ((hsmbus->XferCount != 0U) && (hsmbus->XferSize == 0U)) |
2210 | { |
2271 | { |
2211 | if (hsmbus->XferCount > MAX_NBYTE_SIZE) |
2272 | if (hsmbus->XferCount > MAX_NBYTE_SIZE) |
2212 | { |
2273 | { |
- | 2274 | SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, |
|
2213 | SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP); |
2275 | (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), |
- | 2276 | SMBUS_NO_STARTSTOP); |
|
2214 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
2277 | hsmbus->XferSize = MAX_NBYTE_SIZE; |
2215 | } |
2278 | } |
2216 | else |
2279 | else |
2217 | { |
2280 | { |
2218 | hsmbus->XferSize = hsmbus->XferCount; |
2281 | hsmbus->XferSize = hsmbus->XferCount; |
2219 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); |
2282 | SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, |
- | 2283 | SMBUS_NO_STARTSTOP); |
|
2220 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
2284 | /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ |
2221 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
2285 | /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ |
2222 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
2286 | if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) |
2223 | { |
2287 | { |
2224 | hsmbus->XferSize--; |
2288 | hsmbus->XferSize--; |
Line 2339... | Line 2403... | ||
2339 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
2403 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
2340 | * the configuration information for the specified SMBUS. |
2404 | * the configuration information for the specified SMBUS. |
2341 | * @param InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition. |
2405 | * @param InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition. |
2342 | * @retval HAL status |
2406 | * @retval HAL status |
2343 | */ |
2407 | */ |
2344 | static void SMBUS_Enable_IRQ(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest) |
2408 | static void SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest) |
2345 | { |
2409 | { |
2346 | uint32_t tmpisr = 0UL; |
2410 | uint32_t tmpisr = 0UL; |
2347 | 2411 | ||
2348 | if ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) |
2412 | if ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) |
2349 | { |
2413 | { |
Line 2379... | Line 2443... | ||
2379 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
2443 | * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains |
2380 | * the configuration information for the specified SMBUS. |
2444 | * the configuration information for the specified SMBUS. |
2381 | * @param InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition. |
2445 | * @param InterruptRequest Value of @ref SMBUS_Interrupt_configuration_definition. |
2382 | * @retval HAL status |
2446 | * @retval HAL status |
2383 | */ |
2447 | */ |
2384 | static void SMBUS_Disable_IRQ(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest) |
2448 | static void SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest) |
2385 | { |
2449 | { |
2386 | uint32_t tmpisr = 0UL; |
2450 | uint32_t tmpisr = 0UL; |
2387 | uint32_t tmpstate = hsmbus->State; |
2451 | uint32_t tmpstate = hsmbus->State; |
2388 | 2452 | ||
2389 | if ((tmpstate == HAL_SMBUS_STATE_READY) && ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)) |
2453 | if ((tmpstate == HAL_SMBUS_STATE_READY) && ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)) |
Line 2451... | Line 2515... | ||
2451 | /** |
2515 | /** |
2452 | * @brief SMBUS interrupts error handler. |
2516 | * @brief SMBUS interrupts error handler. |
2453 | * @param hsmbus SMBUS handle. |
2517 | * @param hsmbus SMBUS handle. |
2454 | * @retval None |
2518 | * @retval None |
2455 | */ |
2519 | */ |
2456 | static void SMBUS_ITErrorHandler(struct __SMBUS_HandleTypeDef *hsmbus) |
2520 | static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) |
2457 | { |
2521 | { |
2458 | uint32_t itflags = READ_REG(hsmbus->Instance->ISR); |
2522 | uint32_t itflags = READ_REG(hsmbus->Instance->ISR); |
2459 | uint32_t itsources = READ_REG(hsmbus->Instance->CR1); |
2523 | uint32_t itsources = READ_REG(hsmbus->Instance->CR1); |
2460 | uint32_t tmpstate; |
2524 | uint32_t tmpstate; |
2461 | uint32_t tmperror; |
2525 | uint32_t tmperror; |
2462 | 2526 | ||
2463 | /* SMBUS Bus error interrupt occurred ------------------------------------*/ |
2527 | /* SMBUS Bus error interrupt occurred ------------------------------------*/ |
2464 | if (((itflags & SMBUS_FLAG_BERR) == SMBUS_FLAG_BERR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
2528 | if (((itflags & SMBUS_FLAG_BERR) == SMBUS_FLAG_BERR) && \ |
- | 2529 | ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
|
2465 | { |
2530 | { |
2466 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR; |
2531 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR; |
2467 | 2532 | ||
2468 | /* Clear BERR flag */ |
2533 | /* Clear BERR flag */ |
2469 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR); |
2534 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR); |
2470 | } |
2535 | } |
2471 | 2536 | ||
2472 | /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/ |
2537 | /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/ |
2473 | if (((itflags & SMBUS_FLAG_OVR) == SMBUS_FLAG_OVR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
2538 | if (((itflags & SMBUS_FLAG_OVR) == SMBUS_FLAG_OVR) && \ |
- | 2539 | ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
|
2474 | { |
2540 | { |
2475 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR; |
2541 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR; |
2476 | 2542 | ||
2477 | /* Clear OVR flag */ |
2543 | /* Clear OVR flag */ |
2478 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR); |
2544 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR); |
2479 | } |
2545 | } |
2480 | 2546 | ||
2481 | /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/ |
2547 | /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/ |
2482 | if (((itflags & SMBUS_FLAG_ARLO) == SMBUS_FLAG_ARLO) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
2548 | if (((itflags & SMBUS_FLAG_ARLO) == SMBUS_FLAG_ARLO) && \ |
- | 2549 | ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
|
2483 | { |
2550 | { |
2484 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO; |
2551 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO; |
2485 | 2552 | ||
2486 | /* Clear ARLO flag */ |
2553 | /* Clear ARLO flag */ |
2487 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO); |
2554 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO); |
2488 | } |
2555 | } |
2489 | 2556 | ||
2490 | /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/ |
2557 | /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/ |
2491 | if (((itflags & SMBUS_FLAG_TIMEOUT) == SMBUS_FLAG_TIMEOUT) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
2558 | if (((itflags & SMBUS_FLAG_TIMEOUT) == SMBUS_FLAG_TIMEOUT) && \ |
- | 2559 | ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
|
2492 | { |
2560 | { |
2493 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT; |
2561 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT; |
2494 | 2562 | ||
2495 | /* Clear TIMEOUT flag */ |
2563 | /* Clear TIMEOUT flag */ |
2496 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT); |
2564 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT); |
2497 | } |
2565 | } |
2498 | 2566 | ||
2499 | /* SMBUS Alert error interrupt occurred -----------------------------------------------*/ |
2567 | /* SMBUS Alert error interrupt occurred -----------------------------------------------*/ |
2500 | if (((itflags & SMBUS_FLAG_ALERT) == SMBUS_FLAG_ALERT) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
2568 | if (((itflags & SMBUS_FLAG_ALERT) == SMBUS_FLAG_ALERT) && \ |
- | 2569 | ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
|
2501 | { |
2570 | { |
2502 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT; |
2571 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT; |
2503 | 2572 | ||
2504 | /* Clear ALERT flag */ |
2573 | /* Clear ALERT flag */ |
2505 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT); |
2574 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT); |
2506 | } |
2575 | } |
2507 | 2576 | ||
2508 | /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/ |
2577 | /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/ |
2509 | if (((itflags & SMBUS_FLAG_PECERR) == SMBUS_FLAG_PECERR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
2578 | if (((itflags & SMBUS_FLAG_PECERR) == SMBUS_FLAG_PECERR) && \ |
- | 2579 | ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) |
|
2510 | { |
2580 | { |
2511 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR; |
2581 | hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR; |
2512 | 2582 | ||
2513 | /* Clear PEC error flag */ |
2583 | /* Clear PEC error flag */ |
2514 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); |
2584 | __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); |
Line 2552... | Line 2622... | ||
2552 | * @param Flag Specifies the SMBUS flag to check. |
2622 | * @param Flag Specifies the SMBUS flag to check. |
2553 | * @param Status The new Flag status (SET or RESET). |
2623 | * @param Status The new Flag status (SET or RESET). |
2554 | * @param Timeout Timeout duration |
2624 | * @param Timeout Timeout duration |
2555 | * @retval HAL status |
2625 | * @retval HAL status |
2556 | */ |
2626 | */ |
2557 | static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(struct __SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout) |
2627 | static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, |
- | 2628 | FlagStatus Status, uint32_t Timeout) |
|
2558 | { |
2629 | { |
2559 | uint32_t tickstart = HAL_GetTick(); |
2630 | uint32_t tickstart = HAL_GetTick(); |
2560 | 2631 | ||
2561 | /* Wait until flag is set */ |
2632 | /* Wait until flag is set */ |
2562 | while ((FlagStatus)(__HAL_SMBUS_GET_FLAG(hsmbus, Flag)) == Status) |
2633 | while ((FlagStatus)(__HAL_SMBUS_GET_FLAG(hsmbus, Flag)) == Status) |
Line 2601... | Line 2672... | ||
2601 | * @arg @ref SMBUS_GENERATE_STOP Generate stop condition (Size should be set to 0). |
2672 | * @arg @ref SMBUS_GENERATE_STOP Generate stop condition (Size should be set to 0). |
2602 | * @arg @ref SMBUS_GENERATE_START_READ Generate Restart for read request. |
2673 | * @arg @ref SMBUS_GENERATE_START_READ Generate Restart for read request. |
2603 | * @arg @ref SMBUS_GENERATE_START_WRITE Generate Restart for write request. |
2674 | * @arg @ref SMBUS_GENERATE_START_WRITE Generate Restart for write request. |
2604 | * @retval None |
2675 | * @retval None |
2605 | */ |
2676 | */ |
2606 | static void SMBUS_TransferConfig(struct __SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) |
2677 | static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, |
- | 2678 | uint32_t Mode, uint32_t Request) |
|
2607 | { |
2679 | { |
2608 | /* Check the parameters */ |
2680 | /* Check the parameters */ |
2609 | assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance)); |
2681 | assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance)); |
2610 | assert_param(IS_SMBUS_TRANSFER_MODE(Mode)); |
2682 | assert_param(IS_SMBUS_TRANSFER_MODE(Mode)); |
2611 | assert_param(IS_SMBUS_TRANSFER_REQUEST(Request)); |
2683 | assert_param(IS_SMBUS_TRANSFER_REQUEST(Request)); |
2612 | 2684 | ||
2613 | /* update CR2 register */ |
2685 | /* update CR2 register */ |
- | 2686 | MODIFY_REG(hsmbus->Instance->CR2, |
|
- | 2687 | ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ |
|
2614 | MODIFY_REG(hsmbus->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31UL - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)), \ |
2688 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31UL - I2C_CR2_RD_WRN_Pos))) | \ |
- | 2689 | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)), \ |
|
- | 2690 | (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ |
|
2615 | (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request)); |
2691 | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ |
- | 2692 | (uint32_t)Mode | (uint32_t)Request)); |
|
2616 | } |
2693 | } |
2617 | 2694 | ||
2618 | /** |
2695 | /** |
2619 | * @brief Convert SMBUSx OTHER_xxx XferOptions to functionnal XferOptions. |
2696 | * @brief Convert SMBUSx OTHER_xxx XferOptions to functional XferOptions. |
2620 | * @param hsmbus SMBUS handle. |
2697 | * @param hsmbus SMBUS handle. |
2621 | * @retval None |
2698 | * @retval None |
2622 | */ |
2699 | */ |
2623 | static void SMBUS_ConvertOtherXferOptions(struct __SMBUS_HandleTypeDef *hsmbus) |
2700 | static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus) |
2624 | { |
2701 | { |
2625 | /* if user set XferOptions to SMBUS_OTHER_FRAME_NO_PEC */ |
2702 | /* if user set XferOptions to SMBUS_OTHER_FRAME_NO_PEC */ |
2626 | /* it request implicitly to generate a restart condition */ |
2703 | /* it request implicitly to generate a restart condition */ |
2627 | /* set XferOptions to SMBUS_FIRST_FRAME */ |
2704 | /* set XferOptions to SMBUS_FIRST_FRAME */ |
2628 | if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_NO_PEC) |
2705 | if (hsmbus->XferOptions == SMBUS_OTHER_FRAME_NO_PEC) |