WebSVN – FuelGauge – Diff – /trunk/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c

   ==============================================================================
   [..]
     (+) The IWDG can be started by either software or hardware (configurable
         through option byte).
-    (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
+    (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays
-        if the main clock fails.
+        active even if the main clock fails.
-    (+) Once the IWDG is started, the LSI is forced ON and both can not be
+    (+) Once the IWDG is started, the LSI is forced ON and both cannot be
         disabled. The counter starts counting down from the reset value (0xFFF).
         When it reaches the end of count value (0x000) a reset signal is
         generated (IWDG reset).
     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
-        the IWDG_RLR value is reloaded in the counter and the watchdog reset is
+        the IWDG_RLR value is reloaded into the counter and the watchdog reset
-        prevented.
+        is prevented.
     (+) The IWDG is implemented in the VDD voltage domain that is still functional
-        in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
+        in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY).
         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
         reset occurs.
-    (+) Debug mode : When the microcontroller enters debug mode (core halted),
+    (+) Debug mode: When the microcontroller enters debug mode (core halted),
         the IWDG counter either continues to work normally or stops, depending
         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
         __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros.
     [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
-         The IWDG timeout may vary due to LSI frequency dispersion. STM32F0xx
+         The IWDG timeout may vary due to LSI clock frequency dispersion.
-         devices provide the capability to measure the LSI frequency (LSI clock
+         STM32F0xx devices provide the capability to measure the LSI clock
-         connected internally to TIM16 CH1 input capture). The measured value
+         frequency (LSI clock is internally connected to TIM16 CH1 input capture).
-         can be used to have an IWDG timeout with an acceptable accuracy.
+         The measured value can be used to have an IWDG timeout with an
+         acceptable accuracy.
+    [..] Default timeout value (necessary for IWDG_SR status register update):
+         Constant LSI_VALUE is defined based on the nominal LSI clock frequency.
+         This frequency being subject to variations as mentioned above, the
+         default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT
+         below) may become too short or too long.
+         In such cases, this default timeout value can be tuned by redefining
+         the constant LSI_VALUE at user-application level (based, for instance,
+         on the measured LSI clock frequency as explained above).
                      ##### How to use this driver #####
   ==============================================================================
   [..]
     (#) Use IWDG using HAL_IWDG_Init() function to :
       (++) Enable write access to configuration registers:
           IWDG_PR, IWDG_RLR and IWDG_WINR.
       (++) Configure the IWDG prescaler and counter reload value. This reload
            value will be loaded in the IWDG counter each time the watchdog is
            reloaded, then the IWDG will start counting down from this value.
-      (++) Wait for status flags to be reset.
       (++) Depending on window parameter:
         (+++) If Window Init parameter is same as Window register value,
              nothing more is done but reload counter value in order to exit
              function with exact time base.
         (+++) Else modify Window register. This will automatically reload
              watchdog counter.
+      (++) Wait for status flags to be reset.
     (#) Then the application program must refresh the IWDG counter at regular
         intervals during normal operation to prevent an MCU reset, using
         HAL_IWDG_Refresh() function.
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
 /** @defgroup IWDG_Private_Defines IWDG Private Defines
   * @{
   */
-/* Status register need 5 RC LSI divided by prescaler clock to be updated. With
+/* Status register needs up to 5 LSI clock periods divided by the clock
-   higher prescaler (256), and according to LSI variation, we need to wait at
+   prescaler to be updated. The number of LSI clock periods is upper-rounded to
+for the timeout value calculation.
+   The timeout value is calculated using the highest prescaler (256) and
+   the LSI_VALUE constant. The value of this constant can be changed by the user
+   to take into account possible LSI clock period variations.
+   The timeout value is multiplied by 1000 to be converted in milliseconds.
+   LSI startup time is also considered here by adding LSI_STARTUP_TIMEOUT
-   least 6 cycles so 48 ms. */
+   converted in milliseconds. */
-#define HAL_IWDG_DEFAULT_TIMEOUT            48u
+#define HAL_IWDG_DEFAULT_TIMEOUT        (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL))
+#define IWDG_KERNEL_UPDATE_FLAGS        (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU)
 /**
   * @}
   */
 /* Private macro -------------------------------------------------------------*/
   /* Check pending flag, if previous update not done, return timeout */
   tickstart = HAL_GetTick();
   /* Wait for register to be updated */
-  while (hiwdg->Instance->SR != 0x00u)
+  while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
+  {
     if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
+    {
+      if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
+      {
-      return HAL_TIMEOUT;
+        return HAL_TIMEOUT;
+      }
+    }
+  }
   /* If window parameter is different than current value, modify window
   register */
   /* Return function status */
   return HAL_OK;
+}
 /**
   * @}
   */
 @endverbatim
   * @{
   */
 /**
   * @brief  Refresh the IWDG.
   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
   *                the configuration information for the specified IWDG module.
   * @retval HAL status
   /* Return function status */
   return HAL_OK;
+}
 /**
   * @}
   */
 /**

Subversion Repositories FuelGauge

(root)/trunk/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c – Rev 2 → 6