Subversion Repositories FuelGauge

Rev

Rev 2 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 2 Rev 6
Line 17... Line 17...
17
    The I2C HAL driver can be used as follows:
17
    The I2C HAL driver can be used as follows:
18
 
18
 
19
    (#) Declare a I2C_HandleTypeDef handle structure, for example:
19
    (#) Declare a I2C_HandleTypeDef handle structure, for example:
20
        I2C_HandleTypeDef  hi2c;
20
        I2C_HandleTypeDef  hi2c;
21
 
21
 
22
    (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API:
22
    (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
23
        (##) Enable the I2Cx interface clock
23
        (##) Enable the I2Cx interface clock
24
        (##) I2C pins configuration
24
        (##) I2C pins configuration
25
            (+++) Enable the clock for the I2C GPIOs
25
            (+++) Enable the clock for the I2C GPIOs
26
            (+++) Configure I2C pins as alternate function open-drain
26
            (+++) Configure I2C pins as alternate function open-drain
27
        (##) NVIC configuration if you need to use interrupt process
27
        (##) NVIC configuration if you need to use interrupt process
28
            (+++) Configure the I2Cx interrupt priority
28
            (+++) Configure the I2Cx interrupt priority
29
            (+++) Enable the NVIC I2C IRQ Channel
29
            (+++) Enable the NVIC I2C IRQ Channel
30
        (##) DMA Configuration if you need to use DMA process
30
        (##) DMA Configuration if you need to use DMA process
31
            (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
31
            (+++) Declare a DMA_HandleTypeDef handle structure for
-
 
32
                  the transmit or receive channel
32
            (+++) Enable the DMAx interface clock using
33
            (+++) Enable the DMAx interface clock using
33
            (+++) Configure the DMA handle parameters
34
            (+++) Configure the DMA handle parameters
34
            (+++) Configure the DMA Tx or Rx channel
35
            (+++) Configure the DMA Tx or Rx channel
35
            (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
36
            (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
36
            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
37
            (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
37
                  the DMA Tx or Rx channel
38
                  the DMA Tx or Rx channel
38
 
39
 
39
    (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
40
    (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,
40
        Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
41
        Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.
41
 
42
 
42
    (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware
43
    (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
43
        (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit(&hi2c) API.
44
        (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
44
 
45
 
45
    (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady()
46
    (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
46
 
47
 
47
    (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
48
    (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
48
 
49
 
49
    *** Polling mode IO operation ***
50
    *** Polling mode IO operation ***
50
    =================================
51
    =================================
51
    [..]
52
    [..]
52
      (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit()
53
      (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
53
      (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive()
54
      (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
54
      (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit()
55
      (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
55
      (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive()
56
      (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
56
 
57
 
57
    *** Polling mode IO MEM operation ***
58
    *** Polling mode IO MEM operation ***
58
    =====================================
59
    =====================================
59
    [..]
60
    [..]
60
      (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write()
61
      (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
61
      (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read()
62
      (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
62
 
63
 
63
 
64
 
64
    *** Interrupt mode IO operation ***
65
    *** Interrupt mode IO operation ***
65
    ===================================
66
    ===================================
66
    [..]
67
    [..]
67
      (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT()
68
      (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
68
      (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
69
      (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can
69
           add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
70
           add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
70
      (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT()
71
      (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
71
      (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
72
      (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can
72
           add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
73
           add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
73
      (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT()
74
      (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
74
      (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
75
      (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can
75
           add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
76
           add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
76
      (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT()
77
      (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
77
      (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
78
      (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can
78
           add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
79
           add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
79
      (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
80
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
80
           add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
81
           add their own code by customization of function pointer HAL_I2C_ErrorCallback()
81
      (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
82
      (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
82
      (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
83
      (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can
83
           add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
84
           add their own code by customization of function pointer HAL_I2C_AbortCpltCallback()
84
      (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro.
85
      (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
85
           This action will inform Master to generate a Stop condition to discard the communication.
86
           This action will inform Master to generate a Stop condition to discard the communication.
86
 
87
 
87
 
88
 
88
    *** Interrupt mode or DMA mode IO sequential operation ***
89
    *** Interrupt mode or DMA mode IO sequential operation ***
89
    ==========================================================
90
    ==========================================================
90
    [..]
91
    [..]
91
      (@) These interfaces allow to manage a sequential transfer with a repeated start condition
92
      (@) These interfaces allow to manage a sequential transfer with a repeated start condition
92
          when a direction change during transfer
93
          when a direction change during transfer
93
    [..]
94
    [..]
94
      (+) A specific option field manage the different steps of a sequential transfer
95
      (+) A specific option field manage the different steps of a sequential transfer
95
      (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
96
      (+) Option field values are defined through I2C_XFEROPTIONS and are listed below:
96
      (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
97
      (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in
-
 
98
           no sequential mode
97
      (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
99
      (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
98
                            and data to transfer without a final stop condition
100
                            and data to transfer without a final stop condition
99
      (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
101
      (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with
-
 
102
                            start condition, address and data to transfer without a final stop condition,
100
                            and data to transfer without a final stop condition, an then permit a call the same master sequential interface
103
                            an then permit a call the same master sequential interface several times
101
                            several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
104
                            (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit_IT()
102
                            or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_Transmit_DMA())
105
                            or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_DMA())
103
      (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
106
      (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
104
                            and with new data to transfer if the direction change or manage only the new data to transfer
107
                            and with new data to transfer if the direction change or manage only the new data to
-
 
108
                            transfer
105
                            if no direction change and without a final stop condition in both cases
109
                            if no direction change and without a final stop condition in both cases
106
      (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
110
      (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
107
                            and with new data to transfer if the direction change or manage only the new data to transfer
111
                            and with new data to transfer if the direction change or manage only the new data to
-
 
112
                            transfer
108
                            if no direction change and with a final stop condition in both cases
113
                            if no direction change and with a final stop condition in both cases
109
      (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential
114
      (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition
-
 
115
                            after several call of the same master sequential interface several times
110
                            interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
116
                            (link with option I2C_FIRST_AND_NEXT_FRAME).
111
                            Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
117
                            Usage can, transfer several bytes one by one using
-
 
118
                              HAL_I2C_Master_Seq_Transmit_IT
-
 
119
                              or HAL_I2C_Master_Seq_Receive_IT
-
 
120
                              or HAL_I2C_Master_Seq_Transmit_DMA
112
                              or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
121
                              or HAL_I2C_Master_Seq_Receive_DMA
113
                              or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
122
                              with option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME.
114
                              or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
123
                             Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or
115
                            Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the oposite interface Receive or Transmit
124
                              Receive sequence permit to call the opposite interface Receive or Transmit
116
                              without stopping the communication and so generate a restart condition.
125
                              without stopping the communication and so generate a restart condition.
117
      (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
126
      (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after
-
 
127
                            each call of the same master sequential
118
                            interface.
128
                            interface.
119
                            Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
129
                            Usage can, transfer several bytes one by one with a restart with slave address between
-
 
130
                            each bytes using
-
 
131
                              HAL_I2C_Master_Seq_Transmit_IT
120
                              or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
132
                              or HAL_I2C_Master_Seq_Receive_IT
121
                              or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
133
                              or HAL_I2C_Master_Seq_Transmit_DMA
-
 
134
                              or HAL_I2C_Master_Seq_Receive_DMA
122
                              or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
135
                              with option I2C_FIRST_FRAME then I2C_OTHER_FRAME.
123
                            Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
136
                            Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic
-
 
137
                            generation of STOP condition.
124
 
138
 
125
      (+) Differents sequential I2C interfaces are listed below:
139
      (+) Different sequential I2C interfaces are listed below:
126
      (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
140
      (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using
127
            or using @ref HAL_I2C_Master_Seq_Transmit_DMA()
141
            HAL_I2C_Master_Seq_Transmit_IT() or using HAL_I2C_Master_Seq_Transmit_DMA()
128
      (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
142
      (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and
129
           add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
143
            users can add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
130
      (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
144
      (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using
131
            or using @ref HAL_I2C_Master_Seq_Receive_DMA()
145
            HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA()
132
      (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
146
      (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can
133
           add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
147
           add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
134
      (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
148
      (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
135
      (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
149
      (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can
136
           add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
150
           add their own code by customization of function pointer HAL_I2C_AbortCpltCallback()
137
      (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT()
151
      (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT()
-
 
152
            HAL_I2C_DisableListen_IT()
138
      (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can
153
      (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and users can
139
           add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
154
           add their own code to check the Address Match Code and the transmission direction request by master
-
 
155
           (Write/Read).
140
      (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can
156
      (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and users can
141
           add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback()
157
          add their own code by customization of function pointer HAL_I2C_ListenCpltCallback()
142
      (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT()
158
      (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using
143
            or using @ref HAL_I2C_Slave_Seq_Transmit_DMA()
159
            HAL_I2C_Slave_Seq_Transmit_IT() or using HAL_I2C_Slave_Seq_Transmit_DMA()
144
      (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
160
      (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and
145
           add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
161
            users can add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
146
      (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT()
162
      (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using
147
            or using @ref HAL_I2C_Slave_Seq_Receive_DMA()
163
            HAL_I2C_Slave_Seq_Receive_IT() or using HAL_I2C_Slave_Seq_Receive_DMA()
148
      (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
164
      (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can
149
           add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
165
           add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
150
      (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
166
      (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
151
           add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
167
           add their own code by customization of function pointer HAL_I2C_ErrorCallback()
152
      (++) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro.
168
      (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
153
           This action will inform Master to generate a Stop condition to discard the communication.
169
           This action will inform Master to generate a Stop condition to discard the communication.
154
 
170
 
155
    *** Interrupt mode IO MEM operation ***
171
    *** Interrupt mode IO MEM operation ***
156
    =======================================
172
    =======================================
157
    [..]
173
    [..]
158
      (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
174
      (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
159
          @ref HAL_I2C_Mem_Write_IT()
175
          HAL_I2C_Mem_Write_IT()
160
      (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
176
      (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can
161
           add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
177
           add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
162
      (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
178
      (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
163
          @ref HAL_I2C_Mem_Read_IT()
179
          HAL_I2C_Mem_Read_IT()
164
      (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
180
      (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can
165
           add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
181
           add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
166
      (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
182
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
167
           add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
183
           add their own code by customization of function pointer HAL_I2C_ErrorCallback()
168
 
184
 
169
    *** DMA mode IO operation ***
185
    *** DMA mode IO operation ***
170
    ==============================
186
    ==============================
171
    [..]
187
    [..]
172
      (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
188
      (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
173
          @ref HAL_I2C_Master_Transmit_DMA()
189
          HAL_I2C_Master_Transmit_DMA()
174
      (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
190
      (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can
175
           add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
191
           add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
176
      (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
192
      (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
177
          @ref HAL_I2C_Master_Receive_DMA()
193
          HAL_I2C_Master_Receive_DMA()
178
      (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
194
      (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can
179
           add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
195
           add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
180
      (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
196
      (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
181
          @ref HAL_I2C_Slave_Transmit_DMA()
197
          HAL_I2C_Slave_Transmit_DMA()
182
      (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
198
      (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can
183
           add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
199
           add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
184
      (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
200
      (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
185
          @ref HAL_I2C_Slave_Receive_DMA()
201
          HAL_I2C_Slave_Receive_DMA()
186
      (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
202
      (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can
187
           add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
203
           add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
188
      (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
204
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
189
           add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
205
           add their own code by customization of function pointer HAL_I2C_ErrorCallback()
190
      (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
206
      (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
191
      (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
207
      (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can
192
           add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
208
           add their own code by customization of function pointer HAL_I2C_AbortCpltCallback()
193
      (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro.
209
      (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
194
           This action will inform Master to generate a Stop condition to discard the communication.
210
           This action will inform Master to generate a Stop condition to discard the communication.
195
 
211
 
196
    *** DMA mode IO MEM operation ***
212
    *** DMA mode IO MEM operation ***
197
    =================================
213
    =================================
198
    [..]
214
    [..]
199
      (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
215
      (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
200
          @ref HAL_I2C_Mem_Write_DMA()
216
          HAL_I2C_Mem_Write_DMA()
201
      (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
217
      (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can
202
           add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
218
           add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
203
      (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
219
      (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
204
          @ref HAL_I2C_Mem_Read_DMA()
220
          HAL_I2C_Mem_Read_DMA()
205
      (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
221
      (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can
206
           add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
222
           add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
207
      (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
223
      (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can
208
           add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
224
           add their own code by customization of function pointer HAL_I2C_ErrorCallback()
209
 
225
 
210
 
226
 
211
     *** I2C HAL driver macros list ***
227
     *** I2C HAL driver macros list ***
212
     ==================================
228
     ==================================
213
     [..]
229
     [..]
214
       Below the list of most used macros in I2C HAL driver.
230
       Below the list of most used macros in I2C HAL driver.
215
 
231
 
216
      (+) @ref __HAL_I2C_ENABLE: Enable the I2C peripheral
232
      (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
217
      (+) @ref __HAL_I2C_DISABLE: Disable the I2C peripheral
233
      (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
218
      (+) @ref __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
234
      (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
219
      (+) @ref __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
235
      (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
220
      (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
236
      (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
221
      (+) @ref __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
237
      (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
222
      (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
238
      (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
223
 
239
 
224
     *** Callback registration ***
240
     *** Callback registration ***
225
     =============================================
241
     =============================================
226
    [..]
242
    [..]
227
     The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
243
     The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
228
     allows the user to configure dynamically the driver callbacks.
244
     allows the user to configure dynamically the driver callbacks.
229
     Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()
245
     Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback()
230
     to register an interrupt callback.
246
     to register an interrupt callback.
231
    [..]
247
    [..]
232
     Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:
248
     Function HAL_I2C_RegisterCallback() allows to register following callbacks:
233
       (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
249
       (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
234
       (+) MasterRxCpltCallback : callback for Master reception end of transfer.
250
       (+) MasterRxCpltCallback : callback for Master reception end of transfer.
235
       (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
251
       (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
236
       (+) SlaveRxCpltCallback  : callback for Slave reception end of transfer.
252
       (+) SlaveRxCpltCallback  : callback for Slave reception end of transfer.
237
       (+) ListenCpltCallback   : callback for end of listen mode.
253
       (+) ListenCpltCallback   : callback for end of listen mode.
Line 242... Line 258...
242
       (+) MspInitCallback      : callback for Msp Init.
258
       (+) MspInitCallback      : callback for Msp Init.
243
       (+) MspDeInitCallback    : callback for Msp DeInit.
259
       (+) MspDeInitCallback    : callback for Msp DeInit.
244
     This function takes as parameters the HAL peripheral handle, the Callback ID
260
     This function takes as parameters the HAL peripheral handle, the Callback ID
245
     and a pointer to the user callback function.
261
     and a pointer to the user callback function.
246
    [..]
262
    [..]
247
     For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().
263
     For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCallback().
248
    [..]
264
    [..]
249
     Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default
265
     Use function HAL_I2C_UnRegisterCallback to reset a callback to the default
250
     weak function.
266
     weak function.
251
     @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
267
     HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
252
     and the Callback ID.
268
     and the Callback ID.
253
     This function allows to reset following callbacks:
269
     This function allows to reset following callbacks:
254
       (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
270
       (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
255
       (+) MasterRxCpltCallback : callback for Master reception end of transfer.
271
       (+) MasterRxCpltCallback : callback for Master reception end of transfer.
256
       (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
272
       (+) SlaveTxCpltCallback  : callback for Slave transmission end of transfer.
Line 261... Line 277...
261
       (+) ErrorCallback        : callback for error detection.
277
       (+) ErrorCallback        : callback for error detection.
262
       (+) AbortCpltCallback    : callback for abort completion process.
278
       (+) AbortCpltCallback    : callback for abort completion process.
263
       (+) MspInitCallback      : callback for Msp Init.
279
       (+) MspInitCallback      : callback for Msp Init.
264
       (+) MspDeInitCallback    : callback for Msp DeInit.
280
       (+) MspDeInitCallback    : callback for Msp DeInit.
265
    [..]
281
    [..]
266
     For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().
282
     For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback().
267
    [..]
283
    [..]
268
     By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET
284
     By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET
269
     all callbacks are set to the corresponding weak functions:
285
     all callbacks are set to the corresponding weak functions:
270
     examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().
286
     examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback().
271
     Exception done for MspInit and MspDeInit functions that are
287
     Exception done for MspInit and MspDeInit functions that are
272
     reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when
288
     reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when
273
     these callbacks are null (not registered beforehand).
289
     these callbacks are null (not registered beforehand).
274
     If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()
290
     If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit()
275
     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
291
     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
276
    [..]
292
    [..]
277
     Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
293
     Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only.
278
     Exception done MspInit/MspDeInit functions that can be registered/unregistered
294
     Exception done MspInit/MspDeInit functions that can be registered/unregistered
279
     in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
295
     in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state,
280
     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
296
     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
281
     Then, the user first registers the MspInit/MspDeInit user callbacks
297
     Then, the user first registers the MspInit/MspDeInit user callbacks
282
     using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()
298
     using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit()
283
     or @ref HAL_I2C_Init() function.
299
     or HAL_I2C_Init() function.
284
    [..]
300
    [..]
285
     When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
301
     When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
286
     not defined, the callback registration feature is not available and all callbacks
302
     not defined, the callback registration feature is not available and all callbacks
287
     are set to the corresponding weak functions.
303
     are set to the corresponding weak functions.
288
 
304
 
Line 334... Line 350...
334
#define I2C_TIMEOUT_TCR     (25U)          /*!< 25 ms */
350
#define I2C_TIMEOUT_TCR     (25U)          /*!< 25 ms */
335
#define I2C_TIMEOUT_TXIS    (25U)          /*!< 25 ms */
351
#define I2C_TIMEOUT_TXIS    (25U)          /*!< 25 ms */
336
#define I2C_TIMEOUT_FLAG    (25U)          /*!< 25 ms */
352
#define I2C_TIMEOUT_FLAG    (25U)          /*!< 25 ms */
337
 
353
 
338
#define MAX_NBYTE_SIZE      255U
354
#define MAX_NBYTE_SIZE      255U
339
#define SlaveAddr_SHIFT     7U
355
#define SLAVE_ADDR_SHIFT     7U
340
#define SlaveAddr_MSK       0x06U
356
#define SLAVE_ADDR_MSK       0x06U
341
 
357
 
342
/* Private define for @ref PreviousState usage */
358
/* Private define for @ref PreviousState usage */
343
#define I2C_STATE_MSK             ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits            */
359
#define I2C_STATE_MSK             ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | \
344
#define I2C_STATE_NONE            ((uint32_t)(HAL_I2C_MODE_NONE))                                                        /*!< Default Value                                          */
360
                                                         (uint32_t)HAL_I2C_STATE_BUSY_RX) & \
-
 
361
                                              (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY))))
-
 
362
/*!< Mask State define, keep only RX and TX bits */
-
 
363
#define I2C_STATE_NONE            ((uint32_t)(HAL_I2C_MODE_NONE))
-
 
364
/*!< Default Value */
345
#define I2C_STATE_MASTER_BUSY_TX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER))            /*!< Master Busy TX, combinaison of State LSB and Mode enum */
365
#define I2C_STATE_MASTER_BUSY_TX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \
-
 
366
                                              (uint32_t)HAL_I2C_MODE_MASTER))
-
 
367
/*!< Master Busy TX, combinaison of State LSB and Mode enum */
346
#define I2C_STATE_MASTER_BUSY_RX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER))            /*!< Master Busy RX, combinaison of State LSB and Mode enum */
368
#define I2C_STATE_MASTER_BUSY_RX  ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \
-
 
369
                                              (uint32_t)HAL_I2C_MODE_MASTER))
-
 
370
/*!< Master Busy RX, combinaison of State LSB and Mode enum */
347
#define I2C_STATE_SLAVE_BUSY_TX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE))             /*!< Slave Busy TX, combinaison of State LSB and Mode enum  */
371
#define I2C_STATE_SLAVE_BUSY_TX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \
-
 
372
                                              (uint32_t)HAL_I2C_MODE_SLAVE))
-
 
373
/*!< Slave Busy TX, combinaison of State LSB and Mode enum */
348
#define I2C_STATE_SLAVE_BUSY_RX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE))             /*!< Slave Busy RX, combinaison of State LSB and Mode enum  */
374
#define I2C_STATE_SLAVE_BUSY_RX   ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \
-
 
375
                                              (uint32_t)HAL_I2C_MODE_SLAVE))
-
 
376
/*!< Slave Busy RX, combinaison of State LSB and Mode enum  */
349
#define I2C_STATE_MEM_BUSY_TX     ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MEM))               /*!< Memory Busy TX, combinaison of State LSB and Mode enum */
377
#define I2C_STATE_MEM_BUSY_TX     ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \
-
 
378
                                              (uint32_t)HAL_I2C_MODE_MEM))
-
 
379
/*!< Memory Busy TX, combinaison of State LSB and Mode enum */
350
#define I2C_STATE_MEM_BUSY_RX     ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MEM))               /*!< Memory Busy RX, combinaison of State LSB and Mode enum */
380
#define I2C_STATE_MEM_BUSY_RX     ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \
-
 
381
                                              (uint32_t)HAL_I2C_MODE_MEM))
-
 
382
/*!< Memory Busy RX, combinaison of State LSB and Mode enum */
351
 
383
 
352
 
384
 
353
/* Private define to centralize the enable/disable of Interrupts */
385
/* Private define to centralize the enable/disable of Interrupts */
354
#define I2C_XFER_TX_IT          (0x00000001U)
386
#define I2C_XFER_TX_IT          (uint16_t)(0x0001U)   /*!< Bit field can be combinated with
-
 
387
                                                         @ref I2C_XFER_LISTEN_IT */
355
#define I2C_XFER_RX_IT          (0x00000002U)
388
#define I2C_XFER_RX_IT          (uint16_t)(0x0002U)   /*!< Bit field can be combinated with
-
 
389
                                                         @ref I2C_XFER_LISTEN_IT */
356
#define I2C_XFER_LISTEN_IT      (0x00000004U)
390
#define I2C_XFER_LISTEN_IT      (uint16_t)(0x8000U)   /*!< Bit field can be combinated with @ref I2C_XFER_TX_IT
-
 
391
                                                         and @ref I2C_XFER_RX_IT */
357
 
392
 
358
#define I2C_XFER_ERROR_IT       (0x00000011U)
393
#define I2C_XFER_ERROR_IT       (uint16_t)(0x0010U)   /*!< Bit definition to manage addition of global Error
-
 
394
                                                         and NACK treatment */
359
#define I2C_XFER_CPLT_IT        (0x00000012U)
395
#define I2C_XFER_CPLT_IT        (uint16_t)(0x0020U)   /*!< Bit definition to manage only STOP evenement */
360
#define I2C_XFER_RELOAD_IT      (0x00000012U)
396
#define I2C_XFER_RELOAD_IT      (uint16_t)(0x0040U)   /*!< Bit definition to manage only Reload of NBYTE */
361
 
397
 
362
/* Private define Sequential Transfer Options default/reset value */
398
/* Private define Sequential Transfer Options default/reset value */
363
#define I2C_NO_OPTION_FRAME     (0xFFFF0000U)
399
#define I2C_NO_OPTION_FRAME     (0xFFFF0000U)
364
/**
400
/**
365
  * @}
401
  * @}
Line 388... Line 424...
388
static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
424
static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
389
static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
425
static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
390
static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode);
426
static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode);
391
 
427
 
392
/* Private functions to handle IT transfer */
428
/* Private functions to handle IT transfer */
393
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
429
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
-
 
430
                                                uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout,
-
 
431
                                                uint32_t Tickstart);
394
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
432
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
-
 
433
                                               uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout,
-
 
434
                                               uint32_t Tickstart);
395
 
435
 
396
/* Private functions for I2C transfer IRQ handler */
436
/* Private functions for I2C transfer IRQ handler */
397
static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
437
static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
438
                                           uint32_t ITSources);
398
static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
439
static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
440
                                          uint32_t ITSources);
399
static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
441
static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
442
                                            uint32_t ITSources);
400
static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);
443
static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
444
                                           uint32_t ITSources);
401
 
445
 
402
/* Private functions to handle flags during polling transfer */
446
/* Private functions to handle flags during polling transfer */
403
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
447
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status,
-
 
448
                                                    uint32_t Timeout, uint32_t Tickstart);
404
static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
449
static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
450
                                                        uint32_t Tickstart);
405
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
451
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
452
                                                        uint32_t Tickstart);
406
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
453
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
454
                                                        uint32_t Tickstart);
407
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
455
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
456
                                                 uint32_t Tickstart);
408
 
457
 
409
/* Private functions to centralize the enable/disable of Interrupts */
458
/* Private functions to centralize the enable/disable of Interrupts */
410
static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
459
static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
411
static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
460
static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);
412
 
461
 
-
 
462
/* Private function to treat different error callback */
-
 
463
static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c);
-
 
464
 
413
/* Private function to flush TXDR register */
465
/* Private function to flush TXDR register */
414
static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c);
466
static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c);
415
 
467
 
416
/* Private function to handle  start, restart or stop a transfer */
468
/* Private function to handle  start, restart or stop a transfer */
417
static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
469
static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
-
 
470
                               uint32_t Request);
418
 
471
 
419
/* Private function to Convert Specific options */
472
/* Private function to Convert Specific options */
420
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
473
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
421
/**
474
/**
422
  * @}
475
  * @}
Line 427... Line 480...
427
/** @defgroup I2C_Exported_Functions I2C Exported Functions
480
/** @defgroup I2C_Exported_Functions I2C Exported Functions
428
  * @{
481
  * @{
429
  */
482
  */
430
 
483
 
431
/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
484
/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
432
 *  @brief    Initialization and Configuration functions
485
  *  @brief    Initialization and Configuration functions
433
 *
486
  *
434
@verbatim
487
@verbatim
435
 ===============================================================================
488
 ===============================================================================
436
              ##### Initialization and de-initialization functions #####
489
              ##### Initialization and de-initialization functions #####
437
 ===============================================================================
490
 ===============================================================================
438
    [..]  This subsection provides a set of functions allowing to initialize and
491
    [..]  This subsection provides a set of functions allowing to initialize and
Line 550... Line 603...
550
  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
603
  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
551
  /* Disable Own Address2 before set the Own Address2 configuration */
604
  /* Disable Own Address2 before set the Own Address2 configuration */
552
  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
605
  hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;
553
 
606
 
554
  /* Configure I2Cx: Dual mode and Own Address2 */
607
  /* Configure I2Cx: Dual mode and Own Address2 */
555
  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));
608
  hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \
-
 
609
                          (hi2c->Init.OwnAddress2Masks << 8));
556
 
610
 
557
  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
611
  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
558
  /* Configure I2Cx: Generalcall and NoStretch mode */
612
  /* Configure I2Cx: Generalcall and NoStretch mode */
559
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
613
  hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
560
 
614
 
Line 667... Line 721...
667
  *          @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
721
  *          @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
668
  *          @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
722
  *          @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
669
  * @param  pCallback pointer to the Callback function
723
  * @param  pCallback pointer to the Callback function
670
  * @retval HAL status
724
  * @retval HAL status
671
  */
725
  */
672
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)
726
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID,
-
 
727
                                           pI2C_CallbackTypeDef pCallback)
673
{
728
{
674
  HAL_StatusTypeDef status = HAL_OK;
729
  HAL_StatusTypeDef status = HAL_OK;
675
 
730
 
676
  if (pCallback == NULL)
731
  if (pCallback == NULL)
677
  {
732
  {
Line 972... Line 1027...
972
/**
1027
/**
973
  * @}
1028
  * @}
974
  */
1029
  */
975
 
1030
 
976
/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
1031
/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
977
 *  @brief   Data transfers functions
1032
  *  @brief   Data transfers functions
978
 *
1033
  *
979
@verbatim
1034
@verbatim
980
 ===============================================================================
1035
 ===============================================================================
981
                      ##### IO operation functions #####
1036
                      ##### IO operation functions #####
982
 ===============================================================================
1037
 ===============================================================================
983
    [..]
1038
    [..]
Line 1055... Line 1110...
1055
  * @param  pData Pointer to data buffer
1110
  * @param  pData Pointer to data buffer
1056
  * @param  Size Amount of data to be sent
1111
  * @param  Size Amount of data to be sent
1057
  * @param  Timeout Timeout duration
1112
  * @param  Timeout Timeout duration
1058
  * @retval HAL status
1113
  * @retval HAL status
1059
  */
1114
  */
1060
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1115
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
1116
                                          uint16_t Size, uint32_t Timeout)
1061
{
1117
{
1062
  uint32_t tickstart;
1118
  uint32_t tickstart;
1063
 
1119
 
1064
  if (hi2c->State == HAL_I2C_STATE_READY)
1120
  if (hi2c->State == HAL_I2C_STATE_READY)
1065
  {
1121
  {
Line 1086... Line 1142...
1086
    /* Send Slave Address */
1142
    /* Send Slave Address */
1087
    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1143
    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1088
    if (hi2c->XferCount > MAX_NBYTE_SIZE)
1144
    if (hi2c->XferCount > MAX_NBYTE_SIZE)
1089
    {
1145
    {
1090
      hi2c->XferSize = MAX_NBYTE_SIZE;
1146
      hi2c->XferSize = MAX_NBYTE_SIZE;
1091
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
1147
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
-
 
1148
                         I2C_GENERATE_START_WRITE);
1092
    }
1149
    }
1093
    else
1150
    else
1094
    {
1151
    {
1095
      hi2c->XferSize = hi2c->XferCount;
1152
      hi2c->XferSize = hi2c->XferCount;
1096
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
1153
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
1154
                         I2C_GENERATE_START_WRITE);
1097
    }
1155
    }
1098
 
1156
 
1099
    while (hi2c->XferCount > 0U)
1157
    while (hi2c->XferCount > 0U)
1100
    {
1158
    {
1101
      /* Wait until TXIS flag is set */
1159
      /* Wait until TXIS flag is set */
Line 1121... Line 1179...
1121
        }
1179
        }
1122
 
1180
 
1123
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
1181
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
1124
        {
1182
        {
1125
          hi2c->XferSize = MAX_NBYTE_SIZE;
1183
          hi2c->XferSize = MAX_NBYTE_SIZE;
1126
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
1184
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
-
 
1185
                             I2C_NO_STARTSTOP);
1127
        }
1186
        }
1128
        else
1187
        else
1129
        {
1188
        {
1130
          hi2c->XferSize = hi2c->XferCount;
1189
          hi2c->XferSize = hi2c->XferCount;
1131
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
1190
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
1191
                             I2C_NO_STARTSTOP);
1132
        }
1192
        }
1133
      }
1193
      }
1134
    }
1194
    }
1135
 
1195
 
1136
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
1196
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
Line 1169... Line 1229...
1169
  * @param  pData Pointer to data buffer
1229
  * @param  pData Pointer to data buffer
1170
  * @param  Size Amount of data to be sent
1230
  * @param  Size Amount of data to be sent
1171
  * @param  Timeout Timeout duration
1231
  * @param  Timeout Timeout duration
1172
  * @retval HAL status
1232
  * @retval HAL status
1173
  */
1233
  */
1174
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1234
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
1235
                                         uint16_t Size, uint32_t Timeout)
1175
{
1236
{
1176
  uint32_t tickstart;
1237
  uint32_t tickstart;
1177
 
1238
 
1178
  if (hi2c->State == HAL_I2C_STATE_READY)
1239
  if (hi2c->State == HAL_I2C_STATE_READY)
1179
  {
1240
  {
Line 1200... Line 1261...
1200
    /* Send Slave Address */
1261
    /* Send Slave Address */
1201
    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1262
    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
1202
    if (hi2c->XferCount > MAX_NBYTE_SIZE)
1263
    if (hi2c->XferCount > MAX_NBYTE_SIZE)
1203
    {
1264
    {
1204
      hi2c->XferSize = MAX_NBYTE_SIZE;
1265
      hi2c->XferSize = MAX_NBYTE_SIZE;
1205
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
1266
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
-
 
1267
                         I2C_GENERATE_START_READ);
1206
    }
1268
    }
1207
    else
1269
    else
1208
    {
1270
    {
1209
      hi2c->XferSize = hi2c->XferCount;
1271
      hi2c->XferSize = hi2c->XferCount;
1210
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
1272
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
1273
                         I2C_GENERATE_START_READ);
1211
    }
1274
    }
1212
 
1275
 
1213
    while (hi2c->XferCount > 0U)
1276
    while (hi2c->XferCount > 0U)
1214
    {
1277
    {
1215
      /* Wait until RXNE flag is set */
1278
      /* Wait until RXNE flag is set */
Line 1236... Line 1299...
1236
        }
1299
        }
1237
 
1300
 
1238
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
1301
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
1239
        {
1302
        {
1240
          hi2c->XferSize = MAX_NBYTE_SIZE;
1303
          hi2c->XferSize = MAX_NBYTE_SIZE;
1241
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
1304
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
-
 
1305
                             I2C_NO_STARTSTOP);
1242
        }
1306
        }
1243
        else
1307
        else
1244
        {
1308
        {
1245
          hi2c->XferSize = hi2c->XferCount;
1309
          hi2c->XferSize = hi2c->XferCount;
1246
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
1310
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
1311
                             I2C_NO_STARTSTOP);
1247
        }
1312
        }
1248
      }
1313
      }
1249
    }
1314
    }
1250
 
1315
 
1251
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
1316
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
Line 1282... Line 1347...
1282
  * @param  pData Pointer to data buffer
1347
  * @param  pData Pointer to data buffer
1283
  * @param  Size Amount of data to be sent
1348
  * @param  Size Amount of data to be sent
1284
  * @param  Timeout Timeout duration
1349
  * @param  Timeout Timeout duration
1285
  * @retval HAL status
1350
  * @retval HAL status
1286
  */
1351
  */
1287
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1352
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
-
 
1353
                                         uint32_t Timeout)
1288
{
1354
{
1289
  uint32_t tickstart;
1355
  uint32_t tickstart;
1290
 
1356
 
1291
  if (hi2c->State == HAL_I2C_STATE_READY)
1357
  if (hi2c->State == HAL_I2C_STATE_READY)
1292
  {
1358
  {
Line 1419... Line 1485...
1419
  * @param  pData Pointer to data buffer
1485
  * @param  pData Pointer to data buffer
1420
  * @param  Size Amount of data to be sent
1486
  * @param  Size Amount of data to be sent
1421
  * @param  Timeout Timeout duration
1487
  * @param  Timeout Timeout duration
1422
  * @retval HAL status
1488
  * @retval HAL status
1423
  */
1489
  */
1424
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1490
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
-
 
1491
                                        uint32_t Timeout)
1425
{
1492
{
1426
  uint32_t tickstart;
1493
  uint32_t tickstart;
1427
 
1494
 
1428
  if (hi2c->State == HAL_I2C_STATE_READY)
1495
  if (hi2c->State == HAL_I2C_STATE_READY)
1429
  {
1496
  {
Line 1545... Line 1612...
1545
  *         in datasheet must be shifted to the left before calling the interface
1612
  *         in datasheet must be shifted to the left before calling the interface
1546
  * @param  pData Pointer to data buffer
1613
  * @param  pData Pointer to data buffer
1547
  * @param  Size Amount of data to be sent
1614
  * @param  Size Amount of data to be sent
1548
  * @retval HAL status
1615
  * @retval HAL status
1549
  */
1616
  */
1550
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1617
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
1618
                                             uint16_t Size)
1551
{
1619
{
1552
  uint32_t xfermode;
1620
  uint32_t xfermode;
1553
 
1621
 
1554
  if (hi2c->State == HAL_I2C_STATE_READY)
1622
  if (hi2c->State == HAL_I2C_STATE_READY)
1555
  {
1623
  {
Line 1593... Line 1661...
1593
              to avoid the risk of I2C interrupt handle execution before current
1661
              to avoid the risk of I2C interrupt handle execution before current
1594
              process unlock */
1662
              process unlock */
1595
 
1663
 
1596
    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1664
    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1597
    /* possible to enable all of these */
1665
    /* possible to enable all of these */
1598
    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1666
    /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
1667
      I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1599
    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
1668
    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
1600
 
1669
 
1601
    return HAL_OK;
1670
    return HAL_OK;
1602
  }
1671
  }
1603
  else
1672
  else
Line 1614... Line 1683...
1614
  *         in datasheet must be shifted to the left before calling the interface
1683
  *         in datasheet must be shifted to the left before calling the interface
1615
  * @param  pData Pointer to data buffer
1684
  * @param  pData Pointer to data buffer
1616
  * @param  Size Amount of data to be sent
1685
  * @param  Size Amount of data to be sent
1617
  * @retval HAL status
1686
  * @retval HAL status
1618
  */
1687
  */
1619
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1688
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
1689
                                            uint16_t Size)
1620
{
1690
{
1621
  uint32_t xfermode;
1691
  uint32_t xfermode;
1622
 
1692
 
1623
  if (hi2c->State == HAL_I2C_STATE_READY)
1693
  if (hi2c->State == HAL_I2C_STATE_READY)
1624
  {
1694
  {
Line 1662... Line 1732...
1662
              to avoid the risk of I2C interrupt handle execution before current
1732
              to avoid the risk of I2C interrupt handle execution before current
1663
              process unlock */
1733
              process unlock */
1664
 
1734
 
1665
    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1735
    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1666
    /* possible to enable all of these */
1736
    /* possible to enable all of these */
1667
    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1737
    /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
1738
      I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1668
    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
1739
    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
1669
 
1740
 
1670
    return HAL_OK;
1741
    return HAL_OK;
1671
  }
1742
  }
1672
  else
1743
  else
Line 1711... Line 1782...
1711
              to avoid the risk of I2C interrupt handle execution before current
1782
              to avoid the risk of I2C interrupt handle execution before current
1712
              process unlock */
1783
              process unlock */
1713
 
1784
 
1714
    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1785
    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1715
    /* possible to enable all of these */
1786
    /* possible to enable all of these */
1716
    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1787
    /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
1788
      I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1717
    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);
1789
    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);
1718
 
1790
 
1719
    return HAL_OK;
1791
    return HAL_OK;
1720
  }
1792
  }
1721
  else
1793
  else
Line 1760... Line 1832...
1760
              to avoid the risk of I2C interrupt handle execution before current
1832
              to avoid the risk of I2C interrupt handle execution before current
1761
              process unlock */
1833
              process unlock */
1762
 
1834
 
1763
    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1835
    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
1764
    /* possible to enable all of these */
1836
    /* possible to enable all of these */
1765
    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1837
    /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
1838
      I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1766
    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);
1839
    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);
1767
 
1840
 
1768
    return HAL_OK;
1841
    return HAL_OK;
1769
  }
1842
  }
1770
  else
1843
  else
Line 1781... Line 1854...
1781
  *         in datasheet must be shifted to the left before calling the interface
1854
  *         in datasheet must be shifted to the left before calling the interface
1782
  * @param  pData Pointer to data buffer
1855
  * @param  pData Pointer to data buffer
1783
  * @param  Size Amount of data to be sent
1856
  * @param  Size Amount of data to be sent
1784
  * @retval HAL status
1857
  * @retval HAL status
1785
  */
1858
  */
1786
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
1859
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
1860
                                              uint16_t Size)
1787
{
1861
{
1788
  uint32_t xfermode;
1862
  uint32_t xfermode;
1789
  HAL_StatusTypeDef dmaxferstatus;
1863
  HAL_StatusTypeDef dmaxferstatus;
1790
 
1864
 
1791
  if (hi2c->State == HAL_I2C_STATE_READY)
1865
  if (hi2c->State == HAL_I2C_STATE_READY)
Line 1832... Line 1906...
1832
        /* Set the unused DMA callbacks to NULL */
1906
        /* Set the unused DMA callbacks to NULL */
1833
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
1907
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
1834
        hi2c->hdmatx->XferAbortCallback = NULL;
1908
        hi2c->hdmatx->XferAbortCallback = NULL;
1835
 
1909
 
1836
        /* Enable the DMA channel */
1910
        /* Enable the DMA channel */
1837
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
1911
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR,
-
 
1912
                                         hi2c->XferSize);
1838
      }
1913
      }
1839
      else
1914
      else
1840
      {
1915
      {
1841
        /* Update I2C state */
1916
        /* Update I2C state */
1842
        hi2c->State     = HAL_I2C_STATE_READY;
1917
        hi2c->State     = HAL_I2C_STATE_READY;
Line 1892... Line 1967...
1892
      /* Update Transfer ISR function pointer */
1967
      /* Update Transfer ISR function pointer */
1893
      hi2c->XferISR = I2C_Master_ISR_IT;
1968
      hi2c->XferISR = I2C_Master_ISR_IT;
1894
 
1969
 
1895
      /* Send Slave Address */
1970
      /* Send Slave Address */
1896
      /* Set NBYTES to write and generate START condition */
1971
      /* Set NBYTES to write and generate START condition */
1897
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
1972
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
1973
                         I2C_GENERATE_START_WRITE);
1898
 
1974
 
1899
      /* Process Unlocked */
1975
      /* Process Unlocked */
1900
      __HAL_UNLOCK(hi2c);
1976
      __HAL_UNLOCK(hi2c);
1901
 
1977
 
1902
      /* Note : The I2C interrupts must be enabled after unlocking current process
1978
      /* Note : The I2C interrupts must be enabled after unlocking current process
1903
                to avoid the risk of I2C interrupt handle execution before current
1979
                to avoid the risk of I2C interrupt handle execution before current
1904
                process unlock */
1980
                process unlock */
1905
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1981
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
1906
      /* possible to enable all of these */
1982
      /* possible to enable all of these */
1907
      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1983
      /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
1984
        I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
1908
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
1985
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
1909
    }
1986
    }
1910
 
1987
 
1911
    return HAL_OK;
1988
    return HAL_OK;
1912
  }
1989
  }
Line 1924... Line 2001...
1924
  *         in datasheet must be shifted to the left before calling the interface
2001
  *         in datasheet must be shifted to the left before calling the interface
1925
  * @param  pData Pointer to data buffer
2002
  * @param  pData Pointer to data buffer
1926
  * @param  Size Amount of data to be sent
2003
  * @param  Size Amount of data to be sent
1927
  * @retval HAL status
2004
  * @retval HAL status
1928
  */
2005
  */
1929
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
2006
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
2007
                                             uint16_t Size)
1930
{
2008
{
1931
  uint32_t xfermode;
2009
  uint32_t xfermode;
1932
  HAL_StatusTypeDef dmaxferstatus;
2010
  HAL_StatusTypeDef dmaxferstatus;
1933
 
2011
 
1934
  if (hi2c->State == HAL_I2C_STATE_READY)
2012
  if (hi2c->State == HAL_I2C_STATE_READY)
Line 1975... Line 2053...
1975
        /* Set the unused DMA callbacks to NULL */
2053
        /* Set the unused DMA callbacks to NULL */
1976
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
2054
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
1977
        hi2c->hdmarx->XferAbortCallback = NULL;
2055
        hi2c->hdmarx->XferAbortCallback = NULL;
1978
 
2056
 
1979
        /* Enable the DMA channel */
2057
        /* Enable the DMA channel */
1980
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
2058
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData,
-
 
2059
                                         hi2c->XferSize);
1981
      }
2060
      }
1982
      else
2061
      else
1983
      {
2062
      {
1984
        /* Update I2C state */
2063
        /* Update I2C state */
1985
        hi2c->State     = HAL_I2C_STATE_READY;
2064
        hi2c->State     = HAL_I2C_STATE_READY;
Line 2035... Line 2114...
2035
      /* Update Transfer ISR function pointer */
2114
      /* Update Transfer ISR function pointer */
2036
      hi2c->XferISR = I2C_Master_ISR_IT;
2115
      hi2c->XferISR = I2C_Master_ISR_IT;
2037
 
2116
 
2038
      /* Send Slave Address */
2117
      /* Send Slave Address */
2039
      /* Set NBYTES to read and generate START condition */
2118
      /* Set NBYTES to read and generate START condition */
2040
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
2119
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
2120
                         I2C_GENERATE_START_READ);
2041
 
2121
 
2042
      /* Process Unlocked */
2122
      /* Process Unlocked */
2043
      __HAL_UNLOCK(hi2c);
2123
      __HAL_UNLOCK(hi2c);
2044
 
2124
 
2045
      /* Note : The I2C interrupts must be enabled after unlocking current process
2125
      /* Note : The I2C interrupts must be enabled after unlocking current process
2046
                to avoid the risk of I2C interrupt handle execution before current
2126
                to avoid the risk of I2C interrupt handle execution before current
2047
                process unlock */
2127
                process unlock */
2048
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
2128
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
2049
      /* possible to enable all of these */
2129
      /* possible to enable all of these */
2050
      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2130
      /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
2131
        I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2051
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
2132
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
2052
    }
2133
    }
2053
 
2134
 
2054
    return HAL_OK;
2135
    return HAL_OK;
2055
  }
2136
  }
Line 2103... Line 2184...
2103
      /* Set the unused DMA callbacks to NULL */
2184
      /* Set the unused DMA callbacks to NULL */
2104
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
2185
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
2105
      hi2c->hdmatx->XferAbortCallback = NULL;
2186
      hi2c->hdmatx->XferAbortCallback = NULL;
2106
 
2187
 
2107
      /* Enable the DMA channel */
2188
      /* Enable the DMA channel */
2108
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
2189
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR,
-
 
2190
                                       hi2c->XferSize);
2109
    }
2191
    }
2110
    else
2192
    else
2111
    {
2193
    {
2112
      /* Update I2C state */
2194
      /* Update I2C state */
2113
      hi2c->State     = HAL_I2C_STATE_LISTEN;
2195
      hi2c->State     = HAL_I2C_STATE_LISTEN;
Line 2206... Line 2288...
2206
      /* Set the unused DMA callbacks to NULL */
2288
      /* Set the unused DMA callbacks to NULL */
2207
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
2289
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
2208
      hi2c->hdmarx->XferAbortCallback = NULL;
2290
      hi2c->hdmarx->XferAbortCallback = NULL;
2209
 
2291
 
2210
      /* Enable the DMA channel */
2292
      /* Enable the DMA channel */
2211
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
2293
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData,
-
 
2294
                                       hi2c->XferSize);
2212
    }
2295
    }
2213
    else
2296
    else
2214
    {
2297
    {
2215
      /* Update I2C state */
2298
      /* Update I2C state */
2216
      hi2c->State     = HAL_I2C_STATE_LISTEN;
2299
      hi2c->State     = HAL_I2C_STATE_LISTEN;
Line 2275... Line 2358...
2275
  * @param  pData Pointer to data buffer
2358
  * @param  pData Pointer to data buffer
2276
  * @param  Size Amount of data to be sent
2359
  * @param  Size Amount of data to be sent
2277
  * @param  Timeout Timeout duration
2360
  * @param  Timeout Timeout duration
2278
  * @retval HAL status
2361
  * @retval HAL status
2279
  */
2362
  */
2280
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
2363
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
-
 
2364
                                    uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
2281
{
2365
{
2282
  uint32_t tickstart;
2366
  uint32_t tickstart;
2283
 
2367
 
2284
  /* Check the parameters */
2368
  /* Check the parameters */
2285
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2369
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
Line 2358... Line 2442...
2358
        }
2442
        }
2359
 
2443
 
2360
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
2444
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
2361
        {
2445
        {
2362
          hi2c->XferSize = MAX_NBYTE_SIZE;
2446
          hi2c->XferSize = MAX_NBYTE_SIZE;
2363
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
2447
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
-
 
2448
                             I2C_NO_STARTSTOP);
2364
        }
2449
        }
2365
        else
2450
        else
2366
        {
2451
        {
2367
          hi2c->XferSize = hi2c->XferCount;
2452
          hi2c->XferSize = hi2c->XferCount;
2368
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
2453
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
2454
                             I2C_NO_STARTSTOP);
2369
        }
2455
        }
2370
      }
2456
      }
2371
 
2457
 
2372
    }
-
 
2373
    while (hi2c->XferCount > 0U);
2458
    } while (hi2c->XferCount > 0U);
2374
 
2459
 
2375
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
2460
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
2376
    /* Wait until STOPF flag is reset */
2461
    /* Wait until STOPF flag is reset */
2377
    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2462
    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2378
    {
2463
    {
Line 2410... Line 2495...
2410
  * @param  pData Pointer to data buffer
2495
  * @param  pData Pointer to data buffer
2411
  * @param  Size Amount of data to be sent
2496
  * @param  Size Amount of data to be sent
2412
  * @param  Timeout Timeout duration
2497
  * @param  Timeout Timeout duration
2413
  * @retval HAL status
2498
  * @retval HAL status
2414
  */
2499
  */
2415
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
2500
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
-
 
2501
                                   uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
2416
{
2502
{
2417
  uint32_t tickstart;
2503
  uint32_t tickstart;
2418
 
2504
 
2419
  /* Check the parameters */
2505
  /* Check the parameters */
2420
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
2506
  assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
Line 2458... Line 2544...
2458
    /* Send Slave Address */
2544
    /* Send Slave Address */
2459
    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
2545
    /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
2460
    if (hi2c->XferCount > MAX_NBYTE_SIZE)
2546
    if (hi2c->XferCount > MAX_NBYTE_SIZE)
2461
    {
2547
    {
2462
      hi2c->XferSize = MAX_NBYTE_SIZE;
2548
      hi2c->XferSize = MAX_NBYTE_SIZE;
2463
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);
2549
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
-
 
2550
                         I2C_GENERATE_START_READ);
2464
    }
2551
    }
2465
    else
2552
    else
2466
    {
2553
    {
2467
      hi2c->XferSize = hi2c->XferCount;
2554
      hi2c->XferSize = hi2c->XferCount;
2468
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
2555
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
2556
                         I2C_GENERATE_START_READ);
2469
    }
2557
    }
2470
 
2558
 
2471
    do
2559
    do
2472
    {
2560
    {
2473
      /* Wait until RXNE flag is set */
2561
      /* Wait until RXNE flag is set */
Line 2494... Line 2582...
2494
        }
2582
        }
2495
 
2583
 
2496
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
2584
        if (hi2c->XferCount > MAX_NBYTE_SIZE)
2497
        {
2585
        {
2498
          hi2c->XferSize = MAX_NBYTE_SIZE;
2586
          hi2c->XferSize = MAX_NBYTE_SIZE;
2499
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);
2587
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE,
-
 
2588
                             I2C_NO_STARTSTOP);
2500
        }
2589
        }
2501
        else
2590
        else
2502
        {
2591
        {
2503
          hi2c->XferSize = hi2c->XferCount;
2592
          hi2c->XferSize = hi2c->XferCount;
2504
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
2593
          I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
2594
                             I2C_NO_STARTSTOP);
2505
        }
2595
        }
2506
      }
2596
      }
2507
    }
-
 
2508
    while (hi2c->XferCount > 0U);
2597
    } while (hi2c->XferCount > 0U);
2509
 
2598
 
2510
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
2599
    /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
2511
    /* Wait until STOPF flag is reset */
2600
    /* Wait until STOPF flag is reset */
2512
    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2601
    if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
2513
    {
2602
    {
Line 2543... Line 2632...
2543
  * @param  MemAddSize Size of internal memory address
2632
  * @param  MemAddSize Size of internal memory address
2544
  * @param  pData Pointer to data buffer
2633
  * @param  pData Pointer to data buffer
2545
  * @param  Size Amount of data to be sent
2634
  * @param  Size Amount of data to be sent
2546
  * @retval HAL status
2635
  * @retval HAL status
2547
  */
2636
  */
2548
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2637
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
-
 
2638
                                       uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2549
{
2639
{
2550
  uint32_t tickstart;
2640
  uint32_t tickstart;
2551
  uint32_t xfermode;
2641
  uint32_t xfermode;
2552
 
2642
 
2553
  /* Check the parameters */
2643
  /* Check the parameters */
Line 2592... Line 2682...
2592
      hi2c->XferSize = hi2c->XferCount;
2682
      hi2c->XferSize = hi2c->XferCount;
2593
      xfermode = I2C_AUTOEND_MODE;
2683
      xfermode = I2C_AUTOEND_MODE;
2594
    }
2684
    }
2595
 
2685
 
2596
    /* Send Slave Address and Memory Address */
2686
    /* Send Slave Address and Memory Address */
2597
    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
2687
    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart)
-
 
2688
        != HAL_OK)
2598
    {
2689
    {
2599
      /* Process Unlocked */
2690
      /* Process Unlocked */
2600
      __HAL_UNLOCK(hi2c);
2691
      __HAL_UNLOCK(hi2c);
2601
      return HAL_ERROR;
2692
      return HAL_ERROR;
2602
    }
2693
    }
Line 2611... Line 2702...
2611
              to avoid the risk of I2C interrupt handle execution before current
2702
              to avoid the risk of I2C interrupt handle execution before current
2612
              process unlock */
2703
              process unlock */
2613
 
2704
 
2614
    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
2705
    /* Enable ERR, TC, STOP, NACK, TXI interrupt */
2615
    /* possible to enable all of these */
2706
    /* possible to enable all of these */
2616
    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2707
    /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
2708
      I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2617
    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
2709
    I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
2618
 
2710
 
2619
    return HAL_OK;
2711
    return HAL_OK;
2620
  }
2712
  }
2621
  else
2713
  else
Line 2634... Line 2726...
2634
  * @param  MemAddSize Size of internal memory address
2726
  * @param  MemAddSize Size of internal memory address
2635
  * @param  pData Pointer to data buffer
2727
  * @param  pData Pointer to data buffer
2636
  * @param  Size Amount of data to be sent
2728
  * @param  Size Amount of data to be sent
2637
  * @retval HAL status
2729
  * @retval HAL status
2638
  */
2730
  */
2639
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2731
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
-
 
2732
                                      uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2640
{
2733
{
2641
  uint32_t tickstart;
2734
  uint32_t tickstart;
2642
  uint32_t xfermode;
2735
  uint32_t xfermode;
2643
 
2736
 
2644
  /* Check the parameters */
2737
  /* Check the parameters */
Line 2702... Line 2795...
2702
              to avoid the risk of I2C interrupt handle execution before current
2795
              to avoid the risk of I2C interrupt handle execution before current
2703
              process unlock */
2796
              process unlock */
2704
 
2797
 
2705
    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
2798
    /* Enable ERR, TC, STOP, NACK, RXI interrupt */
2706
    /* possible to enable all of these */
2799
    /* possible to enable all of these */
2707
    /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2800
    /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
2801
      I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
2708
    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
2802
    I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);
2709
 
2803
 
2710
    return HAL_OK;
2804
    return HAL_OK;
2711
  }
2805
  }
2712
  else
2806
  else
Line 2724... Line 2818...
2724
  * @param  MemAddSize Size of internal memory address
2818
  * @param  MemAddSize Size of internal memory address
2725
  * @param  pData Pointer to data buffer
2819
  * @param  pData Pointer to data buffer
2726
  * @param  Size Amount of data to be sent
2820
  * @param  Size Amount of data to be sent
2727
  * @retval HAL status
2821
  * @retval HAL status
2728
  */
2822
  */
2729
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2823
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
-
 
2824
                                        uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2730
{
2825
{
2731
  uint32_t tickstart;
2826
  uint32_t tickstart;
2732
  uint32_t xfermode;
2827
  uint32_t xfermode;
2733
  HAL_StatusTypeDef dmaxferstatus;
2828
  HAL_StatusTypeDef dmaxferstatus;
2734
 
2829
 
Line 2774... Line 2869...
2774
      hi2c->XferSize = hi2c->XferCount;
2869
      hi2c->XferSize = hi2c->XferCount;
2775
      xfermode = I2C_AUTOEND_MODE;
2870
      xfermode = I2C_AUTOEND_MODE;
2776
    }
2871
    }
2777
 
2872
 
2778
    /* Send Slave Address and Memory Address */
2873
    /* Send Slave Address and Memory Address */
2779
    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
2874
    if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart)
-
 
2875
        != HAL_OK)
2780
    {
2876
    {
2781
      /* Process Unlocked */
2877
      /* Process Unlocked */
2782
      __HAL_UNLOCK(hi2c);
2878
      __HAL_UNLOCK(hi2c);
2783
      return HAL_ERROR;
2879
      return HAL_ERROR;
2784
    }
2880
    }
Line 2795... Line 2891...
2795
      /* Set the unused DMA callbacks to NULL */
2891
      /* Set the unused DMA callbacks to NULL */
2796
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
2892
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
2797
      hi2c->hdmatx->XferAbortCallback = NULL;
2893
      hi2c->hdmatx->XferAbortCallback = NULL;
2798
 
2894
 
2799
      /* Enable the DMA channel */
2895
      /* Enable the DMA channel */
2800
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
2896
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR,
-
 
2897
                                       hi2c->XferSize);
2801
    }
2898
    }
2802
    else
2899
    else
2803
    {
2900
    {
2804
      /* Update I2C state */
2901
      /* Update I2C state */
2805
      hi2c->State     = HAL_I2C_STATE_READY;
2902
      hi2c->State     = HAL_I2C_STATE_READY;
Line 2868... Line 2965...
2868
  * @param  MemAddSize Size of internal memory address
2965
  * @param  MemAddSize Size of internal memory address
2869
  * @param  pData Pointer to data buffer
2966
  * @param  pData Pointer to data buffer
2870
  * @param  Size Amount of data to be read
2967
  * @param  Size Amount of data to be read
2871
  * @retval HAL status
2968
  * @retval HAL status
2872
  */
2969
  */
2873
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2970
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress,
-
 
2971
                                       uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
2874
{
2972
{
2875
  uint32_t tickstart;
2973
  uint32_t tickstart;
2876
  uint32_t xfermode;
2974
  uint32_t xfermode;
2877
  HAL_StatusTypeDef dmaxferstatus;
2975
  HAL_StatusTypeDef dmaxferstatus;
2878
 
2976
 
Line 2938... Line 3036...
2938
      /* Set the unused DMA callbacks to NULL */
3036
      /* Set the unused DMA callbacks to NULL */
2939
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
3037
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
2940
      hi2c->hdmarx->XferAbortCallback = NULL;
3038
      hi2c->hdmarx->XferAbortCallback = NULL;
2941
 
3039
 
2942
      /* Enable the DMA channel */
3040
      /* Enable the DMA channel */
2943
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
3041
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData,
-
 
3042
                                       hi2c->XferSize);
2944
    }
3043
    }
2945
    else
3044
    else
2946
    {
3045
    {
2947
      /* Update I2C state */
3046
      /* Update I2C state */
2948
      hi2c->State     = HAL_I2C_STATE_READY;
3047
      hi2c->State     = HAL_I2C_STATE_READY;
Line 3009... Line 3108...
3009
  *         in datasheet must be shifted to the left before calling the interface
3108
  *         in datasheet must be shifted to the left before calling the interface
3010
  * @param  Trials Number of trials
3109
  * @param  Trials Number of trials
3011
  * @param  Timeout Timeout duration
3110
  * @param  Timeout Timeout duration
3012
  * @retval HAL status
3111
  * @retval HAL status
3013
  */
3112
  */
3014
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
3113
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials,
-
 
3114
                                        uint32_t Timeout)
3015
{
3115
{
3016
  uint32_t tickstart;
3116
  uint32_t tickstart;
3017
 
3117
 
3018
  __IO uint32_t I2C_Trials = 0UL;
3118
  __IO uint32_t I2C_Trials = 0UL;
3019
 
3119
 
Line 3119... Line 3219...
3119
        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
3219
        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
3120
      }
3220
      }
3121
 
3221
 
3122
      /* Increment Trials */
3222
      /* Increment Trials */
3123
      I2C_Trials++;
3223
      I2C_Trials++;
3124
    }
-
 
3125
    while (I2C_Trials < Trials);
3224
    } while (I2C_Trials < Trials);
3126
 
3225
 
3127
    /* Update I2C state */
3226
    /* Update I2C state */
3128
    hi2c->State = HAL_I2C_STATE_READY;
3227
    hi2c->State = HAL_I2C_STATE_READY;
3129
 
3228
 
3130
    /* Update I2C error code */
3229
    /* Update I2C error code */
Line 3151... Line 3250...
3151
  * @param  pData Pointer to data buffer
3250
  * @param  pData Pointer to data buffer
3152
  * @param  Size Amount of data to be sent
3251
  * @param  Size Amount of data to be sent
3153
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3252
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3154
  * @retval HAL status
3253
  * @retval HAL status
3155
  */
3254
  */
3156
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
3255
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
3256
                                                 uint16_t Size, uint32_t XferOptions)
3157
{
3257
{
3158
  uint32_t xfermode;
3258
  uint32_t xfermode;
3159
  uint32_t xferrequest = I2C_GENERATE_START_WRITE;
3259
  uint32_t xferrequest = I2C_GENERATE_START_WRITE;
3160
 
3260
 
3161
  /* Check the parameters */
3261
  /* Check the parameters */
Line 3186... Line 3286...
3186
    {
3286
    {
3187
      hi2c->XferSize = hi2c->XferCount;
3287
      hi2c->XferSize = hi2c->XferCount;
3188
      xfermode = hi2c->XferOptions;
3288
      xfermode = hi2c->XferOptions;
3189
    }
3289
    }
3190
 
3290
 
3191
    /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
3291
    /* If transfer direction not change and there is no request to start another frame,
-
 
3292
       do not generate Restart Condition */
3192
    /* Mean Previous state is same as current state */
3293
    /* Mean Previous state is same as current state */
-
 
3294
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \
3193
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3295
        (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3194
    {
3296
    {
3195
      xferrequest = I2C_NO_STARTSTOP;
3297
      xferrequest = I2C_NO_STARTSTOP;
3196
    }
3298
    }
3197
    else
3299
    else
3198
    {
3300
    {
3199
      /* Convert OTHER_xxx XferOptions if any */
3301
      /* Convert OTHER_xxx XferOptions if any */
3200
      I2C_ConvertOtherXferOptions(hi2c);
3302
      I2C_ConvertOtherXferOptions(hi2c);
3201
 
3303
 
3202
      /* Update xfermode accordingly if no reload is necessary */
3304
      /* Update xfermode accordingly if no reload is necessary */
3203
      if (hi2c->XferCount < MAX_NBYTE_SIZE)
3305
      if (hi2c->XferCount <= MAX_NBYTE_SIZE)
3204
      {
3306
      {
3205
        xfermode = hi2c->XferOptions;
3307
        xfermode = hi2c->XferOptions;
3206
      }
3308
      }
3207
    }
3309
    }
3208
 
3310
 
Line 3235... Line 3337...
3235
  * @param  pData Pointer to data buffer
3337
  * @param  pData Pointer to data buffer
3236
  * @param  Size Amount of data to be sent
3338
  * @param  Size Amount of data to be sent
3237
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3339
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3238
  * @retval HAL status
3340
  * @retval HAL status
3239
  */
3341
  */
3240
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
3342
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
3343
                                                  uint16_t Size, uint32_t XferOptions)
3241
{
3344
{
3242
  uint32_t xfermode;
3345
  uint32_t xfermode;
3243
  uint32_t xferrequest = I2C_GENERATE_START_WRITE;
3346
  uint32_t xferrequest = I2C_GENERATE_START_WRITE;
3244
  HAL_StatusTypeDef dmaxferstatus;
3347
  HAL_StatusTypeDef dmaxferstatus;
3245
 
3348
 
Line 3271... Line 3374...
3271
    {
3374
    {
3272
      hi2c->XferSize = hi2c->XferCount;
3375
      hi2c->XferSize = hi2c->XferCount;
3273
      xfermode = hi2c->XferOptions;
3376
      xfermode = hi2c->XferOptions;
3274
    }
3377
    }
3275
 
3378
 
3276
    /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
3379
    /* If transfer direction not change and there is no request to start another frame,
-
 
3380
       do not generate Restart Condition */
3277
    /* Mean Previous state is same as current state */
3381
    /* Mean Previous state is same as current state */
-
 
3382
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \
3278
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3383
        (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3279
    {
3384
    {
3280
      xferrequest = I2C_NO_STARTSTOP;
3385
      xferrequest = I2C_NO_STARTSTOP;
3281
    }
3386
    }
3282
    else
3387
    else
3283
    {
3388
    {
3284
      /* Convert OTHER_xxx XferOptions if any */
3389
      /* Convert OTHER_xxx XferOptions if any */
3285
      I2C_ConvertOtherXferOptions(hi2c);
3390
      I2C_ConvertOtherXferOptions(hi2c);
3286
 
3391
 
3287
      /* Update xfermode accordingly if no reload is necessary */
3392
      /* Update xfermode accordingly if no reload is necessary */
3288
      if (hi2c->XferCount < MAX_NBYTE_SIZE)
3393
      if (hi2c->XferCount <= MAX_NBYTE_SIZE)
3289
      {
3394
      {
3290
        xfermode = hi2c->XferOptions;
3395
        xfermode = hi2c->XferOptions;
3291
      }
3396
      }
3292
    }
3397
    }
3293
 
3398
 
Line 3304... Line 3409...
3304
        /* Set the unused DMA callbacks to NULL */
3409
        /* Set the unused DMA callbacks to NULL */
3305
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
3410
        hi2c->hdmatx->XferHalfCpltCallback = NULL;
3306
        hi2c->hdmatx->XferAbortCallback = NULL;
3411
        hi2c->hdmatx->XferAbortCallback = NULL;
3307
 
3412
 
3308
        /* Enable the DMA channel */
3413
        /* Enable the DMA channel */
3309
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
3414
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR,
-
 
3415
                                         hi2c->XferSize);
3310
      }
3416
      }
3311
      else
3417
      else
3312
      {
3418
      {
3313
        /* Update I2C state */
3419
        /* Update I2C state */
3314
        hi2c->State     = HAL_I2C_STATE_READY;
3420
        hi2c->State     = HAL_I2C_STATE_READY;
Line 3363... Line 3469...
3363
      /* Update Transfer ISR function pointer */
3469
      /* Update Transfer ISR function pointer */
3364
      hi2c->XferISR = I2C_Master_ISR_IT;
3470
      hi2c->XferISR = I2C_Master_ISR_IT;
3365
 
3471
 
3366
      /* Send Slave Address */
3472
      /* Send Slave Address */
3367
      /* Set NBYTES to write and generate START condition */
3473
      /* Set NBYTES to write and generate START condition */
3368
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);
3474
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
3475
                         I2C_GENERATE_START_WRITE);
3369
 
3476
 
3370
      /* Process Unlocked */
3477
      /* Process Unlocked */
3371
      __HAL_UNLOCK(hi2c);
3478
      __HAL_UNLOCK(hi2c);
3372
 
3479
 
3373
      /* Note : The I2C interrupts must be enabled after unlocking current process
3480
      /* Note : The I2C interrupts must be enabled after unlocking current process
3374
                to avoid the risk of I2C interrupt handle execution before current
3481
                to avoid the risk of I2C interrupt handle execution before current
3375
                process unlock */
3482
                process unlock */
3376
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
3483
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
3377
      /* possible to enable all of these */
3484
      /* possible to enable all of these */
3378
      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
3485
      /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
3486
        I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
3379
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
3487
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
3380
    }
3488
    }
3381
 
3489
 
3382
    return HAL_OK;
3490
    return HAL_OK;
3383
  }
3491
  }
Line 3397... Line 3505...
3397
  * @param  pData Pointer to data buffer
3505
  * @param  pData Pointer to data buffer
3398
  * @param  Size Amount of data to be sent
3506
  * @param  Size Amount of data to be sent
3399
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3507
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3400
  * @retval HAL status
3508
  * @retval HAL status
3401
  */
3509
  */
3402
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
3510
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
3511
                                                uint16_t Size, uint32_t XferOptions)
3403
{
3512
{
3404
  uint32_t xfermode;
3513
  uint32_t xfermode;
3405
  uint32_t xferrequest = I2C_GENERATE_START_READ;
3514
  uint32_t xferrequest = I2C_GENERATE_START_READ;
3406
 
3515
 
3407
  /* Check the parameters */
3516
  /* Check the parameters */
Line 3432... Line 3541...
3432
    {
3541
    {
3433
      hi2c->XferSize = hi2c->XferCount;
3542
      hi2c->XferSize = hi2c->XferCount;
3434
      xfermode = hi2c->XferOptions;
3543
      xfermode = hi2c->XferOptions;
3435
    }
3544
    }
3436
 
3545
 
3437
    /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
3546
    /* If transfer direction not change and there is no request to start another frame,
-
 
3547
       do not generate Restart Condition */
3438
    /* Mean Previous state is same as current state */
3548
    /* Mean Previous state is same as current state */
-
 
3549
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \
3439
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3550
        (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3440
    {
3551
    {
3441
      xferrequest = I2C_NO_STARTSTOP;
3552
      xferrequest = I2C_NO_STARTSTOP;
3442
    }
3553
    }
3443
    else
3554
    else
3444
    {
3555
    {
3445
      /* Convert OTHER_xxx XferOptions if any */
3556
      /* Convert OTHER_xxx XferOptions if any */
3446
      I2C_ConvertOtherXferOptions(hi2c);
3557
      I2C_ConvertOtherXferOptions(hi2c);
3447
 
3558
 
3448
      /* Update xfermode accordingly if no reload is necessary */
3559
      /* Update xfermode accordingly if no reload is necessary */
3449
      if (hi2c->XferCount < MAX_NBYTE_SIZE)
3560
      if (hi2c->XferCount <= MAX_NBYTE_SIZE)
3450
      {
3561
      {
3451
        xfermode = hi2c->XferOptions;
3562
        xfermode = hi2c->XferOptions;
3452
      }
3563
      }
3453
    }
3564
    }
3454
 
3565
 
Line 3481... Line 3592...
3481
  * @param  pData Pointer to data buffer
3592
  * @param  pData Pointer to data buffer
3482
  * @param  Size Amount of data to be sent
3593
  * @param  Size Amount of data to be sent
3483
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3594
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3484
  * @retval HAL status
3595
  * @retval HAL status
3485
  */
3596
  */
3486
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
3597
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData,
-
 
3598
                                                 uint16_t Size, uint32_t XferOptions)
3487
{
3599
{
3488
  uint32_t xfermode;
3600
  uint32_t xfermode;
3489
  uint32_t xferrequest = I2C_GENERATE_START_READ;
3601
  uint32_t xferrequest = I2C_GENERATE_START_READ;
3490
  HAL_StatusTypeDef dmaxferstatus;
3602
  HAL_StatusTypeDef dmaxferstatus;
3491
 
3603
 
Line 3517... Line 3629...
3517
    {
3629
    {
3518
      hi2c->XferSize = hi2c->XferCount;
3630
      hi2c->XferSize = hi2c->XferCount;
3519
      xfermode = hi2c->XferOptions;
3631
      xfermode = hi2c->XferOptions;
3520
    }
3632
    }
3521
 
3633
 
3522
    /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
3634
    /* If transfer direction not change and there is no request to start another frame,
-
 
3635
       do not generate Restart Condition */
3523
    /* Mean Previous state is same as current state */
3636
    /* Mean Previous state is same as current state */
-
 
3637
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \
3524
    if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3638
        (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
3525
    {
3639
    {
3526
      xferrequest = I2C_NO_STARTSTOP;
3640
      xferrequest = I2C_NO_STARTSTOP;
3527
    }
3641
    }
3528
    else
3642
    else
3529
    {
3643
    {
3530
      /* Convert OTHER_xxx XferOptions if any */
3644
      /* Convert OTHER_xxx XferOptions if any */
3531
      I2C_ConvertOtherXferOptions(hi2c);
3645
      I2C_ConvertOtherXferOptions(hi2c);
3532
 
3646
 
3533
      /* Update xfermode accordingly if no reload is necessary */
3647
      /* Update xfermode accordingly if no reload is necessary */
3534
      if (hi2c->XferCount < MAX_NBYTE_SIZE)
3648
      if (hi2c->XferCount <= MAX_NBYTE_SIZE)
3535
      {
3649
      {
3536
        xfermode = hi2c->XferOptions;
3650
        xfermode = hi2c->XferOptions;
3537
      }
3651
      }
3538
    }
3652
    }
3539
 
3653
 
Line 3550... Line 3664...
3550
        /* Set the unused DMA callbacks to NULL */
3664
        /* Set the unused DMA callbacks to NULL */
3551
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
3665
        hi2c->hdmarx->XferHalfCpltCallback = NULL;
3552
        hi2c->hdmarx->XferAbortCallback = NULL;
3666
        hi2c->hdmarx->XferAbortCallback = NULL;
3553
 
3667
 
3554
        /* Enable the DMA channel */
3668
        /* Enable the DMA channel */
3555
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
3669
        dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData,
-
 
3670
                                         hi2c->XferSize);
3556
      }
3671
      }
3557
      else
3672
      else
3558
      {
3673
      {
3559
        /* Update I2C state */
3674
        /* Update I2C state */
3560
        hi2c->State     = HAL_I2C_STATE_READY;
3675
        hi2c->State     = HAL_I2C_STATE_READY;
Line 3609... Line 3724...
3609
      /* Update Transfer ISR function pointer */
3724
      /* Update Transfer ISR function pointer */
3610
      hi2c->XferISR = I2C_Master_ISR_IT;
3725
      hi2c->XferISR = I2C_Master_ISR_IT;
3611
 
3726
 
3612
      /* Send Slave Address */
3727
      /* Send Slave Address */
3613
      /* Set NBYTES to read and generate START condition */
3728
      /* Set NBYTES to read and generate START condition */
3614
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);
3729
      I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE,
-
 
3730
                         I2C_GENERATE_START_READ);
3615
 
3731
 
3616
      /* Process Unlocked */
3732
      /* Process Unlocked */
3617
      __HAL_UNLOCK(hi2c);
3733
      __HAL_UNLOCK(hi2c);
3618
 
3734
 
3619
      /* Note : The I2C interrupts must be enabled after unlocking current process
3735
      /* Note : The I2C interrupts must be enabled after unlocking current process
3620
                to avoid the risk of I2C interrupt handle execution before current
3736
                to avoid the risk of I2C interrupt handle execution before current
3621
                process unlock */
3737
                process unlock */
3622
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
3738
      /* Enable ERR, TC, STOP, NACK, TXI interrupt */
3623
      /* possible to enable all of these */
3739
      /* possible to enable all of these */
3624
      /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
3740
      /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI |
-
 
3741
        I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */
3625
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
3742
      I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
3626
    }
3743
    }
3627
 
3744
 
3628
    return HAL_OK;
3745
    return HAL_OK;
3629
  }
3746
  }
Line 3641... Line 3758...
3641
  * @param  pData Pointer to data buffer
3758
  * @param  pData Pointer to data buffer
3642
  * @param  Size Amount of data to be sent
3759
  * @param  Size Amount of data to be sent
3643
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3760
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3644
  * @retval HAL status
3761
  * @retval HAL status
3645
  */
3762
  */
3646
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
3763
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
-
 
3764
                                                uint32_t XferOptions)
3647
{
3765
{
3648
  /* Check the parameters */
3766
  /* Check the parameters */
3649
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
3767
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
3650
 
3768
 
3651
  if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
3769
  if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
Line 3736... Line 3854...
3736
  * @param  pData Pointer to data buffer
3854
  * @param  pData Pointer to data buffer
3737
  * @param  Size Amount of data to be sent
3855
  * @param  Size Amount of data to be sent
3738
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3856
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3739
  * @retval HAL status
3857
  * @retval HAL status
3740
  */
3858
  */
3741
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
3859
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
-
 
3860
                                                 uint32_t XferOptions)
3742
{
3861
{
3743
  HAL_StatusTypeDef dmaxferstatus;
3862
  HAL_StatusTypeDef dmaxferstatus;
3744
 
3863
 
3745
  /* Check the parameters */
3864
  /* Check the parameters */
3746
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
3865
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
Line 3838... Line 3957...
3838
      /* Set the unused DMA callbacks to NULL */
3957
      /* Set the unused DMA callbacks to NULL */
3839
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
3958
      hi2c->hdmatx->XferHalfCpltCallback = NULL;
3840
      hi2c->hdmatx->XferAbortCallback = NULL;
3959
      hi2c->hdmatx->XferAbortCallback = NULL;
3841
 
3960
 
3842
      /* Enable the DMA channel */
3961
      /* Enable the DMA channel */
3843
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);
3962
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR,
-
 
3963
                                       hi2c->XferSize);
3844
    }
3964
    }
3845
    else
3965
    else
3846
    {
3966
    {
3847
      /* Update I2C state */
3967
      /* Update I2C state */
3848
      hi2c->State     = HAL_I2C_STATE_LISTEN;
3968
      hi2c->State     = HAL_I2C_STATE_LISTEN;
Line 3915... Line 4035...
3915
  * @param  pData Pointer to data buffer
4035
  * @param  pData Pointer to data buffer
3916
  * @param  Size Amount of data to be sent
4036
  * @param  Size Amount of data to be sent
3917
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
4037
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
3918
  * @retval HAL status
4038
  * @retval HAL status
3919
  */
4039
  */
3920
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
4040
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
-
 
4041
                                               uint32_t XferOptions)
3921
{
4042
{
3922
  /* Check the parameters */
4043
  /* Check the parameters */
3923
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
4044
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
3924
 
4045
 
3925
  if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
4046
  if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
Line 4010... Line 4131...
4010
  * @param  pData Pointer to data buffer
4131
  * @param  pData Pointer to data buffer
4011
  * @param  Size Amount of data to be sent
4132
  * @param  Size Amount of data to be sent
4012
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
4133
  * @param  XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS
4013
  * @retval HAL status
4134
  * @retval HAL status
4014
  */
4135
  */
4015
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
4136
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size,
-
 
4137
                                                uint32_t XferOptions)
4016
{
4138
{
4017
  HAL_StatusTypeDef dmaxferstatus;
4139
  HAL_StatusTypeDef dmaxferstatus;
4018
 
4140
 
4019
  /* Check the parameters */
4141
  /* Check the parameters */
4020
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
4142
  assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
Line 4112... Line 4234...
4112
      /* Set the unused DMA callbacks to NULL */
4234
      /* Set the unused DMA callbacks to NULL */
4113
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
4235
      hi2c->hdmarx->XferHalfCpltCallback = NULL;
4114
      hi2c->hdmarx->XferAbortCallback = NULL;
4236
      hi2c->hdmarx->XferAbortCallback = NULL;
4115
 
4237
 
4116
      /* Enable the DMA channel */
4238
      /* Enable the DMA channel */
4117
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);
4239
      dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR,
-
 
4240
                                       (uint32_t)pData, hi2c->XferSize);
4118
    }
4241
    }
4119
    else
4242
    else
4120
    {
4243
    {
4121
      /* Update I2C state */
4244
      /* Update I2C state */
4122
      hi2c->State     = HAL_I2C_STATE_LISTEN;
4245
      hi2c->State     = HAL_I2C_STATE_LISTEN;
Line 4249... Line 4372...
4249
  if (hi2c->Mode == HAL_I2C_MODE_MASTER)
4372
  if (hi2c->Mode == HAL_I2C_MODE_MASTER)
4250
  {
4373
  {
4251
    /* Process Locked */
4374
    /* Process Locked */
4252
    __HAL_LOCK(hi2c);
4375
    __HAL_LOCK(hi2c);
4253
 
4376
 
4254
    /* Disable Interrupts */
4377
    /* Disable Interrupts and Store Previous state */
-
 
4378
    if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
-
 
4379
    {
4255
    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
4380
      I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
 
4381
      hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
-
 
4382
    }
-
 
4383
    else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-
 
4384
    {
4256
    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
4385
      I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-
 
4386
      hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-
 
4387
    }
-
 
4388
    else
-
 
4389
    {
-
 
4390
      /* Do nothing */
-
 
4391
    }
4257
 
4392
 
4258
    /* Set State at HAL_I2C_STATE_ABORT */
4393
    /* Set State at HAL_I2C_STATE_ABORT */
4259
    hi2c->State = HAL_I2C_STATE_ABORT;
4394
    hi2c->State = HAL_I2C_STATE_ABORT;
4260
 
4395
 
4261
    /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */
4396
    /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */
Line 4283... Line 4418...
4283
/**
4418
/**
4284
  * @}
4419
  * @}
4285
  */
4420
  */
4286
 
4421
 
4287
/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
4422
/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
4288
 * @{
4423
  * @{
4289
 */
4424
  */
4290
 
4425
 
4291
/**
4426
/**
4292
  * @brief  This function handles I2C event interrupt request.
4427
  * @brief  This function handles I2C event interrupt request.
4293
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
4428
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
4294
  *                the configuration information for the specified I2C.
4429
  *                the configuration information for the specified I2C.
Line 4318... Line 4453...
4318
  uint32_t itflags   = READ_REG(hi2c->Instance->ISR);
4453
  uint32_t itflags   = READ_REG(hi2c->Instance->ISR);
4319
  uint32_t itsources = READ_REG(hi2c->Instance->CR1);
4454
  uint32_t itsources = READ_REG(hi2c->Instance->CR1);
4320
  uint32_t tmperror;
4455
  uint32_t tmperror;
4321
 
4456
 
4322
  /* I2C Bus error interrupt occurred ------------------------------------*/
4457
  /* I2C Bus error interrupt occurred ------------------------------------*/
-
 
4458
  if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \
4323
  if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))
4459
      (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))
4324
  {
4460
  {
4325
    hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
4461
    hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
4326
 
4462
 
4327
    /* Clear BERR flag */
4463
    /* Clear BERR flag */
4328
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
4464
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
4329
  }
4465
  }
4330
 
4466
 
4331
  /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
4467
  /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/
-
 
4468
  if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \
4332
  if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))
4469
      (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))
4333
  {
4470
  {
4334
    hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
4471
    hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
4335
 
4472
 
4336
    /* Clear OVR flag */
4473
    /* Clear OVR flag */
4337
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
4474
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
4338
  }
4475
  }
4339
 
4476
 
4340
  /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
4477
  /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/
-
 
4478
  if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \
4341
  if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))
4479
      (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))
4342
  {
4480
  {
4343
    hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
4481
    hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
4344
 
4482
 
4345
    /* Clear ARLO flag */
4483
    /* Clear ARLO flag */
4346
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
4484
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
Line 4522... Line 4660...
4522
/**
4660
/**
4523
  * @}
4661
  * @}
4524
  */
4662
  */
4525
 
4663
 
4526
/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
4664
/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
4527
 *  @brief   Peripheral State, Mode and Error functions
4665
  *  @brief   Peripheral State, Mode and Error functions
4528
 *
4666
  *
4529
@verbatim
4667
@verbatim
4530
 ===============================================================================
4668
 ===============================================================================
4531
            ##### Peripheral State, Mode and Error functions #####
4669
            ##### Peripheral State, Mode and Error functions #####
4532
 ===============================================================================
4670
 ===============================================================================
4533
    [..]
4671
    [..]
Line 4560... Line 4698...
4560
{
4698
{
4561
  return hi2c->Mode;
4699
  return hi2c->Mode;
4562
}
4700
}
4563
 
4701
 
4564
/**
4702
/**
4565
* @brief  Return the I2C error code.
4703
  * @brief  Return the I2C error code.
4566
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
4704
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
4567
  *              the configuration information for the specified I2C.
4705
  *              the configuration information for the specified I2C.
4568
* @retval I2C Error Code
4706
  * @retval I2C Error Code
4569
*/
4707
  */
4570
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
4708
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
4571
{
4709
{
4572
  return hi2c->ErrorCode;
4710
  return hi2c->ErrorCode;
4573
}
4711
}
4574
 
4712
 
Line 4590... Line 4728...
4590
  *                the configuration information for the specified I2C.
4728
  *                the configuration information for the specified I2C.
4591
  * @param  ITFlags Interrupt flags to handle.
4729
  * @param  ITFlags Interrupt flags to handle.
4592
  * @param  ITSources Interrupt sources enabled.
4730
  * @param  ITSources Interrupt sources enabled.
4593
  * @retval HAL status
4731
  * @retval HAL status
4594
  */
4732
  */
4595
static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
4733
static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
4734
                                           uint32_t ITSources)
4596
{
4735
{
4597
  uint16_t devaddress;
4736
  uint16_t devaddress;
4598
  uint32_t tmpITFlags = ITFlags;
4737
  uint32_t tmpITFlags = ITFlags;
4599
 
4738
 
4600
  /* Process Locked */
4739
  /* Process Locked */
4601
  __HAL_LOCK(hi2c);
4740
  __HAL_LOCK(hi2c);
4602
 
4741
 
-
 
4742
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \
4603
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
4743
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
4604
  {
4744
  {
4605
    /* Clear NACK Flag */
4745
    /* Clear NACK Flag */
4606
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
4746
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
4607
 
4747
 
4608
    /* Set corresponding Error Code */
4748
    /* Set corresponding Error Code */
Line 4611... Line 4751...
4611
    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
4751
    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
4612
 
4752
 
4613
    /* Flush TX register */
4753
    /* Flush TX register */
4614
    I2C_Flush_TXDR(hi2c);
4754
    I2C_Flush_TXDR(hi2c);
4615
  }
4755
  }
4616
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET))
4756
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \
-
 
4757
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET))
4617
  {
4758
  {
4618
    /* Remove RXNE flag on temporary variable as read done */
4759
    /* Remove RXNE flag on temporary variable as read done */
4619
    tmpITFlags &= ~I2C_FLAG_RXNE;
4760
    tmpITFlags &= ~I2C_FLAG_RXNE;
4620
 
4761
 
4621
    /* Read data from RXDR */
4762
    /* Read data from RXDR */
Line 4625... Line 4766...
4625
    hi2c->pBuffPtr++;
4766
    hi2c->pBuffPtr++;
4626
 
4767
 
4627
    hi2c->XferSize--;
4768
    hi2c->XferSize--;
4628
    hi2c->XferCount--;
4769
    hi2c->XferCount--;
4629
  }
4770
  }
4630
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
4771
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \
-
 
4772
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
4631
  {
4773
  {
4632
    /* Write data to TXDR */
4774
    /* Write data to TXDR */
4633
    hi2c->Instance->TXDR = *hi2c->pBuffPtr;
4775
    hi2c->Instance->TXDR = *hi2c->pBuffPtr;
4634
 
4776
 
4635
    /* Increment Buffer pointer */
4777
    /* Increment Buffer pointer */
4636
    hi2c->pBuffPtr++;
4778
    hi2c->pBuffPtr++;
4637
 
4779
 
4638
    hi2c->XferSize--;
4780
    hi2c->XferSize--;
4639
    hi2c->XferCount--;
4781
    hi2c->XferCount--;
4640
  }
4782
  }
4641
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
4783
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \
-
 
4784
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
4642
  {
4785
  {
4643
    if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
4786
    if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
4644
    {
4787
    {
4645
      devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD);
4788
      devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD);
4646
 
4789
 
Line 4652... Line 4795...
4652
      else
4795
      else
4653
      {
4796
      {
4654
        hi2c->XferSize = hi2c->XferCount;
4797
        hi2c->XferSize = hi2c->XferCount;
4655
        if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
4798
        if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
4656
        {
4799
        {
4657
          I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP);
4800
          I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize,
-
 
4801
                             hi2c->XferOptions, I2C_NO_STARTSTOP);
4658
        }
4802
        }
4659
        else
4803
        else
4660
        {
4804
        {
4661
          I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
4805
          I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize,
-
 
4806
                             I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);
4662
        }
4807
        }
4663
      }
4808
      }
4664
    }
4809
    }
4665
    else
4810
    else
4666
    {
4811
    {
Line 4676... Line 4821...
4676
        /* Call the corresponding callback to inform upper layer of End of Transfer */
4821
        /* Call the corresponding callback to inform upper layer of End of Transfer */
4677
        I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
4822
        I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
4678
      }
4823
      }
4679
    }
4824
    }
4680
  }
4825
  }
4681
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
4826
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \
-
 
4827
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
4682
  {
4828
  {
4683
    if (hi2c->XferCount == 0U)
4829
    if (hi2c->XferCount == 0U)
4684
    {
4830
    {
4685
      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
4831
      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
4686
      {
4832
      {
Line 4707... Line 4853...
4707
  else
4853
  else
4708
  {
4854
  {
4709
    /* Nothing to do */
4855
    /* Nothing to do */
4710
  }
4856
  }
4711
 
4857
 
4712
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
4858
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \
-
 
4859
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
4713
  {
4860
  {
4714
    /* Call I2C Master complete process */
4861
    /* Call I2C Master complete process */
4715
    I2C_ITMasterCplt(hi2c, tmpITFlags);
4862
    I2C_ITMasterCplt(hi2c, tmpITFlags);
4716
  }
4863
  }
4717
 
4864
 
Line 4727... Line 4874...
4727
  *                the configuration information for the specified I2C.
4874
  *                the configuration information for the specified I2C.
4728
  * @param  ITFlags Interrupt flags to handle.
4875
  * @param  ITFlags Interrupt flags to handle.
4729
  * @param  ITSources Interrupt sources enabled.
4876
  * @param  ITSources Interrupt sources enabled.
4730
  * @retval HAL status
4877
  * @retval HAL status
4731
  */
4878
  */
4732
static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
4879
static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
4880
                                          uint32_t ITSources)
4733
{
4881
{
4734
  uint32_t tmpoptions = hi2c->XferOptions;
4882
  uint32_t tmpoptions = hi2c->XferOptions;
4735
  uint32_t tmpITFlags = ITFlags;
4883
  uint32_t tmpITFlags = ITFlags;
4736
 
4884
 
4737
  /* Process locked */
4885
  /* Process locked */
4738
  __HAL_LOCK(hi2c);
4886
  __HAL_LOCK(hi2c);
4739
 
4887
 
4740
  /* Check if STOPF is set */
4888
  /* Check if STOPF is set */
4741
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
4889
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \
-
 
4890
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
4742
  {
4891
  {
4743
    /* Call I2C Slave complete process */
4892
    /* Call I2C Slave complete process */
4744
    I2C_ITSlaveCplt(hi2c, tmpITFlags);
4893
    I2C_ITSlaveCplt(hi2c, tmpITFlags);
4745
  }
4894
  }
4746
 
4895
 
-
 
4896
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \
4747
  if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
4897
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
4748
  {
4898
  {
4749
    /* Check that I2C transfer finished */
4899
    /* Check that I2C transfer finished */
4750
    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
4900
    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
4751
    /* Mean XferCount == 0*/
4901
    /* Mean XferCount == 0*/
4752
    /* So clear Flag NACKF only */
4902
    /* So clear Flag NACKF only */
4753
    if (hi2c->XferCount == 0U)
4903
    if (hi2c->XferCount == 0U)
4754
    {
4904
    {
4755
      if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */
4905
      if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME))
-
 
4906
        /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for
-
 
4907
           Warning[Pa134]: left and right operands are identical */
4756
      {
4908
      {
4757
        /* Call I2C Listen complete process */
4909
        /* Call I2C Listen complete process */
4758
        I2C_ITListenCplt(hi2c, tmpITFlags);
4910
        I2C_ITListenCplt(hi2c, tmpITFlags);
4759
      }
4911
      }
4760
      else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))
4912
      else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))
Line 4789... Line 4941...
4789
        /* Call the corresponding callback to inform upper layer of End of Transfer */
4941
        /* Call the corresponding callback to inform upper layer of End of Transfer */
4790
        I2C_ITError(hi2c, hi2c->ErrorCode);
4942
        I2C_ITError(hi2c, hi2c->ErrorCode);
4791
      }
4943
      }
4792
    }
4944
    }
4793
  }
4945
  }
4794
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET))
4946
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \
-
 
4947
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET))
4795
  {
4948
  {
4796
    if (hi2c->XferCount > 0U)
4949
    if (hi2c->XferCount > 0U)
4797
    {
4950
    {
4798
      /* Read data from RXDR */
4951
      /* Read data from RXDR */
4799
      *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
4952
      *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
Line 4810... Line 4963...
4810
    {
4963
    {
4811
      /* Call I2C Slave Sequential complete process */
4964
      /* Call I2C Slave Sequential complete process */
4812
      I2C_ITSlaveSeqCplt(hi2c);
4965
      I2C_ITSlaveSeqCplt(hi2c);
4813
    }
4966
    }
4814
  }
4967
  }
4815
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))
4968
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && \
-
 
4969
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))
4816
  {
4970
  {
4817
    I2C_ITAddrCplt(hi2c, tmpITFlags);
4971
    I2C_ITAddrCplt(hi2c, tmpITFlags);
4818
  }
4972
  }
4819
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
4973
  else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \
-
 
4974
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
4820
  {
4975
  {
4821
    /* Write data to TXDR only if XferCount not reach "0" */
4976
    /* Write data to TXDR only if XferCount not reach "0" */
4822
    /* A TXIS flag can be set, during STOP treatment      */
4977
    /* A TXIS flag can be set, during STOP treatment      */
4823
    /* Check if all Datas have already been sent */
4978
    /* Check if all Data have already been sent */
4824
    /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
4979
    /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
4825
    if (hi2c->XferCount > 0U)
4980
    if (hi2c->XferCount > 0U)
4826
    {
4981
    {
4827
      /* Write data to TXDR */
4982
      /* Write data to TXDR */
4828
      hi2c->Instance->TXDR = *hi2c->pBuffPtr;
4983
      hi2c->Instance->TXDR = *hi2c->pBuffPtr;
Line 4860... Line 5015...
4860
  *                the configuration information for the specified I2C.
5015
  *                the configuration information for the specified I2C.
4861
  * @param  ITFlags Interrupt flags to handle.
5016
  * @param  ITFlags Interrupt flags to handle.
4862
  * @param  ITSources Interrupt sources enabled.
5017
  * @param  ITSources Interrupt sources enabled.
4863
  * @retval HAL status
5018
  * @retval HAL status
4864
  */
5019
  */
4865
static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
5020
static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
5021
                                            uint32_t ITSources)
4866
{
5022
{
4867
  uint16_t devaddress;
5023
  uint16_t devaddress;
4868
  uint32_t xfermode;
5024
  uint32_t xfermode;
4869
 
5025
 
4870
  /* Process Locked */
5026
  /* Process Locked */
4871
  __HAL_LOCK(hi2c);
5027
  __HAL_LOCK(hi2c);
4872
 
5028
 
-
 
5029
  if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \
4873
  if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
5030
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
4874
  {
5031
  {
4875
    /* Clear NACK Flag */
5032
    /* Clear NACK Flag */
4876
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5033
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
4877
 
5034
 
4878
    /* Set corresponding Error Code */
5035
    /* Set corresponding Error Code */
Line 4884... Line 5041...
4884
    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
5041
    I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);
4885
 
5042
 
4886
    /* Flush TX register */
5043
    /* Flush TX register */
4887
    I2C_Flush_TXDR(hi2c);
5044
    I2C_Flush_TXDR(hi2c);
4888
  }
5045
  }
-
 
5046
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \
4889
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
5047
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
4890
  {
5048
  {
4891
    /* Disable TC interrupt */
5049
    /* Disable TC interrupt */
4892
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI);
5050
    __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI);
4893
 
5051
 
4894
    if (hi2c->XferCount != 0U)
5052
    if (hi2c->XferCount != 0U)
Line 4945... Line 5103...
4945
        /* Call the corresponding callback to inform upper layer of End of Transfer */
5103
        /* Call the corresponding callback to inform upper layer of End of Transfer */
4946
        I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
5104
        I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
4947
      }
5105
      }
4948
    }
5106
    }
4949
  }
5107
  }
-
 
5108
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \
4950
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
5109
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
4951
  {
5110
  {
4952
    if (hi2c->XferCount == 0U)
5111
    if (hi2c->XferCount == 0U)
4953
    {
5112
    {
4954
      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
5113
      if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
4955
      {
5114
      {
Line 4971... Line 5130...
4971
      /* Wrong size Status regarding TC flag event */
5130
      /* Wrong size Status regarding TC flag event */
4972
      /* Call the corresponding callback to inform upper layer of End of Transfer */
5131
      /* Call the corresponding callback to inform upper layer of End of Transfer */
4973
      I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
5132
      I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
4974
    }
5133
    }
4975
  }
5134
  }
-
 
5135
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \
4976
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
5136
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
4977
  {
5137
  {
4978
    /* Call I2C Master complete process */
5138
    /* Call I2C Master complete process */
4979
    I2C_ITMasterCplt(hi2c, ITFlags);
5139
    I2C_ITMasterCplt(hi2c, ITFlags);
4980
  }
5140
  }
4981
  else
5141
  else
Line 4995... Line 5155...
4995
  *                the configuration information for the specified I2C.
5155
  *                the configuration information for the specified I2C.
4996
  * @param  ITFlags Interrupt flags to handle.
5156
  * @param  ITFlags Interrupt flags to handle.
4997
  * @param  ITSources Interrupt sources enabled.
5157
  * @param  ITSources Interrupt sources enabled.
4998
  * @retval HAL status
5158
  * @retval HAL status
4999
  */
5159
  */
5000
static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
5160
static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags,
-
 
5161
                                           uint32_t ITSources)
5001
{
5162
{
5002
  uint32_t tmpoptions = hi2c->XferOptions;
5163
  uint32_t tmpoptions = hi2c->XferOptions;
5003
  uint32_t treatdmanack = 0U;
5164
  uint32_t treatdmanack = 0U;
-
 
5165
  HAL_I2C_StateTypeDef tmpstate;
5004
 
5166
 
5005
  /* Process locked */
5167
  /* Process locked */
5006
  __HAL_LOCK(hi2c);
5168
  __HAL_LOCK(hi2c);
5007
 
5169
 
5008
  /* Check if STOPF is set */
5170
  /* Check if STOPF is set */
-
 
5171
  if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \
5009
  if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
5172
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
5010
  {
5173
  {
5011
    /* Call I2C Slave complete process */
5174
    /* Call I2C Slave complete process */
5012
    I2C_ITSlaveCplt(hi2c, ITFlags);
5175
    I2C_ITSlaveCplt(hi2c, ITFlags);
5013
  }
5176
  }
5014
 
5177
 
-
 
5178
  if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \
5015
  if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
5179
      (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
5016
  {
5180
  {
5017
    /* Check that I2C transfer finished */
5181
    /* Check that I2C transfer finished */
5018
    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
5182
    /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
5019
    /* Mean XferCount == 0 */
5183
    /* Mean XferCount == 0 */
5020
    /* So clear Flag NACKF only */
5184
    /* So clear Flag NACKF only */
Line 5045... Line 5209...
5045
        }
5209
        }
5046
      }
5210
      }
5047
 
5211
 
5048
      if (treatdmanack == 1U)
5212
      if (treatdmanack == 1U)
5049
      {
5213
      {
5050
        if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */
5214
        if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME))
-
 
5215
          /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for
-
 
5216
             Warning[Pa134]: left and right operands are identical */
5051
        {
5217
        {
5052
          /* Call I2C Listen complete process */
5218
          /* Call I2C Listen complete process */
5053
          I2C_ITListenCplt(hi2c, ITFlags);
5219
          I2C_ITListenCplt(hi2c, ITFlags);
5054
        }
5220
        }
5055
        else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))
5221
        else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))
Line 5077... Line 5243...
5077
        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5243
        __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5078
 
5244
 
5079
        /* Set ErrorCode corresponding to a Non-Acknowledge */
5245
        /* Set ErrorCode corresponding to a Non-Acknowledge */
5080
        hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
5246
        hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
5081
 
5247
 
-
 
5248
        /* Store current hi2c->State, solve MISRA2012-Rule-13.5 */
-
 
5249
        tmpstate = hi2c->State;
-
 
5250
 
5082
        if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME))
5251
        if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME))
5083
        {
5252
        {
-
 
5253
          if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN))
-
 
5254
          {
-
 
5255
            hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
-
 
5256
          }
-
 
5257
          else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN))
-
 
5258
          {
-
 
5259
            hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
-
 
5260
          }
-
 
5261
          else
-
 
5262
          {
-
 
5263
            /* Do nothing */
-
 
5264
          }
-
 
5265
 
5084
          /* Call the corresponding callback to inform upper layer of End of Transfer */
5266
          /* Call the corresponding callback to inform upper layer of End of Transfer */
5085
          I2C_ITError(hi2c, hi2c->ErrorCode);
5267
          I2C_ITError(hi2c, hi2c->ErrorCode);
5086
        }
5268
        }
5087
      }
5269
      }
5088
    }
5270
    }
Line 5090... Line 5272...
5090
    {
5272
    {
5091
      /* Only Clear NACK Flag, no DMA treatment is pending */
5273
      /* Only Clear NACK Flag, no DMA treatment is pending */
5092
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5274
      __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5093
    }
5275
    }
5094
  }
5276
  }
-
 
5277
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \
5095
  else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))
5278
           (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))
5096
  {
5279
  {
5097
    I2C_ITAddrCplt(hi2c, ITFlags);
5280
    I2C_ITAddrCplt(hi2c, ITFlags);
5098
  }
5281
  }
5099
  else
5282
  else
5100
  {
5283
  {
Line 5117... Line 5300...
5117
  * @param  MemAddSize Size of internal memory address
5300
  * @param  MemAddSize Size of internal memory address
5118
  * @param  Timeout Timeout duration
5301
  * @param  Timeout Timeout duration
5119
  * @param  Tickstart Tick start value
5302
  * @param  Tickstart Tick start value
5120
  * @retval HAL status
5303
  * @retval HAL status
5121
  */
5304
  */
5122
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
5305
static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
-
 
5306
                                                uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout,
-
 
5307
                                                uint32_t Tickstart)
5123
{
5308
{
5124
  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
5309
  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);
5125
 
5310
 
5126
  /* Wait until TXIS flag is set */
5311
  /* Wait until TXIS flag is set */
5127
  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
5312
  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
Line 5170... Line 5355...
5170
  * @param  MemAddSize Size of internal memory address
5355
  * @param  MemAddSize Size of internal memory address
5171
  * @param  Timeout Timeout duration
5356
  * @param  Timeout Timeout duration
5172
  * @param  Tickstart Tick start value
5357
  * @param  Tickstart Tick start value
5173
  * @retval HAL status
5358
  * @retval HAL status
5174
  */
5359
  */
5175
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
5360
static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress,
-
 
5361
                                               uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout,
-
 
5362
                                               uint32_t Tickstart)
5176
{
5363
{
5177
  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
5364
  I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);
5178
 
5365
 
5179
  /* Wait until TXIS flag is set */
5366
  /* Wait until TXIS flag is set */
5180
  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
5367
  if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
Line 5238... Line 5425...
5238
    ownadd2code       = I2C_GET_OWN_ADDRESS2(hi2c);
5425
    ownadd2code       = I2C_GET_OWN_ADDRESS2(hi2c);
5239
 
5426
 
5240
    /* If 10bits addressing mode is selected */
5427
    /* If 10bits addressing mode is selected */
5241
    if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
5428
    if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
5242
    {
5429
    {
5243
      if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK))
5430
      if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK))
5244
      {
5431
      {
5245
        slaveaddrcode = ownadd1code;
5432
        slaveaddrcode = ownadd1code;
5246
        hi2c->AddrEventCount++;
5433
        hi2c->AddrEventCount++;
5247
        if (hi2c->AddrEventCount == 2U)
5434
        if (hi2c->AddrEventCount == 2U)
5248
        {
5435
        {
Line 5367... Line 5554...
5367
  * @param  hi2c I2C handle.
5554
  * @param  hi2c I2C handle.
5368
  * @retval None
5555
  * @retval None
5369
  */
5556
  */
5370
static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c)
5557
static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c)
5371
{
5558
{
-
 
5559
  uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1);
-
 
5560
 
5372
  /* Reset I2C handle mode */
5561
  /* Reset I2C handle mode */
5373
  hi2c->Mode = HAL_I2C_MODE_NONE;
5562
  hi2c->Mode = HAL_I2C_MODE_NONE;
5374
 
5563
 
-
 
5564
  /* If a DMA is ongoing, Update handle size context */
-
 
5565
  if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET)
-
 
5566
  {
-
 
5567
    /* Disable DMA Request */
-
 
5568
    hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
 
5569
  }
-
 
5570
  else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET)
-
 
5571
  {
-
 
5572
    /* Disable DMA Request */
-
 
5573
    hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
 
5574
  }
-
 
5575
  else
-
 
5576
  {
-
 
5577
    /* Do nothing */
-
 
5578
  }
-
 
5579
 
5375
  if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
5580
  if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
5376
  {
5581
  {
5377
    /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
5582
    /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
5378
    hi2c->State         = HAL_I2C_STATE_LISTEN;
5583
    hi2c->State         = HAL_I2C_STATE_LISTEN;
5379
    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
5584
    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
Line 5424... Line 5629...
5424
  * @retval None
5629
  * @retval None
5425
  */
5630
  */
5426
static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
5631
static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
5427
{
5632
{
5428
  uint32_t tmperror;
5633
  uint32_t tmperror;
-
 
5634
  uint32_t tmpITFlags = ITFlags;
-
 
5635
  __IO uint32_t tmpreg;
5429
 
5636
 
5430
  /* Clear STOP Flag */
5637
  /* Clear STOP Flag */
5431
  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
5638
  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
5432
 
5639
 
-
 
5640
  /* Disable Interrupts and Store Previous state */
-
 
5641
  if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
-
 
5642
  {
-
 
5643
    I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);
-
 
5644
    hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
-
 
5645
  }
-
 
5646
  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
-
 
5647
  {
-
 
5648
    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
-
 
5649
    hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
-
 
5650
  }
-
 
5651
  else
-
 
5652
  {
-
 
5653
    /* Do nothing */
-
 
5654
  }
-
 
5655
 
5433
  /* Clear Configuration Register 2 */
5656
  /* Clear Configuration Register 2 */
5434
  I2C_RESET_CR2(hi2c);
5657
  I2C_RESET_CR2(hi2c);
5435
 
5658
 
5436
  /* Reset handle parameters */
5659
  /* Reset handle parameters */
5437
  hi2c->PreviousState = I2C_STATE_NONE;
-
 
5438
  hi2c->XferISR       = NULL;
5660
  hi2c->XferISR       = NULL;
5439
  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
5661
  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
5440
 
5662
 
5441
  if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET)
5663
  if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET)
5442
  {
5664
  {
5443
    /* Clear NACK Flag */
5665
    /* Clear NACK Flag */
5444
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5666
    __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
5445
 
5667
 
5446
    /* Set acknowledge error code */
5668
    /* Set acknowledge error code */
5447
    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
5669
    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
5448
  }
5670
  }
5449
 
5671
 
-
 
5672
  /* Fetch Last receive data if any */
-
 
5673
  if ((hi2c->State == HAL_I2C_STATE_ABORT) && (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET))
-
 
5674
  {
-
 
5675
    /* Read data from RXDR */
-
 
5676
    tmpreg = (uint8_t)hi2c->Instance->RXDR;
-
 
5677
    UNUSED(tmpreg);
-
 
5678
  }
-
 
5679
 
5450
  /* Flush TX register */
5680
  /* Flush TX register */
5451
  I2C_Flush_TXDR(hi2c);
5681
  I2C_Flush_TXDR(hi2c);
5452
 
5682
 
5453
  /* Disable Interrupts */
-
 
5454
  I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT);
-
 
5455
 
-
 
5456
  /* Store current volatile hi2c->ErrorCode, misra rule */
5683
  /* Store current volatile hi2c->ErrorCode, misra rule */
5457
  tmperror = hi2c->ErrorCode;
5684
  tmperror = hi2c->ErrorCode;
5458
 
5685
 
5459
  /* Call the corresponding callback to inform upper layer of End of Transfer */
5686
  /* Call the corresponding callback to inform upper layer of End of Transfer */
5460
  if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE))
5687
  if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE))
Line 5464... Line 5691...
5464
  }
5691
  }
5465
  /* hi2c->State == HAL_I2C_STATE_BUSY_TX */
5692
  /* hi2c->State == HAL_I2C_STATE_BUSY_TX */
5466
  else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
5693
  else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
5467
  {
5694
  {
5468
    hi2c->State = HAL_I2C_STATE_READY;
5695
    hi2c->State = HAL_I2C_STATE_READY;
-
 
5696
    hi2c->PreviousState = I2C_STATE_NONE;
5469
 
5697
 
5470
    if (hi2c->Mode == HAL_I2C_MODE_MEM)
5698
    if (hi2c->Mode == HAL_I2C_MODE_MEM)
5471
    {
5699
    {
5472
      hi2c->Mode = HAL_I2C_MODE_NONE;
5700
      hi2c->Mode = HAL_I2C_MODE_NONE;
5473
 
5701
 
Line 5498... Line 5726...
5498
  }
5726
  }
5499
  /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
5727
  /* hi2c->State == HAL_I2C_STATE_BUSY_RX */
5500
  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
5728
  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
5501
  {
5729
  {
5502
    hi2c->State = HAL_I2C_STATE_READY;
5730
    hi2c->State = HAL_I2C_STATE_READY;
-
 
5731
    hi2c->PreviousState = I2C_STATE_NONE;
5503
 
5732
 
5504
    if (hi2c->Mode == HAL_I2C_MODE_MEM)
5733
    if (hi2c->Mode == HAL_I2C_MODE_MEM)
5505
    {
5734
    {
5506
      hi2c->Mode = HAL_I2C_MODE_NONE;
5735
      hi2c->Mode = HAL_I2C_MODE_NONE;
5507
 
5736
 
Line 5544... Line 5773...
5544
  */
5773
  */
5545
static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
5774
static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
5546
{
5775
{
5547
  uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1);
5776
  uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1);
5548
  uint32_t tmpITFlags = ITFlags;
5777
  uint32_t tmpITFlags = ITFlags;
-
 
5778
  HAL_I2C_StateTypeDef tmpstate = hi2c->State;
5549
 
5779
 
5550
  /* Clear STOP Flag */
5780
  /* Clear STOP Flag */
5551
  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
5781
  __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
5552
 
5782
 
5553
  /* Disable all interrupts */
5783
  /* Disable Interrupts and Store Previous state */
-
 
5784
  if ((tmpstate == HAL_I2C_STATE_BUSY_TX) || (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN))
-
 
5785
  {
5554
  I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT);
5786
    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT);
-
 
5787
    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
-
 
5788
  }
-
 
5789
  else if ((tmpstate == HAL_I2C_STATE_BUSY_RX) || (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN))
-
 
5790
  {
-
 
5791
    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT);
-
 
5792
    hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
-
 
5793
  }
-
 
5794
  else
-
 
5795
  {
-
 
5796
    /* Do nothing */
-
 
5797
  }
5555
 
5798
 
5556
  /* Disable Address Acknowledge */
5799
  /* Disable Address Acknowledge */
5557
  hi2c->Instance->CR2 |= I2C_CR2_NACK;
5800
  hi2c->Instance->CR2 |= I2C_CR2_NACK;
5558
 
5801
 
5559
  /* Clear Configuration Register 2 */
5802
  /* Clear Configuration Register 2 */
Line 5563... Line 5806...
5563
  I2C_Flush_TXDR(hi2c);
5806
  I2C_Flush_TXDR(hi2c);
5564
 
5807
 
5565
  /* If a DMA is ongoing, Update handle size context */
5808
  /* If a DMA is ongoing, Update handle size context */
5566
  if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET)
5809
  if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET)
5567
  {
5810
  {
-
 
5811
    /* Disable DMA Request */
-
 
5812
    hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
 
5813
 
5568
    if (hi2c->hdmatx != NULL)
5814
    if (hi2c->hdmatx != NULL)
5569
    {
5815
    {
5570
      hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmatx);
5816
      hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmatx);
5571
    }
5817
    }
5572
  }
5818
  }
5573
  else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET)
5819
  else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET)
5574
  {
5820
  {
-
 
5821
    /* Disable DMA Request */
-
 
5822
    hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
 
5823
 
5575
    if (hi2c->hdmarx != NULL)
5824
    if (hi2c->hdmarx != NULL)
5576
    {
5825
    {
5577
      hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmarx);
5826
      hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmarx);
5578
    }
5827
    }
5579
  }
5828
  }
Line 5606... Line 5855...
5606
  {
5855
  {
5607
    /* Set ErrorCode corresponding to a Non-Acknowledge */
5856
    /* Set ErrorCode corresponding to a Non-Acknowledge */
5608
    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
5857
    hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
5609
  }
5858
  }
5610
 
5859
 
5611
  hi2c->PreviousState = I2C_STATE_NONE;
-
 
5612
  hi2c->Mode = HAL_I2C_MODE_NONE;
5860
  hi2c->Mode = HAL_I2C_MODE_NONE;
5613
  hi2c->XferISR = NULL;
5861
  hi2c->XferISR = NULL;
5614
 
5862
 
5615
  if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
5863
  if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
5616
  {
5864
  {
Line 5624... Line 5872...
5624
      I2C_ITListenCplt(hi2c, tmpITFlags);
5872
      I2C_ITListenCplt(hi2c, tmpITFlags);
5625
    }
5873
    }
5626
  }
5874
  }
5627
  else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
5875
  else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
5628
  {
5876
  {
5629
    /* Call the Sequential Complete callback, to inform upper layer of the end of Tranfer */
5877
    /* Call the Sequential Complete callback, to inform upper layer of the end of Transfer */
5630
    I2C_ITSlaveSeqCplt(hi2c);
5878
    I2C_ITSlaveSeqCplt(hi2c);
5631
 
5879
 
5632
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
5880
    hi2c->XferOptions = I2C_NO_OPTION_FRAME;
5633
    hi2c->State = HAL_I2C_STATE_READY;
5881
    hi2c->State = HAL_I2C_STATE_READY;
-
 
5882
    hi2c->PreviousState = I2C_STATE_NONE;
5634
 
5883
 
5635
    /* Process Unlocked */
5884
    /* Process Unlocked */
5636
    __HAL_UNLOCK(hi2c);
5885
    __HAL_UNLOCK(hi2c);
5637
 
5886
 
5638
    /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
5887
    /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
Line 5644... Line 5893...
5644
  }
5893
  }
5645
  /* Call the corresponding callback to inform upper layer of End of Transfer */
5894
  /* Call the corresponding callback to inform upper layer of End of Transfer */
5646
  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
5895
  else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
5647
  {
5896
  {
5648
    hi2c->State = HAL_I2C_STATE_READY;
5897
    hi2c->State = HAL_I2C_STATE_READY;
-
 
5898
    hi2c->PreviousState = I2C_STATE_NONE;
5649
 
5899
 
5650
    /* Process Unlocked */
5900
    /* Process Unlocked */
5651
    __HAL_UNLOCK(hi2c);
5901
    __HAL_UNLOCK(hi2c);
5652
 
5902
 
5653
    /* Call the corresponding callback to inform upper layer of End of Transfer */
5903
    /* Call the corresponding callback to inform upper layer of End of Transfer */
Line 5658... Line 5908...
5658
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
5908
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
5659
  }
5909
  }
5660
  else
5910
  else
5661
  {
5911
  {
5662
    hi2c->State = HAL_I2C_STATE_READY;
5912
    hi2c->State = HAL_I2C_STATE_READY;
-
 
5913
    hi2c->PreviousState = I2C_STATE_NONE;
5663
 
5914
 
5664
    /* Process Unlocked */
5915
    /* Process Unlocked */
5665
    __HAL_UNLOCK(hi2c);
5916
    __HAL_UNLOCK(hi2c);
5666
 
5917
 
5667
    /* Call the corresponding callback to inform upper layer of End of Transfer */
5918
    /* Call the corresponding callback to inform upper layer of End of Transfer */
Line 5731... Line 5982...
5731
  * @retval None
5982
  * @retval None
5732
  */
5983
  */
5733
static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
5984
static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
5734
{
5985
{
5735
  HAL_I2C_StateTypeDef tmpstate = hi2c->State;
5986
  HAL_I2C_StateTypeDef tmpstate = hi2c->State;
-
 
5987
  uint32_t tmppreviousstate;
5736
 
5988
 
5737
  /* Reset handle parameters */
5989
  /* Reset handle parameters */
5738
  hi2c->Mode          = HAL_I2C_MODE_NONE;
5990
  hi2c->Mode          = HAL_I2C_MODE_NONE;
5739
  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
5991
  hi2c->XferOptions   = I2C_NO_OPTION_FRAME;
5740
  hi2c->XferCount     = 0U;
5992
  hi2c->XferCount     = 0U;
Line 5750... Line 6002...
5750
    /* Disable all interrupts, except interrupts related to LISTEN state */
6002
    /* Disable all interrupts, except interrupts related to LISTEN state */
5751
    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT);
6003
    I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT);
5752
 
6004
 
5753
    /* keep HAL_I2C_STATE_LISTEN if set */
6005
    /* keep HAL_I2C_STATE_LISTEN if set */
5754
    hi2c->State         = HAL_I2C_STATE_LISTEN;
6006
    hi2c->State         = HAL_I2C_STATE_LISTEN;
5755
    hi2c->PreviousState = I2C_STATE_NONE;
-
 
5756
    hi2c->XferISR       = I2C_Slave_ISR_IT;
6007
    hi2c->XferISR       = I2C_Slave_ISR_IT;
5757
  }
6008
  }
5758
  else
6009
  else
5759
  {
6010
  {
5760
    /* Disable all interrupts */
6011
    /* Disable all interrupts */
5761
    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
6012
    I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
5762
 
6013
 
5763
    /* If state is an abort treatment on goind, don't change state */
6014
    /* If state is an abort treatment on going, don't change state */
5764
    /* This change will be do later */
6015
    /* This change will be do later */
5765
    if (hi2c->State != HAL_I2C_STATE_ABORT)
6016
    if (hi2c->State != HAL_I2C_STATE_ABORT)
5766
    {
6017
    {
5767
      /* Set HAL_I2C_STATE_READY */
6018
      /* Set HAL_I2C_STATE_READY */
5768
      hi2c->State         = HAL_I2C_STATE_READY;
6019
      hi2c->State         = HAL_I2C_STATE_READY;
5769
    }
6020
    }
5770
    hi2c->PreviousState = I2C_STATE_NONE;
-
 
5771
    hi2c->XferISR       = NULL;
6021
    hi2c->XferISR       = NULL;
5772
  }
6022
  }
5773
 
6023
 
5774
  /* Abort DMA TX transfer if any */
6024
  /* Abort DMA TX transfer if any */
-
 
6025
  tmppreviousstate = hi2c->PreviousState;
5775
  if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)
6026
  if ((hi2c->hdmatx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_TX) || \
-
 
6027
                                 (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX)))
5776
  {
6028
  {
-
 
6029
    if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)
-
 
6030
    {
5777
    hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
6031
      hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
-
 
6032
    }
5778
 
6033
 
5779
    if (hi2c->hdmatx != NULL)
6034
    if (HAL_DMA_GetState(hi2c->hdmatx) != HAL_DMA_STATE_READY)
5780
    {
6035
    {
5781
      /* Set the I2C DMA Abort callback :
6036
      /* Set the I2C DMA Abort callback :
5782
       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
6037
       will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
5783
      hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
6038
      hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
5784
 
6039
 
Line 5790... Line 6045...
5790
      {
6045
      {
5791
        /* Call Directly XferAbortCallback function in case of error */
6046
        /* Call Directly XferAbortCallback function in case of error */
5792
        hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
6047
        hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
5793
      }
6048
      }
5794
    }
6049
    }
-
 
6050
    else
-
 
6051
    {
-
 
6052
      I2C_TreatErrorCallback(hi2c);
-
 
6053
    }
5795
  }
6054
  }
5796
  /* Abort DMA RX transfer if any */
6055
  /* Abort DMA RX transfer if any */
5797
  else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)
6056
  else if ((hi2c->hdmarx != NULL) && ((tmppreviousstate == I2C_STATE_MASTER_BUSY_RX) || \
-
 
6057
                                      (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX)))
5798
  {
6058
  {
-
 
6059
    if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)
-
 
6060
    {
5799
    hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
6061
      hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
-
 
6062
    }
5800
 
6063
 
5801
    if (hi2c->hdmarx != NULL)
6064
    if (HAL_DMA_GetState(hi2c->hdmarx) != HAL_DMA_STATE_READY)
5802
    {
6065
    {
5803
      /* Set the I2C DMA Abort callback :
6066
      /* Set the I2C DMA Abort callback :
5804
        will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
6067
        will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
5805
      hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
6068
      hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
5806
 
6069
 
Line 5812... Line 6075...
5812
      {
6075
      {
5813
        /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
6076
        /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
5814
        hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
6077
        hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
5815
      }
6078
      }
5816
    }
6079
    }
-
 
6080
    else
-
 
6081
    {
-
 
6082
      I2C_TreatErrorCallback(hi2c);
-
 
6083
    }
5817
  }
6084
  }
-
 
6085
  else
-
 
6086
  {
-
 
6087
    I2C_TreatErrorCallback(hi2c);
-
 
6088
  }
-
 
6089
}
-
 
6090
 
-
 
6091
/**
-
 
6092
  * @brief  I2C Error callback treatment.
-
 
6093
  * @param  hi2c I2C handle.
-
 
6094
  * @retval None
-
 
6095
  */
-
 
6096
static void I2C_TreatErrorCallback(I2C_HandleTypeDef *hi2c)
-
 
6097
{
5818
  else if (hi2c->State == HAL_I2C_STATE_ABORT)
6098
  if (hi2c->State == HAL_I2C_STATE_ABORT)
5819
  {
6099
  {
5820
    hi2c->State = HAL_I2C_STATE_READY;
6100
    hi2c->State = HAL_I2C_STATE_READY;
-
 
6101
    hi2c->PreviousState = I2C_STATE_NONE;
5821
 
6102
 
5822
    /* Process Unlocked */
6103
    /* Process Unlocked */
5823
    __HAL_UNLOCK(hi2c);
6104
    __HAL_UNLOCK(hi2c);
5824
 
6105
 
5825
    /* Call the corresponding callback to inform upper layer of End of Transfer */
6106
    /* Call the corresponding callback to inform upper layer of End of Transfer */
Line 5829... Line 6110...
5829
    HAL_I2C_AbortCpltCallback(hi2c);
6110
    HAL_I2C_AbortCpltCallback(hi2c);
5830
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
6111
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
5831
  }
6112
  }
5832
  else
6113
  else
5833
  {
6114
  {
-
 
6115
    hi2c->PreviousState = I2C_STATE_NONE;
-
 
6116
 
5834
    /* Process Unlocked */
6117
    /* Process Unlocked */
5835
    __HAL_UNLOCK(hi2c);
6118
    __HAL_UNLOCK(hi2c);
5836
 
6119
 
5837
    /* Call the corresponding callback to inform upper layer of End of Transfer */
6120
    /* Call the corresponding callback to inform upper layer of End of Transfer */
5838
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
6121
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
Line 5869... Line 6152...
5869
  * @param  hdma DMA handle
6152
  * @param  hdma DMA handle
5870
  * @retval None
6153
  * @retval None
5871
  */
6154
  */
5872
static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
6155
static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)
5873
{
6156
{
-
 
6157
  /* Derogation MISRAC2012-Rule-11.5 */
5874
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
6158
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
5875
 
6159
 
5876
  /* Disable DMA Request */
6160
  /* Disable DMA Request */
5877
  hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
6161
  hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;
5878
 
6162
 
5879
  /* If last transfer, enable STOP interrupt */
6163
  /* If last transfer, enable STOP interrupt */
Line 5897... Line 6181...
5897
    {
6181
    {
5898
      hi2c->XferSize = hi2c->XferCount;
6182
      hi2c->XferSize = hi2c->XferCount;
5899
    }
6183
    }
5900
 
6184
 
5901
    /* Enable the DMA channel */
6185
    /* Enable the DMA channel */
5902
    if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize) != HAL_OK)
6186
    if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR,
-
 
6187
                         hi2c->XferSize) != HAL_OK)
5903
    {
6188
    {
5904
      /* Call the corresponding callback to inform upper layer of End of Transfer */
6189
      /* Call the corresponding callback to inform upper layer of End of Transfer */
5905
      I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
6190
      I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
5906
    }
6191
    }
5907
    else
6192
    else
Line 5917... Line 6202...
5917
  * @param  hdma DMA handle
6202
  * @param  hdma DMA handle
5918
  * @retval None
6203
  * @retval None
5919
  */
6204
  */
5920
static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
6205
static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
5921
{
6206
{
-
 
6207
  /* Derogation MISRAC2012-Rule-11.5 */
5922
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
6208
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
5923
  uint32_t tmpoptions = hi2c->XferOptions;
6209
  uint32_t tmpoptions = hi2c->XferOptions;
5924
 
6210
 
5925
  if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME))
6211
  if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME))
5926
  {
6212
  {
5927
    /* Disable DMA Request */
6213
    /* Disable DMA Request */
Line 5944... Line 6230...
5944
  * @param  hdma DMA handle
6230
  * @param  hdma DMA handle
5945
  * @retval None
6231
  * @retval None
5946
  */
6232
  */
5947
static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
6233
static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)
5948
{
6234
{
-
 
6235
  /* Derogation MISRAC2012-Rule-11.5 */
5949
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
6236
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
5950
 
6237
 
5951
  /* Disable DMA Request */
6238
  /* Disable DMA Request */
5952
  hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
6239
  hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;
5953
 
6240
 
5954
  /* If last transfer, enable STOP interrupt */
6241
  /* If last transfer, enable STOP interrupt */
Line 5972... Line 6259...
5972
    {
6259
    {
5973
      hi2c->XferSize = hi2c->XferCount;
6260
      hi2c->XferSize = hi2c->XferCount;
5974
    }
6261
    }
5975
 
6262
 
5976
    /* Enable the DMA channel */
6263
    /* Enable the DMA channel */
5977
    if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize) != HAL_OK)
6264
    if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr,
-
 
6265
                         hi2c->XferSize) != HAL_OK)
5978
    {
6266
    {
5979
      /* Call the corresponding callback to inform upper layer of End of Transfer */
6267
      /* Call the corresponding callback to inform upper layer of End of Transfer */
5980
      I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
6268
      I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);
5981
    }
6269
    }
5982
    else
6270
    else
Line 5992... Line 6280...
5992
  * @param  hdma DMA handle
6280
  * @param  hdma DMA handle
5993
  * @retval None
6281
  * @retval None
5994
  */
6282
  */
5995
static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
6283
static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)
5996
{
6284
{
-
 
6285
  /* Derogation MISRAC2012-Rule-11.5 */
5997
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
6286
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
5998
  uint32_t tmpoptions = hi2c->XferOptions;
6287
  uint32_t tmpoptions = hi2c->XferOptions;
5999
 
6288
 
6000
  if ((__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) && \
6289
  if ((__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) && \
6001
      (tmpoptions != I2C_NO_OPTION_FRAME))
6290
      (tmpoptions != I2C_NO_OPTION_FRAME))
6002
  {
6291
  {
Line 6019... Line 6308...
6019
  * @param hdma DMA handle
6308
  * @param hdma DMA handle
6020
  * @retval None
6309
  * @retval None
6021
  */
6310
  */
6022
static void I2C_DMAError(DMA_HandleTypeDef *hdma)
6311
static void I2C_DMAError(DMA_HandleTypeDef *hdma)
6023
{
6312
{
-
 
6313
  /* Derogation MISRAC2012-Rule-11.5 */
6024
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
6314
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
6025
 
6315
 
6026
  /* Disable Acknowledge */
6316
  /* Disable Acknowledge */
6027
  hi2c->Instance->CR2 |= I2C_CR2_NACK;
6317
  hi2c->Instance->CR2 |= I2C_CR2_NACK;
6028
 
6318
 
6029
  /* Call the corresponding callback to inform upper layer of End of Transfer */
6319
  /* Call the corresponding callback to inform upper layer of End of Transfer */
Line 6036... Line 6326...
6036
  * @param hdma DMA handle.
6326
  * @param hdma DMA handle.
6037
  * @retval None
6327
  * @retval None
6038
  */
6328
  */
6039
static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
6329
static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
6040
{
6330
{
-
 
6331
  /* Derogation MISRAC2012-Rule-11.5 */
6041
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */
6332
  I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
6042
 
6333
 
6043
  /* Reset AbortCpltCallback */
6334
  /* Reset AbortCpltCallback */
6044
  hi2c->hdmatx->XferAbortCallback = NULL;
-
 
6045
  hi2c->hdmarx->XferAbortCallback = NULL;
-
 
6046
 
-
 
6047
  /* Check if come from abort from user */
-
 
6048
  if (hi2c->State == HAL_I2C_STATE_ABORT)
6335
  if (hi2c->hdmatx != NULL)
6049
  {
6336
  {
6050
    hi2c->State = HAL_I2C_STATE_READY;
-
 
6051
 
-
 
6052
    /* Call the corresponding callback to inform upper layer of End of Transfer */
-
 
6053
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-
 
6054
    hi2c->AbortCpltCallback(hi2c);
6337
    hi2c->hdmatx->XferAbortCallback = NULL;
6055
#else
-
 
6056
    HAL_I2C_AbortCpltCallback(hi2c);
-
 
6057
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
 
6058
  }
6338
  }
6059
  else
6339
  if (hi2c->hdmarx != NULL)
6060
  {
6340
  {
6061
    /* Call the corresponding callback to inform upper layer of End of Transfer */
-
 
6062
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
-
 
6063
    hi2c->ErrorCallback(hi2c);
6341
    hi2c->hdmarx->XferAbortCallback = NULL;
6064
#else
-
 
6065
    HAL_I2C_ErrorCallback(hi2c);
-
 
6066
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
-
 
6067
  }
6342
  }
-
 
6343
 
-
 
6344
  I2C_TreatErrorCallback(hi2c);
6068
}
6345
}
6069
 
6346
 
6070
/**
6347
/**
6071
  * @brief  This function handles I2C Communication Timeout.
6348
  * @brief  This function handles I2C Communication Timeout.
6072
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
6349
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
Line 6075... Line 6352...
6075
  * @param  Status The new Flag status (SET or RESET).
6352
  * @param  Status The new Flag status (SET or RESET).
6076
  * @param  Timeout Timeout duration
6353
  * @param  Timeout Timeout duration
6077
  * @param  Tickstart Tick start value
6354
  * @param  Tickstart Tick start value
6078
  * @retval HAL status
6355
  * @retval HAL status
6079
  */
6356
  */
6080
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
6357
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status,
-
 
6358
                                                    uint32_t Timeout, uint32_t Tickstart)
6081
{
6359
{
6082
  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
6360
  while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
6083
  {
6361
  {
6084
    /* Check for the Timeout */
6362
    /* Check for the Timeout */
6085
    if (Timeout != HAL_MAX_DELAY)
6363
    if (Timeout != HAL_MAX_DELAY)
Line 6105... Line 6383...
6105
  *                the configuration information for the specified I2C.
6383
  *                the configuration information for the specified I2C.
6106
  * @param  Timeout Timeout duration
6384
  * @param  Timeout Timeout duration
6107
  * @param  Tickstart Tick start value
6385
  * @param  Tickstart Tick start value
6108
  * @retval HAL status
6386
  * @retval HAL status
6109
  */
6387
  */
6110
static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
6388
static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
6389
                                                        uint32_t Tickstart)
6111
{
6390
{
6112
  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
6391
  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)
6113
  {
6392
  {
6114
    /* Check if a NACK is detected */
6393
    /* Check if a NACK is detected */
6115
    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
6394
    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
Line 6142... Line 6421...
6142
  *                the configuration information for the specified I2C.
6421
  *                the configuration information for the specified I2C.
6143
  * @param  Timeout Timeout duration
6422
  * @param  Timeout Timeout duration
6144
  * @param  Tickstart Tick start value
6423
  * @param  Tickstart Tick start value
6145
  * @retval HAL status
6424
  * @retval HAL status
6146
  */
6425
  */
6147
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
6426
static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
6427
                                                        uint32_t Tickstart)
6148
{
6428
{
6149
  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
6429
  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
6150
  {
6430
  {
6151
    /* Check if a NACK is detected */
6431
    /* Check if a NACK is detected */
6152
    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
6432
    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
Line 6176... Line 6456...
6176
  *                the configuration information for the specified I2C.
6456
  *                the configuration information for the specified I2C.
6177
  * @param  Timeout Timeout duration
6457
  * @param  Timeout Timeout duration
6178
  * @param  Tickstart Tick start value
6458
  * @param  Tickstart Tick start value
6179
  * @retval HAL status
6459
  * @retval HAL status
6180
  */
6460
  */
6181
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
6461
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
-
 
6462
                                                        uint32_t Tickstart)
6182
{
6463
{
6183
  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
6464
  while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
6184
  {
6465
  {
6185
    /* Check if a NACK is detected */
6466
    /* Check if a NACK is detected */
6186
    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
6467
    if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)
Line 6243... Line 6524...
6243
  */
6524
  */
6244
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
6525
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
6245
{
6526
{
6246
  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
6527
  if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
6247
  {
6528
  {
-
 
6529
    /* In case of Soft End condition, generate the STOP condition */
-
 
6530
    if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)
-
 
6531
    {
-
 
6532
      /* Generate Stop */
-
 
6533
      hi2c->Instance->CR2 |= I2C_CR2_STOP;
-
 
6534
    }
6248
    /* Wait until STOP Flag is reset */
6535
    /* Wait until STOP Flag is reset */
6249
    /* AutoEnd should be initiate after AF */
6536
    /* AutoEnd should be initiate after AF */
6250
    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
6537
    while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
6251
    {
6538
    {
6252
      /* Check for the Timeout */
6539
      /* Check for the Timeout */
Line 6307... Line 6594...
6307
  *     @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
6594
  *     @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).
6308
  *     @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
6595
  *     @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.
6309
  *     @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
6596
  *     @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.
6310
  * @retval None
6597
  * @retval None
6311
  */
6598
  */
6312
static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
6599
static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
-
 
6600
                               uint32_t Request)
6313
{
6601
{
6314
  /* Check the parameters */
6602
  /* Check the parameters */
6315
  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
6603
  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
6316
  assert_param(IS_TRANSFER_MODE(Mode));
6604
  assert_param(IS_TRANSFER_MODE(Mode));
6317
  assert_param(IS_TRANSFER_REQUEST(Request));
6605
  assert_param(IS_TRANSFER_REQUEST(Request));
6318
 
6606
 
6319
  /* update CR2 register */
6607
  /* update CR2 register */
-
 
6608
  MODIFY_REG(hi2c->Instance->CR2,
-
 
6609
             ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \
6320
  MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \
6610
               (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \
-
 
6611
               I2C_CR2_START | I2C_CR2_STOP)), \
-
 
6612
             (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \
6321
             (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
6613
                        (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \
-
 
6614
                        (uint32_t)Mode | (uint32_t)Request));
6322
}
6615
}
6323
 
6616
 
6324
/**
6617
/**
6325
  * @brief  Manage the enabling of Interrupts.
6618
  * @brief  Manage the enabling of Interrupts.
6326
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
6619
  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
Line 6339... Line 6632...
6339
    {
6632
    {
6340
      /* Enable ERR, STOP, NACK and ADDR interrupts */
6633
      /* Enable ERR, STOP, NACK and ADDR interrupts */
6341
      tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
6634
      tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
6342
    }
6635
    }
6343
 
6636
 
6344
    if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
6637
    if (InterruptRequest == I2C_XFER_ERROR_IT)
6345
    {
6638
    {
6346
      /* Enable ERR and NACK interrupts */
6639
      /* Enable ERR and NACK interrupts */
6347
      tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
6640
      tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
6348
    }
6641
    }
6349
 
6642
 
6350
    if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
6643
    if (InterruptRequest == I2C_XFER_CPLT_IT)
6351
    {
6644
    {
6352
      /* Enable STOP interrupts */
6645
      /* Enable STOP interrupts */
6353
      tmpisr |= I2C_IT_STOPI;
6646
      tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI);
6354
    }
6647
    }
6355
 
6648
 
6356
    if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
6649
    if (InterruptRequest == I2C_XFER_RELOAD_IT)
6357
    {
6650
    {
6358
      /* Enable TC interrupts */
6651
      /* Enable TC interrupts */
6359
      tmpisr |= I2C_IT_TCI;
6652
      tmpisr |= I2C_IT_TCI;
6360
    }
6653
    }
6361
  }
6654
  }
Line 6377... Line 6670...
6377
    {
6670
    {
6378
      /* Enable ERR, TC, STOP, NACK and TXI interrupts */
6671
      /* Enable ERR, TC, STOP, NACK and TXI interrupts */
6379
      tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI;
6672
      tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI;
6380
    }
6673
    }
6381
 
6674
 
6382
    else if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
6675
    if (InterruptRequest == I2C_XFER_CPLT_IT)
6383
    {
6676
    {
6384
      /* Enable STOP interrupts */
6677
      /* Enable STOP interrupts */
6385
      tmpisr |= I2C_IT_STOPI;
6678
      tmpisr |= I2C_IT_STOPI;
6386
    }
6679
    }
6387
  }
6680
  }
Line 6431... Line 6724...
6431
  {
6724
  {
6432
    /* Disable ADDR, NACK and STOP interrupts */
6725
    /* Disable ADDR, NACK and STOP interrupts */
6433
    tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
6726
    tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;
6434
  }
6727
  }
6435
 
6728
 
6436
  if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)
6729
  if (InterruptRequest == I2C_XFER_ERROR_IT)
6437
  {
6730
  {
6438
    /* Enable ERR and NACK interrupts */
6731
    /* Enable ERR and NACK interrupts */
6439
    tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
6732
    tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;
6440
  }
6733
  }
6441
 
6734
 
6442
  if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)
6735
  if (InterruptRequest == I2C_XFER_CPLT_IT)
6443
  {
6736
  {
6444
    /* Enable STOP interrupts */
6737
    /* Enable STOP interrupts */
6445
    tmpisr |= I2C_IT_STOPI;
6738
    tmpisr |= I2C_IT_STOPI;
6446
  }
6739
  }
6447
 
6740
 
6448
  if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)
6741
  if (InterruptRequest == I2C_XFER_RELOAD_IT)
6449
  {
6742
  {
6450
    /* Enable TC interrupts */
6743
    /* Enable TC interrupts */
6451
    tmpisr |= I2C_IT_TCI;
6744
    tmpisr |= I2C_IT_TCI;
6452
  }
6745
  }
6453
 
6746
 
Line 6456... Line 6749...
6456
  /* all disable interrupts request are not done */
6749
  /* all disable interrupts request are not done */
6457
  __HAL_I2C_DISABLE_IT(hi2c, tmpisr);
6750
  __HAL_I2C_DISABLE_IT(hi2c, tmpisr);
6458
}
6751
}
6459
 
6752
 
6460
/**
6753
/**
6461
  * @brief  Convert I2Cx OTHER_xxx XferOptions to functionnal XferOptions.
6754
  * @brief  Convert I2Cx OTHER_xxx XferOptions to functional XferOptions.
6462
  * @param  hi2c I2C handle.
6755
  * @param  hi2c I2C handle.
6463
  * @retval None
6756
  * @retval None
6464
  */
6757
  */
6465
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
6758
static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
6466
{
6759
{