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Rev 2 Rev 6
Line 131... Line 131...
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    /* Wait for calibration completion */
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    /* Wait for calibration completion */
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    while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
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    while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
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    {
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    {
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      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
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      if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT)
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      {
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      {
- 
 
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        /* New check to avoid false timeout detection in case of preemption */
- 
 
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        if(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
- 
 
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        {
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        /* Update ADC state machine to error */
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          /* Update ADC state machine to error */
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        ADC_STATE_CLR_SET(hadc->State,
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          ADC_STATE_CLR_SET(hadc->State,
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                          HAL_ADC_STATE_BUSY_INTERNAL,
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                            HAL_ADC_STATE_BUSY_INTERNAL,
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                          HAL_ADC_STATE_ERROR_INTERNAL);
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                            HAL_ADC_STATE_ERROR_INTERNAL);
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        /* Process unlocked */
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          /* Process unlocked */
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        __HAL_UNLOCK(hadc);
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          __HAL_UNLOCK(hadc);
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        return HAL_ERROR;
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          return HAL_ERROR;
- 
 
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        }
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      }
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      }
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    }
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    }
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    /* Restore ADC DMA transfer request after calibration */
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    /* Restore ADC DMA transfer request after calibration */
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    SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer);
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    SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer);