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| 180 | typedef struct |
180 | typedef struct |
| 181 | { |
181 | { |
| 182 | uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. |
182 | uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. |
| 183 | This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. |
183 | This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. |
| 184 | 184 | ||
| 185 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/ |
185 | This feature can be modified afterwards using unitary function |
| - | 186 | @ref LL_TIM_SetPrescaler().*/ |
|
| 186 | 187 | ||
| 187 | uint32_t CounterMode; /*!< Specifies the counter mode. |
188 | uint32_t CounterMode; /*!< Specifies the counter mode. |
| 188 | This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. |
189 | This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. |
| 189 | 190 | ||
| 190 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/ |
191 | This feature can be modified afterwards using unitary function |
| - | 192 | @ref LL_TIM_SetCounterMode().*/ |
|
| 191 | 193 | ||
| 192 | uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active |
194 | uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active |
| 193 | Auto-Reload Register at the next update event. |
195 | Auto-Reload Register at the next update event. |
| 194 | This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF. |
196 | This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF. |
| 195 | Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF. |
197 | Some timer instances may support 32 bits counters. In that case this parameter must |
| - | 198 | be a number between 0x0000 and 0xFFFFFFFF. |
|
| 196 | 199 | ||
| 197 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/ |
200 | This feature can be modified afterwards using unitary function |
| - | 201 | @ref LL_TIM_SetAutoReload().*/ |
|
| 198 | 202 | ||
| 199 | uint32_t ClockDivision; /*!< Specifies the clock division. |
203 | uint32_t ClockDivision; /*!< Specifies the clock division. |
| 200 | This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. |
204 | This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. |
| 201 | 205 | ||
| 202 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/ |
206 | This feature can be modified afterwards using unitary function |
| - | 207 | @ref LL_TIM_SetClockDivision().*/ |
|
| 203 | 208 | ||
| 204 | uint8_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter |
209 | uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter |
| 205 | reaches zero, an update event is generated and counting restarts |
210 | reaches zero, an update event is generated and counting restarts |
| 206 | from the RCR value (N). |
211 | from the RCR value (N). |
| 207 | This means in PWM mode that (N+1) corresponds to: |
212 | This means in PWM mode that (N+1) corresponds to: |
| 208 | - the number of PWM periods in edge-aligned mode |
213 | - the number of PWM periods in edge-aligned mode |
| 209 | - the number of half PWM period in center-aligned mode |
214 | - the number of half PWM period in center-aligned mode |
| 210 | This parameter must be a number between 0x00 and 0xFF. |
215 | GP timers: this parameter must be a number between Min_Data = 0x00 and |
| - | 216 | Max_Data = 0xFF. |
|
| - | 217 | Advanced timers: this parameter must be a number between Min_Data = 0x0000 and |
|
| - | 218 | Max_Data = 0xFFFF. |
|
| 211 | 219 | ||
| 212 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetRepetitionCounter().*/ |
220 | This feature can be modified afterwards using unitary function |
| - | 221 | @ref LL_TIM_SetRepetitionCounter().*/ |
|
| 213 | } LL_TIM_InitTypeDef; |
222 | } LL_TIM_InitTypeDef; |
| 214 | 223 | ||
| 215 | /** |
224 | /** |
| 216 | * @brief TIM Output Compare configuration structure definition. |
225 | * @brief TIM Output Compare configuration structure definition. |
| 217 | */ |
226 | */ |
| 218 | typedef struct |
227 | typedef struct |
| 219 | { |
228 | { |
| 220 | uint32_t OCMode; /*!< Specifies the output mode. |
229 | uint32_t OCMode; /*!< Specifies the output mode. |
| 221 | This parameter can be a value of @ref TIM_LL_EC_OCMODE. |
230 | This parameter can be a value of @ref TIM_LL_EC_OCMODE. |
| 222 | 231 | ||
| 223 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/ |
232 | This feature can be modified afterwards using unitary function |
| - | 233 | @ref LL_TIM_OC_SetMode().*/ |
|
| 224 | 234 | ||
| 225 | uint32_t OCState; /*!< Specifies the TIM Output Compare state. |
235 | uint32_t OCState; /*!< Specifies the TIM Output Compare state. |
| 226 | This parameter can be a value of @ref TIM_LL_EC_OCSTATE. |
236 | This parameter can be a value of @ref TIM_LL_EC_OCSTATE. |
| 227 | 237 | ||
| - | 238 | This feature can be modified afterwards using unitary functions |
|
| 228 | This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ |
239 | @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ |
| 229 | 240 | ||
| 230 | uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. |
241 | uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. |
| 231 | This parameter can be a value of @ref TIM_LL_EC_OCSTATE. |
242 | This parameter can be a value of @ref TIM_LL_EC_OCSTATE. |
| 232 | 243 | ||
| - | 244 | This feature can be modified afterwards using unitary functions |
|
| 233 | This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ |
245 | @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ |
| 234 | 246 | ||
| 235 | uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register. |
247 | uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register. |
| 236 | This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. |
248 | This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. |
| 237 | 249 | ||
| 238 | This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/ |
250 | This feature can be modified afterwards using unitary function |
| - | 251 | LL_TIM_OC_SetCompareCHx (x=1..6).*/ |
|
| 239 | 252 | ||
| 240 | uint32_t OCPolarity; /*!< Specifies the output polarity. |
253 | uint32_t OCPolarity; /*!< Specifies the output polarity. |
| 241 | This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. |
254 | This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. |
| 242 | 255 | ||
| 243 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/ |
256 | This feature can be modified afterwards using unitary function |
| - | 257 | @ref LL_TIM_OC_SetPolarity().*/ |
|
| 244 | 258 | ||
| 245 | uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. |
259 | uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. |
| 246 | This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. |
260 | This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. |
| 247 | 261 | ||
| 248 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/ |
262 | This feature can be modified afterwards using unitary function |
| - | 263 | @ref LL_TIM_OC_SetPolarity().*/ |
|
| 249 | 264 | ||
| 250 | 265 | ||
| 251 | uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
266 | uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
| 252 | This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. |
267 | This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. |
| 253 | 268 | ||
| 254 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/ |
269 | This feature can be modified afterwards using unitary function |
| - | 270 | @ref LL_TIM_OC_SetIdleState().*/ |
|
| 255 | 271 | ||
| 256 | uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
272 | uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. |
| 257 | This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. |
273 | This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. |
| 258 | 274 | ||
| 259 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/ |
275 | This feature can be modified afterwards using unitary function |
| - | 276 | @ref LL_TIM_OC_SetIdleState().*/ |
|
| 260 | } LL_TIM_OC_InitTypeDef; |
277 | } LL_TIM_OC_InitTypeDef; |
| 261 | 278 | ||
| 262 | /** |
279 | /** |
| 263 | * @brief TIM Input Capture configuration structure definition. |
280 | * @brief TIM Input Capture configuration structure definition. |
| 264 | */ |
281 | */ |
| Line 267... | Line 284... | ||
| 267 | { |
284 | { |
| 268 | 285 | ||
| 269 | uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. |
286 | uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. |
| 270 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
287 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
| 271 | 288 | ||
| 272 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ |
289 | This feature can be modified afterwards using unitary function |
| - | 290 | @ref LL_TIM_IC_SetPolarity().*/ |
|
| 273 | 291 | ||
| 274 | uint32_t ICActiveInput; /*!< Specifies the input. |
292 | uint32_t ICActiveInput; /*!< Specifies the input. |
| 275 | This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. |
293 | This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. |
| 276 | 294 | ||
| 277 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ |
295 | This feature can be modified afterwards using unitary function |
| - | 296 | @ref LL_TIM_IC_SetActiveInput().*/ |
|
| 278 | 297 | ||
| 279 | uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. |
298 | uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. |
| 280 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
299 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
| 281 | 300 | ||
| 282 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ |
301 | This feature can be modified afterwards using unitary function |
| - | 302 | @ref LL_TIM_IC_SetPrescaler().*/ |
|
| 283 | 303 | ||
| 284 | uint32_t ICFilter; /*!< Specifies the input capture filter. |
304 | uint32_t ICFilter; /*!< Specifies the input capture filter. |
| 285 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
305 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
| 286 | 306 | ||
| 287 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ |
307 | This feature can be modified afterwards using unitary function |
| - | 308 | @ref LL_TIM_IC_SetFilter().*/ |
|
| 288 | } LL_TIM_IC_InitTypeDef; |
309 | } LL_TIM_IC_InitTypeDef; |
| 289 | 310 | ||
| 290 | 311 | ||
| 291 | /** |
312 | /** |
| 292 | * @brief TIM Encoder interface configuration structure definition. |
313 | * @brief TIM Encoder interface configuration structure definition. |
| Line 294... | Line 315... | ||
| 294 | typedef struct |
315 | typedef struct |
| 295 | { |
316 | { |
| 296 | uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). |
317 | uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). |
| 297 | This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. |
318 | This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. |
| 298 | 319 | ||
| 299 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/ |
320 | This feature can be modified afterwards using unitary function |
| - | 321 | @ref LL_TIM_SetEncoderMode().*/ |
|
| 300 | 322 | ||
| 301 | uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. |
323 | uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. |
| 302 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
324 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
| 303 | 325 | ||
| 304 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ |
326 | This feature can be modified afterwards using unitary function |
| - | 327 | @ref LL_TIM_IC_SetPolarity().*/ |
|
| 305 | 328 | ||
| 306 | uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source |
329 | uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source |
| 307 | This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. |
330 | This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. |
| 308 | 331 | ||
| 309 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ |
332 | This feature can be modified afterwards using unitary function |
| - | 333 | @ref LL_TIM_IC_SetActiveInput().*/ |
|
| 310 | 334 | ||
| 311 | uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. |
335 | uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. |
| 312 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
336 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
| 313 | 337 | ||
| 314 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ |
338 | This feature can be modified afterwards using unitary function |
| - | 339 | @ref LL_TIM_IC_SetPrescaler().*/ |
|
| 315 | 340 | ||
| 316 | uint32_t IC1Filter; /*!< Specifies the TI1 input filter. |
341 | uint32_t IC1Filter; /*!< Specifies the TI1 input filter. |
| 317 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
342 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
| 318 | 343 | ||
| 319 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ |
344 | This feature can be modified afterwards using unitary function |
| - | 345 | @ref LL_TIM_IC_SetFilter().*/ |
|
| 320 | 346 | ||
| 321 | uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. |
347 | uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. |
| 322 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
348 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
| 323 | 349 | ||
| 324 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ |
350 | This feature can be modified afterwards using unitary function |
| - | 351 | @ref LL_TIM_IC_SetPolarity().*/ |
|
| 325 | 352 | ||
| 326 | uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source |
353 | uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source |
| 327 | This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. |
354 | This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. |
| 328 | 355 | ||
| 329 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ |
356 | This feature can be modified afterwards using unitary function |
| - | 357 | @ref LL_TIM_IC_SetActiveInput().*/ |
|
| 330 | 358 | ||
| 331 | uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. |
359 | uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. |
| 332 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
360 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
| 333 | 361 | ||
| 334 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ |
362 | This feature can be modified afterwards using unitary function |
| - | 363 | @ref LL_TIM_IC_SetPrescaler().*/ |
|
| 335 | 364 | ||
| 336 | uint32_t IC2Filter; /*!< Specifies the TI2 input filter. |
365 | uint32_t IC2Filter; /*!< Specifies the TI2 input filter. |
| 337 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
366 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
| 338 | 367 | ||
| 339 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ |
368 | This feature can be modified afterwards using unitary function |
| - | 369 | @ref LL_TIM_IC_SetFilter().*/ |
|
| 340 | 370 | ||
| 341 | } LL_TIM_ENCODER_InitTypeDef; |
371 | } LL_TIM_ENCODER_InitTypeDef; |
| 342 | 372 | ||
| 343 | /** |
373 | /** |
| 344 | * @brief TIM Hall sensor interface configuration structure definition. |
374 | * @brief TIM Hall sensor interface configuration structure definition. |
| Line 347... | Line 377... | ||
| 347 | { |
377 | { |
| 348 | 378 | ||
| 349 | uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. |
379 | uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. |
| 350 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
380 | This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. |
| 351 | 381 | ||
| 352 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ |
382 | This feature can be modified afterwards using unitary function |
| - | 383 | @ref LL_TIM_IC_SetPolarity().*/ |
|
| 353 | 384 | ||
| 354 | uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. |
385 | uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. |
| 355 | Prescaler must be set to get a maximum counter period longer than the |
386 | Prescaler must be set to get a maximum counter period longer than the |
| 356 | time interval between 2 consecutive changes on the Hall inputs. |
387 | time interval between 2 consecutive changes on the Hall inputs. |
| 357 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
388 | This parameter can be a value of @ref TIM_LL_EC_ICPSC. |
| 358 | 389 | ||
| 359 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ |
390 | This feature can be modified afterwards using unitary function |
| - | 391 | @ref LL_TIM_IC_SetPrescaler().*/ |
|
| 360 | 392 | ||
| 361 | uint32_t IC1Filter; /*!< Specifies the TI1 input filter. |
393 | uint32_t IC1Filter; /*!< Specifies the TI1 input filter. |
| 362 | This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. |
394 | This parameter can be a value of |
| - | 395 | @ref TIM_LL_EC_IC_FILTER. |
|
| 363 | 396 | ||
| 364 | This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ |
397 | This feature can be modified afterwards using unitary function |
| - | 398 | @ref LL_TIM_IC_SetFilter().*/ |
|
| 365 | 399 | ||
| 366 | uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register. |
400 | uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register. |
| 367 | A positive pulse (TRGO event) is generated with a programmable delay every time |
401 | A positive pulse (TRGO event) is generated with a programmable delay every time |
| 368 | a change occurs on the Hall inputs. |
402 | a change occurs on the Hall inputs. |
| 369 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. |
403 | This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. |
| 370 | 404 | ||
| 371 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetCompareCH2().*/ |
405 | This feature can be modified afterwards using unitary function |
| - | 406 | @ref LL_TIM_OC_SetCompareCH2().*/ |
|
| 372 | } LL_TIM_HALLSENSOR_InitTypeDef; |
407 | } LL_TIM_HALLSENSOR_InitTypeDef; |
| 373 | 408 | ||
| 374 | /** |
409 | /** |
| 375 | * @brief BDTR (Break and Dead Time) structure definition |
410 | * @brief BDTR (Break and Dead Time) structure definition |
| 376 | */ |
411 | */ |
| 377 | typedef struct |
412 | typedef struct |
| 378 | { |
413 | { |
| 379 | uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. |
414 | uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. |
| 380 | This parameter can be a value of @ref TIM_LL_EC_OSSR |
415 | This parameter can be a value of @ref TIM_LL_EC_OSSR |
| 381 | 416 | ||
| 382 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetOffStates() |
417 | This feature can be modified afterwards using unitary function |
| - | 418 | @ref LL_TIM_SetOffStates() |
|
| 383 | 419 | ||
| 384 | @note This bit-field cannot be modified as long as LOCK level 2 has been programmed. */ |
420 | @note This bit-field cannot be modified as long as LOCK level 2 has been |
| - | 421 | programmed. */ |
|
| 385 | 422 | ||
| 386 | uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. |
423 | uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. |
| 387 | This parameter can be a value of @ref TIM_LL_EC_OSSI |
424 | This parameter can be a value of @ref TIM_LL_EC_OSSI |
| 388 | 425 | ||
| 389 | This feature can be modified afterwards using unitary function @ref LL_TIM_SetOffStates() |
426 | This feature can be modified afterwards using unitary function |
| - | 427 | @ref LL_TIM_SetOffStates() |
|
| 390 | 428 | ||
| 391 | @note This bit-field cannot be modified as long as LOCK level 2 has been programmed. */ |
429 | @note This bit-field cannot be modified as long as LOCK level 2 has been |
| - | 430 | programmed. */ |
|
| 392 | 431 | ||
| 393 | uint32_t LockLevel; /*!< Specifies the LOCK level parameters. |
432 | uint32_t LockLevel; /*!< Specifies the LOCK level parameters. |
| 394 | This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL |
433 | This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL |
| 395 | 434 | ||
| 396 | @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR register |
435 | @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR |
| 397 | has been written, their content is frozen until the next reset.*/ |
436 | register has been written, their content is frozen until the next reset.*/ |
| 398 | 437 | ||
| 399 | uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the |
438 | uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the |
| 400 | switching-on of the outputs. |
439 | switching-on of the outputs. |
| 401 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
440 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
| 402 | 441 | ||
| 403 | This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetDeadTime() |
442 | This feature can be modified afterwards using unitary function |
| - | 443 | @ref LL_TIM_OC_SetDeadTime() |
|
| 404 | 444 | ||
| 405 | @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed. */ |
445 | @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been |
| - | 446 | programmed. */ |
|
| 406 | 447 | ||
| 407 | uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not. |
448 | uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not. |
| 408 | This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE |
449 | This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE |
| 409 | 450 | ||
| 410 | This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK() |
451 | This feature can be modified afterwards using unitary functions |
| - | 452 | @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK() |
|
| 411 | 453 | ||
| 412 | @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ |
454 | @note This bit-field can not be modified as long as LOCK level 1 has been |
| - | 455 | programmed. */ |
|
| 413 | 456 | ||
| 414 | uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. |
457 | uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. |
| 415 | This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY |
458 | This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY |
| 416 | 459 | ||
| 417 | This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK() |
460 | This feature can be modified afterwards using unitary function |
| - | 461 | @ref LL_TIM_ConfigBRK() |
|
| 418 | 462 | ||
| 419 | @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ |
463 | @note This bit-field can not be modified as long as LOCK level 1 has been |
| - | 464 | programmed. */ |
|
| 420 | 465 | ||
| 421 | uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. |
466 | uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. |
| 422 | This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE |
467 | This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE |
| 423 | 468 | ||
| - | 469 | This feature can be modified afterwards using unitary functions |
|
| 424 | This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput() |
470 | @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput() |
| 425 | 471 | ||
| 426 | @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ |
472 | @note This bit-field can not be modified as long as LOCK level 1 has been |
| - | 473 | programmed. */ |
|
| 427 | } LL_TIM_BDTR_InitTypeDef; |
474 | } LL_TIM_BDTR_InitTypeDef; |
| 428 | 475 | ||
| 429 | /** |
476 | /** |
| 430 | * @} |
477 | * @} |
| 431 | */ |
478 | */ |
| Line 502... | Line 549... | ||
| 502 | */ |
549 | */ |
| 503 | 550 | ||
| 504 | /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode |
551 | /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode |
| 505 | * @{ |
552 | * @{ |
| 506 | */ |
553 | */ |
| 507 | #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter is not stopped at update event */ |
554 | #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */ |
| 508 | #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter stops counting at the next update event */ |
555 | #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */ |
| 509 | /** |
556 | /** |
| 510 | * @} |
557 | * @} |
| 511 | */ |
558 | */ |
| 512 | 559 | ||
| 513 | /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode |
560 | /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode |
| 514 | * @{ |
561 | * @{ |
| 515 | */ |
562 | */ |
| 516 | #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!<Counter used as upcounter */ |
563 | #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!<Counter used as upcounter */ |
| 517 | #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounter */ |
564 | #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounter */ |
| 518 | #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_0 /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down. */ |
565 | #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting down. */ |
| 519 | #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_1 /*!<The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up */ |
566 | #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!<The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up */ |
| 520 | #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down. */ |
567 | #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and down alternatively. Output compare interrupt flags of output channels are set only when the counter is counting up or down. */ |
| 521 | /** |
568 | /** |
| 522 | * @} |
569 | * @} |
| 523 | */ |
570 | */ |
| 524 | 571 | ||
| Line 932... | Line 979... | ||
| 932 | * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 |
979 | * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 |
| 933 | * @param __DT__ deadtime duration (in ns) |
980 | * @param __DT__ deadtime duration (in ns) |
| 934 | * @retval DTG[0:7] |
981 | * @retval DTG[0:7] |
| 935 | */ |
982 | */ |
| 936 | #define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \ |
983 | #define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \ |
| - | 984 | ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ |
|
| 937 | ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \ |
985 | (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \ |
| 938 | (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\ |
986 | (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ |
| - | 987 | (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ |
|
| - | 988 | (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\ |
|
| 939 | (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\ |
989 | (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ |
| - | 990 | (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ |
|
| - | 991 | (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\ |
|
| 940 | (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\ |
992 | (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ |
| - | 993 | (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ |
|
| - | 994 | (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\ |
|
| 941 | 0U) |
995 | 0U) |
| 942 | 996 | ||
| 943 | /** |
997 | /** |
| 944 | * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. |
998 | * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. |
| 945 | * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); |
999 | * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); |
| Line 960... | Line 1014... | ||
| 960 | */ |
1014 | */ |
| 961 | #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ |
1015 | #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ |
| 962 | ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U) |
1016 | ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U) |
| 963 | 1017 | ||
| 964 | /** |
1018 | /** |
| 965 | * @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay. |
1019 | * @brief HELPER macro calculating the compare value required to achieve the required timer output compare |
| - | 1020 | * active/inactive delay. |
|
| 966 | * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); |
1021 | * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); |
| 967 | * @param __TIMCLK__ timer input clock frequency (in Hz) |
1022 | * @param __TIMCLK__ timer input clock frequency (in Hz) |
| 968 | * @param __PSC__ prescaler |
1023 | * @param __PSC__ prescaler |
| 969 | * @param __DELAY__ timer output compare active/inactive delay (in us) |
1024 | * @param __DELAY__ timer output compare active/inactive delay (in us) |
| 970 | * @retval Compare value (between Min_Data=0 and Max_Data=65535) |
1025 | * @retval Compare value (between Min_Data=0 and Max_Data=65535) |
| Line 972... | Line 1027... | ||
| 972 | #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ |
1027 | #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ |
| 973 | ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ |
1028 | ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ |
| 974 | / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) |
1029 | / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) |
| 975 | 1030 | ||
| 976 | /** |
1031 | /** |
| 977 | * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode). |
1032 | * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration |
| - | 1033 | * (when the timer operates in one pulse mode). |
|
| 978 | * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); |
1034 | * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); |
| 979 | * @param __TIMCLK__ timer input clock frequency (in Hz) |
1035 | * @param __TIMCLK__ timer input clock frequency (in Hz) |
| 980 | * @param __PSC__ prescaler |
1036 | * @param __PSC__ prescaler |
| 981 | * @param __DELAY__ timer output compare active/inactive delay (in us) |
1037 | * @param __DELAY__ timer output compare active/inactive delay (in us) |
| 982 | * @param __PULSE__ pulse duration (in us) |
1038 | * @param __PULSE__ pulse duration (in us) |
| Line 1183... | Line 1239... | ||
| 1183 | * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN |
1239 | * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN |
| 1184 | * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN |
1240 | * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN |
| 1185 | */ |
1241 | */ |
| 1186 | __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx) |
1242 | __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(TIM_TypeDef *TIMx) |
| 1187 | { |
1243 | { |
| - | 1244 | uint32_t counter_mode; |
|
| - | 1245 | ||
| 1188 | return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS)); |
1246 | counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); |
| - | 1247 | ||
| - | 1248 | if (counter_mode == 0U) |
|
| - | 1249 | { |
|
| - | 1250 | counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); |
|
| - | 1251 | } |
|
| - | 1252 | ||
| - | 1253 | return counter_mode; |
|
| 1189 | } |
1254 | } |
| 1190 | 1255 | ||
| 1191 | /** |
1256 | /** |
| 1192 | * @brief Enable auto-reload (ARR) preload. |
1257 | * @brief Enable auto-reload (ARR) preload. |
| 1193 | * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload |
1258 | * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload |
| Line 1220... | Line 1285... | ||
| 1220 | { |
1285 | { |
| 1221 | return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); |
1286 | return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); |
| 1222 | } |
1287 | } |
| 1223 | 1288 | ||
| 1224 | /** |
1289 | /** |
| 1225 | * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters. |
1290 | * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators |
| - | 1291 | * (when supported) and the digital filters. |
|
| 1226 | * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check |
1292 | * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check |
| 1227 | * whether or not the clock division feature is supported by the timer |
1293 | * whether or not the clock division feature is supported by the timer |
| 1228 | * instance. |
1294 | * instance. |
| 1229 | * @rmtoll CR1 CKD LL_TIM_SetClockDivision |
1295 | * @rmtoll CR1 CKD LL_TIM_SetClockDivision |
| 1230 | * @param TIMx Timer instance |
1296 | * @param TIMx Timer instance |
| Line 1238... | Line 1304... | ||
| 1238 | { |
1304 | { |
| 1239 | MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); |
1305 | MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); |
| 1240 | } |
1306 | } |
| 1241 | 1307 | ||
| 1242 | /** |
1308 | /** |
| 1243 | * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters. |
1309 | * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time |
| - | 1310 | * generators (when supported) and the digital filters. |
|
| 1244 | * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check |
1311 | * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check |
| 1245 | * whether or not the clock division feature is supported by the timer |
1312 | * whether or not the clock division feature is supported by the timer |
| 1246 | * instance. |
1313 | * instance. |
| 1247 | * @rmtoll CR1 CKD LL_TIM_GetClockDivision |
1314 | * @rmtoll CR1 CKD LL_TIM_GetClockDivision |
| 1248 | * @param TIMx Timer instance |
1315 | * @param TIMx Timer instance |
| Line 1356... | Line 1423... | ||
| 1356 | * @brief Set the repetition counter value. |
1423 | * @brief Set the repetition counter value. |
| 1357 | * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check |
1424 | * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check |
| 1358 | * whether or not a timer instance supports a repetition counter. |
1425 | * whether or not a timer instance supports a repetition counter. |
| 1359 | * @rmtoll RCR REP LL_TIM_SetRepetitionCounter |
1426 | * @rmtoll RCR REP LL_TIM_SetRepetitionCounter |
| 1360 | * @param TIMx Timer instance |
1427 | * @param TIMx Timer instance |
| 1361 | * @param RepetitionCounter between Min_Data=0 and Max_Data=255 |
1428 | * @param RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer. |
| 1362 | * @retval None |
1429 | * @retval None |
| 1363 | */ |
1430 | */ |
| 1364 | __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) |
1431 | __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) |
| 1365 | { |
1432 | { |
| 1366 | WRITE_REG(TIMx->RCR, RepetitionCounter); |
1433 | WRITE_REG(TIMx->RCR, RepetitionCounter); |
| Line 1584... | Line 1651... | ||
| 1584 | * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH |
1651 | * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH |
| 1585 | * @retval None |
1652 | * @retval None |
| 1586 | */ |
1653 | */ |
| 1587 | __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) |
1654 | __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) |
| 1588 | { |
1655 | { |
| 1589 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1656 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1590 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1657 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1591 | CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); |
1658 | CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); |
| 1592 | MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), |
1659 | MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), |
| 1593 | (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); |
1660 | (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); |
| 1594 | MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), |
1661 | MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), |
| 1595 | (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); |
1662 | (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); |
| Line 1619... | Line 1686... | ||
| 1619 | * @arg @ref LL_TIM_OCMODE_PWM2 |
1686 | * @arg @ref LL_TIM_OCMODE_PWM2 |
| 1620 | * @retval None |
1687 | * @retval None |
| 1621 | */ |
1688 | */ |
| 1622 | __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) |
1689 | __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) |
| 1623 | { |
1690 | { |
| 1624 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1691 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1625 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1692 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1626 | MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); |
1693 | MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); |
| 1627 | } |
1694 | } |
| 1628 | 1695 | ||
| 1629 | /** |
1696 | /** |
| 1630 | * @brief Get the output compare mode of an output channel. |
1697 | * @brief Get the output compare mode of an output channel. |
| 1631 | * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n |
1698 | * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n |
| Line 1648... | Line 1715... | ||
| 1648 | * @arg @ref LL_TIM_OCMODE_PWM1 |
1715 | * @arg @ref LL_TIM_OCMODE_PWM1 |
| 1649 | * @arg @ref LL_TIM_OCMODE_PWM2 |
1716 | * @arg @ref LL_TIM_OCMODE_PWM2 |
| 1650 | */ |
1717 | */ |
| 1651 | __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel) |
1718 | __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1652 | { |
1719 | { |
| 1653 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1720 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1654 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1721 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1655 | return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); |
1722 | return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); |
| 1656 | } |
1723 | } |
| 1657 | 1724 | ||
| 1658 | /** |
1725 | /** |
| 1659 | * @brief Set the polarity of an output channel. |
1726 | * @brief Set the polarity of an output channel. |
| 1660 | * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n |
1727 | * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n |
| Line 1678... | Line 1745... | ||
| 1678 | * @arg @ref LL_TIM_OCPOLARITY_LOW |
1745 | * @arg @ref LL_TIM_OCPOLARITY_LOW |
| 1679 | * @retval None |
1746 | * @retval None |
| 1680 | */ |
1747 | */ |
| 1681 | __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) |
1748 | __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) |
| 1682 | { |
1749 | { |
| 1683 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1750 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1684 | MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]); |
1751 | MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]); |
| 1685 | } |
1752 | } |
| 1686 | 1753 | ||
| 1687 | /** |
1754 | /** |
| 1688 | * @brief Get the polarity of an output channel. |
1755 | * @brief Get the polarity of an output channel. |
| Line 1706... | Line 1773... | ||
| 1706 | * @arg @ref LL_TIM_OCPOLARITY_HIGH |
1773 | * @arg @ref LL_TIM_OCPOLARITY_HIGH |
| 1707 | * @arg @ref LL_TIM_OCPOLARITY_LOW |
1774 | * @arg @ref LL_TIM_OCPOLARITY_LOW |
| 1708 | */ |
1775 | */ |
| 1709 | __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel) |
1776 | __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1710 | { |
1777 | { |
| 1711 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1778 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1712 | return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]); |
1779 | return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]); |
| 1713 | } |
1780 | } |
| 1714 | 1781 | ||
| 1715 | /** |
1782 | /** |
| 1716 | * @brief Set the IDLE state of an output channel |
1783 | * @brief Set the IDLE state of an output channel |
| Line 1739... | Line 1806... | ||
| 1739 | * @arg @ref LL_TIM_OCIDLESTATE_HIGH |
1806 | * @arg @ref LL_TIM_OCIDLESTATE_HIGH |
| 1740 | * @retval None |
1807 | * @retval None |
| 1741 | */ |
1808 | */ |
| 1742 | __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState) |
1809 | __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState) |
| 1743 | { |
1810 | { |
| 1744 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1811 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1745 | MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]); |
1812 | MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]); |
| 1746 | } |
1813 | } |
| 1747 | 1814 | ||
| 1748 | /** |
1815 | /** |
| 1749 | * @brief Get the IDLE state of an output channel |
1816 | * @brief Get the IDLE state of an output channel |
| Line 1767... | Line 1834... | ||
| 1767 | * @arg @ref LL_TIM_OCIDLESTATE_LOW |
1834 | * @arg @ref LL_TIM_OCIDLESTATE_LOW |
| 1768 | * @arg @ref LL_TIM_OCIDLESTATE_HIGH |
1835 | * @arg @ref LL_TIM_OCIDLESTATE_HIGH |
| 1769 | */ |
1836 | */ |
| 1770 | __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Channel) |
1837 | __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1771 | { |
1838 | { |
| 1772 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1839 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1773 | return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]); |
1840 | return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]); |
| 1774 | } |
1841 | } |
| 1775 | 1842 | ||
| 1776 | /** |
1843 | /** |
| 1777 | * @brief Enable fast mode for the output channel. |
1844 | * @brief Enable fast mode for the output channel. |
| Line 1788... | Line 1855... | ||
| 1788 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1855 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1789 | * @retval None |
1856 | * @retval None |
| 1790 | */ |
1857 | */ |
| 1791 | __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) |
1858 | __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1792 | { |
1859 | { |
| 1793 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1860 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1794 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1861 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1795 | SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); |
1862 | SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); |
| 1796 | 1863 | ||
| 1797 | } |
1864 | } |
| 1798 | 1865 | ||
| 1799 | /** |
1866 | /** |
| Line 1810... | Line 1877... | ||
| 1810 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1877 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1811 | * @retval None |
1878 | * @retval None |
| 1812 | */ |
1879 | */ |
| 1813 | __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) |
1880 | __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1814 | { |
1881 | { |
| 1815 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1882 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1816 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1883 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1817 | CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); |
1884 | CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); |
| 1818 | 1885 | ||
| 1819 | } |
1886 | } |
| 1820 | 1887 | ||
| 1821 | /** |
1888 | /** |
| Line 1832... | Line 1899... | ||
| 1832 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1899 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1833 | * @retval State of bit (1 or 0). |
1900 | * @retval State of bit (1 or 0). |
| 1834 | */ |
1901 | */ |
| 1835 | __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel) |
1902 | __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1836 | { |
1903 | { |
| 1837 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1904 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1838 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1905 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1839 | register uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]; |
1906 | uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]; |
| 1840 | return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); |
1907 | return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); |
| 1841 | } |
1908 | } |
| 1842 | 1909 | ||
| 1843 | /** |
1910 | /** |
| 1844 | * @brief Enable compare register (TIMx_CCRx) preload for the output channel. |
1911 | * @brief Enable compare register (TIMx_CCRx) preload for the output channel. |
| Line 1854... | Line 1921... | ||
| 1854 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1921 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1855 | * @retval None |
1922 | * @retval None |
| 1856 | */ |
1923 | */ |
| 1857 | __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) |
1924 | __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1858 | { |
1925 | { |
| 1859 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1926 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1860 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1927 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1861 | SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); |
1928 | SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); |
| 1862 | } |
1929 | } |
| 1863 | 1930 | ||
| 1864 | /** |
1931 | /** |
| 1865 | * @brief Disable compare register (TIMx_CCRx) preload for the output channel. |
1932 | * @brief Disable compare register (TIMx_CCRx) preload for the output channel. |
| Line 1875... | Line 1942... | ||
| 1875 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1942 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1876 | * @retval None |
1943 | * @retval None |
| 1877 | */ |
1944 | */ |
| 1878 | __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) |
1945 | __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1879 | { |
1946 | { |
| 1880 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1947 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1881 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1948 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1882 | CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); |
1949 | CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); |
| 1883 | } |
1950 | } |
| 1884 | 1951 | ||
| 1885 | /** |
1952 | /** |
| 1886 | * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel. |
1953 | * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel. |
| Line 1896... | Line 1963... | ||
| 1896 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1963 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1897 | * @retval State of bit (1 or 0). |
1964 | * @retval State of bit (1 or 0). |
| 1898 | */ |
1965 | */ |
| 1899 | __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel) |
1966 | __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1900 | { |
1967 | { |
| 1901 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1968 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1902 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1969 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1903 | register uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; |
1970 | uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; |
| 1904 | return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); |
1971 | return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); |
| 1905 | } |
1972 | } |
| 1906 | 1973 | ||
| 1907 | /** |
1974 | /** |
| 1908 | * @brief Enable clearing the output channel on an external event. |
1975 | * @brief Enable clearing the output channel on an external event. |
| Line 1921... | Line 1988... | ||
| 1921 | * @arg @ref LL_TIM_CHANNEL_CH4 |
1988 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1922 | * @retval None |
1989 | * @retval None |
| 1923 | */ |
1990 | */ |
| 1924 | __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) |
1991 | __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1925 | { |
1992 | { |
| 1926 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
1993 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1927 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
1994 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1928 | SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); |
1995 | SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); |
| 1929 | } |
1996 | } |
| 1930 | 1997 | ||
| 1931 | /** |
1998 | /** |
| 1932 | * @brief Disable clearing the output channel on an external event. |
1999 | * @brief Disable clearing the output channel on an external event. |
| Line 1944... | Line 2011... | ||
| 1944 | * @arg @ref LL_TIM_CHANNEL_CH4 |
2011 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1945 | * @retval None |
2012 | * @retval None |
| 1946 | */ |
2013 | */ |
| 1947 | __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) |
2014 | __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1948 | { |
2015 | { |
| 1949 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2016 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1950 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2017 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1951 | CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); |
2018 | CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); |
| 1952 | } |
2019 | } |
| 1953 | 2020 | ||
| 1954 | /** |
2021 | /** |
| 1955 | * @brief Indicates clearing the output channel on an external event is enabled for the output channel. |
2022 | * @brief Indicates clearing the output channel on an external event is enabled for the output channel. |
| Line 1969... | Line 2036... | ||
| 1969 | * @arg @ref LL_TIM_CHANNEL_CH4 |
2036 | * @arg @ref LL_TIM_CHANNEL_CH4 |
| 1970 | * @retval State of bit (1 or 0). |
2037 | * @retval State of bit (1 or 0). |
| 1971 | */ |
2038 | */ |
| 1972 | __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel) |
2039 | __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Channel) |
| 1973 | { |
2040 | { |
| 1974 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2041 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 1975 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2042 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 1976 | register uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; |
2043 | uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; |
| 1977 | return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); |
2044 | return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); |
| 1978 | } |
2045 | } |
| 1979 | 2046 | ||
| 1980 | /** |
2047 | /** |
| 1981 | * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of the Ocx and OCxN signals). |
2048 | * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of |
| - | 2049 | * the Ocx and OCxN signals). |
|
| 1982 | * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not |
2050 | * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not |
| 1983 | * dead-time insertion feature is supported by a timer instance. |
2051 | * dead-time insertion feature is supported by a timer instance. |
| 1984 | * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter |
2052 | * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter |
| 1985 | * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime |
2053 | * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime |
| 1986 | * @param TIMx Timer instance |
2054 | * @param TIMx Timer instance |
| Line 2166... | Line 2234... | ||
| 2166 | * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE |
2234 | * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE |
| 2167 | * @retval None |
2235 | * @retval None |
| 2168 | */ |
2236 | */ |
| 2169 | __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) |
2237 | __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) |
| 2170 | { |
2238 | { |
| 2171 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2239 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2172 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2240 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2173 | MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), |
2241 | MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), |
| 2174 | ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]); |
2242 | ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \ |
| - | 2243 | << SHIFT_TAB_ICxx[iChannel]); |
|
| 2175 | MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), |
2244 | MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), |
| 2176 | (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); |
2245 | (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); |
| 2177 | } |
2246 | } |
| 2178 | 2247 | ||
| 2179 | /** |
2248 | /** |
| Line 2194... | Line 2263... | ||
| 2194 | * @arg @ref LL_TIM_ACTIVEINPUT_TRC |
2263 | * @arg @ref LL_TIM_ACTIVEINPUT_TRC |
| 2195 | * @retval None |
2264 | * @retval None |
| 2196 | */ |
2265 | */ |
| 2197 | __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput) |
2266 | __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput) |
| 2198 | { |
2267 | { |
| 2199 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2268 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2200 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2269 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2201 | MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]); |
2270 | MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]); |
| 2202 | } |
2271 | } |
| 2203 | 2272 | ||
| 2204 | /** |
2273 | /** |
| 2205 | * @brief Get the current active input. |
2274 | * @brief Get the current active input. |
| Line 2218... | Line 2287... | ||
| 2218 | * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI |
2287 | * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI |
| 2219 | * @arg @ref LL_TIM_ACTIVEINPUT_TRC |
2288 | * @arg @ref LL_TIM_ACTIVEINPUT_TRC |
| 2220 | */ |
2289 | */ |
| 2221 | __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel) |
2290 | __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel) |
| 2222 | { |
2291 | { |
| 2223 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2292 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2224 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2293 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2225 | return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); |
2294 | return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); |
| 2226 | } |
2295 | } |
| 2227 | 2296 | ||
| 2228 | /** |
2297 | /** |
| 2229 | * @brief Set the prescaler of input channel. |
2298 | * @brief Set the prescaler of input channel. |
| Line 2244... | Line 2313... | ||
| 2244 | * @arg @ref LL_TIM_ICPSC_DIV8 |
2313 | * @arg @ref LL_TIM_ICPSC_DIV8 |
| 2245 | * @retval None |
2314 | * @retval None |
| 2246 | */ |
2315 | */ |
| 2247 | __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler) |
2316 | __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler) |
| 2248 | { |
2317 | { |
| 2249 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2318 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2250 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2319 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2251 | MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]); |
2320 | MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]); |
| 2252 | } |
2321 | } |
| 2253 | 2322 | ||
| 2254 | /** |
2323 | /** |
| 2255 | * @brief Get the current prescaler value acting on an input channel. |
2324 | * @brief Get the current prescaler value acting on an input channel. |
| Line 2269... | Line 2338... | ||
| 2269 | * @arg @ref LL_TIM_ICPSC_DIV4 |
2338 | * @arg @ref LL_TIM_ICPSC_DIV4 |
| 2270 | * @arg @ref LL_TIM_ICPSC_DIV8 |
2339 | * @arg @ref LL_TIM_ICPSC_DIV8 |
| 2271 | */ |
2340 | */ |
| 2272 | __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel) |
2341 | __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel) |
| 2273 | { |
2342 | { |
| 2274 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2343 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2275 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2344 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2276 | return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); |
2345 | return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); |
| 2277 | } |
2346 | } |
| 2278 | 2347 | ||
| 2279 | /** |
2348 | /** |
| 2280 | * @brief Set the input filter duration. |
2349 | * @brief Set the input filter duration. |
| Line 2307... | Line 2376... | ||
| 2307 | * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 |
2376 | * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 |
| 2308 | * @retval None |
2377 | * @retval None |
| 2309 | */ |
2378 | */ |
| 2310 | __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) |
2379 | __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) |
| 2311 | { |
2380 | { |
| 2312 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2381 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2313 | register __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2382 | __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2314 | MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]); |
2383 | MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]); |
| 2315 | } |
2384 | } |
| 2316 | 2385 | ||
| 2317 | /** |
2386 | /** |
| 2318 | * @brief Get the input filter duration. |
2387 | * @brief Get the input filter duration. |
| Line 2344... | Line 2413... | ||
| 2344 | * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 |
2413 | * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 |
| 2345 | * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 |
2414 | * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 |
| 2346 | */ |
2415 | */ |
| 2347 | __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel) |
2416 | __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(TIM_TypeDef *TIMx, uint32_t Channel) |
| 2348 | { |
2417 | { |
| 2349 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2418 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2350 | register const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
2419 | const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); |
| 2351 | return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); |
2420 | return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); |
| 2352 | } |
2421 | } |
| 2353 | 2422 | ||
| 2354 | /** |
2423 | /** |
| 2355 | * @brief Set the input channel polarity. |
2424 | * @brief Set the input channel polarity. |
| Line 2373... | Line 2442... | ||
| 2373 | * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE |
2442 | * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE |
| 2374 | * @retval None |
2443 | * @retval None |
| 2375 | */ |
2444 | */ |
| 2376 | __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity) |
2445 | __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity) |
| 2377 | { |
2446 | { |
| 2378 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2447 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2379 | MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), |
2448 | MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), |
| 2380 | ICPolarity << SHIFT_TAB_CCxP[iChannel]); |
2449 | ICPolarity << SHIFT_TAB_CCxP[iChannel]); |
| 2381 | } |
2450 | } |
| 2382 | 2451 | ||
| 2383 | /** |
2452 | /** |
| Line 2401... | Line 2470... | ||
| 2401 | * @arg @ref LL_TIM_IC_POLARITY_FALLING |
2470 | * @arg @ref LL_TIM_IC_POLARITY_FALLING |
| 2402 | * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE |
2471 | * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE |
| 2403 | */ |
2472 | */ |
| 2404 | __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel) |
2473 | __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(TIM_TypeDef *TIMx, uint32_t Channel) |
| 2405 | { |
2474 | { |
| 2406 | register uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
2475 | uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); |
| 2407 | return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> |
2476 | return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> |
| 2408 | SHIFT_TAB_CCxP[iChannel]); |
2477 | SHIFT_TAB_CCxP[iChannel]); |
| 2409 | } |
2478 | } |
| 2410 | 2479 | ||
| 2411 | /** |
2480 | /** |
| Line 3211... | Line 3280... | ||
| 3211 | { |
3280 | { |
| 3212 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); |
3281 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); |
| 3213 | } |
3282 | } |
| 3214 | 3283 | ||
| 3215 | /** |
3284 | /** |
| 3216 | * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending). |
3285 | * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set |
| - | 3286 | * (Capture/Compare 1 interrupt is pending). |
|
| 3217 | * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR |
3287 | * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR |
| 3218 | * @param TIMx Timer instance |
3288 | * @param TIMx Timer instance |
| 3219 | * @retval State of bit (1 or 0). |
3289 | * @retval State of bit (1 or 0). |
| 3220 | */ |
3290 | */ |
| 3221 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx) |
3291 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(TIM_TypeDef *TIMx) |
| Line 3233... | Line 3303... | ||
| 3233 | { |
3303 | { |
| 3234 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); |
3304 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); |
| 3235 | } |
3305 | } |
| 3236 | 3306 | ||
| 3237 | /** |
3307 | /** |
| 3238 | * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending). |
3308 | * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set |
| - | 3309 | * (Capture/Compare 2 over-capture interrupt is pending). |
|
| 3239 | * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR |
3310 | * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR |
| 3240 | * @param TIMx Timer instance |
3311 | * @param TIMx Timer instance |
| 3241 | * @retval State of bit (1 or 0). |
3312 | * @retval State of bit (1 or 0). |
| 3242 | */ |
3313 | */ |
| 3243 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx) |
3314 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(TIM_TypeDef *TIMx) |
| Line 3255... | Line 3326... | ||
| 3255 | { |
3326 | { |
| 3256 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); |
3327 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); |
| 3257 | } |
3328 | } |
| 3258 | 3329 | ||
| 3259 | /** |
3330 | /** |
| 3260 | * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending). |
3331 | * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set |
| - | 3332 | * (Capture/Compare 3 over-capture interrupt is pending). |
|
| 3261 | * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR |
3333 | * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR |
| 3262 | * @param TIMx Timer instance |
3334 | * @param TIMx Timer instance |
| 3263 | * @retval State of bit (1 or 0). |
3335 | * @retval State of bit (1 or 0). |
| 3264 | */ |
3336 | */ |
| 3265 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx) |
3337 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(TIM_TypeDef *TIMx) |
| Line 3277... | Line 3349... | ||
| 3277 | { |
3349 | { |
| 3278 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); |
3350 | WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); |
| 3279 | } |
3351 | } |
| 3280 | 3352 | ||
| 3281 | /** |
3353 | /** |
| 3282 | * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending). |
3354 | * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set |
| - | 3355 | * (Capture/Compare 4 over-capture interrupt is pending). |
|
| 3283 | * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR |
3356 | * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR |
| 3284 | * @param TIMx Timer instance |
3357 | * @param TIMx Timer instance |
| 3285 | * @retval State of bit (1 or 0). |
3358 | * @retval State of bit (1 or 0). |
| 3286 | */ |
3359 | */ |
| 3287 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx) |
3360 | __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(TIM_TypeDef *TIMx) |
| Line 3562... | Line 3635... | ||
| 3562 | 3635 | ||
| 3563 | /** |
3636 | /** |
| 3564 | * @} |
3637 | * @} |
| 3565 | */ |
3638 | */ |
| 3566 | 3639 | ||
| 3567 | /** @defgroup TIM_LL_EF_DMA_Management DMA-Management |
3640 | /** @defgroup TIM_LL_EF_DMA_Management DMA Management |
| 3568 | * @{ |
3641 | * @{ |
| 3569 | */ |
3642 | */ |
| 3570 | /** |
3643 | /** |
| 3571 | * @brief Enable update DMA request (UDE). |
3644 | * @brief Enable update DMA request (UDE). |
| 3572 | * @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE |
3645 | * @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE |