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| Rev 2 | Rev 6 | ||
|---|---|---|---|
| Line 1662... | Line 1662... | ||
| 1662 | } |
1662 | } |
| 1663 | #endif |
1663 | #endif |
| 1664 | 1664 | ||
| 1665 | /** |
1665 | /** |
| 1666 | * @brief Clear Channel 1 global interrupt flag. |
1666 | * @brief Clear Channel 1 global interrupt flag. |
| - | 1667 | * @note Do not Clear Channel 1 global interrupt flag when the channel in ON. |
|
| - | 1668 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1669 | error flag with LL_DMA_ClearFlag_TC1, LL_DMA_ClearFlag_HT1, |
|
| - | 1670 | LL_DMA_ClearFlag_TE1. bug id 2.4.1 in Product Errata Sheet. |
|
| 1667 | * @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1 |
1671 | * @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1 |
| 1668 | * @param DMAx DMAx Instance |
1672 | * @param DMAx DMAx Instance |
| 1669 | * @retval None |
1673 | * @retval None |
| 1670 | */ |
1674 | */ |
| 1671 | __STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx) |
1675 | __STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx) |
| Line 1673... | Line 1677... | ||
| 1673 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); |
1677 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); |
| 1674 | } |
1678 | } |
| 1675 | 1679 | ||
| 1676 | /** |
1680 | /** |
| 1677 | * @brief Clear Channel 2 global interrupt flag. |
1681 | * @brief Clear Channel 2 global interrupt flag. |
| - | 1682 | * @note Do not Clear Channel 2 global interrupt flag when the channel in ON. |
|
| - | 1683 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1684 | error flag with LL_DMA_ClearFlag_TC2, LL_DMA_ClearFlag_HT2, |
|
| - | 1685 | LL_DMA_ClearFlag_TE2. bug id 2.4.1 in Product Errata Sheet. |
|
| 1678 | * @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2 |
1686 | * @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2 |
| 1679 | * @param DMAx DMAx Instance |
1687 | * @param DMAx DMAx Instance |
| 1680 | * @retval None |
1688 | * @retval None |
| 1681 | */ |
1689 | */ |
| 1682 | __STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx) |
1690 | __STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx) |
| Line 1684... | Line 1692... | ||
| 1684 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); |
1692 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); |
| 1685 | } |
1693 | } |
| 1686 | 1694 | ||
| 1687 | /** |
1695 | /** |
| 1688 | * @brief Clear Channel 3 global interrupt flag. |
1696 | * @brief Clear Channel 3 global interrupt flag. |
| - | 1697 | * @note Do not Clear Channel 3 global interrupt flag when the channel in ON. |
|
| - | 1698 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1699 | error flag with LL_DMA_ClearFlag_TC3, LL_DMA_ClearFlag_HT3, |
|
| - | 1700 | LL_DMA_ClearFlag_TE3. bug id 2.4.1 in Product Errata Sheet. |
|
| 1689 | * @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3 |
1701 | * @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3 |
| 1690 | * @param DMAx DMAx Instance |
1702 | * @param DMAx DMAx Instance |
| 1691 | * @retval None |
1703 | * @retval None |
| 1692 | */ |
1704 | */ |
| 1693 | __STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx) |
1705 | __STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx) |
| Line 1695... | Line 1707... | ||
| 1695 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); |
1707 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); |
| 1696 | } |
1708 | } |
| 1697 | 1709 | ||
| 1698 | /** |
1710 | /** |
| 1699 | * @brief Clear Channel 4 global interrupt flag. |
1711 | * @brief Clear Channel 4 global interrupt flag. |
| - | 1712 | * @note Do not Clear Channel 4 global interrupt flag when the channel in ON. |
|
| - | 1713 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1714 | error flag with LL_DMA_ClearFlag_TC4, LL_DMA_ClearFlag_HT4, |
|
| - | 1715 | LL_DMA_ClearFlag_TE4. bug id 2.4.1 in Product Errata Sheet. |
|
| 1700 | * @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4 |
1716 | * @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4 |
| 1701 | * @param DMAx DMAx Instance |
1717 | * @param DMAx DMAx Instance |
| 1702 | * @retval None |
1718 | * @retval None |
| 1703 | */ |
1719 | */ |
| 1704 | __STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx) |
1720 | __STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx) |
| Line 1706... | Line 1722... | ||
| 1706 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); |
1722 | WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); |
| 1707 | } |
1723 | } |
| 1708 | 1724 | ||
| 1709 | /** |
1725 | /** |
| 1710 | * @brief Clear Channel 5 global interrupt flag. |
1726 | * @brief Clear Channel 5 global interrupt flag. |
| - | 1727 | * @note Do not Clear Channel 5 global interrupt flag when the channel in ON. |
|
| - | 1728 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1729 | error flag with LL_DMA_ClearFlag_TC5, LL_DMA_ClearFlag_HT5, |
|
| - | 1730 | LL_DMA_ClearFlag_TE5. bug id 2.4.1 in Product Errata Sheet. |
|
| 1711 | * @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5 |
1731 | * @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5 |
| 1712 | * @param DMAx DMAx Instance |
1732 | * @param DMAx DMAx Instance |
| 1713 | * @retval None |
1733 | * @retval None |
| 1714 | */ |
1734 | */ |
| 1715 | __STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx) |
1735 | __STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx) |
| Line 1718... | Line 1738... | ||
| 1718 | } |
1738 | } |
| 1719 | 1739 | ||
| 1720 | #if defined(DMA1_Channel6) |
1740 | #if defined(DMA1_Channel6) |
| 1721 | /** |
1741 | /** |
| 1722 | * @brief Clear Channel 6 global interrupt flag. |
1742 | * @brief Clear Channel 6 global interrupt flag. |
| - | 1743 | * @note Do not Clear Channel 6 global interrupt flag when the channel in ON. |
|
| - | 1744 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1745 | error flag with LL_DMA_ClearFlag_TC6, LL_DMA_ClearFlag_HT6, |
|
| - | 1746 | LL_DMA_ClearFlag_TE6. bug id 2.4.1 in Product Errata Sheet. |
|
| 1723 | * @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6 |
1747 | * @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6 |
| 1724 | * @param DMAx DMAx Instance |
1748 | * @param DMAx DMAx Instance |
| 1725 | * @retval None |
1749 | * @retval None |
| 1726 | */ |
1750 | */ |
| 1727 | __STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx) |
1751 | __STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx) |
| Line 1731... | Line 1755... | ||
| 1731 | #endif |
1755 | #endif |
| 1732 | 1756 | ||
| 1733 | #if defined(DMA1_Channel7) |
1757 | #if defined(DMA1_Channel7) |
| 1734 | /** |
1758 | /** |
| 1735 | * @brief Clear Channel 7 global interrupt flag. |
1759 | * @brief Clear Channel 7 global interrupt flag. |
| - | 1760 | * @note Do not Clear Channel 7 global interrupt flag when the channel in ON. |
|
| - | 1761 | Instead clear specific flags transfer complete, half transfer & transfer |
|
| - | 1762 | error flag with LL_DMA_ClearFlag_TC7, LL_DMA_ClearFlag_HT7, |
|
| - | 1763 | LL_DMA_ClearFlag_TE7. bug id 2.4.1 in Product Errata Sheet. |
|
| 1736 | * @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7 |
1764 | * @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7 |
| 1737 | * @param DMAx DMAx Instance |
1765 | * @param DMAx DMAx Instance |
| 1738 | * @retval None |
1766 | * @retval None |
| 1739 | */ |
1767 | */ |
| 1740 | __STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx) |
1768 | __STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx) |