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| Line 97... | Line 97... | ||
| 97 | typedef struct __PCD_HandleTypeDef |
97 | typedef struct __PCD_HandleTypeDef |
| 98 | #else |
98 | #else |
| 99 | typedef struct |
99 | typedef struct |
| 100 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
100 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
| 101 | { |
101 | { |
| 102 | PCD_TypeDef *Instance; /*!< Register base address */ |
102 | PCD_TypeDef *Instance; /*!< Register base address */ |
| 103 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
103 | PCD_InitTypeDef Init; /*!< PCD required parameters */ |
| 104 | __IO uint8_t USB_Address; /*!< USB Address */ |
104 | __IO uint8_t USB_Address; /*!< USB Address */ |
| 105 | PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
105 | PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ |
| 106 | PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
106 | PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ |
| 107 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
107 | HAL_LockTypeDef Lock; /*!< PCD peripheral status */ |
| 108 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
108 | __IO PCD_StateTypeDef State; /*!< PCD communication state */ |
| 109 | __IO uint32_t ErrorCode; /*!< PCD Error code */ |
109 | __IO uint32_t ErrorCode; /*!< PCD Error code */ |
| 110 | uint32_t Setup[12]; /*!< Setup packet buffer */ |
110 | uint32_t Setup[12]; /*!< Setup packet buffer */ |
| 111 | PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
111 | PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ |
| 112 | uint32_t BESL; |
112 | uint32_t BESL; |
| 113 | 113 | ||
| 114 | 114 | ||
| 115 | uint32_t lpm_active; /*!< Enable or disable the Link Power Management . |
115 | uint32_t lpm_active; /*!< Enable or disable the Link Power Management . |
| 116 | This parameter can be set to ENABLE or DISABLE */ |
116 | This parameter can be set to ENABLE or DISABLE */ |
| Line 186... | Line 186... | ||
| 186 | * @} |
186 | * @} |
| 187 | */ |
187 | */ |
| 188 | 188 | ||
| 189 | /* Exported macros -----------------------------------------------------------*/ |
189 | /* Exported macros -----------------------------------------------------------*/ |
| 190 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
190 | /** @defgroup PCD_Exported_Macros PCD Exported Macros |
| 191 | * @brief macros to handle interrupts and specific clock configurations |
191 | * @brief macros to handle interrupts and specific clock configurations |
| 192 | * @{ |
192 | * @{ |
| 193 | */ |
193 | */ |
| 194 | 194 | ||
| 195 | 195 | ||
| 196 | #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
196 | #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) |
| 197 | #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
197 | #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) |
| 198 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) |
198 | #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\ |
| - | 199 | & (__INTERRUPT__)) == (__INTERRUPT__)) |
|
| - | 200 | ||
| 199 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) |
201 | #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ |
| - | 202 | &= (uint16_t)(~(__INTERRUPT__))) |
|
| 200 | 203 | ||
| 201 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
204 | #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE |
| 202 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
205 | #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) |
| 203 | 206 | ||
| 204 | 207 | ||
| Line 231... | Line 234... | ||
| 231 | HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ |
234 | HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ |
| 232 | HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ |
235 | HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ |
| 233 | HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ |
236 | HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ |
| 234 | HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ |
237 | HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ |
| 235 | HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ |
238 | HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ |
| 236 | HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ |
239 | HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ |
| 237 | 240 | ||
| 238 | HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ |
241 | HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ |
| 239 | HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ |
242 | HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ |
| 240 | 243 | ||
| 241 | } HAL_PCD_CallbackIDTypeDef; |
244 | } HAL_PCD_CallbackIDTypeDef; |
| Line 258... | Line 261... | ||
| 258 | 261 | ||
| 259 | /** |
262 | /** |
| 260 | * @} |
263 | * @} |
| 261 | */ |
264 | */ |
| 262 | 265 | ||
| 263 | HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback); |
266 | HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, |
| - | 267 | HAL_PCD_CallbackIDTypeDef CallbackID, |
|
| - | 268 | pPCD_CallbackTypeDef pCallback); |
|
| - | 269 | ||
| 264 | HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); |
270 | HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, |
| - | 271 | HAL_PCD_CallbackIDTypeDef CallbackID); |
|
| - | 272 | ||
| - | 273 | HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, |
|
| - | 274 | pPCD_DataOutStageCallbackTypeDef pCallback); |
|
| 265 | 275 | ||
| 266 | HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback); |
- | |
| 267 | HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); |
276 | HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); |
| 268 | 277 | ||
| 269 | HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback); |
278 | HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, |
| - | 279 | pPCD_DataInStageCallbackTypeDef pCallback); |
|
| - | 280 | ||
| 270 | HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); |
281 | HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); |
| 271 | 282 | ||
| 272 | HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback); |
283 | HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, |
| - | 284 | pPCD_IsoOutIncpltCallbackTypeDef pCallback); |
|
| - | 285 | ||
| 273 | HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); |
286 | HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); |
| 274 | 287 | ||
| 275 | HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback); |
288 | HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, |
| - | 289 | pPCD_IsoInIncpltCallbackTypeDef pCallback); |
|
| - | 290 | ||
| 276 | HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); |
291 | HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); |
| 277 | 292 | ||
| 278 | HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback); |
293 | HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, |
| - | 294 | pPCD_BcdCallbackTypeDef pCallback); |
|
| - | 295 | ||
| 279 | HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); |
296 | HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); |
| 280 | 297 | ||
| 281 | HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback); |
298 | HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, |
| - | 299 | pPCD_LpmCallbackTypeDef pCallback); |
|
| - | 300 | ||
| 282 | HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); |
301 | HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); |
| 283 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
302 | #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ |
| 284 | /** |
303 | /** |
| 285 | * @} |
304 | * @} |
| 286 | */ |
305 | */ |
| Line 315... | Line 334... | ||
| 315 | * @{ |
334 | * @{ |
| 316 | */ |
335 | */ |
| 317 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
336 | HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); |
| 318 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
337 | HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); |
| 319 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
338 | HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); |
| 320 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); |
339 | HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
| - | 340 | uint16_t ep_mps, uint8_t ep_type); |
|
| - | 341 | ||
| 321 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
342 | HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
| 322 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
343 | HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
| - | 344 | uint8_t *pBuf, uint32_t len); |
|
| - | 345 | ||
| 323 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); |
346 | HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, |
| 324 | uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
347 | uint8_t *pBuf, uint32_t len); |
| - | 348 | ||
| - | 349 | ||
| 325 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
350 | HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
| 326 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
351 | HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
| 327 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
352 | HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
| 328 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
353 | HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
| 329 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
354 | HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); |
| - | 355 | ||
| - | 356 | uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); |
|
| 330 | /** |
357 | /** |
| 331 | * @} |
358 | * @} |
| 332 | */ |
359 | */ |
| 333 | 360 | ||
| 334 | /* Peripheral State functions ************************************************/ |
361 | /* Peripheral State functions ************************************************/ |
| Line 351... | Line 378... | ||
| 351 | /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
378 | /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt |
| 352 | * @{ |
379 | * @{ |
| 353 | */ |
380 | */ |
| 354 | 381 | ||
| 355 | 382 | ||
| 356 | #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ |
383 | #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ |
| 357 | 384 | ||
| 358 | 385 | ||
| 359 | /** |
386 | /** |
| 360 | * @} |
387 | * @} |
| 361 | */ |
388 | */ |
| 362 | 389 | ||
| 363 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
390 | /** @defgroup PCD_EP0_MPS PCD EP0 MPS |
| 364 | * @{ |
391 | * @{ |
| 365 | */ |
392 | */ |
| 366 | #define PCD_EP0MPS_64 DEP0CTL_MPS_64 |
393 | #define PCD_EP0MPS_64 EP_MPS_64 |
| 367 | #define PCD_EP0MPS_32 DEP0CTL_MPS_32 |
394 | #define PCD_EP0MPS_32 EP_MPS_32 |
| 368 | #define PCD_EP0MPS_16 DEP0CTL_MPS_16 |
395 | #define PCD_EP0MPS_16 EP_MPS_16 |
| 369 | #define PCD_EP0MPS_08 DEP0CTL_MPS_8 |
396 | #define PCD_EP0MPS_08 EP_MPS_8 |
| 370 | /** |
397 | /** |
| 371 | * @} |
398 | * @} |
| 372 | */ |
399 | */ |
| 373 | 400 | ||
| 374 | /** @defgroup PCD_ENDP PCD ENDP |
401 | /** @defgroup PCD_ENDP PCD ENDP |
| Line 399... | Line 426... | ||
| 399 | * @} |
426 | * @} |
| 400 | */ |
427 | */ |
| 401 | 428 | ||
| 402 | /* Private macros ------------------------------------------------------------*/ |
429 | /* Private macros ------------------------------------------------------------*/ |
| 403 | /** @defgroup PCD_Private_Macros PCD Private Macros |
430 | /** @defgroup PCD_Private_Macros PCD Private Macros |
| 404 | * @{ |
431 | * @{ |
| 405 | */ |
432 | */ |
| 406 | 433 | ||
| 407 | /******************** Bit definition for USB_COUNTn_RX register *************/ |
434 | /******************** Bit definition for USB_COUNTn_RX register *************/ |
| 408 | #define USB_CNTRX_NBLK_MSK (0x1FU << 10) |
435 | #define USB_CNTRX_NBLK_MSK (0x1FU << 10) |
| 409 | #define USB_CNTRX_BLSIZE (0x1U << 15) |
436 | #define USB_CNTRX_BLSIZE (0x1U << 15) |
| 410 | 437 | ||
| 411 | /* SetENDPOINT */ |
438 | /* SetENDPOINT */ |
| - | 439 | #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)\ |
|
| 412 | #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) |
440 | (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) |
| 413 | 441 | ||
| 414 | /* GetENDPOINT */ |
442 | /* GetENDPOINT */ |
| 415 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) |
443 | #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) |
| 416 | 444 | ||
| 417 | /* ENDPOINT transfer */ |
445 | /* ENDPOINT transfer */ |
| 418 | #define USB_EP0StartXfer USB_EPStartXfer |
446 | #define USB_EP0StartXfer USB_EPStartXfer |
| 419 | 447 | ||
| 420 | /** |
448 | /** |
| 421 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
449 | * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) |
| 422 | * @param USBx USB peripheral instance register address. |
450 | * @param USBx USB peripheral instance register address. |
| 423 | * @param bEpNum Endpoint Number. |
451 | * @param bEpNum Endpoint Number. |
| 424 | * @param wType Endpoint Type. |
452 | * @param wType Endpoint Type. |
| 425 | * @retval None |
453 | * @retval None |
| 426 | */ |
454 | */ |
| 427 | #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ |
455 | #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\ |
| 428 | ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) |
456 | & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) |
| - | 457 | ||
| 429 | 458 | ||
| 430 | /** |
459 | /** |
| 431 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
460 | * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) |
| 432 | * @param USBx USB peripheral instance register address. |
461 | * @param USBx USB peripheral instance register address. |
| 433 | * @param bEpNum Endpoint Number. |
462 | * @param bEpNum Endpoint Number. |
| Line 440... | Line 469... | ||
| 440 | * toggles bit SW_BUF in the double buffered endpoint register |
469 | * toggles bit SW_BUF in the double buffered endpoint register |
| 441 | * @param USBx USB device. |
470 | * @param USBx USB device. |
| 442 | * @param bEpNum, bDir |
471 | * @param bEpNum, bDir |
| 443 | * @retval None |
472 | * @retval None |
| 444 | */ |
473 | */ |
| 445 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \ |
474 | #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ |
| - | 475 | do { \ |
|
| 446 | if ((bDir) == 0U) \ |
476 | if ((bDir) == 0U) \ |
| 447 | { \ |
477 | { \ |
| 448 | /* OUT double buffered endpoint */ \ |
478 | /* OUT double buffered endpoint */ \ |
| 449 | PCD_TX_DTOG((USBx), (bEpNum)); \ |
479 | PCD_TX_DTOG((USBx), (bEpNum)); \ |
| 450 | } \ |
480 | } \ |
| 451 | else if ((bDir) == 1U) \ |
481 | else if ((bDir) == 1U) \ |
| 452 | { \ |
482 | { \ |
| 453 | /* IN double buffered endpoint */ \ |
483 | /* IN double buffered endpoint */ \ |
| 454 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
484 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
| 455 | } \ |
485 | } \ |
| 456 | } while(0) |
486 | } while(0) |
| 457 | 487 | ||
| 458 | /** |
488 | /** |
| 459 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
489 | * @brief sets the status for tx transfer (bits STAT_TX[1:0]). |
| 460 | * @param USBx USB peripheral instance register address. |
490 | * @param USBx USB peripheral instance register address. |
| 461 | * @param bEpNum Endpoint Number. |
491 | * @param bEpNum Endpoint Number. |
| 462 | * @param wState new state |
492 | * @param wState new state |
| 463 | * @retval None |
493 | * @retval None |
| 464 | */ |
494 | */ |
| 465 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \ |
495 | #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ |
| - | 496 | do { \ |
|
| 466 | register uint16_t _wRegVal; \ |
497 | uint16_t _wRegVal; \ |
| 467 | \ |
498 | \ |
| 468 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ |
499 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ |
| 469 | /* toggle first bit ? */ \ |
500 | /* toggle first bit ? */ \ |
| 470 | if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ |
501 | if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ |
| 471 | { \ |
502 | { \ |
| 472 | _wRegVal ^= USB_EPTX_DTOG1; \ |
503 | _wRegVal ^= USB_EPTX_DTOG1; \ |
| 473 | } \ |
504 | } \ |
| 474 | /* toggle second bit ? */ \ |
505 | /* toggle second bit ? */ \ |
| 475 | if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
506 | if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ |
| 476 | { \ |
507 | { \ |
| 477 | _wRegVal ^= USB_EPTX_DTOG2; \ |
508 | _wRegVal ^= USB_EPTX_DTOG2; \ |
| 478 | } \ |
509 | } \ |
| 479 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
510 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
| 480 | } while(0) /* PCD_SET_EP_TX_STATUS */ |
511 | } while(0) /* PCD_SET_EP_TX_STATUS */ |
| 481 | 512 | ||
| 482 | /** |
513 | /** |
| 483 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
514 | * @brief sets the status for rx transfer (bits STAT_TX[1:0]) |
| 484 | * @param USBx USB peripheral instance register address. |
515 | * @param USBx USB peripheral instance register address. |
| 485 | * @param bEpNum Endpoint Number. |
516 | * @param bEpNum Endpoint Number. |
| 486 | * @param wState new state |
517 | * @param wState new state |
| 487 | * @retval None |
518 | * @retval None |
| 488 | */ |
519 | */ |
| 489 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \ |
520 | #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ |
| - | 521 | do { \ |
|
| 490 | register uint16_t _wRegVal; \ |
522 | uint16_t _wRegVal; \ |
| 491 | \ |
523 | \ |
| 492 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ |
524 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ |
| 493 | /* toggle first bit ? */ \ |
525 | /* toggle first bit ? */ \ |
| 494 | if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
526 | if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ |
| 495 | { \ |
527 | { \ |
| 496 | _wRegVal ^= USB_EPRX_DTOG1; \ |
528 | _wRegVal ^= USB_EPRX_DTOG1; \ |
| 497 | } \ |
529 | } \ |
| 498 | /* toggle second bit ? */ \ |
530 | /* toggle second bit ? */ \ |
| 499 | if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
531 | if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ |
| 500 | { \ |
532 | { \ |
| 501 | _wRegVal ^= USB_EPRX_DTOG2; \ |
533 | _wRegVal ^= USB_EPRX_DTOG2; \ |
| 502 | } \ |
534 | } \ |
| 503 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
535 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
| 504 | } while(0) /* PCD_SET_EP_RX_STATUS */ |
536 | } while(0) /* PCD_SET_EP_RX_STATUS */ |
| 505 | 537 | ||
| 506 | /** |
538 | /** |
| Line 509... | Line 541... | ||
| 509 | * @param bEpNum Endpoint Number. |
541 | * @param bEpNum Endpoint Number. |
| 510 | * @param wStaterx new state. |
542 | * @param wStaterx new state. |
| 511 | * @param wStatetx new state. |
543 | * @param wStatetx new state. |
| 512 | * @retval None |
544 | * @retval None |
| 513 | */ |
545 | */ |
| 514 | #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \ |
546 | #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ |
| - | 547 | do { \ |
|
| 515 | register uint16_t _wRegVal; \ |
548 | uint16_t _wRegVal; \ |
| 516 | \ |
549 | \ |
| 517 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ |
550 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ |
| 518 | /* toggle first bit ? */ \ |
551 | /* toggle first bit ? */ \ |
| 519 | if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ |
552 | if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ |
| 520 | { \ |
553 | { \ |
| Line 562... | Line 595... | ||
| 562 | * @brief checks stall condition in an endpoint. |
595 | * @brief checks stall condition in an endpoint. |
| 563 | * @param USBx USB peripheral instance register address. |
596 | * @param USBx USB peripheral instance register address. |
| 564 | * @param bEpNum Endpoint Number. |
597 | * @param bEpNum Endpoint Number. |
| 565 | * @retval TRUE = endpoint in stall condition. |
598 | * @retval TRUE = endpoint in stall condition. |
| 566 | */ |
599 | */ |
| 567 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ |
600 | #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) |
| 568 | == USB_EP_TX_STALL) |
- | |
| 569 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ |
601 | #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) |
| 570 | == USB_EP_RX_STALL) |
- | |
| 571 | 602 | ||
| 572 | /** |
603 | /** |
| 573 | * @brief set & clear EP_KIND bit. |
604 | * @brief set & clear EP_KIND bit. |
| 574 | * @param USBx USB peripheral instance register address. |
605 | * @param USBx USB peripheral instance register address. |
| 575 | * @param bEpNum Endpoint Number. |
606 | * @param bEpNum Endpoint Number. |
| 576 | * @retval None |
607 | * @retval None |
| 577 | */ |
608 | */ |
| 578 | #define PCD_SET_EP_KIND(USBx, bEpNum) do { \ |
609 | #define PCD_SET_EP_KIND(USBx, bEpNum) \ |
| - | 610 | do { \ |
|
| 579 | register uint16_t _wRegVal; \ |
611 | uint16_t _wRegVal; \ |
| 580 | \ |
612 | \ |
| 581 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
613 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
| 582 | \ |
614 | \ |
| 583 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ |
615 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ |
| 584 | } while(0) /* PCD_SET_EP_KIND */ |
616 | } while(0) /* PCD_SET_EP_KIND */ |
| 585 | 617 | ||
| 586 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \ |
618 | #define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ |
| - | 619 | do { \ |
|
| 587 | register uint16_t _wRegVal; \ |
620 | uint16_t _wRegVal; \ |
| 588 | \ |
621 | \ |
| 589 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ |
622 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ |
| 590 | \ |
623 | \ |
| 591 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
624 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
| 592 | } while(0) /* PCD_CLEAR_EP_KIND */ |
625 | } while(0) /* PCD_CLEAR_EP_KIND */ |
| Line 604... | Line 637... | ||
| 604 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
637 | * @brief Sets/clears directly EP_KIND bit in the endpoint register. |
| 605 | * @param USBx USB peripheral instance register address. |
638 | * @param USBx USB peripheral instance register address. |
| 606 | * @param bEpNum Endpoint Number. |
639 | * @param bEpNum Endpoint Number. |
| 607 | * @retval None |
640 | * @retval None |
| 608 | */ |
641 | */ |
| 609 | #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
642 | #define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) |
| 610 | #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
643 | #define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) |
| 611 | 644 | ||
| 612 | /** |
645 | /** |
| 613 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
646 | * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. |
| 614 | * @param USBx USB peripheral instance register address. |
647 | * @param USBx USB peripheral instance register address. |
| 615 | * @param bEpNum Endpoint Number. |
648 | * @param bEpNum Endpoint Number. |
| 616 | * @retval None |
649 | * @retval None |
| 617 | */ |
650 | */ |
| 618 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \ |
651 | #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ |
| - | 652 | do { \ |
|
| 619 | register uint16_t _wRegVal; \ |
653 | uint16_t _wRegVal; \ |
| 620 | \ |
654 | \ |
| 621 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ |
655 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ |
| 622 | \ |
656 | \ |
| 623 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ |
657 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ |
| 624 | } while(0) /* PCD_CLEAR_RX_EP_CTR */ |
658 | } while(0) /* PCD_CLEAR_RX_EP_CTR */ |
| 625 | 659 | ||
| 626 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \ |
660 | #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ |
| - | 661 | do { \ |
|
| 627 | register uint16_t _wRegVal; \ |
662 | uint16_t _wRegVal; \ |
| 628 | \ |
663 | \ |
| 629 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ |
664 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ |
| 630 | \ |
665 | \ |
| 631 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ |
666 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ |
| 632 | } while(0) /* PCD_CLEAR_TX_EP_CTR */ |
667 | } while(0) /* PCD_CLEAR_TX_EP_CTR */ |
| Line 635... | Line 670... | ||
| 635 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
670 | * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. |
| 636 | * @param USBx USB peripheral instance register address. |
671 | * @param USBx USB peripheral instance register address. |
| 637 | * @param bEpNum Endpoint Number. |
672 | * @param bEpNum Endpoint Number. |
| 638 | * @retval None |
673 | * @retval None |
| 639 | */ |
674 | */ |
| 640 | #define PCD_RX_DTOG(USBx, bEpNum) do { \ |
675 | #define PCD_RX_DTOG(USBx, bEpNum) \ |
| - | 676 | do { \ |
|
| 641 | register uint16_t _wEPVal; \ |
677 | uint16_t _wEPVal; \ |
| 642 | \ |
678 | \ |
| 643 | _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
679 | _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
| 644 | \ |
680 | \ |
| 645 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ |
681 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ |
| 646 | } while(0) /* PCD_RX_DTOG */ |
682 | } while(0) /* PCD_RX_DTOG */ |
| 647 | 683 | ||
| 648 | #define PCD_TX_DTOG(USBx, bEpNum) do { \ |
684 | #define PCD_TX_DTOG(USBx, bEpNum) \ |
| - | 685 | do { \ |
|
| 649 | register uint16_t _wEPVal; \ |
686 | uint16_t _wEPVal; \ |
| 650 | \ |
687 | \ |
| 651 | _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
688 | _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ |
| 652 | \ |
689 | \ |
| 653 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ |
690 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ |
| 654 | } while(0) /* PCD_TX_DTOG */ |
691 | } while(0) /* PCD_TX_DTOG */ |
| Line 656... | Line 693... | ||
| 656 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
693 | * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. |
| 657 | * @param USBx USB peripheral instance register address. |
694 | * @param USBx USB peripheral instance register address. |
| 658 | * @param bEpNum Endpoint Number. |
695 | * @param bEpNum Endpoint Number. |
| 659 | * @retval None |
696 | * @retval None |
| 660 | */ |
697 | */ |
| 661 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \ |
698 | #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ |
| - | 699 | do { \ |
|
| 662 | register uint16_t _wRegVal; \ |
700 | uint16_t _wRegVal; \ |
| 663 | \ |
701 | \ |
| 664 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
702 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
| 665 | \ |
703 | \ |
| 666 | if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ |
704 | if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ |
| 667 | { \ |
705 | { \ |
| 668 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
706 | PCD_RX_DTOG((USBx), (bEpNum)); \ |
| 669 | } \ |
707 | } \ |
| 670 | } while(0) /* PCD_CLEAR_RX_DTOG */ |
708 | } while(0) /* PCD_CLEAR_RX_DTOG */ |
| 671 | 709 | ||
| 672 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \ |
710 | #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ |
| - | 711 | do { \ |
|
| 673 | register uint16_t _wRegVal; \ |
712 | uint16_t _wRegVal; \ |
| 674 | \ |
713 | \ |
| 675 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
714 | _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ |
| 676 | \ |
715 | \ |
| 677 | if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ |
716 | if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ |
| 678 | { \ |
717 | { \ |
| Line 685... | Line 724... | ||
| 685 | * @param USBx USB peripheral instance register address. |
724 | * @param USBx USB peripheral instance register address. |
| 686 | * @param bEpNum Endpoint Number. |
725 | * @param bEpNum Endpoint Number. |
| 687 | * @param bAddr Address. |
726 | * @param bAddr Address. |
| 688 | * @retval None |
727 | * @retval None |
| 689 | */ |
728 | */ |
| 690 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \ |
729 | #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ |
| - | 730 | do { \ |
|
| 691 | register uint16_t _wRegVal; \ |
731 | uint16_t _wRegVal; \ |
| 692 | \ |
732 | \ |
| 693 | _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ |
733 | _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ |
| 694 | \ |
734 | \ |
| 695 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
735 | PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ |
| 696 | } while(0) /* PCD_SET_EP_ADDRESS */ |
736 | } while(0) /* PCD_SET_EP_ADDRESS */ |
| Line 701... | Line 741... | ||
| 701 | * @param bEpNum Endpoint Number. |
741 | * @param bEpNum Endpoint Number. |
| 702 | * @retval None |
742 | * @retval None |
| 703 | */ |
743 | */ |
| 704 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
744 | #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) |
| 705 | 745 | ||
| - | 746 | #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ |
|
| 706 | #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
747 | + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
| - | 748 | ||
| - | 749 | #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ |
|
| 707 | #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
750 | + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) |
| - | 751 | ||
| 708 | 752 | ||
| 709 | /** |
753 | /** |
| 710 | * @brief sets address of the tx/rx buffer. |
754 | * @brief sets address of the tx/rx buffer. |
| 711 | * @param USBx USB peripheral instance register address. |
755 | * @param USBx USB peripheral instance register address. |
| 712 | * @param bEpNum Endpoint Number. |
756 | * @param bEpNum Endpoint Number. |
| 713 | * @param wAddr address to be set (must be word aligned). |
757 | * @param wAddr address to be set (must be word aligned). |
| 714 | * @retval None |
758 | * @retval None |
| 715 | */ |
759 | */ |
| 716 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \ |
760 | #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ |
| - | 761 | do { \ |
|
| 717 | register uint16_t *_wRegVal; \ |
762 | __IO uint16_t *_wRegVal; \ |
| 718 | register uint32_t _wRegBase = (uint32_t)USBx; \ |
763 | uint32_t _wRegBase = (uint32_t)USBx; \ |
| 719 | \ |
764 | \ |
| 720 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
765 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
| 721 | _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ |
766 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ |
| 722 | *_wRegVal = ((wAddr) >> 1) << 1; \ |
767 | *_wRegVal = ((wAddr) >> 1) << 1; \ |
| 723 | } while(0) /* PCD_SET_EP_TX_ADDRESS */ |
768 | } while(0) /* PCD_SET_EP_TX_ADDRESS */ |
| 724 | 769 | ||
| 725 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \ |
770 | #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ |
| - | 771 | do { \ |
|
| 726 | register uint16_t *_wRegVal; \ |
772 | __IO uint16_t *_wRegVal; \ |
| 727 | register uint32_t _wRegBase = (uint32_t)USBx; \ |
773 | uint32_t _wRegBase = (uint32_t)USBx; \ |
| 728 | \ |
774 | \ |
| 729 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
775 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
| 730 | _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ |
776 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ |
| 731 | *_wRegVal = ((wAddr) >> 1) << 1; \ |
777 | *_wRegVal = ((wAddr) >> 1) << 1; \ |
| 732 | } while(0) /* PCD_SET_EP_RX_ADDRESS */ |
778 | } while(0) /* PCD_SET_EP_RX_ADDRESS */ |
| 733 | 779 | ||
| 734 | /** |
780 | /** |
| 735 | * @brief Gets address of the tx/rx buffer. |
781 | * @brief Gets address of the tx/rx buffer. |
| 736 | * @param USBx USB peripheral instance register address. |
782 | * @param USBx USB peripheral instance register address. |
| 737 | * @param bEpNum Endpoint Number. |
783 | * @param bEpNum Endpoint Number. |
| Line 745... | Line 791... | ||
| 745 | * @param pdwReg Register pointer |
791 | * @param pdwReg Register pointer |
| 746 | * @param wCount Counter. |
792 | * @param wCount Counter. |
| 747 | * @param wNBlocks no. of Blocks. |
793 | * @param wNBlocks no. of Blocks. |
| 748 | * @retval None |
794 | * @retval None |
| 749 | */ |
795 | */ |
| 750 | #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \ |
796 | #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ |
| - | 797 | do { \ |
|
| 751 | (wNBlocks) = (wCount) >> 5; \ |
798 | (wNBlocks) = (wCount) >> 5; \ |
| 752 | if (((wCount) & 0x1fU) == 0U) \ |
799 | if (((wCount) & 0x1fU) == 0U) \ |
| 753 | { \ |
800 | { \ |
| 754 | (wNBlocks)--; \ |
801 | (wNBlocks)--; \ |
| 755 | } \ |
802 | } \ |
| 756 | *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ |
803 | *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ |
| 757 | } while(0) /* PCD_CALC_BLK32 */ |
804 | } while(0) /* PCD_CALC_BLK32 */ |
| 758 | 805 | ||
| 759 | #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \ |
806 | #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ |
| - | 807 | do { \ |
|
| 760 | (wNBlocks) = (wCount) >> 1; \ |
808 | (wNBlocks) = (wCount) >> 1; \ |
| 761 | if (((wCount) & 0x1U) != 0U) \ |
809 | if (((wCount) & 0x1U) != 0U) \ |
| 762 | { \ |
810 | { \ |
| 763 | (wNBlocks)++; \ |
811 | (wNBlocks)++; \ |
| 764 | } \ |
812 | } \ |
| 765 | *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ |
813 | *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ |
| 766 | } while(0) /* PCD_CALC_BLK2 */ |
814 | } while(0) /* PCD_CALC_BLK2 */ |
| 767 | 815 | ||
| 768 | #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \ |
816 | #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ |
| - | 817 | do { \ |
|
| 769 | uint32_t wNBlocks; \ |
818 | uint32_t wNBlocks; \ |
| 770 | if ((wCount) == 0U) \ |
819 | if ((wCount) == 0U) \ |
| 771 | { \ |
820 | { \ |
| 772 | *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ |
821 | *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ |
| 773 | *(pdwReg) |= USB_CNTRX_BLSIZE; \ |
822 | *(pdwReg) |= USB_CNTRX_BLSIZE; \ |
| Line 776... | Line 825... | ||
| 776 | { \ |
825 | { \ |
| 777 | PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ |
826 | PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ |
| 778 | } \ |
827 | } \ |
| 779 | else \ |
828 | else \ |
| 780 | { \ |
829 | { \ |
| 781 | PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \ |
830 | PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ |
| 782 | } \ |
831 | } \ |
| 783 | } while(0) /* PCD_SET_EP_CNT_RX_REG */ |
832 | } while(0) /* PCD_SET_EP_CNT_RX_REG */ |
| 784 | 833 | ||
| 785 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \ |
834 | #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ |
| - | 835 | do { \ |
|
| 786 | register uint32_t _wRegBase = (uint32_t)(USBx); \ |
836 | uint32_t _wRegBase = (uint32_t)(USBx); \ |
| 787 | uint16_t *pdwReg; \ |
837 | __IO uint16_t *pdwReg; \ |
| 788 | \ |
838 | \ |
| 789 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
839 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
| 790 | pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
840 | pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
| 791 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ |
841 | PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ |
| 792 | } while(0) |
842 | } while(0) |
| 793 | 843 | ||
| 794 | /** |
844 | /** |
| 795 | * @brief sets counter for the tx/rx buffer. |
845 | * @brief sets counter for the tx/rx buffer. |
| 796 | * @param USBx USB peripheral instance register address. |
846 | * @param USBx USB peripheral instance register address. |
| 797 | * @param bEpNum Endpoint Number. |
847 | * @param bEpNum Endpoint Number. |
| 798 | * @param wCount Counter value. |
848 | * @param wCount Counter value. |
| 799 | * @retval None |
849 | * @retval None |
| 800 | */ |
850 | */ |
| 801 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \ |
851 | #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ |
| - | 852 | do { \ |
|
| 802 | register uint32_t _wRegBase = (uint32_t)(USBx); \ |
853 | uint32_t _wRegBase = (uint32_t)(USBx); \ |
| 803 | uint16_t *_wRegVal; \ |
854 | __IO uint16_t *_wRegVal; \ |
| 804 | \ |
855 | \ |
| 805 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
856 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
| 806 | _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
857 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ |
| 807 | *_wRegVal = (uint16_t)(wCount); \ |
858 | *_wRegVal = (uint16_t)(wCount); \ |
| 808 | } while(0) |
859 | } while(0) |
| 809 | 860 | ||
| 810 | #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \ |
861 | #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ |
| - | 862 | do { \ |
|
| 811 | register uint32_t _wRegBase = (uint32_t)(USBx); \ |
863 | uint32_t _wRegBase = (uint32_t)(USBx); \ |
| 812 | uint16_t *_wRegVal; \ |
864 | __IO uint16_t *_wRegVal; \ |
| 813 | \ |
865 | \ |
| 814 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
866 | _wRegBase += (uint32_t)(USBx)->BTABLE; \ |
| 815 | _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
867 | _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
| 816 | PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ |
868 | PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ |
| 817 | } while(0) |
869 | } while(0) |
| 818 | 870 | ||
| 819 | /** |
871 | /** |
| 820 | * @brief gets counter of the tx buffer. |
872 | * @brief gets counter of the tx buffer. |
| 821 | * @param USBx USB peripheral instance register address. |
873 | * @param USBx USB peripheral instance register address. |
| 822 | * @param bEpNum Endpoint Number. |
874 | * @param bEpNum Endpoint Number. |
| Line 830... | Line 882... | ||
| 830 | * @param USBx USB peripheral instance register address. |
882 | * @param USBx USB peripheral instance register address. |
| 831 | * @param bEpNum Endpoint Number. |
883 | * @param bEpNum Endpoint Number. |
| 832 | * @param wBuf0Addr buffer 0 address. |
884 | * @param wBuf0Addr buffer 0 address. |
| 833 | * @retval Counter value |
885 | * @retval Counter value |
| 834 | */ |
886 | */ |
| 835 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \ |
887 | #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ |
| - | 888 | do { \ |
|
| 836 | PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ |
889 | PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ |
| 837 | } while(0) /* PCD_SET_EP_DBUF0_ADDR */ |
890 | } while(0) /* PCD_SET_EP_DBUF0_ADDR */ |
| - | 891 | ||
| 838 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \ |
892 | #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ |
| - | 893 | do { \ |
|
| 839 | PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ |
894 | PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ |
| 840 | } while(0) /* PCD_SET_EP_DBUF1_ADDR */ |
895 | } while(0) /* PCD_SET_EP_DBUF1_ADDR */ |
| 841 | 896 | ||
| 842 | /** |
897 | /** |
| 843 | * @brief Sets addresses in a double buffer endpoint. |
898 | * @brief Sets addresses in a double buffer endpoint. |
| Line 845... | Line 900... | ||
| 845 | * @param bEpNum Endpoint Number. |
900 | * @param bEpNum Endpoint Number. |
| 846 | * @param wBuf0Addr: buffer 0 address. |
901 | * @param wBuf0Addr: buffer 0 address. |
| 847 | * @param wBuf1Addr = buffer 1 address. |
902 | * @param wBuf1Addr = buffer 1 address. |
| 848 | * @retval None |
903 | * @retval None |
| 849 | */ |
904 | */ |
| 850 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \ |
905 | #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ |
| - | 906 | do { \ |
|
| 851 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ |
907 | PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ |
| 852 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ |
908 | PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ |
| 853 | } while(0) /* PCD_SET_EP_DBUF_ADDR */ |
909 | } while(0) /* PCD_SET_EP_DBUF_ADDR */ |
| 854 | 910 | ||
| 855 | /** |
911 | /** |
| Line 868... | Line 924... | ||
| 868 | * @param bDir endpoint dir EP_DBUF_OUT = OUT |
924 | * @param bDir endpoint dir EP_DBUF_OUT = OUT |
| 869 | * EP_DBUF_IN = IN |
925 | * EP_DBUF_IN = IN |
| 870 | * @param wCount: Counter value |
926 | * @param wCount: Counter value |
| 871 | * @retval None |
927 | * @retval None |
| 872 | */ |
928 | */ |
| 873 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \ |
929 | #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ |
| - | 930 | do { \ |
|
| 874 | if ((bDir) == 0U) \ |
931 | if ((bDir) == 0U) \ |
| 875 | /* OUT endpoint */ \ |
932 | /* OUT endpoint */ \ |
| 876 | { \ |
933 | { \ |
| 877 | PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ |
934 | PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ |
| 878 | } \ |
935 | } \ |
| Line 884... | Line 941... | ||
| 884 | PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ |
941 | PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ |
| 885 | } \ |
942 | } \ |
| 886 | } \ |
943 | } \ |
| 887 | } while(0) /* SetEPDblBuf0Count*/ |
944 | } while(0) /* SetEPDblBuf0Count*/ |
| 888 | 945 | ||
| 889 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \ |
946 | #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ |
| - | 947 | do { \ |
|
| 890 | register uint32_t _wBase = (uint32_t)(USBx); \ |
948 | uint32_t _wBase = (uint32_t)(USBx); \ |
| 891 | uint16_t *_wEPRegVal; \ |
949 | __IO uint16_t *_wEPRegVal; \ |
| 892 | \ |
950 | \ |
| 893 | if ((bDir) == 0U) \ |
951 | if ((bDir) == 0U) \ |
| 894 | { \ |
952 | { \ |
| 895 | /* OUT endpoint */ \ |
953 | /* OUT endpoint */ \ |
| 896 | PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ |
954 | PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ |
| Line 899... | Line 957... | ||
| 899 | { \ |
957 | { \ |
| 900 | if ((bDir) == 1U) \ |
958 | if ((bDir) == 1U) \ |
| 901 | { \ |
959 | { \ |
| 902 | /* IN endpoint */ \ |
960 | /* IN endpoint */ \ |
| 903 | _wBase += (uint32_t)(USBx)->BTABLE; \ |
961 | _wBase += (uint32_t)(USBx)->BTABLE; \ |
| 904 | _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
962 | _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ |
| 905 | *_wEPRegVal = (uint16_t)(wCount); \ |
963 | *_wEPRegVal = (uint16_t)(wCount); \ |
| 906 | } \ |
964 | } \ |
| 907 | } \ |
965 | } \ |
| 908 | } while(0) /* SetEPDblBuf1Count */ |
966 | } while(0) /* SetEPDblBuf1Count */ |
| 909 | 967 | ||
| 910 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \ |
968 | #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ |
| - | 969 | do { \ |
|
| 911 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
970 | PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
| 912 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
971 | PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ |
| 913 | } while(0) /* PCD_SET_EP_DBUF_CNT */ |
972 | } while(0) /* PCD_SET_EP_DBUF_CNT */ |
| 914 | 973 | ||
| 915 | /** |
974 | /** |
| 916 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
975 | * @brief Gets buffer 0/1 rx/tx counter for double buffering. |
| 917 | * @param USBx USB peripheral instance register address. |
976 | * @param USBx USB peripheral instance register address. |
| 918 | * @param bEpNum Endpoint Number. |
977 | * @param bEpNum Endpoint Number. |