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| Rev 2 | Rev 6 | ||
|---|---|---|---|
| Line 248... | Line 248... | ||
| 248 | HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ |
248 | HAL_CAN_RX_FIFO0_MSG_PENDING_CB_ID = 0x06U, /*!< CAN Rx FIFO 0 message pending callback ID */ |
| 249 | HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ |
249 | HAL_CAN_RX_FIFO0_FULL_CB_ID = 0x07U, /*!< CAN Rx FIFO 0 full callback ID */ |
| 250 | HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ |
250 | HAL_CAN_RX_FIFO1_MSG_PENDING_CB_ID = 0x08U, /*!< CAN Rx FIFO 1 message pending callback ID */ |
| 251 | HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ |
251 | HAL_CAN_RX_FIFO1_FULL_CB_ID = 0x09U, /*!< CAN Rx FIFO 1 full callback ID */ |
| 252 | HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ |
252 | HAL_CAN_SLEEP_CB_ID = 0x0AU, /*!< CAN Sleep callback ID */ |
| 253 | HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up fropm Rx msg callback ID */ |
253 | HAL_CAN_WAKEUP_FROM_RX_MSG_CB_ID = 0x0BU, /*!< CAN Wake Up from Rx msg callback ID */ |
| 254 | HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ |
254 | HAL_CAN_ERROR_CB_ID = 0x0CU, /*!< CAN Error callback ID */ |
| 255 | 255 | ||
| 256 | HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ |
256 | HAL_CAN_MSPINIT_CB_ID = 0x0DU, /*!< CAN MspInit callback ID */ |
| 257 | HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ |
257 | HAL_CAN_MSPDEINIT_CB_ID = 0x0EU, /*!< CAN MspDeInit callback ID */ |
| 258 | 258 | ||
| Line 288... | Line 288... | ||
| 288 | #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ |
288 | #define HAL_CAN_ERROR_BD (0x00000080U) /*!< Bit dominant error */ |
| 289 | #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ |
289 | #define HAL_CAN_ERROR_CRC (0x00000100U) /*!< CRC error */ |
| 290 | #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ |
290 | #define HAL_CAN_ERROR_RX_FOV0 (0x00000200U) /*!< Rx FIFO0 overrun error */ |
| 291 | #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ |
291 | #define HAL_CAN_ERROR_RX_FOV1 (0x00000400U) /*!< Rx FIFO1 overrun error */ |
| 292 | #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
292 | #define HAL_CAN_ERROR_TX_ALST0 (0x00000800U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
| 293 | #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ |
293 | #define HAL_CAN_ERROR_TX_TERR0 (0x00001000U) /*!< TxMailbox 0 transmit failure due to transmit error */ |
| 294 | #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
294 | #define HAL_CAN_ERROR_TX_ALST1 (0x00002000U) /*!< TxMailbox 1 transmit failure due to arbitration lost */ |
| 295 | #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ |
295 | #define HAL_CAN_ERROR_TX_TERR1 (0x00004000U) /*!< TxMailbox 1 transmit failure due to transmit error */ |
| 296 | #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 0 transmit failure due to arbitration lost */ |
296 | #define HAL_CAN_ERROR_TX_ALST2 (0x00008000U) /*!< TxMailbox 2 transmit failure due to arbitration lost */ |
| 297 | #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 1 transmit failure due to tranmit error */ |
297 | #define HAL_CAN_ERROR_TX_TERR2 (0x00010000U) /*!< TxMailbox 2 transmit failure due to transmit error */ |
| 298 | #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ |
298 | #define HAL_CAN_ERROR_TIMEOUT (0x00020000U) /*!< Timeout error */ |
| 299 | #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ |
299 | #define HAL_CAN_ERROR_NOT_INITIALIZED (0x00040000U) /*!< Peripheral not initialized */ |
| 300 | #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ |
300 | #define HAL_CAN_ERROR_NOT_READY (0x00080000U) /*!< Peripheral not ready */ |
| 301 | #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ |
301 | #define HAL_CAN_ERROR_NOT_STARTED (0x00100000U) /*!< Peripheral not started */ |
| 302 | #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ |
302 | #define HAL_CAN_ERROR_PARAM (0x00200000U) /*!< Parameter error */ |