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1 
/**
 1 
/**
2 
  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
 2 
  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3 
  * @file      startup_stm32f107xc.s
 3 
  * @file      startup_stm32f107xc.s
4 
  * @author    MCD Application Team
 4 
  * @author    MCD Application Team
5 
  * @brief     STM32F107xC Devices vector table for Atollic toolchain.
 5 
  * @brief     STM32F107xC Devices vector table for Atollic toolchain.
6 
  *            This module performs:
 6 
  *            This module performs:
7 
  *                - Set the initial SP
 7 
  *                - Set the initial SP
8 
  *                - Set the initial PC == Reset_Handler,
 8 
  *                - Set the initial PC == Reset_Handler,
9 
  *                - Set the vector table entries with the exceptions ISR address
 9 
  *                - Set the vector table entries with the exceptions ISR address
10 
  *                - Configure the clock system
10 
  *                - Configure the clock system
11 
  *                - Branches to main in the C library (which eventually
 11 
  *                - Branches to main in the C library (which eventually
12 
  *                  calls main()).
 12 
  *                  calls main()).
13 
  *            After Reset the Cortex-M3 processor is in Thread mode,
 13 
  *            After Reset the Cortex-M3 processor is in Thread mode,
14 
  *            priority is Privileged, and the Stack is set to Main.
 14 
  *            priority is Privileged, and the Stack is set to Main.
15 
  ******************************************************************************
15 
  ******************************************************************************
16 
  * @attention
 16 
  * @attention
17 
  *
17 
  *
18 
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
18 
  * Copyright (c) 2017-2021 STMicroelectronics.
19 
  * All rights reserved.</center></h2>
19 
  * All rights reserved.
20 
  *
20 
  *
21 
  * This software component is licensed by ST under BSD 3-Clause license,
 21 
  * This software is licensed under terms that can be found in the LICENSE file
22 
  * the "License"; You may not use this file except in compliance with the
22 
  * in the root directory of this software component.
23 
  * License. You may obtain a copy of the License at:
23 
  * If no LICENSE file comes with this software, it is provided AS-IS.
24 
  *                        opensource.org/licenses/BSD-3-Clause
 24 
  *
25 
  *
25 
  ******************************************************************************
26 
  ******************************************************************************
26 
  */
27 
  */
27 
 
28 
 
 28 
  .syntax unified
29 
  .syntax unified
 29 
  .cpu cortex-m3
30 
  .cpu cortex-m3
 30 
  .fpu softvfp
31 
  .fpu softvfp
 31 
  .thumb
32 
  .thumb
32 
 
33 
 
 33 
.global g_pfnVectors
34 
.global g_pfnVectors
 34 
.global Default_Handler
35 
.global Default_Handler
 35 
 
36 
 
 36 
/* start address for the initialization values of the .data section.
37 
/* start address for the initialization values of the .data section.
 37 
defined in linker script */
38 
defined in linker script */
 38 
.word _sidata
39 
.word _sidata
 39 
/* start address for the .data section. defined in linker script */
40 
/* start address for the .data section. defined in linker script */
 40 
.word _sdata
41 
.word _sdata
 41 
/* end address for the .data section. defined in linker script */
42 
/* end address for the .data section. defined in linker script */
 42 
.word _edata
43 
.word _edata
 43 
/* start address for the .bss section. defined in linker script */
44 
/* start address for the .bss section. defined in linker script */
 44 
.word _sbss
45 
.word _sbss
 45 
/* end address for the .bss section. defined in linker script */
46 
/* end address for the .bss section. defined in linker script */
 46 
.word _ebss
47 
.word _ebss
 47 
 
48 
 
 48 
.equ  BootRAM, 0xF1E0F85F
49 
.equ  BootRAM, 0xF1E0F85F
 49 
/**
50 
/**
 50 
 * @brief  This is the code that gets called when the processor first
51 
 * @brief  This is the code that gets called when the processor first
 51 
 *          starts execution following a reset event. Only the absolutely
52 
 *          starts execution following a reset event. Only the absolutely
 52 
 *          necessary set is performed, after which the application
53 
 *          necessary set is performed, after which the application
 53 
 *          supplied main() routine is called.
54 
 *          supplied main() routine is called.
 54 
 * @param  None
55 
 * @param  None
 55 
 * @retval : None
56 
 * @retval : None
 56 
*/
57 
*/
 57 
 
58 
 
 58 
  .section .text.Reset_Handler
59 
  .section .text.Reset_Handler
 59 
  .weak Reset_Handler
60 
  .weak Reset_Handler
 60 
  .type Reset_Handler, %function
61 
  .type Reset_Handler, %function
 61 
Reset_Handler:
62 
Reset_Handler:
 62 
 
63 
 
 63 
/* Call the clock system initialization function.*/
64 
/* Copy the data segment initializers from flash to SRAM */
 64 
    bl  SystemInit
65 
  ldr r0, =_sdata
 65 
 
66 
  ldr r1, =_edata
 66 
/* Copy the data segment initializers from flash to SRAM */
67 
  ldr r2, =_sidata
 67 
  ldr r0, =_sdata
68 
  movs r3, #0
 68 
  ldr r1, =_edata
69 
  b LoopCopyDataInit
 69 
  ldr r2, =_sidata
70 
 
 70 
  movs r3, #0
71 
CopyDataInit:
 71 
  b LoopCopyDataInit
72 
  ldr r4, [r2, r3]
 72 
 
73 
  str r4, [r0, r3]
 73 
CopyDataInit:
74 
  adds r3, r3, #4
 74 
  ldr r4, [r2, r3]
75 
 
 75 
  str r4, [r0, r3]
76 
LoopCopyDataInit:
 76 
  adds r3, r3, #4
77 
  adds r4, r0, r3
 77 
 
78 
  cmp r4, r1
 78 
LoopCopyDataInit:
79 
  bcc CopyDataInit
 79 
  adds r4, r0, r3
80
80 
  cmp r4, r1
81 
/* Zero fill the bss segment. */
 81 
  bcc CopyDataInit
82 
  ldr r2, =_sbss
 82
83 
  ldr r4, =_ebss
 83 
/* Zero fill the bss segment. */
84 
  movs r3, #0
 84 
  ldr r2, =_sbss
85 
  b LoopFillZerobss
 85 
  ldr r4, =_ebss
86 
 
 86 
  movs r3, #0
87 
FillZerobss:
 87 
  b LoopFillZerobss
88 
  str  r3, [r2]
 88 
 
89 
  adds r2, r2, #4
 89 
FillZerobss:
90 
 
 90 
  str  r3, [r2]
91 
LoopFillZerobss:
 91 
  adds r2, r2, #4
92 
  cmp r2, r4
 92 
 
93 
  bcc FillZerobss
 93 
LoopFillZerobss:
94 
 
 94 
  cmp r2, r4
95 
/* Call the clock system intitialization function.*/
 95 
  bcc FillZerobss
96 
    bl  SystemInit
 96 
 
97 
/* Call static constructors */
 97 
 
98 
    bl __libc_init_array
 98 
/* Call static constructors */
99 
/* Call the application's entry point.*/
 99 
    bl __libc_init_array
100 
  bl main
 100 
/* Call the application's entry point.*/
101 
  bx lr
 101 
  bl main
102 
.size Reset_Handler, .-Reset_Handler
 102 
  bx lr
103 
 
 103 
.size Reset_Handler, .-Reset_Handler
104 
/**
 104 
 
105 
 * @brief  This is the code that gets called when the processor receives an
 105 
/**
106 
 *         unexpected interrupt.  This simply enters an infinite loop, preserving
 106 
 * @brief  This is the code that gets called when the processor receives an
107 
 *         the system state for examination by a debugger.
 107 
 *         unexpected interrupt.  This simply enters an infinite loop, preserving
108 
 *
108 
 *         the system state for examination by a debugger.
109 
 * @param  None
 109 
 *
110 
 * @retval : None
 110 
 * @param  None
111 
*/
 111 
 * @retval : None
112 
    .section .text.Default_Handler,"ax",%progbits
 112 
*/
113 
Default_Handler:
 113 
    .section .text.Default_Handler,"ax",%progbits
114 
Infinite_Loop:
 114 
Default_Handler:
115 
  b Infinite_Loop
 115 
Infinite_Loop:
116 
  .size Default_Handler, .-Default_Handler
 116 
  b Infinite_Loop
117 
 
 117 
  .size Default_Handler, .-Default_Handler
118 
/******************************************************************************
 118 
 
119 
*
 119 
/******************************************************************************
120 
* The minimal vector table for a Cortex M3.  Note that the proper constructs
 120 
*
121 
* must be placed on this to ensure that it ends up at physical address
 121 
* The minimal vector table for a Cortex M3.  Note that the proper constructs
122 
* 0x0000.0000.
 122 
* must be placed on this to ensure that it ends up at physical address
123 
*
 123 
* 0x0000.0000.
124 
******************************************************************************/
 124 
*
125 
  .section .isr_vector,"a",%progbits
 125 
******************************************************************************/
126 
  .type g_pfnVectors, %object
 126 
  .section .isr_vector,"a",%progbits
127 
  .size g_pfnVectors, .-g_pfnVectors
 127 
  .type g_pfnVectors, %object
128 
 
 128 
  .size g_pfnVectors, .-g_pfnVectors
129 
 
 129 
 
130 
g_pfnVectors:
 130 
 
131 
 
 131 
g_pfnVectors:
132 
  .word _estack
 132 
 
133 
  .word Reset_Handler
 133 
  .word _estack
134 
  .word NMI_Handler
 134 
  .word Reset_Handler
135 
  .word HardFault_Handler
 135 
  .word NMI_Handler
136 
  .word MemManage_Handler
 136 
  .word HardFault_Handler
137 
  .word BusFault_Handler
 137 
  .word MemManage_Handler
138 
  .word UsageFault_Handler
 138 
  .word BusFault_Handler
139 
  .word 0
 139 
  .word UsageFault_Handler
140 
  .word 0
 140 
  .word 0
141 
  .word 0
 141 
  .word 0
142 
  .word 0
 142 
  .word 0
143 
  .word SVC_Handler
 143 
  .word 0
144 
  .word DebugMon_Handler
 144 
  .word SVC_Handler
145 
  .word 0
 145 
  .word DebugMon_Handler
146 
  .word PendSV_Handler
 146 
  .word 0
147 
  .word SysTick_Handler
 147 
  .word PendSV_Handler
148 
  .word WWDG_IRQHandler
 148 
  .word SysTick_Handler
149 
  .word PVD_IRQHandler
 149 
  .word WWDG_IRQHandler
150 
  .word TAMPER_IRQHandler
 150 
  .word PVD_IRQHandler
151 
  .word RTC_IRQHandler
 151 
  .word TAMPER_IRQHandler
152 
  .word FLASH_IRQHandler
 152 
  .word RTC_IRQHandler
153 
  .word RCC_IRQHandler
 153 
  .word FLASH_IRQHandler
154 
  .word EXTI0_IRQHandler
 154 
  .word RCC_IRQHandler
155 
  .word EXTI1_IRQHandler
 155 
  .word EXTI0_IRQHandler
156 
  .word EXTI2_IRQHandler
 156 
  .word EXTI1_IRQHandler
157 
  .word EXTI3_IRQHandler
 157 
  .word EXTI2_IRQHandler
158 
  .word EXTI4_IRQHandler
 158 
  .word EXTI3_IRQHandler
159 
  .word DMA1_Channel1_IRQHandler
 159 
  .word EXTI4_IRQHandler
160 
  .word DMA1_Channel2_IRQHandler
 160 
  .word DMA1_Channel1_IRQHandler
161 
  .word DMA1_Channel3_IRQHandler
 161 
  .word DMA1_Channel2_IRQHandler
162 
  .word DMA1_Channel4_IRQHandler
 162 
  .word DMA1_Channel3_IRQHandler
163 
  .word DMA1_Channel5_IRQHandler
 163 
  .word DMA1_Channel4_IRQHandler
164 
  .word DMA1_Channel6_IRQHandler
 164 
  .word DMA1_Channel5_IRQHandler
165 
  .word DMA1_Channel7_IRQHandler
 165 
  .word DMA1_Channel6_IRQHandler
166 
  .word ADC1_2_IRQHandler
 166 
  .word DMA1_Channel7_IRQHandler
167 
  .word CAN1_TX_IRQHandler
 167 
  .word ADC1_2_IRQHandler
168 
  .word CAN1_RX0_IRQHandler
 168 
  .word CAN1_TX_IRQHandler
169 
  .word CAN1_RX1_IRQHandler
 169 
  .word CAN1_RX0_IRQHandler
170 
  .word CAN1_SCE_IRQHandler
 170 
  .word CAN1_RX1_IRQHandler
171 
  .word EXTI9_5_IRQHandler
 171 
  .word CAN1_SCE_IRQHandler
172 
  .word TIM1_BRK_IRQHandler
 172 
  .word EXTI9_5_IRQHandler
173 
  .word TIM1_UP_IRQHandler
 173 
  .word TIM1_BRK_IRQHandler
174 
  .word TIM1_TRG_COM_IRQHandler
 174 
  .word TIM1_UP_IRQHandler
175 
  .word TIM1_CC_IRQHandler
 175 
  .word TIM1_TRG_COM_IRQHandler
176 
  .word TIM2_IRQHandler
 176 
  .word TIM1_CC_IRQHandler
177 
  .word TIM3_IRQHandler
 177 
  .word TIM2_IRQHandler
178 
  .word TIM4_IRQHandler
 178 
  .word TIM3_IRQHandler
179 
  .word I2C1_EV_IRQHandler
 179 
  .word TIM4_IRQHandler
180 
  .word I2C1_ER_IRQHandler
 180 
  .word I2C1_EV_IRQHandler
181 
  .word I2C2_EV_IRQHandler
 181 
  .word I2C1_ER_IRQHandler
182 
  .word I2C2_ER_IRQHandler
 182 
  .word I2C2_EV_IRQHandler
183 
  .word SPI1_IRQHandler
 183 
  .word I2C2_ER_IRQHandler
184 
  .word SPI2_IRQHandler
 184 
  .word SPI1_IRQHandler
185 
  .word USART1_IRQHandler
 185 
  .word SPI2_IRQHandler
186 
  .word USART2_IRQHandler
 186 
  .word USART1_IRQHandler
187 
  .word USART3_IRQHandler
 187 
  .word USART2_IRQHandler
188 
  .word EXTI15_10_IRQHandler
 188 
  .word USART3_IRQHandler
189 
  .word RTC_Alarm_IRQHandler
 189 
  .word EXTI15_10_IRQHandler
190 
  .word OTG_FS_WKUP_IRQHandler
 190 
  .word RTC_Alarm_IRQHandler
191 
  .word 0
 191 
  .word OTG_FS_WKUP_IRQHandler
192 
  .word 0
 192 
  .word 0
193 
  .word 0
 193 
  .word 0
194 
  .word 0
 194 
  .word 0
195 
  .word 0
 195 
  .word 0
196 
  .word 0
 196 
  .word 0
197 
  .word 0
 197 
  .word 0
198 
  .word TIM5_IRQHandler
 198 
  .word 0
199 
  .word SPI3_IRQHandler
 199 
  .word TIM5_IRQHandler
200 
  .word UART4_IRQHandler
 200 
  .word SPI3_IRQHandler
201 
  .word UART5_IRQHandler
 201 
  .word UART4_IRQHandler
202 
  .word TIM6_IRQHandler
 202 
  .word UART5_IRQHandler
203 
  .word TIM7_IRQHandler
 203 
  .word TIM6_IRQHandler
204 
  .word DMA2_Channel1_IRQHandler
 204 
  .word TIM7_IRQHandler
205 
  .word DMA2_Channel2_IRQHandler
 205 
  .word DMA2_Channel1_IRQHandler
206 
  .word DMA2_Channel3_IRQHandler
 206 
  .word DMA2_Channel2_IRQHandler
207 
  .word DMA2_Channel4_IRQHandler
 207 
  .word DMA2_Channel3_IRQHandler
208 
  .word DMA2_Channel5_IRQHandler
 208 
  .word DMA2_Channel4_IRQHandler
209 
  .word ETH_IRQHandler
 209 
  .word DMA2_Channel5_IRQHandler
210 
  .word ETH_WKUP_IRQHandler
 210 
  .word ETH_IRQHandler
211 
  .word CAN2_TX_IRQHandler
 211 
  .word ETH_WKUP_IRQHandler
212 
  .word CAN2_RX0_IRQHandler
 212 
  .word CAN2_TX_IRQHandler
213 
  .word CAN2_RX1_IRQHandler
 213 
  .word CAN2_RX0_IRQHandler
214 
  .word CAN2_SCE_IRQHandler
 214 
  .word CAN2_RX1_IRQHandler
215 
  .word OTG_FS_IRQHandler
 215 
  .word CAN2_SCE_IRQHandler
216 
  .word 0
 216 
  .word OTG_FS_IRQHandler
217 
  .word 0
 217 
  .word 0
218 
  .word 0
 218 
  .word 0
219 
  .word 0
 219 
  .word 0
220 
  .word 0
 220 
  .word 0
221 
  .word 0
 221 
  .word 0
222 
  .word 0
 222 
  .word 0
223 
  .word 0
 223 
  .word 0
224 
  .word 0
 224 
  .word 0
225 
  .word 0
 225 
  .word 0
226 
  .word 0
 226 
  .word 0
227 
  .word 0
 227 
  .word 0
228 
  .word 0
 228 
  .word 0
229 
  .word 0
 229 
  .word 0
230 
  .word 0
 230 
  .word 0
231 
  .word 0
 231 
  .word 0
232 
  .word 0
 232 
  .word 0
233 
  .word 0
 233 
  .word 0
234 
  .word 0
 234 
  .word 0
235 
  .word 0
 235 
  .word 0
236 
  .word 0
 236 
  .word 0
237 
  .word 0
 237 
  .word 0
238 
  .word 0
 238 
  .word 0
239 
  .word 0
 239 
  .word 0
240 
  .word 0
 240 
  .word 0
241 
  .word 0
 241 
  .word 0
242 
  .word 0
 242 
  .word 0
243 
  .word 0
 243 
  .word 0
244 
  .word 0
 244 
  .word 0
245 
  .word 0
 245 
  .word 0
246 
  .word 0
 246 
  .word 0
247 
  .word 0
 247 
  .word 0
248 
  .word 0
 248 
  .word 0
249 
  .word 0
 249 
  .word 0
250 
  .word 0
 250 
  .word 0
251 
  .word 0
 251 
  .word 0
252 
  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
 252 
  .word 0
253 
                         STM32F10x Connectivity line Devices. */
 253 
  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
254 
 
 254 
                         STM32F10x Connectivity line Devices. */
255 
/*******************************************************************************
 255 
 
256 
*
 256 
/*******************************************************************************
257 
* Provide weak aliases for each Exception handler to the Default_Handler.
 257 
*
258 
* As they are weak aliases, any function with the same name will override
 258 
* Provide weak aliases for each Exception handler to the Default_Handler.
259 
* this definition.
 259 
* As they are weak aliases, any function with the same name will override
260 
*
 260 
* this definition.
261 
*******************************************************************************/
 261 
*
262 
  .weak  NMI_Handler
 262 
*******************************************************************************/
263 
  .thumb_set NMI_Handler,Default_Handler
 263 
  .weak  NMI_Handler
264 
 
 264 
  .thumb_set NMI_Handler,Default_Handler
265 
  .weak  HardFault_Handler
 265 
 
266 
  .thumb_set HardFault_Handler,Default_Handler
 266 
  .weak  HardFault_Handler
267 
 
 267 
  .thumb_set HardFault_Handler,Default_Handler
268 
  .weak  MemManage_Handler
 268 
 
269 
  .thumb_set MemManage_Handler,Default_Handler
 269 
  .weak  MemManage_Handler
270 
 
 270 
  .thumb_set MemManage_Handler,Default_Handler
271 
  .weak  BusFault_Handler
 271 
 
272 
  .thumb_set BusFault_Handler,Default_Handler
 272 
  .weak  BusFault_Handler
273 
 
 273 
  .thumb_set BusFault_Handler,Default_Handler
274 
  .weak  UsageFault_Handler
 274 
 
275 
  .thumb_set UsageFault_Handler,Default_Handler
 275 
  .weak  UsageFault_Handler
276 
 
 276 
  .thumb_set UsageFault_Handler,Default_Handler
277 
  .weak  SVC_Handler
 277 
 
278 
  .thumb_set SVC_Handler,Default_Handler
 278 
  .weak  SVC_Handler
279 
 
 279 
  .thumb_set SVC_Handler,Default_Handler
280 
  .weak  DebugMon_Handler
 280 
 
281 
  .thumb_set DebugMon_Handler,Default_Handler
 281 
  .weak  DebugMon_Handler
282 
 
 282 
  .thumb_set DebugMon_Handler,Default_Handler
283 
  .weak  PendSV_Handler
 283 
 
284 
  .thumb_set PendSV_Handler,Default_Handler
 284 
  .weak  PendSV_Handler
285 
 
 285 
  .thumb_set PendSV_Handler,Default_Handler
286 
  .weak  SysTick_Handler
 286 
 
287 
  .thumb_set SysTick_Handler,Default_Handler
 287 
  .weak  SysTick_Handler
288 
 
 288 
  .thumb_set SysTick_Handler,Default_Handler
289 
  .weak  WWDG_IRQHandler
 289 
 
290 
  .thumb_set WWDG_IRQHandler,Default_Handler
 290 
  .weak  WWDG_IRQHandler
291 
 
 291 
  .thumb_set WWDG_IRQHandler,Default_Handler
292 
  .weak  PVD_IRQHandler
 292 
 
293 
  .thumb_set PVD_IRQHandler,Default_Handler
 293 
  .weak  PVD_IRQHandler
294 
 
 294 
  .thumb_set PVD_IRQHandler,Default_Handler
295 
  .weak  TAMPER_IRQHandler
 295 
 
296 
  .thumb_set TAMPER_IRQHandler,Default_Handler
 296 
  .weak  TAMPER_IRQHandler
297 
 
 297 
  .thumb_set TAMPER_IRQHandler,Default_Handler
298 
  .weak  RTC_IRQHandler
 298 
 
299 
  .thumb_set RTC_IRQHandler,Default_Handler
 299 
  .weak  RTC_IRQHandler
300 
 
 300 
  .thumb_set RTC_IRQHandler,Default_Handler
301 
  .weak  FLASH_IRQHandler
 301 
 
302 
  .thumb_set FLASH_IRQHandler,Default_Handler
 302 
  .weak  FLASH_IRQHandler
303 
 
 303 
  .thumb_set FLASH_IRQHandler,Default_Handler
304 
  .weak  RCC_IRQHandler
 304 
 
305 
  .thumb_set RCC_IRQHandler,Default_Handler
 305 
  .weak  RCC_IRQHandler
306 
 
 306 
  .thumb_set RCC_IRQHandler,Default_Handler
307 
  .weak  EXTI0_IRQHandler
 307 
 
308 
  .thumb_set EXTI0_IRQHandler,Default_Handler
 308 
  .weak  EXTI0_IRQHandler
309 
 
 309 
  .thumb_set EXTI0_IRQHandler,Default_Handler
310 
  .weak  EXTI1_IRQHandler
 310 
 
311 
  .thumb_set EXTI1_IRQHandler,Default_Handler
 311 
  .weak  EXTI1_IRQHandler
312 
 
 312 
  .thumb_set EXTI1_IRQHandler,Default_Handler
313 
  .weak  EXTI2_IRQHandler
 313 
 
314 
  .thumb_set EXTI2_IRQHandler,Default_Handler
 314 
  .weak  EXTI2_IRQHandler
315 
 
 315 
  .thumb_set EXTI2_IRQHandler,Default_Handler
316 
  .weak  EXTI3_IRQHandler
 316 
 
317 
  .thumb_set EXTI3_IRQHandler,Default_Handler
 317 
  .weak  EXTI3_IRQHandler
318 
 
 318 
  .thumb_set EXTI3_IRQHandler,Default_Handler
319 
  .weak  EXTI4_IRQHandler
 319 
 
320 
  .thumb_set EXTI4_IRQHandler,Default_Handler
 320 
  .weak  EXTI4_IRQHandler
321 
 
 321 
  .thumb_set EXTI4_IRQHandler,Default_Handler
322 
  .weak  DMA1_Channel1_IRQHandler
 322 
 
323 
  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 323 
  .weak  DMA1_Channel1_IRQHandler
324 
 
 324 
  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
325 
  .weak  DMA1_Channel2_IRQHandler
 325 
 
326 
  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 326 
  .weak  DMA1_Channel2_IRQHandler
327 
 
 327 
  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
328 
  .weak  DMA1_Channel3_IRQHandler
 328 
 
329 
  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 329 
  .weak  DMA1_Channel3_IRQHandler
330 
 
 330 
  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
331 
  .weak  DMA1_Channel4_IRQHandler
 331 
 
332 
  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 332 
  .weak  DMA1_Channel4_IRQHandler
333 
 
 333 
  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
334 
  .weak  DMA1_Channel5_IRQHandler
 334 
 
335 
  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 335 
  .weak  DMA1_Channel5_IRQHandler
336 
 
 336 
  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
337 
  .weak  DMA1_Channel6_IRQHandler
 337 
 
338 
  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 338 
  .weak  DMA1_Channel6_IRQHandler
339 
 
 339 
  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
340 
  .weak  DMA1_Channel7_IRQHandler
 340 
 
341 
  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 341 
  .weak  DMA1_Channel7_IRQHandler
342 
 
 342 
  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
343 
  .weak  ADC1_2_IRQHandler
 343 
 
344 
  .thumb_set ADC1_2_IRQHandler,Default_Handler
 344 
  .weak  ADC1_2_IRQHandler
345 
 
 345 
  .thumb_set ADC1_2_IRQHandler,Default_Handler
346 
  .weak  CAN1_TX_IRQHandler
 346 
 
347 
  .thumb_set CAN1_TX_IRQHandler,Default_Handler
 347 
  .weak  CAN1_TX_IRQHandler
348 
 
 348 
  .thumb_set CAN1_TX_IRQHandler,Default_Handler
349 
  .weak  CAN1_RX0_IRQHandler
 349 
 
350 
  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
 350 
  .weak  CAN1_RX0_IRQHandler
351 
 
 351 
  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
352 
  .weak  CAN1_RX1_IRQHandler
 352 
 
353 
  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 353 
  .weak  CAN1_RX1_IRQHandler
354 
 
 354 
  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
355 
  .weak  CAN1_SCE_IRQHandler
 355 
 
356 
  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 356 
  .weak  CAN1_SCE_IRQHandler
357 
 
 357 
  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
358 
  .weak  EXTI9_5_IRQHandler
 358 
 
359 
  .thumb_set EXTI9_5_IRQHandler,Default_Handler
 359 
  .weak  EXTI9_5_IRQHandler
360 
 
 360 
  .thumb_set EXTI9_5_IRQHandler,Default_Handler
361 
  .weak  TIM1_BRK_IRQHandler
 361 
 
362 
  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 362 
  .weak  TIM1_BRK_IRQHandler
363 
 
 363 
  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
364 
  .weak  TIM1_UP_IRQHandler
 364 
 
365 
  .thumb_set TIM1_UP_IRQHandler,Default_Handler
 365 
  .weak  TIM1_UP_IRQHandler
366 
 
 366 
  .thumb_set TIM1_UP_IRQHandler,Default_Handler
367 
  .weak  TIM1_TRG_COM_IRQHandler
 367 
 
368 
  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 368 
  .weak  TIM1_TRG_COM_IRQHandler
369 
 
 369 
  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
370 
  .weak  TIM1_CC_IRQHandler
 370 
 
371 
  .thumb_set TIM1_CC_IRQHandler,Default_Handler
 371 
  .weak  TIM1_CC_IRQHandler
372 
 
 372 
  .thumb_set TIM1_CC_IRQHandler,Default_Handler
373 
  .weak  TIM2_IRQHandler
 373 
 
374 
  .thumb_set TIM2_IRQHandler,Default_Handler
 374 
  .weak  TIM2_IRQHandler
375 
 
 375 
  .thumb_set TIM2_IRQHandler,Default_Handler
376 
  .weak  TIM3_IRQHandler
 376 
 
377 
  .thumb_set TIM3_IRQHandler,Default_Handler
 377 
  .weak  TIM3_IRQHandler
378 
 
 378 
  .thumb_set TIM3_IRQHandler,Default_Handler
379 
  .weak  TIM4_IRQHandler
 379 
 
380 
  .thumb_set TIM4_IRQHandler,Default_Handler
 380 
  .weak  TIM4_IRQHandler
381 
 
 381 
  .thumb_set TIM4_IRQHandler,Default_Handler
382 
  .weak  I2C1_EV_IRQHandler
 382 
 
383 
  .thumb_set I2C1_EV_IRQHandler,Default_Handler
 383 
  .weak  I2C1_EV_IRQHandler
384 
 
 384 
  .thumb_set I2C1_EV_IRQHandler,Default_Handler
385 
  .weak  I2C1_ER_IRQHandler
 385 
 
386 
  .thumb_set I2C1_ER_IRQHandler,Default_Handler
 386 
  .weak  I2C1_ER_IRQHandler
387 
 
 387 
  .thumb_set I2C1_ER_IRQHandler,Default_Handler
388 
  .weak  I2C2_EV_IRQHandler
 388 
 
389 
  .thumb_set I2C2_EV_IRQHandler,Default_Handler
 389 
  .weak  I2C2_EV_IRQHandler
390 
 
 390 
  .thumb_set I2C2_EV_IRQHandler,Default_Handler
391 
  .weak  I2C2_ER_IRQHandler
 391 
 
392 
  .thumb_set I2C2_ER_IRQHandler,Default_Handler
 392 
  .weak  I2C2_ER_IRQHandler
393 
 
 393 
  .thumb_set I2C2_ER_IRQHandler,Default_Handler
394 
  .weak  SPI1_IRQHandler
 394 
 
395 
  .thumb_set SPI1_IRQHandler,Default_Handler
 395 
  .weak  SPI1_IRQHandler
396 
 
 396 
  .thumb_set SPI1_IRQHandler,Default_Handler
397 
  .weak  SPI2_IRQHandler
 397 
 
398 
  .thumb_set SPI2_IRQHandler,Default_Handler
 398 
  .weak  SPI2_IRQHandler
399 
 
 399 
  .thumb_set SPI2_IRQHandler,Default_Handler
400 
  .weak  USART1_IRQHandler
 400 
 
401 
  .thumb_set USART1_IRQHandler,Default_Handler
 401 
  .weak  USART1_IRQHandler
402 
 
 402 
  .thumb_set USART1_IRQHandler,Default_Handler
403 
  .weak  USART2_IRQHandler
 403 
 
404 
  .thumb_set USART2_IRQHandler,Default_Handler
 404 
  .weak  USART2_IRQHandler
405 
 
 405 
  .thumb_set USART2_IRQHandler,Default_Handler
406 
  .weak  USART3_IRQHandler
 406 
 
407 
  .thumb_set USART3_IRQHandler,Default_Handler
 407 
  .weak  USART3_IRQHandler
408 
 
 408 
  .thumb_set USART3_IRQHandler,Default_Handler
409 
  .weak  EXTI15_10_IRQHandler
 409 
 
410 
  .thumb_set EXTI15_10_IRQHandler,Default_Handler
 410 
  .weak  EXTI15_10_IRQHandler
411 
 
 411 
  .thumb_set EXTI15_10_IRQHandler,Default_Handler
412 
  .weak  RTC_Alarm_IRQHandler
 412 
 
413 
  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 413 
  .weak  RTC_Alarm_IRQHandler
414 
 
 414 
  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
415 
  .weak  OTG_FS_WKUP_IRQHandler
 415 
 
416 
  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
 416 
  .weak  OTG_FS_WKUP_IRQHandler
417 
 
 417 
  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
418 
  .weak  TIM5_IRQHandler
 418 
 
419 
  .thumb_set TIM5_IRQHandler,Default_Handler
 419 
  .weak  TIM5_IRQHandler
420 
 
 420 
  .thumb_set TIM5_IRQHandler,Default_Handler
421 
  .weak  SPI3_IRQHandler
 421 
 
422 
  .thumb_set SPI3_IRQHandler,Default_Handler
 422 
  .weak  SPI3_IRQHandler
423 
 
 423 
  .thumb_set SPI3_IRQHandler,Default_Handler
424 
  .weak  UART4_IRQHandler
 424 
 
425 
  .thumb_set UART4_IRQHandler,Default_Handler
 425 
  .weak  UART4_IRQHandler
426 
 
 426 
  .thumb_set UART4_IRQHandler,Default_Handler
427 
  .weak  UART5_IRQHandler
 427 
 
428 
  .thumb_set UART5_IRQHandler,Default_Handler
 428 
  .weak  UART5_IRQHandler
429 
 
 429 
  .thumb_set UART5_IRQHandler,Default_Handler
430 
  .weak  TIM6_IRQHandler
 430 
 
431 
  .thumb_set TIM6_IRQHandler,Default_Handler
 431 
  .weak  TIM6_IRQHandler
432 
 
 432 
  .thumb_set TIM6_IRQHandler,Default_Handler
433 
  .weak  TIM7_IRQHandler
 433 
 
434 
  .thumb_set TIM7_IRQHandler,Default_Handler
 434 
  .weak  TIM7_IRQHandler
435 
 
 435 
  .thumb_set TIM7_IRQHandler,Default_Handler
436 
  .weak  DMA2_Channel1_IRQHandler
 436 
 
437 
  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
 437 
  .weak  DMA2_Channel1_IRQHandler
438 
 
 438 
  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
439 
  .weak  DMA2_Channel2_IRQHandler
 439 
 
440 
  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
 440 
  .weak  DMA2_Channel2_IRQHandler
441 
 
 441 
  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
442 
  .weak  DMA2_Channel3_IRQHandler
 442 
 
443 
  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
 443 
  .weak  DMA2_Channel3_IRQHandler
444 
 
 444 
  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
445 
  .weak  DMA2_Channel4_IRQHandler
 445 
 
446 
  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
 446 
  .weak  DMA2_Channel4_IRQHandler
447 
 
 447 
  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
448 
  .weak  DMA2_Channel5_IRQHandler
 448 
 
449 
  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
 449 
  .weak  DMA2_Channel5_IRQHandler
450 
 
 450 
  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
451 
  .weak  ETH_IRQHandler
 451 
 
452 
  .thumb_set ETH_IRQHandler,Default_Handler
 452 
  .weak  ETH_IRQHandler
453 
 
 453 
  .thumb_set ETH_IRQHandler,Default_Handler
454 
  .weak  ETH_WKUP_IRQHandler
 454 
 
455 
  .thumb_set ETH_WKUP_IRQHandler,Default_Handler
 455 
  .weak  ETH_WKUP_IRQHandler
456 
 
 456 
  .thumb_set ETH_WKUP_IRQHandler,Default_Handler
457 
  .weak  CAN2_TX_IRQHandler
 457 
 
458 
  .thumb_set CAN2_TX_IRQHandler,Default_Handler
 458 
  .weak  CAN2_TX_IRQHandler
459 
 
 459 
  .thumb_set CAN2_TX_IRQHandler,Default_Handler
460 
  .weak  CAN2_RX0_IRQHandler
 460 
 
461 
  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
 461 
  .weak  CAN2_RX0_IRQHandler
462 
 
 462 
  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
463 
  .weak  CAN2_RX1_IRQHandler
 463 
 
464 
  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
 464 
  .weak  CAN2_RX1_IRQHandler
465 
 
 465 
  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
466 
  .weak  CAN2_SCE_IRQHandler
 466 
 
467 
  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
 467 
  .weak  CAN2_SCE_IRQHandler
468 
 
 468 
  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
469 
  .weak  OTG_FS_IRQHandler
 469 
 
470 
  .thumb_set OTG_FS_IRQHandler ,Default_Handler
 470 
  .weak  OTG_FS_IRQHandler
471 
 
 471 
  .thumb_set OTG_FS_IRQHandler ,Default_Handler
472 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 472