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1 | /** |
1 | /** |
2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ |
2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ |
3 | * @file startup_stm32f103xe.s |
3 | * @file startup_stm32f103xe.s |
4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
5 | * @brief STM32F103xE Devices vector table for Atollic toolchain. |
5 | * @brief STM32F103xE Devices vector table for Atollic toolchain. |
6 | * This module performs: |
6 | * This module performs: |
7 | * - Set the initial SP |
7 | * - Set the initial SP |
8 | * - Set the initial PC == Reset_Handler, |
8 | * - Set the initial PC == Reset_Handler, |
9 | * - Set the vector table entries with the exceptions ISR address |
9 | * - Set the vector table entries with the exceptions ISR address |
10 | * - Configure the clock system |
10 | * - Configure the clock system |
11 | * - Configure external SRAM mounted on STM3210E-EVAL board |
11 | * - Configure external SRAM mounted on STM3210E-EVAL board |
12 | * to be used as data memory (optional, to be enabled by user) |
12 | * to be used as data memory (optional, to be enabled by user) |
13 | * - Branches to main in the C library (which eventually |
13 | * - Branches to main in the C library (which eventually |
14 | * calls main()). |
14 | * calls main()). |
15 | * After Reset the Cortex-M3 processor is in Thread mode, |
15 | * After Reset the Cortex-M3 processor is in Thread mode, |
16 | * priority is Privileged, and the Stack is set to Main. |
16 | * priority is Privileged, and the Stack is set to Main. |
17 | ****************************************************************************** |
17 | ****************************************************************************** |
18 | * @attention |
18 | * @attention |
19 | * |
19 | * |
20 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
20 | * Copyright (c) 2017-2021 STMicroelectronics. |
21 | * All rights reserved.</center></h2> |
21 | * All rights reserved. |
22 | * |
22 | * |
23 | * This software component is licensed by ST under BSD 3-Clause license, |
23 | * This software is licensed under terms that can be found in the LICENSE file |
24 | * the "License"; You may not use this file except in compliance with the |
24 | * in the root directory of this software component. |
25 | * License. You may obtain a copy of the License at: |
25 | * If no LICENSE file comes with this software, it is provided AS-IS. |
26 | * opensource.org/licenses/BSD-3-Clause |
26 | * |
27 | * |
27 | ****************************************************************************** |
28 | ****************************************************************************** |
28 | */ |
29 | */ |
29 | |
30 | 30 | .syntax unified |
|
31 | .syntax unified |
31 | .cpu cortex-m3 |
32 | .cpu cortex-m3 |
32 | .fpu softvfp |
33 | .fpu softvfp |
33 | .thumb |
34 | .thumb |
34 | |
35 | 35 | .global g_pfnVectors |
|
36 | .global g_pfnVectors |
36 | .global Default_Handler |
37 | .global Default_Handler |
37 | |
38 | 38 | /* start address for the initialization values of the .data section. |
|
39 | /* start address for the initialization values of the .data section. |
39 | defined in linker script */ |
40 | defined in linker script */ |
40 | .word _sidata |
41 | .word _sidata |
41 | /* start address for the .data section. defined in linker script */ |
42 | /* start address for the .data section. defined in linker script */ |
42 | .word _sdata |
43 | .word _sdata |
43 | /* end address for the .data section. defined in linker script */ |
44 | /* end address for the .data section. defined in linker script */ |
44 | .word _edata |
45 | .word _edata |
45 | /* start address for the .bss section. defined in linker script */ |
46 | /* start address for the .bss section. defined in linker script */ |
46 | .word _sbss |
47 | .word _sbss |
47 | /* end address for the .bss section. defined in linker script */ |
48 | /* end address for the .bss section. defined in linker script */ |
48 | .word _ebss |
49 | .word _ebss |
49 | |
50 | 50 | .equ BootRAM, 0xF1E0F85F |
|
51 | .equ BootRAM, 0xF1E0F85F |
51 | /** |
52 | /** |
52 | * @brief This is the code that gets called when the processor first |
53 | * @brief This is the code that gets called when the processor first |
53 | * starts execution following a reset event. Only the absolutely |
54 | * starts execution following a reset event. Only the absolutely |
54 | * necessary set is performed, after which the application |
55 | * necessary set is performed, after which the application |
55 | * supplied main() routine is called. |
56 | * supplied main() routine is called. |
56 | * @param None |
57 | * @param None |
57 | * @retval : None |
58 | * @retval : None |
58 | */ |
59 | */ |
59 | |
60 | 60 | .section .text.Reset_Handler |
|
61 | .section .text.Reset_Handler |
61 | .weak Reset_Handler |
62 | .weak Reset_Handler |
62 | .type Reset_Handler, %function |
63 | .type Reset_Handler, %function |
63 | Reset_Handler: |
64 | Reset_Handler: |
64 | |
65 | 65 | /* Call the clock system initialization function.*/ |
|
66 | /* Copy the data segment initializers from flash to SRAM */ |
66 | bl SystemInit |
67 | ldr r0, =_sdata |
67 | |
68 | ldr r1, =_edata |
68 | /* Copy the data segment initializers from flash to SRAM */ |
69 | ldr r2, =_sidata |
69 | ldr r0, =_sdata |
70 | movs r3, #0 |
70 | ldr r1, =_edata |
71 | b LoopCopyDataInit |
71 | ldr r2, =_sidata |
72 | 72 | movs r3, #0 |
|
73 | CopyDataInit: |
73 | b LoopCopyDataInit |
74 | ldr r4, [r2, r3] |
74 | |
75 | str r4, [r0, r3] |
75 | CopyDataInit: |
76 | adds r3, r3, #4 |
76 | ldr r4, [r2, r3] |
77 | 77 | str r4, [r0, r3] |
|
78 | LoopCopyDataInit: |
78 | adds r3, r3, #4 |
79 | adds r4, r0, r3 |
79 | |
80 | cmp r4, r1 |
80 | LoopCopyDataInit: |
81 | bcc CopyDataInit |
81 | adds r4, r0, r3 |
82 | 82 | cmp r4, r1 |
|
83 | /* Zero fill the bss segment. */ |
83 | bcc CopyDataInit |
84 | ldr r2, =_sbss |
84 | |
85 | ldr r4, =_ebss |
85 | /* Zero fill the bss segment. */ |
86 | movs r3, #0 |
86 | ldr r2, =_sbss |
87 | b LoopFillZerobss |
87 | ldr r4, =_ebss |
88 | 88 | movs r3, #0 |
|
89 | FillZerobss: |
89 | b LoopFillZerobss |
90 | str r3, [r2] |
90 | |
91 | adds r2, r2, #4 |
91 | FillZerobss: |
92 | 92 | str r3, [r2] |
|
93 | LoopFillZerobss: |
93 | adds r2, r2, #4 |
94 | cmp r2, r4 |
94 | |
95 | bcc FillZerobss |
95 | LoopFillZerobss: |
96 | 96 | cmp r2, r4 |
|
97 | /* Call the clock system intitialization function.*/ |
97 | bcc FillZerobss |
98 | bl SystemInit |
98 | |
99 | /* Call static constructors */ |
99 | /* Call static constructors */ |
100 | bl __libc_init_array |
100 | bl __libc_init_array |
101 | /* Call the application's entry point.*/ |
101 | /* Call the application's entry point.*/ |
102 | bl main |
102 | bl main |
103 | bx lr |
103 | bx lr |
104 | .size Reset_Handler, .-Reset_Handler |
104 | .size Reset_Handler, .-Reset_Handler |
105 | 105 | ||
106 | /** |
106 | /** |
107 | * @brief This is the code that gets called when the processor receives an |
107 | * @brief This is the code that gets called when the processor receives an |
108 | * unexpected interrupt. This simply enters an infinite loop, preserving |
108 | * unexpected interrupt. This simply enters an infinite loop, preserving |
109 | * the system state for examination by a debugger. |
109 | * the system state for examination by a debugger. |
110 | * |
110 | * |
111 | * @param None |
111 | * @param None |
112 | * @retval : None |
112 | * @retval : None |
113 | */ |
113 | */ |
114 | .section .text.Default_Handler,"ax",%progbits |
114 | .section .text.Default_Handler,"ax",%progbits |
115 | Default_Handler: |
115 | Default_Handler: |
116 | Infinite_Loop: |
116 | Infinite_Loop: |
117 | b Infinite_Loop |
117 | b Infinite_Loop |
118 | .size Default_Handler, .-Default_Handler |
118 | .size Default_Handler, .-Default_Handler |
119 | /****************************************************************************** |
119 | /****************************************************************************** |
120 | * |
120 | * |
121 | * The minimal vector table for a Cortex M3. Note that the proper constructs |
121 | * The minimal vector table for a Cortex M3. Note that the proper constructs |
122 | * must be placed on this to ensure that it ends up at physical address |
122 | * must be placed on this to ensure that it ends up at physical address |
123 | * 0x0000.0000. |
123 | * 0x0000.0000. |
124 | * |
124 | * |
125 | ******************************************************************************/ |
125 | ******************************************************************************/ |
126 | .section .isr_vector,"a",%progbits |
126 | .section .isr_vector,"a",%progbits |
127 | .type g_pfnVectors, %object |
127 | .type g_pfnVectors, %object |
128 | .size g_pfnVectors, .-g_pfnVectors |
128 | .size g_pfnVectors, .-g_pfnVectors |
129 | 129 | ||
130 | 130 | ||
131 | g_pfnVectors: |
131 | g_pfnVectors: |
132 | 132 | ||
133 | .word _estack |
133 | .word _estack |
134 | .word Reset_Handler |
134 | .word Reset_Handler |
135 | .word NMI_Handler |
135 | .word NMI_Handler |
136 | .word HardFault_Handler |
136 | .word HardFault_Handler |
137 | .word MemManage_Handler |
137 | .word MemManage_Handler |
138 | .word BusFault_Handler |
138 | .word BusFault_Handler |
139 | .word UsageFault_Handler |
139 | .word UsageFault_Handler |
140 | .word 0 |
140 | .word 0 |
141 | .word 0 |
141 | .word 0 |
142 | .word 0 |
142 | .word 0 |
143 | .word 0 |
143 | .word 0 |
144 | .word SVC_Handler |
144 | .word SVC_Handler |
145 | .word DebugMon_Handler |
145 | .word DebugMon_Handler |
146 | .word 0 |
146 | .word 0 |
147 | .word PendSV_Handler |
147 | .word PendSV_Handler |
148 | .word SysTick_Handler |
148 | .word SysTick_Handler |
149 | .word WWDG_IRQHandler |
149 | .word WWDG_IRQHandler |
150 | .word PVD_IRQHandler |
150 | .word PVD_IRQHandler |
151 | .word TAMPER_IRQHandler |
151 | .word TAMPER_IRQHandler |
152 | .word RTC_IRQHandler |
152 | .word RTC_IRQHandler |
153 | .word FLASH_IRQHandler |
153 | .word FLASH_IRQHandler |
154 | .word RCC_IRQHandler |
154 | .word RCC_IRQHandler |
155 | .word EXTI0_IRQHandler |
155 | .word EXTI0_IRQHandler |
156 | .word EXTI1_IRQHandler |
156 | .word EXTI1_IRQHandler |
157 | .word EXTI2_IRQHandler |
157 | .word EXTI2_IRQHandler |
158 | .word EXTI3_IRQHandler |
158 | .word EXTI3_IRQHandler |
159 | .word EXTI4_IRQHandler |
159 | .word EXTI4_IRQHandler |
160 | .word DMA1_Channel1_IRQHandler |
160 | .word DMA1_Channel1_IRQHandler |
161 | .word DMA1_Channel2_IRQHandler |
161 | .word DMA1_Channel2_IRQHandler |
162 | .word DMA1_Channel3_IRQHandler |
162 | .word DMA1_Channel3_IRQHandler |
163 | .word DMA1_Channel4_IRQHandler |
163 | .word DMA1_Channel4_IRQHandler |
164 | .word DMA1_Channel5_IRQHandler |
164 | .word DMA1_Channel5_IRQHandler |
165 | .word DMA1_Channel6_IRQHandler |
165 | .word DMA1_Channel6_IRQHandler |
166 | .word DMA1_Channel7_IRQHandler |
166 | .word DMA1_Channel7_IRQHandler |
167 | .word ADC1_2_IRQHandler |
167 | .word ADC1_2_IRQHandler |
168 | .word USB_HP_CAN1_TX_IRQHandler |
168 | .word USB_HP_CAN1_TX_IRQHandler |
169 | .word USB_LP_CAN1_RX0_IRQHandler |
169 | .word USB_LP_CAN1_RX0_IRQHandler |
170 | .word CAN1_RX1_IRQHandler |
170 | .word CAN1_RX1_IRQHandler |
171 | .word CAN1_SCE_IRQHandler |
171 | .word CAN1_SCE_IRQHandler |
172 | .word EXTI9_5_IRQHandler |
172 | .word EXTI9_5_IRQHandler |
173 | .word TIM1_BRK_IRQHandler |
173 | .word TIM1_BRK_IRQHandler |
174 | .word TIM1_UP_IRQHandler |
174 | .word TIM1_UP_IRQHandler |
175 | .word TIM1_TRG_COM_IRQHandler |
175 | .word TIM1_TRG_COM_IRQHandler |
176 | .word TIM1_CC_IRQHandler |
176 | .word TIM1_CC_IRQHandler |
177 | .word TIM2_IRQHandler |
177 | .word TIM2_IRQHandler |
178 | .word TIM3_IRQHandler |
178 | .word TIM3_IRQHandler |
179 | .word TIM4_IRQHandler |
179 | .word TIM4_IRQHandler |
180 | .word I2C1_EV_IRQHandler |
180 | .word I2C1_EV_IRQHandler |
181 | .word I2C1_ER_IRQHandler |
181 | .word I2C1_ER_IRQHandler |
182 | .word I2C2_EV_IRQHandler |
182 | .word I2C2_EV_IRQHandler |
183 | .word I2C2_ER_IRQHandler |
183 | .word I2C2_ER_IRQHandler |
184 | .word SPI1_IRQHandler |
184 | .word SPI1_IRQHandler |
185 | .word SPI2_IRQHandler |
185 | .word SPI2_IRQHandler |
186 | .word USART1_IRQHandler |
186 | .word USART1_IRQHandler |
187 | .word USART2_IRQHandler |
187 | .word USART2_IRQHandler |
188 | .word USART3_IRQHandler |
188 | .word USART3_IRQHandler |
189 | .word EXTI15_10_IRQHandler |
189 | .word EXTI15_10_IRQHandler |
190 | .word RTC_Alarm_IRQHandler |
190 | .word RTC_Alarm_IRQHandler |
191 | .word USBWakeUp_IRQHandler |
191 | .word USBWakeUp_IRQHandler |
192 | .word TIM8_BRK_IRQHandler |
192 | .word TIM8_BRK_IRQHandler |
193 | .word TIM8_UP_IRQHandler |
193 | .word TIM8_UP_IRQHandler |
194 | .word TIM8_TRG_COM_IRQHandler |
194 | .word TIM8_TRG_COM_IRQHandler |
195 | .word TIM8_CC_IRQHandler |
195 | .word TIM8_CC_IRQHandler |
196 | .word ADC3_IRQHandler |
196 | .word ADC3_IRQHandler |
197 | .word FSMC_IRQHandler |
197 | .word FSMC_IRQHandler |
198 | .word SDIO_IRQHandler |
198 | .word SDIO_IRQHandler |
199 | .word TIM5_IRQHandler |
199 | .word TIM5_IRQHandler |
200 | .word SPI3_IRQHandler |
200 | .word SPI3_IRQHandler |
201 | .word UART4_IRQHandler |
201 | .word UART4_IRQHandler |
202 | .word UART5_IRQHandler |
202 | .word UART5_IRQHandler |
203 | .word TIM6_IRQHandler |
203 | .word TIM6_IRQHandler |
204 | .word TIM7_IRQHandler |
204 | .word TIM7_IRQHandler |
205 | .word DMA2_Channel1_IRQHandler |
205 | .word DMA2_Channel1_IRQHandler |
206 | .word DMA2_Channel2_IRQHandler |
206 | .word DMA2_Channel2_IRQHandler |
207 | .word DMA2_Channel3_IRQHandler |
207 | .word DMA2_Channel3_IRQHandler |
208 | .word DMA2_Channel4_5_IRQHandler |
208 | .word DMA2_Channel4_5_IRQHandler |
209 | .word 0 |
209 | .word 0 |
210 | .word 0 |
210 | .word 0 |
211 | .word 0 |
211 | .word 0 |
212 | .word 0 |
212 | .word 0 |
213 | .word 0 |
213 | .word 0 |
214 | .word 0 |
214 | .word 0 |
215 | .word 0 |
215 | .word 0 |
216 | .word 0 |
216 | .word 0 |
217 | .word 0 |
217 | .word 0 |
218 | .word 0 |
218 | .word 0 |
219 | .word 0 |
219 | .word 0 |
220 | .word 0 |
220 | .word 0 |
221 | .word 0 |
221 | .word 0 |
222 | .word 0 |
222 | .word 0 |
223 | .word 0 |
223 | .word 0 |
224 | .word 0 |
224 | .word 0 |
225 | .word 0 |
225 | .word 0 |
226 | .word 0 |
226 | .word 0 |
227 | .word 0 |
227 | .word 0 |
228 | .word 0 |
228 | .word 0 |
229 | .word 0 |
229 | .word 0 |
230 | .word 0 |
230 | .word 0 |
231 | .word 0 |
231 | .word 0 |
232 | .word 0 |
232 | .word 0 |
233 | .word 0 |
233 | .word 0 |
234 | .word 0 |
234 | .word 0 |
235 | .word 0 |
235 | .word 0 |
236 | .word 0 |
236 | .word 0 |
237 | .word 0 |
237 | .word 0 |
238 | .word 0 |
238 | .word 0 |
239 | .word 0 |
239 | .word 0 |
240 | .word 0 |
240 | .word 0 |
241 | .word 0 |
241 | .word 0 |
242 | .word 0 |
242 | .word 0 |
243 | .word 0 |
243 | .word 0 |
244 | .word 0 |
244 | .word 0 |
245 | .word 0 |
245 | .word 0 |
246 | .word 0 |
246 | .word 0 |
247 | .word 0 |
247 | .word 0 |
248 | .word 0 |
248 | .word 0 |
249 | .word 0 |
249 | .word 0 |
250 | .word 0 |
250 | .word 0 |
251 | .word 0 |
251 | .word 0 |
252 | .word 0 |
252 | .word 0 |
253 | .word BootRAM /* @0x1E0. This is for boot in RAM mode for |
253 | .word BootRAM /* @0x1E0. This is for boot in RAM mode for |
254 | STM32F10x High Density devices. */ |
254 | STM32F10x High Density devices. */ |
255 | 255 | ||
256 | /******************************************************************************* |
256 | /******************************************************************************* |
257 | * |
257 | * |
258 | * Provide weak aliases for each Exception handler to the Default_Handler. |
258 | * Provide weak aliases for each Exception handler to the Default_Handler. |
259 | * As they are weak aliases, any function with the same name will override |
259 | * As they are weak aliases, any function with the same name will override |
260 | * this definition. |
260 | * this definition. |
261 | * |
261 | * |
262 | *******************************************************************************/ |
262 | *******************************************************************************/ |
263 | 263 | ||
264 | .weak NMI_Handler |
264 | .weak NMI_Handler |
265 | .thumb_set NMI_Handler,Default_Handler |
265 | .thumb_set NMI_Handler,Default_Handler |
266 | 266 | ||
267 | .weak HardFault_Handler |
267 | .weak HardFault_Handler |
268 | .thumb_set HardFault_Handler,Default_Handler |
268 | .thumb_set HardFault_Handler,Default_Handler |
269 | 269 | ||
270 | .weak MemManage_Handler |
270 | .weak MemManage_Handler |
271 | .thumb_set MemManage_Handler,Default_Handler |
271 | .thumb_set MemManage_Handler,Default_Handler |
272 | 272 | ||
273 | .weak BusFault_Handler |
273 | .weak BusFault_Handler |
274 | .thumb_set BusFault_Handler,Default_Handler |
274 | .thumb_set BusFault_Handler,Default_Handler |
275 | 275 | ||
276 | .weak UsageFault_Handler |
276 | .weak UsageFault_Handler |
277 | .thumb_set UsageFault_Handler,Default_Handler |
277 | .thumb_set UsageFault_Handler,Default_Handler |
278 | 278 | ||
279 | .weak SVC_Handler |
279 | .weak SVC_Handler |
280 | .thumb_set SVC_Handler,Default_Handler |
280 | .thumb_set SVC_Handler,Default_Handler |
281 | 281 | ||
282 | .weak DebugMon_Handler |
282 | .weak DebugMon_Handler |
283 | .thumb_set DebugMon_Handler,Default_Handler |
283 | .thumb_set DebugMon_Handler,Default_Handler |
284 | 284 | ||
285 | .weak PendSV_Handler |
285 | .weak PendSV_Handler |
286 | .thumb_set PendSV_Handler,Default_Handler |
286 | .thumb_set PendSV_Handler,Default_Handler |
287 | 287 | ||
288 | .weak SysTick_Handler |
288 | .weak SysTick_Handler |
289 | .thumb_set SysTick_Handler,Default_Handler |
289 | .thumb_set SysTick_Handler,Default_Handler |
290 | 290 | ||
291 | .weak WWDG_IRQHandler |
291 | .weak WWDG_IRQHandler |
292 | .thumb_set WWDG_IRQHandler,Default_Handler |
292 | .thumb_set WWDG_IRQHandler,Default_Handler |
293 | 293 | ||
294 | .weak PVD_IRQHandler |
294 | .weak PVD_IRQHandler |
295 | .thumb_set PVD_IRQHandler,Default_Handler |
295 | .thumb_set PVD_IRQHandler,Default_Handler |
296 | 296 | ||
297 | .weak TAMPER_IRQHandler |
297 | .weak TAMPER_IRQHandler |
298 | .thumb_set TAMPER_IRQHandler,Default_Handler |
298 | .thumb_set TAMPER_IRQHandler,Default_Handler |
299 | 299 | ||
300 | .weak RTC_IRQHandler |
300 | .weak RTC_IRQHandler |
301 | .thumb_set RTC_IRQHandler,Default_Handler |
301 | .thumb_set RTC_IRQHandler,Default_Handler |
302 | 302 | ||
303 | .weak FLASH_IRQHandler |
303 | .weak FLASH_IRQHandler |
304 | .thumb_set FLASH_IRQHandler,Default_Handler |
304 | .thumb_set FLASH_IRQHandler,Default_Handler |
305 | 305 | ||
306 | .weak RCC_IRQHandler |
306 | .weak RCC_IRQHandler |
307 | .thumb_set RCC_IRQHandler,Default_Handler |
307 | .thumb_set RCC_IRQHandler,Default_Handler |
308 | 308 | ||
309 | .weak EXTI0_IRQHandler |
309 | .weak EXTI0_IRQHandler |
310 | .thumb_set EXTI0_IRQHandler,Default_Handler |
310 | .thumb_set EXTI0_IRQHandler,Default_Handler |
311 | 311 | ||
312 | .weak EXTI1_IRQHandler |
312 | .weak EXTI1_IRQHandler |
313 | .thumb_set EXTI1_IRQHandler,Default_Handler |
313 | .thumb_set EXTI1_IRQHandler,Default_Handler |
314 | 314 | ||
315 | .weak EXTI2_IRQHandler |
315 | .weak EXTI2_IRQHandler |
316 | .thumb_set EXTI2_IRQHandler,Default_Handler |
316 | .thumb_set EXTI2_IRQHandler,Default_Handler |
317 | 317 | ||
318 | .weak EXTI3_IRQHandler |
318 | .weak EXTI3_IRQHandler |
319 | .thumb_set EXTI3_IRQHandler,Default_Handler |
319 | .thumb_set EXTI3_IRQHandler,Default_Handler |
320 | 320 | ||
321 | .weak EXTI4_IRQHandler |
321 | .weak EXTI4_IRQHandler |
322 | .thumb_set EXTI4_IRQHandler,Default_Handler |
322 | .thumb_set EXTI4_IRQHandler,Default_Handler |
323 | 323 | ||
324 | .weak DMA1_Channel1_IRQHandler |
324 | .weak DMA1_Channel1_IRQHandler |
325 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
325 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
326 | 326 | ||
327 | .weak DMA1_Channel2_IRQHandler |
327 | .weak DMA1_Channel2_IRQHandler |
328 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
328 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
329 | 329 | ||
330 | .weak DMA1_Channel3_IRQHandler |
330 | .weak DMA1_Channel3_IRQHandler |
331 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
331 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
332 | 332 | ||
333 | .weak DMA1_Channel4_IRQHandler |
333 | .weak DMA1_Channel4_IRQHandler |
334 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
334 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
335 | 335 | ||
336 | .weak DMA1_Channel5_IRQHandler |
336 | .weak DMA1_Channel5_IRQHandler |
337 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
337 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
338 | 338 | ||
339 | .weak DMA1_Channel6_IRQHandler |
339 | .weak DMA1_Channel6_IRQHandler |
340 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
340 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
341 | 341 | ||
342 | .weak DMA1_Channel7_IRQHandler |
342 | .weak DMA1_Channel7_IRQHandler |
343 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
343 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
344 | 344 | ||
345 | .weak ADC1_2_IRQHandler |
345 | .weak ADC1_2_IRQHandler |
346 | .thumb_set ADC1_2_IRQHandler,Default_Handler |
346 | .thumb_set ADC1_2_IRQHandler,Default_Handler |
347 | 347 | ||
348 | .weak USB_HP_CAN1_TX_IRQHandler |
348 | .weak USB_HP_CAN1_TX_IRQHandler |
349 | .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler |
349 | .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler |
350 | 350 | ||
351 | .weak USB_LP_CAN1_RX0_IRQHandler |
351 | .weak USB_LP_CAN1_RX0_IRQHandler |
352 | .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler |
352 | .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler |
353 | 353 | ||
354 | .weak CAN1_RX1_IRQHandler |
354 | .weak CAN1_RX1_IRQHandler |
355 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler |
355 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler |
356 | 356 | ||
357 | .weak CAN1_SCE_IRQHandler |
357 | .weak CAN1_SCE_IRQHandler |
358 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler |
358 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler |
359 | 359 | ||
360 | .weak EXTI9_5_IRQHandler |
360 | .weak EXTI9_5_IRQHandler |
361 | .thumb_set EXTI9_5_IRQHandler,Default_Handler |
361 | .thumb_set EXTI9_5_IRQHandler,Default_Handler |
362 | 362 | ||
363 | .weak TIM1_BRK_IRQHandler |
363 | .weak TIM1_BRK_IRQHandler |
364 | .thumb_set TIM1_BRK_IRQHandler,Default_Handler |
364 | .thumb_set TIM1_BRK_IRQHandler,Default_Handler |
365 | 365 | ||
366 | .weak TIM1_UP_IRQHandler |
366 | .weak TIM1_UP_IRQHandler |
367 | .thumb_set TIM1_UP_IRQHandler,Default_Handler |
367 | .thumb_set TIM1_UP_IRQHandler,Default_Handler |
368 | 368 | ||
369 | .weak TIM1_TRG_COM_IRQHandler |
369 | .weak TIM1_TRG_COM_IRQHandler |
370 | .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler |
370 | .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler |
371 | 371 | ||
372 | .weak TIM1_CC_IRQHandler |
372 | .weak TIM1_CC_IRQHandler |
373 | .thumb_set TIM1_CC_IRQHandler,Default_Handler |
373 | .thumb_set TIM1_CC_IRQHandler,Default_Handler |
374 | 374 | ||
375 | .weak TIM2_IRQHandler |
375 | .weak TIM2_IRQHandler |
376 | .thumb_set TIM2_IRQHandler,Default_Handler |
376 | .thumb_set TIM2_IRQHandler,Default_Handler |
377 | 377 | ||
378 | .weak TIM3_IRQHandler |
378 | .weak TIM3_IRQHandler |
379 | .thumb_set TIM3_IRQHandler,Default_Handler |
379 | .thumb_set TIM3_IRQHandler,Default_Handler |
380 | 380 | ||
381 | .weak TIM4_IRQHandler |
381 | .weak TIM4_IRQHandler |
382 | .thumb_set TIM4_IRQHandler,Default_Handler |
382 | .thumb_set TIM4_IRQHandler,Default_Handler |
383 | 383 | ||
384 | .weak I2C1_EV_IRQHandler |
384 | .weak I2C1_EV_IRQHandler |
385 | .thumb_set I2C1_EV_IRQHandler,Default_Handler |
385 | .thumb_set I2C1_EV_IRQHandler,Default_Handler |
386 | 386 | ||
387 | .weak I2C1_ER_IRQHandler |
387 | .weak I2C1_ER_IRQHandler |
388 | .thumb_set I2C1_ER_IRQHandler,Default_Handler |
388 | .thumb_set I2C1_ER_IRQHandler,Default_Handler |
389 | 389 | ||
390 | .weak I2C2_EV_IRQHandler |
390 | .weak I2C2_EV_IRQHandler |
391 | .thumb_set I2C2_EV_IRQHandler,Default_Handler |
391 | .thumb_set I2C2_EV_IRQHandler,Default_Handler |
392 | 392 | ||
393 | .weak I2C2_ER_IRQHandler |
393 | .weak I2C2_ER_IRQHandler |
394 | .thumb_set I2C2_ER_IRQHandler,Default_Handler |
394 | .thumb_set I2C2_ER_IRQHandler,Default_Handler |
395 | 395 | ||
396 | .weak SPI1_IRQHandler |
396 | .weak SPI1_IRQHandler |
397 | .thumb_set SPI1_IRQHandler,Default_Handler |
397 | .thumb_set SPI1_IRQHandler,Default_Handler |
398 | 398 | ||
399 | .weak SPI2_IRQHandler |
399 | .weak SPI2_IRQHandler |
400 | .thumb_set SPI2_IRQHandler,Default_Handler |
400 | .thumb_set SPI2_IRQHandler,Default_Handler |
401 | 401 | ||
402 | .weak USART1_IRQHandler |
402 | .weak USART1_IRQHandler |
403 | .thumb_set USART1_IRQHandler,Default_Handler |
403 | .thumb_set USART1_IRQHandler,Default_Handler |
404 | 404 | ||
405 | .weak USART2_IRQHandler |
405 | .weak USART2_IRQHandler |
406 | .thumb_set USART2_IRQHandler,Default_Handler |
406 | .thumb_set USART2_IRQHandler,Default_Handler |
407 | 407 | ||
408 | .weak USART3_IRQHandler |
408 | .weak USART3_IRQHandler |
409 | .thumb_set USART3_IRQHandler,Default_Handler |
409 | .thumb_set USART3_IRQHandler,Default_Handler |
410 | 410 | ||
411 | .weak EXTI15_10_IRQHandler |
411 | .weak EXTI15_10_IRQHandler |
412 | .thumb_set EXTI15_10_IRQHandler,Default_Handler |
412 | .thumb_set EXTI15_10_IRQHandler,Default_Handler |
413 | 413 | ||
414 | .weak RTC_Alarm_IRQHandler |
414 | .weak RTC_Alarm_IRQHandler |
415 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler |
415 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler |
416 | 416 | ||
417 | .weak USBWakeUp_IRQHandler |
417 | .weak USBWakeUp_IRQHandler |
418 | .thumb_set USBWakeUp_IRQHandler,Default_Handler |
418 | .thumb_set USBWakeUp_IRQHandler,Default_Handler |
419 | 419 | ||
420 | .weak TIM8_BRK_IRQHandler |
420 | .weak TIM8_BRK_IRQHandler |
421 | .thumb_set TIM8_BRK_IRQHandler,Default_Handler |
421 | .thumb_set TIM8_BRK_IRQHandler,Default_Handler |
422 | 422 | ||
423 | .weak TIM8_UP_IRQHandler |
423 | .weak TIM8_UP_IRQHandler |
424 | .thumb_set TIM8_UP_IRQHandler,Default_Handler |
424 | .thumb_set TIM8_UP_IRQHandler,Default_Handler |
425 | 425 | ||
426 | .weak TIM8_TRG_COM_IRQHandler |
426 | .weak TIM8_TRG_COM_IRQHandler |
427 | .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler |
427 | .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler |
428 | 428 | ||
429 | .weak TIM8_CC_IRQHandler |
429 | .weak TIM8_CC_IRQHandler |
430 | .thumb_set TIM8_CC_IRQHandler,Default_Handler |
430 | .thumb_set TIM8_CC_IRQHandler,Default_Handler |
431 | 431 | ||
432 | .weak ADC3_IRQHandler |
432 | .weak ADC3_IRQHandler |
433 | .thumb_set ADC3_IRQHandler,Default_Handler |
433 | .thumb_set ADC3_IRQHandler,Default_Handler |
434 | 434 | ||
435 | .weak FSMC_IRQHandler |
435 | .weak FSMC_IRQHandler |
436 | .thumb_set FSMC_IRQHandler,Default_Handler |
436 | .thumb_set FSMC_IRQHandler,Default_Handler |
437 | 437 | ||
438 | .weak SDIO_IRQHandler |
438 | .weak SDIO_IRQHandler |
439 | .thumb_set SDIO_IRQHandler,Default_Handler |
439 | .thumb_set SDIO_IRQHandler,Default_Handler |
440 | 440 | ||
441 | .weak TIM5_IRQHandler |
441 | .weak TIM5_IRQHandler |
442 | .thumb_set TIM5_IRQHandler,Default_Handler |
442 | .thumb_set TIM5_IRQHandler,Default_Handler |
443 | 443 | ||
444 | .weak SPI3_IRQHandler |
444 | .weak SPI3_IRQHandler |
445 | .thumb_set SPI3_IRQHandler,Default_Handler |
445 | .thumb_set SPI3_IRQHandler,Default_Handler |
446 | 446 | ||
447 | .weak UART4_IRQHandler |
447 | .weak UART4_IRQHandler |
448 | .thumb_set UART4_IRQHandler,Default_Handler |
448 | .thumb_set UART4_IRQHandler,Default_Handler |
449 | 449 | ||
450 | .weak UART5_IRQHandler |
450 | .weak UART5_IRQHandler |
451 | .thumb_set UART5_IRQHandler,Default_Handler |
451 | .thumb_set UART5_IRQHandler,Default_Handler |
452 | 452 | ||
453 | .weak TIM6_IRQHandler |
453 | .weak TIM6_IRQHandler |
454 | .thumb_set TIM6_IRQHandler,Default_Handler |
454 | .thumb_set TIM6_IRQHandler,Default_Handler |
455 | 455 | ||
456 | .weak TIM7_IRQHandler |
456 | .weak TIM7_IRQHandler |
457 | .thumb_set TIM7_IRQHandler,Default_Handler |
457 | .thumb_set TIM7_IRQHandler,Default_Handler |
458 | 458 | ||
459 | .weak DMA2_Channel1_IRQHandler |
459 | .weak DMA2_Channel1_IRQHandler |
460 | .thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
460 | .thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
461 | 461 | ||
462 | .weak DMA2_Channel2_IRQHandler |
462 | .weak DMA2_Channel2_IRQHandler |
463 | .thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
463 | .thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
464 | 464 | ||
465 | .weak DMA2_Channel3_IRQHandler |
465 | .weak DMA2_Channel3_IRQHandler |
466 | .thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
466 | .thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
467 | 467 | ||
468 | .weak DMA2_Channel4_5_IRQHandler |
468 | .weak DMA2_Channel4_5_IRQHandler |
469 | .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler |
469 | .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler |
470 | 470 | ||
471 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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