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| 1 | /** |
1 | /** |
| 2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ |
2 | *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ |
| 3 | * @file startup_stm32f100xe.s |
3 | * @file startup_stm32f100xe.s |
| 4 | * @author MCD Application Team |
4 | * @author MCD Application Team |
| 5 | * @brief STM32F100xE Devices vector table for Atollic toolchain. |
5 | * @brief STM32F100xE Devices vector table for Atollic toolchain. |
| 6 | * This module performs: |
6 | * This module performs: |
| 7 | * - Set the initial SP |
7 | * - Set the initial SP |
| 8 | * - Set the initial PC == Reset_Handler, |
8 | * - Set the initial PC == Reset_Handler, |
| 9 | * - Set the vector table entries with the exceptions ISR address |
9 | * - Set the vector table entries with the exceptions ISR address |
| 10 | * - Configure the clock system |
10 | * - Configure the clock system |
| 11 | * - Branches to main in the C library (which eventually |
11 | * - Branches to main in the C library (which eventually |
| 12 | * calls main()). |
12 | * calls main()). |
| 13 | * After Reset the Cortex-M3 processor is in Thread mode, |
13 | * After Reset the Cortex-M3 processor is in Thread mode, |
| 14 | * priority is Privileged, and the Stack is set to Main. |
14 | * priority is Privileged, and the Stack is set to Main. |
| 15 | ****************************************************************************** |
15 | ****************************************************************************** |
| 16 | * @attention |
16 | * @attention |
| 17 | * |
17 | * |
| 18 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
18 | * Copyright (c) 2017-2021 STMicroelectronics. |
| 19 | * All rights reserved.</center></h2> |
19 | * All rights reserved. |
| 20 | * |
20 | * |
| 21 | * This software component is licensed by ST under BSD 3-Clause license, |
21 | * This software is licensed under terms that can be found in the LICENSE file |
| 22 | * the "License"; You may not use this file except in compliance with the |
22 | * in the root directory of this software component. |
| 23 | * License. You may obtain a copy of the License at: |
23 | * If no LICENSE file comes with this software, it is provided AS-IS. |
| 24 | * opensource.org/licenses/BSD-3-Clause |
24 | * |
| 25 | * |
25 | ****************************************************************************** |
| 26 | ****************************************************************************** |
26 | */ |
| 27 | */ |
27 | |
| 28 | 28 | .syntax unified |
|
| 29 | .syntax unified |
29 | .cpu cortex-m3 |
| 30 | .cpu cortex-m3 |
30 | .fpu softvfp |
| 31 | .fpu softvfp |
31 | .thumb |
| 32 | .thumb |
32 | |
| 33 | 33 | .global g_pfnVectors |
|
| 34 | .global g_pfnVectors |
34 | .global Default_Handler |
| 35 | .global Default_Handler |
35 | |
| 36 | 36 | /* start address for the initialization values of the .data section. |
|
| 37 | /* start address for the initialization values of the .data section. |
37 | defined in linker script */ |
| 38 | defined in linker script */ |
38 | .word _sidata |
| 39 | .word _sidata |
39 | /* start address for the .data section. defined in linker script */ |
| 40 | /* start address for the .data section. defined in linker script */ |
40 | .word _sdata |
| 41 | .word _sdata |
41 | /* end address for the .data section. defined in linker script */ |
| 42 | /* end address for the .data section. defined in linker script */ |
42 | .word _edata |
| 43 | .word _edata |
43 | /* start address for the .bss section. defined in linker script */ |
| 44 | /* start address for the .bss section. defined in linker script */ |
44 | .word _sbss |
| 45 | .word _sbss |
45 | /* end address for the .bss section. defined in linker script */ |
| 46 | /* end address for the .bss section. defined in linker script */ |
46 | .word _ebss |
| 47 | .word _ebss |
47 | |
| 48 | 48 | .equ BootRAM, 0xF108F85F |
|
| 49 | .equ BootRAM, 0xF108F85F |
49 | /** |
| 50 | /** |
50 | * @brief This is the code that gets called when the processor first |
| 51 | * @brief This is the code that gets called when the processor first |
51 | * starts execution following a reset event. Only the absolutely |
| 52 | * starts execution following a reset event. Only the absolutely |
52 | * necessary set is performed, after which the application |
| 53 | * necessary set is performed, after which the application |
53 | * supplied main() routine is called. |
| 54 | * supplied main() routine is called. |
54 | * @param None |
| 55 | * @param None |
55 | * @retval : None |
| 56 | * @retval : None |
56 | */ |
| 57 | */ |
57 | |
| 58 | 58 | .section .text.Reset_Handler |
|
| 59 | .section .text.Reset_Handler |
59 | .weak Reset_Handler |
| 60 | .weak Reset_Handler |
60 | .type Reset_Handler, %function |
| 61 | .type Reset_Handler, %function |
61 | Reset_Handler: |
| 62 | Reset_Handler: |
62 | |
| 63 | 63 | /* Call the clock system initialization function.*/ |
|
| 64 | /* Copy the data segment initializers from flash to SRAM */ |
64 | bl SystemInit |
| 65 | ldr r0, =_sdata |
65 | |
| 66 | ldr r1, =_edata |
66 | /* Copy the data segment initializers from flash to SRAM */ |
| 67 | ldr r2, =_sidata |
67 | ldr r0, =_sdata |
| 68 | movs r3, #0 |
68 | ldr r1, =_edata |
| 69 | b LoopCopyDataInit |
69 | ldr r2, =_sidata |
| 70 | 70 | movs r3, #0 |
|
| 71 | CopyDataInit: |
71 | b LoopCopyDataInit |
| 72 | ldr r4, [r2, r3] |
72 | |
| 73 | str r4, [r0, r3] |
73 | CopyDataInit: |
| 74 | adds r3, r3, #4 |
74 | ldr r4, [r2, r3] |
| 75 | 75 | str r4, [r0, r3] |
|
| 76 | LoopCopyDataInit: |
76 | adds r3, r3, #4 |
| 77 | adds r4, r0, r3 |
77 | |
| 78 | cmp r4, r1 |
78 | LoopCopyDataInit: |
| 79 | bcc CopyDataInit |
79 | adds r4, r0, r3 |
| 80 | 80 | cmp r4, r1 |
|
| 81 | /* Zero fill the bss segment. */ |
81 | bcc CopyDataInit |
| 82 | ldr r2, =_sbss |
82 | |
| 83 | ldr r4, =_ebss |
83 | /* Zero fill the bss segment. */ |
| 84 | movs r3, #0 |
84 | ldr r2, =_sbss |
| 85 | b LoopFillZerobss |
85 | ldr r4, =_ebss |
| 86 | 86 | movs r3, #0 |
|
| 87 | FillZerobss: |
87 | b LoopFillZerobss |
| 88 | str r3, [r2] |
88 | |
| 89 | adds r2, r2, #4 |
89 | FillZerobss: |
| 90 | 90 | str r3, [r2] |
|
| 91 | LoopFillZerobss: |
91 | adds r2, r2, #4 |
| 92 | cmp r2, r4 |
92 | |
| 93 | bcc FillZerobss |
93 | LoopFillZerobss: |
| 94 | 94 | cmp r2, r4 |
|
| 95 | /* Call the clock system intitialization function.*/ |
95 | bcc FillZerobss |
| 96 | bl SystemInit |
96 | |
| 97 | /* Call static constructors */ |
97 | /* Call static constructors */ |
| 98 | bl __libc_init_array |
98 | bl __libc_init_array |
| 99 | /* Call the application's entry point.*/ |
99 | /* Call the application's entry point.*/ |
| 100 | bl main |
100 | bl main |
| 101 | bx lr |
101 | bx lr |
| 102 | .size Reset_Handler, .-Reset_Handler |
102 | .size Reset_Handler, .-Reset_Handler |
| 103 | 103 | ||
| 104 | /** |
104 | /** |
| 105 | * @brief This is the code that gets called when the processor receives an |
105 | * @brief This is the code that gets called when the processor receives an |
| 106 | * unexpected interrupt. This simply enters an infinite loop, preserving |
106 | * unexpected interrupt. This simply enters an infinite loop, preserving |
| 107 | * the system state for examination by a debugger. |
107 | * the system state for examination by a debugger. |
| 108 | * |
108 | * |
| 109 | * @param None |
109 | * @param None |
| 110 | * @retval : None |
110 | * @retval : None |
| 111 | */ |
111 | */ |
| 112 | .section .text.Default_Handler,"ax",%progbits |
112 | .section .text.Default_Handler,"ax",%progbits |
| 113 | Default_Handler: |
113 | Default_Handler: |
| 114 | Infinite_Loop: |
114 | Infinite_Loop: |
| 115 | b Infinite_Loop |
115 | b Infinite_Loop |
| 116 | .size Default_Handler, .-Default_Handler |
116 | .size Default_Handler, .-Default_Handler |
| 117 | /****************************************************************************** |
117 | /****************************************************************************** |
| 118 | * |
118 | * |
| 119 | * The minimal vector table for a Cortex M3. Note that the proper constructs |
119 | * The minimal vector table for a Cortex M3. Note that the proper constructs |
| 120 | * must be placed on this to ensure that it ends up at physical address |
120 | * must be placed on this to ensure that it ends up at physical address |
| 121 | * 0x0000.0000. |
121 | * 0x0000.0000. |
| 122 | * |
122 | * |
| 123 | ******************************************************************************/ |
123 | ******************************************************************************/ |
| 124 | .section .isr_vector,"a",%progbits |
124 | .section .isr_vector,"a",%progbits |
| 125 | .type g_pfnVectors, %object |
125 | .type g_pfnVectors, %object |
| 126 | .size g_pfnVectors, .-g_pfnVectors |
126 | .size g_pfnVectors, .-g_pfnVectors |
| 127 | 127 | ||
| 128 | 128 | ||
| 129 | g_pfnVectors: |
129 | g_pfnVectors: |
| 130 | 130 | ||
| 131 | .word _estack |
131 | .word _estack |
| 132 | .word Reset_Handler |
132 | .word Reset_Handler |
| 133 | .word NMI_Handler |
133 | .word NMI_Handler |
| 134 | .word HardFault_Handler |
134 | .word HardFault_Handler |
| 135 | .word MemManage_Handler |
135 | .word MemManage_Handler |
| 136 | .word BusFault_Handler |
136 | .word BusFault_Handler |
| 137 | .word UsageFault_Handler |
137 | .word UsageFault_Handler |
| 138 | .word 0 |
138 | .word 0 |
| 139 | .word 0 |
139 | .word 0 |
| 140 | .word 0 |
140 | .word 0 |
| 141 | .word 0 |
141 | .word 0 |
| 142 | .word SVC_Handler |
142 | .word SVC_Handler |
| 143 | .word DebugMon_Handler |
143 | .word DebugMon_Handler |
| 144 | .word 0 |
144 | .word 0 |
| 145 | .word PendSV_Handler |
145 | .word PendSV_Handler |
| 146 | .word SysTick_Handler |
146 | .word SysTick_Handler |
| 147 | .word WWDG_IRQHandler |
147 | .word WWDG_IRQHandler |
| 148 | .word PVD_IRQHandler |
148 | .word PVD_IRQHandler |
| 149 | .word TAMPER_IRQHandler |
149 | .word TAMPER_IRQHandler |
| 150 | .word RTC_IRQHandler |
150 | .word RTC_IRQHandler |
| 151 | .word FLASH_IRQHandler |
151 | .word FLASH_IRQHandler |
| 152 | .word RCC_IRQHandler |
152 | .word RCC_IRQHandler |
| 153 | .word EXTI0_IRQHandler |
153 | .word EXTI0_IRQHandler |
| 154 | .word EXTI1_IRQHandler |
154 | .word EXTI1_IRQHandler |
| 155 | .word EXTI2_IRQHandler |
155 | .word EXTI2_IRQHandler |
| 156 | .word EXTI3_IRQHandler |
156 | .word EXTI3_IRQHandler |
| 157 | .word EXTI4_IRQHandler |
157 | .word EXTI4_IRQHandler |
| 158 | .word DMA1_Channel1_IRQHandler |
158 | .word DMA1_Channel1_IRQHandler |
| 159 | .word DMA1_Channel2_IRQHandler |
159 | .word DMA1_Channel2_IRQHandler |
| 160 | .word DMA1_Channel3_IRQHandler |
160 | .word DMA1_Channel3_IRQHandler |
| 161 | .word DMA1_Channel4_IRQHandler |
161 | .word DMA1_Channel4_IRQHandler |
| 162 | .word DMA1_Channel5_IRQHandler |
162 | .word DMA1_Channel5_IRQHandler |
| 163 | .word DMA1_Channel6_IRQHandler |
163 | .word DMA1_Channel6_IRQHandler |
| 164 | .word DMA1_Channel7_IRQHandler |
164 | .word DMA1_Channel7_IRQHandler |
| 165 | .word ADC1_IRQHandler |
165 | .word ADC1_IRQHandler |
| 166 | .word 0 |
166 | .word 0 |
| 167 | .word 0 |
167 | .word 0 |
| 168 | .word 0 |
168 | .word 0 |
| 169 | .word 0 |
169 | .word 0 |
| 170 | .word EXTI9_5_IRQHandler |
170 | .word EXTI9_5_IRQHandler |
| 171 | .word TIM1_BRK_TIM15_IRQHandler |
171 | .word TIM1_BRK_TIM15_IRQHandler |
| 172 | .word TIM1_UP_TIM16_IRQHandler |
172 | .word TIM1_UP_TIM16_IRQHandler |
| 173 | .word TIM1_TRG_COM_TIM17_IRQHandler |
173 | .word TIM1_TRG_COM_TIM17_IRQHandler |
| 174 | .word TIM1_CC_IRQHandler |
174 | .word TIM1_CC_IRQHandler |
| 175 | .word TIM2_IRQHandler |
175 | .word TIM2_IRQHandler |
| 176 | .word TIM3_IRQHandler |
176 | .word TIM3_IRQHandler |
| 177 | .word TIM4_IRQHandler |
177 | .word TIM4_IRQHandler |
| 178 | .word I2C1_EV_IRQHandler |
178 | .word I2C1_EV_IRQHandler |
| 179 | .word I2C1_ER_IRQHandler |
179 | .word I2C1_ER_IRQHandler |
| 180 | .word I2C2_EV_IRQHandler |
180 | .word I2C2_EV_IRQHandler |
| 181 | .word I2C2_ER_IRQHandler |
181 | .word I2C2_ER_IRQHandler |
| 182 | .word SPI1_IRQHandler |
182 | .word SPI1_IRQHandler |
| 183 | .word SPI2_IRQHandler |
183 | .word SPI2_IRQHandler |
| 184 | .word USART1_IRQHandler |
184 | .word USART1_IRQHandler |
| 185 | .word USART2_IRQHandler |
185 | .word USART2_IRQHandler |
| 186 | .word USART3_IRQHandler |
186 | .word USART3_IRQHandler |
| 187 | .word EXTI15_10_IRQHandler |
187 | .word EXTI15_10_IRQHandler |
| 188 | .word RTC_Alarm_IRQHandler |
188 | .word RTC_Alarm_IRQHandler |
| 189 | .word CEC_IRQHandler |
189 | .word CEC_IRQHandler |
| 190 | .word TIM12_IRQHandler |
190 | .word TIM12_IRQHandler |
| 191 | .word TIM13_IRQHandler |
191 | .word TIM13_IRQHandler |
| 192 | .word TIM14_IRQHandler |
192 | .word TIM14_IRQHandler |
| 193 | .word 0 |
193 | .word 0 |
| 194 | .word 0 |
194 | .word 0 |
| 195 | .word 0 |
195 | .word 0 |
| 196 | .word 0 |
196 | .word 0 |
| 197 | .word TIM5_IRQHandler |
197 | .word TIM5_IRQHandler |
| 198 | .word SPI3_IRQHandler |
198 | .word SPI3_IRQHandler |
| 199 | .word UART4_IRQHandler |
199 | .word UART4_IRQHandler |
| 200 | .word UART5_IRQHandler |
200 | .word UART5_IRQHandler |
| 201 | .word TIM6_DAC_IRQHandler |
201 | .word TIM6_DAC_IRQHandler |
| 202 | .word TIM7_IRQHandler |
202 | .word TIM7_IRQHandler |
| 203 | .word DMA2_Channel1_IRQHandler |
203 | .word DMA2_Channel1_IRQHandler |
| 204 | .word DMA2_Channel2_IRQHandler |
204 | .word DMA2_Channel2_IRQHandler |
| 205 | .word DMA2_Channel3_IRQHandler |
205 | .word DMA2_Channel3_IRQHandler |
| 206 | .word DMA2_Channel4_5_IRQHandler |
206 | .word DMA2_Channel4_5_IRQHandler |
| 207 | .word DMA2_Channel5_IRQHandler |
207 | .word DMA2_Channel5_IRQHandler |
| 208 | .word 0 |
208 | .word 0 |
| 209 | .word 0 |
209 | .word 0 |
| 210 | .word 0 |
210 | .word 0 |
| 211 | .word 0 |
211 | .word 0 |
| 212 | .word 0 |
212 | .word 0 |
| 213 | .word 0 |
213 | .word 0 |
| 214 | .word 0 |
214 | .word 0 |
| 215 | .word 0 |
215 | .word 0 |
| 216 | .word 0 |
216 | .word 0 |
| 217 | .word 0 |
217 | .word 0 |
| 218 | .word 0 |
218 | .word 0 |
| 219 | .word 0 |
219 | .word 0 |
| 220 | .word 0 |
220 | .word 0 |
| 221 | .word 0 |
221 | .word 0 |
| 222 | .word 0 |
222 | .word 0 |
| 223 | .word 0 |
223 | .word 0 |
| 224 | .word 0 |
224 | .word 0 |
| 225 | .word 0 |
225 | .word 0 |
| 226 | .word 0 |
226 | .word 0 |
| 227 | .word 0 |
227 | .word 0 |
| 228 | .word 0 |
228 | .word 0 |
| 229 | .word 0 |
229 | .word 0 |
| 230 | .word 0 |
230 | .word 0 |
| 231 | .word 0 |
231 | .word 0 |
| 232 | .word 0 |
232 | .word 0 |
| 233 | .word 0 |
233 | .word 0 |
| 234 | .word 0 |
234 | .word 0 |
| 235 | .word 0 |
235 | .word 0 |
| 236 | .word 0 |
236 | .word 0 |
| 237 | .word 0 |
237 | .word 0 |
| 238 | .word 0 |
238 | .word 0 |
| 239 | .word 0 |
239 | .word 0 |
| 240 | .word 0 |
240 | .word 0 |
| 241 | .word 0 |
241 | .word 0 |
| 242 | .word 0 |
242 | .word 0 |
| 243 | .word 0 |
243 | .word 0 |
| 244 | .word 0 |
244 | .word 0 |
| 245 | .word 0 |
245 | .word 0 |
| 246 | .word 0 |
246 | .word 0 |
| 247 | .word 0 |
247 | .word 0 |
| 248 | .word 0 |
248 | .word 0 |
| 249 | .word 0 |
249 | .word 0 |
| 250 | .word 0 |
250 | .word 0 |
| 251 | .word BootRAM /* @0x1E0. This is for boot in RAM mode for |
251 | .word BootRAM /* @0x1E0. This is for boot in RAM mode for |
| 252 | STM32F10x High Density Value line devices. */ |
252 | STM32F10x High Density Value line devices. */ |
| 253 | 253 | ||
| 254 | /******************************************************************************* |
254 | /******************************************************************************* |
| 255 | * |
255 | * |
| 256 | * Provide weak aliases for each Exception handler to the Default_Handler. |
256 | * Provide weak aliases for each Exception handler to the Default_Handler. |
| 257 | * As they are weak aliases, any function with the same name will override |
257 | * As they are weak aliases, any function with the same name will override |
| 258 | * this definition. |
258 | * this definition. |
| 259 | * |
259 | * |
| 260 | *******************************************************************************/ |
260 | *******************************************************************************/ |
| 261 | 261 | ||
| 262 | 262 | ||
| 263 | .weak NMI_Handler |
263 | .weak NMI_Handler |
| 264 | .thumb_set NMI_Handler,Default_Handler |
264 | .thumb_set NMI_Handler,Default_Handler |
| 265 | 265 | ||
| 266 | .weak HardFault_Handler |
266 | .weak HardFault_Handler |
| 267 | .thumb_set HardFault_Handler,Default_Handler |
267 | .thumb_set HardFault_Handler,Default_Handler |
| 268 | 268 | ||
| 269 | .weak MemManage_Handler |
269 | .weak MemManage_Handler |
| 270 | .thumb_set MemManage_Handler,Default_Handler |
270 | .thumb_set MemManage_Handler,Default_Handler |
| 271 | 271 | ||
| 272 | .weak BusFault_Handler |
272 | .weak BusFault_Handler |
| 273 | .thumb_set BusFault_Handler,Default_Handler |
273 | .thumb_set BusFault_Handler,Default_Handler |
| 274 | 274 | ||
| 275 | .weak UsageFault_Handler |
275 | .weak UsageFault_Handler |
| 276 | .thumb_set UsageFault_Handler,Default_Handler |
276 | .thumb_set UsageFault_Handler,Default_Handler |
| 277 | 277 | ||
| 278 | .weak SVC_Handler |
278 | .weak SVC_Handler |
| 279 | .thumb_set SVC_Handler,Default_Handler |
279 | .thumb_set SVC_Handler,Default_Handler |
| 280 | 280 | ||
| 281 | .weak DebugMon_Handler |
281 | .weak DebugMon_Handler |
| 282 | .thumb_set DebugMon_Handler,Default_Handler |
282 | .thumb_set DebugMon_Handler,Default_Handler |
| 283 | 283 | ||
| 284 | .weak PendSV_Handler |
284 | .weak PendSV_Handler |
| 285 | .thumb_set PendSV_Handler,Default_Handler |
285 | .thumb_set PendSV_Handler,Default_Handler |
| 286 | 286 | ||
| 287 | .weak SysTick_Handler |
287 | .weak SysTick_Handler |
| 288 | .thumb_set SysTick_Handler,Default_Handler |
288 | .thumb_set SysTick_Handler,Default_Handler |
| 289 | 289 | ||
| 290 | .weak WWDG_IRQHandler |
290 | .weak WWDG_IRQHandler |
| 291 | .thumb_set WWDG_IRQHandler,Default_Handler |
291 | .thumb_set WWDG_IRQHandler,Default_Handler |
| 292 | 292 | ||
| 293 | .weak PVD_IRQHandler |
293 | .weak PVD_IRQHandler |
| 294 | .thumb_set PVD_IRQHandler,Default_Handler |
294 | .thumb_set PVD_IRQHandler,Default_Handler |
| 295 | 295 | ||
| 296 | .weak TAMPER_IRQHandler |
296 | .weak TAMPER_IRQHandler |
| 297 | .thumb_set TAMPER_IRQHandler,Default_Handler |
297 | .thumb_set TAMPER_IRQHandler,Default_Handler |
| 298 | 298 | ||
| 299 | .weak RTC_IRQHandler |
299 | .weak RTC_IRQHandler |
| 300 | .thumb_set RTC_IRQHandler,Default_Handler |
300 | .thumb_set RTC_IRQHandler,Default_Handler |
| 301 | 301 | ||
| 302 | .weak FLASH_IRQHandler |
302 | .weak FLASH_IRQHandler |
| 303 | .thumb_set FLASH_IRQHandler,Default_Handler |
303 | .thumb_set FLASH_IRQHandler,Default_Handler |
| 304 | 304 | ||
| 305 | .weak RCC_IRQHandler |
305 | .weak RCC_IRQHandler |
| 306 | .thumb_set RCC_IRQHandler,Default_Handler |
306 | .thumb_set RCC_IRQHandler,Default_Handler |
| 307 | 307 | ||
| 308 | .weak EXTI0_IRQHandler |
308 | .weak EXTI0_IRQHandler |
| 309 | .thumb_set EXTI0_IRQHandler,Default_Handler |
309 | .thumb_set EXTI0_IRQHandler,Default_Handler |
| 310 | 310 | ||
| 311 | .weak EXTI1_IRQHandler |
311 | .weak EXTI1_IRQHandler |
| 312 | .thumb_set EXTI1_IRQHandler,Default_Handler |
312 | .thumb_set EXTI1_IRQHandler,Default_Handler |
| 313 | 313 | ||
| 314 | .weak EXTI2_IRQHandler |
314 | .weak EXTI2_IRQHandler |
| 315 | .thumb_set EXTI2_IRQHandler,Default_Handler |
315 | .thumb_set EXTI2_IRQHandler,Default_Handler |
| 316 | 316 | ||
| 317 | .weak EXTI3_IRQHandler |
317 | .weak EXTI3_IRQHandler |
| 318 | .thumb_set EXTI3_IRQHandler,Default_Handler |
318 | .thumb_set EXTI3_IRQHandler,Default_Handler |
| 319 | 319 | ||
| 320 | .weak EXTI4_IRQHandler |
320 | .weak EXTI4_IRQHandler |
| 321 | .thumb_set EXTI4_IRQHandler,Default_Handler |
321 | .thumb_set EXTI4_IRQHandler,Default_Handler |
| 322 | 322 | ||
| 323 | .weak DMA1_Channel1_IRQHandler |
323 | .weak DMA1_Channel1_IRQHandler |
| 324 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
324 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
| 325 | 325 | ||
| 326 | .weak DMA1_Channel2_IRQHandler |
326 | .weak DMA1_Channel2_IRQHandler |
| 327 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
327 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
| 328 | 328 | ||
| 329 | .weak DMA1_Channel3_IRQHandler |
329 | .weak DMA1_Channel3_IRQHandler |
| 330 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
330 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
| 331 | 331 | ||
| 332 | .weak DMA1_Channel4_IRQHandler |
332 | .weak DMA1_Channel4_IRQHandler |
| 333 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
333 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
| 334 | 334 | ||
| 335 | .weak DMA1_Channel5_IRQHandler |
335 | .weak DMA1_Channel5_IRQHandler |
| 336 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
336 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
| 337 | 337 | ||
| 338 | .weak DMA1_Channel6_IRQHandler |
338 | .weak DMA1_Channel6_IRQHandler |
| 339 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
339 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
| 340 | 340 | ||
| 341 | .weak DMA1_Channel7_IRQHandler |
341 | .weak DMA1_Channel7_IRQHandler |
| 342 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
342 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
| 343 | 343 | ||
| 344 | .weak ADC1_IRQHandler |
344 | .weak ADC1_IRQHandler |
| 345 | .thumb_set ADC1_IRQHandler,Default_Handler |
345 | .thumb_set ADC1_IRQHandler,Default_Handler |
| 346 | 346 | ||
| 347 | .weak EXTI9_5_IRQHandler |
347 | .weak EXTI9_5_IRQHandler |
| 348 | .thumb_set EXTI9_5_IRQHandler,Default_Handler |
348 | .thumb_set EXTI9_5_IRQHandler,Default_Handler |
| 349 | 349 | ||
| 350 | .weak TIM1_BRK_TIM15_IRQHandler |
350 | .weak TIM1_BRK_TIM15_IRQHandler |
| 351 | .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler |
351 | .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler |
| 352 | 352 | ||
| 353 | .weak TIM1_UP_TIM16_IRQHandler |
353 | .weak TIM1_UP_TIM16_IRQHandler |
| 354 | .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler |
354 | .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler |
| 355 | 355 | ||
| 356 | .weak TIM1_TRG_COM_TIM17_IRQHandler |
356 | .weak TIM1_TRG_COM_TIM17_IRQHandler |
| 357 | .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler |
357 | .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler |
| 358 | 358 | ||
| 359 | .weak TIM1_CC_IRQHandler |
359 | .weak TIM1_CC_IRQHandler |
| 360 | .thumb_set TIM1_CC_IRQHandler,Default_Handler |
360 | .thumb_set TIM1_CC_IRQHandler,Default_Handler |
| 361 | 361 | ||
| 362 | .weak TIM2_IRQHandler |
362 | .weak TIM2_IRQHandler |
| 363 | .thumb_set TIM2_IRQHandler,Default_Handler |
363 | .thumb_set TIM2_IRQHandler,Default_Handler |
| 364 | 364 | ||
| 365 | .weak TIM3_IRQHandler |
365 | .weak TIM3_IRQHandler |
| 366 | .thumb_set TIM3_IRQHandler,Default_Handler |
366 | .thumb_set TIM3_IRQHandler,Default_Handler |
| 367 | 367 | ||
| 368 | .weak TIM4_IRQHandler |
368 | .weak TIM4_IRQHandler |
| 369 | .thumb_set TIM4_IRQHandler,Default_Handler |
369 | .thumb_set TIM4_IRQHandler,Default_Handler |
| 370 | 370 | ||
| 371 | .weak I2C1_EV_IRQHandler |
371 | .weak I2C1_EV_IRQHandler |
| 372 | .thumb_set I2C1_EV_IRQHandler,Default_Handler |
372 | .thumb_set I2C1_EV_IRQHandler,Default_Handler |
| 373 | 373 | ||
| 374 | .weak I2C1_ER_IRQHandler |
374 | .weak I2C1_ER_IRQHandler |
| 375 | .thumb_set I2C1_ER_IRQHandler,Default_Handler |
375 | .thumb_set I2C1_ER_IRQHandler,Default_Handler |
| 376 | 376 | ||
| 377 | .weak I2C2_EV_IRQHandler |
377 | .weak I2C2_EV_IRQHandler |
| 378 | .thumb_set I2C2_EV_IRQHandler,Default_Handler |
378 | .thumb_set I2C2_EV_IRQHandler,Default_Handler |
| 379 | 379 | ||
| 380 | .weak I2C2_ER_IRQHandler |
380 | .weak I2C2_ER_IRQHandler |
| 381 | .thumb_set I2C2_ER_IRQHandler,Default_Handler |
381 | .thumb_set I2C2_ER_IRQHandler,Default_Handler |
| 382 | 382 | ||
| 383 | .weak SPI1_IRQHandler |
383 | .weak SPI1_IRQHandler |
| 384 | .thumb_set SPI1_IRQHandler,Default_Handler |
384 | .thumb_set SPI1_IRQHandler,Default_Handler |
| 385 | 385 | ||
| 386 | .weak SPI2_IRQHandler |
386 | .weak SPI2_IRQHandler |
| 387 | .thumb_set SPI2_IRQHandler,Default_Handler |
387 | .thumb_set SPI2_IRQHandler,Default_Handler |
| 388 | 388 | ||
| 389 | .weak USART1_IRQHandler |
389 | .weak USART1_IRQHandler |
| 390 | .thumb_set USART1_IRQHandler,Default_Handler |
390 | .thumb_set USART1_IRQHandler,Default_Handler |
| 391 | 391 | ||
| 392 | .weak USART2_IRQHandler |
392 | .weak USART2_IRQHandler |
| 393 | .thumb_set USART2_IRQHandler,Default_Handler |
393 | .thumb_set USART2_IRQHandler,Default_Handler |
| 394 | 394 | ||
| 395 | .weak USART3_IRQHandler |
395 | .weak USART3_IRQHandler |
| 396 | .thumb_set USART3_IRQHandler,Default_Handler |
396 | .thumb_set USART3_IRQHandler,Default_Handler |
| 397 | 397 | ||
| 398 | .weak EXTI15_10_IRQHandler |
398 | .weak EXTI15_10_IRQHandler |
| 399 | .thumb_set EXTI15_10_IRQHandler,Default_Handler |
399 | .thumb_set EXTI15_10_IRQHandler,Default_Handler |
| 400 | 400 | ||
| 401 | .weak RTC_Alarm_IRQHandler |
401 | .weak RTC_Alarm_IRQHandler |
| 402 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler |
402 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler |
| 403 | 403 | ||
| 404 | .weak CEC_IRQHandler |
404 | .weak CEC_IRQHandler |
| 405 | .thumb_set CEC_IRQHandler,Default_Handler |
405 | .thumb_set CEC_IRQHandler,Default_Handler |
| 406 | 406 | ||
| 407 | .weak TIM12_IRQHandler |
407 | .weak TIM12_IRQHandler |
| 408 | .thumb_set TIM12_IRQHandler,Default_Handler |
408 | .thumb_set TIM12_IRQHandler,Default_Handler |
| 409 | 409 | ||
| 410 | .weak TIM13_IRQHandler |
410 | .weak TIM13_IRQHandler |
| 411 | .thumb_set TIM13_IRQHandler,Default_Handler |
411 | .thumb_set TIM13_IRQHandler,Default_Handler |
| 412 | 412 | ||
| 413 | .weak TIM14_IRQHandler |
413 | .weak TIM14_IRQHandler |
| 414 | .thumb_set TIM14_IRQHandler,Default_Handler |
414 | .thumb_set TIM14_IRQHandler,Default_Handler |
| 415 | 415 | ||
| 416 | .weak TIM5_IRQHandler |
416 | .weak TIM5_IRQHandler |
| 417 | .thumb_set TIM5_IRQHandler,Default_Handler |
417 | .thumb_set TIM5_IRQHandler,Default_Handler |
| 418 | 418 | ||
| 419 | .weak SPI3_IRQHandler |
419 | .weak SPI3_IRQHandler |
| 420 | .thumb_set SPI3_IRQHandler,Default_Handler |
420 | .thumb_set SPI3_IRQHandler,Default_Handler |
| 421 | 421 | ||
| 422 | .weak UART4_IRQHandler |
422 | .weak UART4_IRQHandler |
| 423 | .thumb_set UART4_IRQHandler,Default_Handler |
423 | .thumb_set UART4_IRQHandler,Default_Handler |
| 424 | 424 | ||
| 425 | .weak UART5_IRQHandler |
425 | .weak UART5_IRQHandler |
| 426 | .thumb_set UART5_IRQHandler,Default_Handler |
426 | .thumb_set UART5_IRQHandler,Default_Handler |
| 427 | 427 | ||
| 428 | .weak TIM6_DAC_IRQHandler |
428 | .weak TIM6_DAC_IRQHandler |
| 429 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler |
429 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler |
| 430 | 430 | ||
| 431 | .weak TIM7_IRQHandler |
431 | .weak TIM7_IRQHandler |
| 432 | .thumb_set TIM7_IRQHandler,Default_Handler |
432 | .thumb_set TIM7_IRQHandler,Default_Handler |
| 433 | 433 | ||
| 434 | .weak DMA2_Channel1_IRQHandler |
434 | .weak DMA2_Channel1_IRQHandler |
| 435 | .thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
435 | .thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
| 436 | 436 | ||
| 437 | .weak DMA2_Channel2_IRQHandler |
437 | .weak DMA2_Channel2_IRQHandler |
| 438 | .thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
438 | .thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
| 439 | 439 | ||
| 440 | .weak DMA2_Channel3_IRQHandler |
440 | .weak DMA2_Channel3_IRQHandler |
| 441 | .thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
441 | .thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
| 442 | 442 | ||
| 443 | .weak DMA2_Channel4_5_IRQHandler |
443 | .weak DMA2_Channel4_5_IRQHandler |
| 444 | .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler |
444 | .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler |
| 445 | 445 | ||
| 446 | .weak DMA2_Channel5_IRQHandler |
446 | .weak DMA2_Channel5_IRQHandler |
| 447 | .thumb_set DMA2_Channel5_IRQHandler,Default_Handler |
447 | .thumb_set DMA2_Channel5_IRQHandler,Default_Handler |
| 448 | 448 | ||
| 449 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
449 | |
| 450 | - | ||