Rev 2 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 2 | Rev 3 | ||
---|---|---|---|
Line 1... | Line 1... | ||
1 | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ******************** |
1 | ;******************** (C) COPYRIGHT 2017 STMicroelectronics ******************** |
2 | ;* File Name : startup_stm32f107xc.s |
2 | ;* File Name : startup_stm32f107xc.s |
3 | ;* Author : MCD Application Team |
3 | ;* Author : MCD Application Team |
4 | ;* Description : STM32F107xC Devices vector table for MDK-ARM toolchain. |
4 | ;* Description : STM32F107xC Devices vector table for MDK-ARM toolchain. |
5 | ;* This module performs: |
5 | ;* This module performs: |
6 | ;* - Set the initial SP |
6 | ;* - Set the initial SP |
7 | ;* - Set the initial PC == Reset_Handler |
7 | ;* - Set the initial PC == Reset_Handler |
8 | ;* - Set the vector table entries with the exceptions ISR address |
8 | ;* - Set the vector table entries with the exceptions ISR address |
9 | ;* - Configure the clock system |
9 | ;* - Configure the clock system |
10 | ;* - Branches to __main in the C library (which eventually |
10 | ;* - Branches to __main in the C library (which eventually |
11 | ;* calls main()). |
11 | ;* calls main()). |
12 | ;* After Reset the Cortex-M3 processor is in Thread mode, |
12 | ;* After Reset the Cortex-M3 processor is in Thread mode, |
13 | ;* priority is Privileged, and the Stack is set to Main. |
13 | ;* priority is Privileged, and the Stack is set to Main. |
14 | ;****************************************************************************** |
14 | ;****************************************************************************** |
15 | ;* @attention |
15 | ;* @attention |
16 | ;* |
16 | ;* |
17 | ;* Copyright (c) 2017 STMicroelectronics. |
17 | ;* Copyright (c) 2017-2021 STMicroelectronics. |
18 | ;* All rights reserved. |
18 | ;* All rights reserved. |
19 | ;* |
19 | ;* |
20 | ;* This software component is licensed by ST under BSD 3-Clause license, |
20 | ;* This software is licensed under terms that can be found in the LICENSE file |
21 | ;* the "License"; You may not use this file except in compliance with the |
21 | ;* in the root directory of this software component. |
22 | ;* License. You may obtain a copy of the License at: |
22 | ;* If no LICENSE file comes with this software, it is provided AS-IS. |
23 | ;* opensource.org/licenses/BSD-3-Clause |
23 | ;* |
24 | ;* |
24 | ;****************************************************************************** |
25 | ;****************************************************************************** |
25 | |
26 | 26 | ; Amount of memory (in bytes) allocated for Stack |
|
27 | ; Amount of memory (in bytes) allocated for Stack |
27 | ; Tailor this value to your application needs |
28 | ; Tailor this value to your application needs |
28 | ; <h> Stack Configuration |
29 | ; <h> Stack Configuration |
29 | ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> |
30 | ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> |
30 | ; </h> |
31 | ; </h> |
31 | |
32 | 32 | Stack_Size EQU 0x00000400 |
|
33 | Stack_Size EQU 0x00000400 |
33 | |
34 | 34 | AREA STACK, NOINIT, READWRITE, ALIGN=3 |
|
35 | AREA STACK, NOINIT, READWRITE, ALIGN=3 |
35 | Stack_Mem SPACE Stack_Size |
36 | Stack_Mem SPACE Stack_Size |
36 | __initial_sp |
37 | __initial_sp |
37 | |
38 | 38 | ||
39 | 39 | ; <h> Heap Configuration |
|
40 | ; <h> Heap Configuration |
40 | ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> |
41 | ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> |
41 | ; </h> |
42 | ; </h> |
42 | |
43 | 43 | Heap_Size EQU 0x00000200 |
|
44 | Heap_Size EQU 0x00000200 |
44 | |
45 | 45 | AREA HEAP, NOINIT, READWRITE, ALIGN=3 |
|
46 | AREA HEAP, NOINIT, READWRITE, ALIGN=3 |
46 | __heap_base |
47 | __heap_base |
47 | Heap_Mem SPACE Heap_Size |
48 | Heap_Mem SPACE Heap_Size |
48 | __heap_limit |
49 | __heap_limit |
49 | |
50 | 50 | PRESERVE8 |
|
51 | PRESERVE8 |
51 | THUMB |
52 | THUMB |
52 | |
53 | 53 | ||
54 | 54 | ; Vector Table Mapped to Address 0 at Reset |
|
55 | ; Vector Table Mapped to Address 0 at Reset |
55 | AREA RESET, DATA, READONLY |
56 | AREA RESET, DATA, READONLY |
56 | EXPORT __Vectors |
57 | EXPORT __Vectors |
57 | EXPORT __Vectors_End |
58 | EXPORT __Vectors_End |
58 | EXPORT __Vectors_Size |
59 | EXPORT __Vectors_Size |
59 | |
60 | 60 | __Vectors DCD __initial_sp ; Top of Stack |
|
61 | __Vectors DCD __initial_sp ; Top of Stack |
61 | DCD Reset_Handler ; Reset Handler |
62 | DCD Reset_Handler ; Reset Handler |
62 | DCD NMI_Handler ; NMI Handler |
63 | DCD NMI_Handler ; NMI Handler |
63 | DCD HardFault_Handler ; Hard Fault Handler |
64 | DCD HardFault_Handler ; Hard Fault Handler |
64 | DCD MemManage_Handler ; MPU Fault Handler |
65 | DCD MemManage_Handler ; MPU Fault Handler |
65 | DCD BusFault_Handler ; Bus Fault Handler |
66 | DCD BusFault_Handler ; Bus Fault Handler |
66 | DCD UsageFault_Handler ; Usage Fault Handler |
67 | DCD UsageFault_Handler ; Usage Fault Handler |
67 | DCD 0 ; Reserved |
68 | DCD 0 ; Reserved |
68 | DCD 0 ; Reserved |
69 | DCD 0 ; Reserved |
69 | DCD 0 ; Reserved |
70 | DCD 0 ; Reserved |
70 | DCD 0 ; Reserved |
71 | DCD 0 ; Reserved |
71 | DCD SVC_Handler ; SVCall Handler |
72 | DCD SVC_Handler ; SVCall Handler |
72 | DCD DebugMon_Handler ; Debug Monitor Handler |
73 | DCD DebugMon_Handler ; Debug Monitor Handler |
73 | DCD 0 ; Reserved |
74 | DCD 0 ; Reserved |
74 | DCD PendSV_Handler ; PendSV Handler |
75 | DCD PendSV_Handler ; PendSV Handler |
75 | DCD SysTick_Handler ; SysTick Handler |
76 | DCD SysTick_Handler ; SysTick Handler |
76 | |
77 | 77 | ; External Interrupts |
|
78 | ; External Interrupts |
78 | DCD WWDG_IRQHandler ; Window Watchdog |
79 | DCD WWDG_IRQHandler ; Window Watchdog |
79 | DCD PVD_IRQHandler ; PVD through EXTI Line detect |
80 | DCD PVD_IRQHandler ; PVD through EXTI Line detect |
80 | DCD TAMPER_IRQHandler ; Tamper |
81 | DCD TAMPER_IRQHandler ; Tamper |
81 | DCD RTC_IRQHandler ; RTC |
82 | DCD RTC_IRQHandler ; RTC |
82 | DCD FLASH_IRQHandler ; Flash |
83 | DCD FLASH_IRQHandler ; Flash |
83 | DCD RCC_IRQHandler ; RCC |
84 | DCD RCC_IRQHandler ; RCC |
84 | DCD EXTI0_IRQHandler ; EXTI Line 0 |
85 | DCD EXTI0_IRQHandler ; EXTI Line 0 |
85 | DCD EXTI1_IRQHandler ; EXTI Line 1 |
86 | DCD EXTI1_IRQHandler ; EXTI Line 1 |
86 | DCD EXTI2_IRQHandler ; EXTI Line 2 |
87 | DCD EXTI2_IRQHandler ; EXTI Line 2 |
87 | DCD EXTI3_IRQHandler ; EXTI Line 3 |
88 | DCD EXTI3_IRQHandler ; EXTI Line 3 |
88 | DCD EXTI4_IRQHandler ; EXTI Line 4 |
89 | DCD EXTI4_IRQHandler ; EXTI Line 4 |
89 | DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 |
90 | DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 |
90 | DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 |
91 | DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 |
91 | DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 |
92 | DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 |
92 | DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 |
93 | DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 |
93 | DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 |
94 | DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 |
94 | DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 |
95 | DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 |
95 | DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 |
96 | DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 |
96 | DCD ADC1_2_IRQHandler ; ADC1 and ADC2 |
97 | DCD ADC1_2_IRQHandler ; ADC1 and ADC2 |
97 | DCD CAN1_TX_IRQHandler ; CAN1 TX |
98 | DCD CAN1_TX_IRQHandler ; CAN1 TX |
98 | DCD CAN1_RX0_IRQHandler ; CAN1 RX0 |
99 | DCD CAN1_RX0_IRQHandler ; CAN1 RX0 |
99 | DCD CAN1_RX1_IRQHandler ; CAN1 RX1 |
100 | DCD CAN1_RX1_IRQHandler ; CAN1 RX1 |
100 | DCD CAN1_SCE_IRQHandler ; CAN1 SCE |
101 | DCD CAN1_SCE_IRQHandler ; CAN1 SCE |
101 | DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 |
102 | DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 |
102 | DCD TIM1_BRK_IRQHandler ; TIM1 Break |
103 | DCD TIM1_BRK_IRQHandler ; TIM1 Break |
103 | DCD TIM1_UP_IRQHandler ; TIM1 Update |
104 | DCD TIM1_UP_IRQHandler ; TIM1 Update |
104 | DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation |
105 | DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation |
105 | DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare |
106 | DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare |
106 | DCD TIM2_IRQHandler ; TIM2 |
107 | DCD TIM2_IRQHandler ; TIM2 |
107 | DCD TIM3_IRQHandler ; TIM3 |
108 | DCD TIM3_IRQHandler ; TIM3 |
108 | DCD TIM4_IRQHandler ; TIM4 |
109 | DCD TIM4_IRQHandler ; TIM4 |
109 | DCD I2C1_EV_IRQHandler ; I2C1 Event |
110 | DCD I2C1_EV_IRQHandler ; I2C1 Event |
110 | DCD I2C1_ER_IRQHandler ; I2C1 Error |
111 | DCD I2C1_ER_IRQHandler ; I2C1 Error |
111 | DCD I2C2_EV_IRQHandler ; I2C2 Event |
112 | DCD I2C2_EV_IRQHandler ; I2C2 Event |
112 | DCD I2C2_ER_IRQHandler ; I2C1 Error |
113 | DCD I2C2_ER_IRQHandler ; I2C1 Error |
113 | DCD SPI1_IRQHandler ; SPI1 |
114 | DCD SPI1_IRQHandler ; SPI1 |
114 | DCD SPI2_IRQHandler ; SPI2 |
115 | DCD SPI2_IRQHandler ; SPI2 |
115 | DCD USART1_IRQHandler ; USART1 |
116 | DCD USART1_IRQHandler ; USART1 |
116 | DCD USART2_IRQHandler ; USART2 |
117 | DCD USART2_IRQHandler ; USART2 |
117 | DCD USART3_IRQHandler ; USART3 |
118 | DCD USART3_IRQHandler ; USART3 |
118 | DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 |
119 | DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 |
119 | DCD RTC_Alarm_IRQHandler ; RTC alarm through EXTI line |
120 | DCD RTC_Alarm_IRQHandler ; RTC alarm through EXTI line |
120 | DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line |
121 | DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line |
121 | DCD 0 ; Reserved |
122 | DCD 0 ; Reserved |
122 | DCD 0 ; Reserved |
123 | DCD 0 ; Reserved |
123 | DCD 0 ; Reserved |
124 | DCD 0 ; Reserved |
124 | DCD 0 ; Reserved |
125 | DCD 0 ; Reserved |
125 | DCD 0 ; Reserved |
126 | DCD 0 ; Reserved |
126 | DCD 0 ; Reserved |
127 | DCD 0 ; Reserved |
127 | DCD 0 ; Reserved |
128 | DCD 0 ; Reserved |
128 | DCD TIM5_IRQHandler ; TIM5 |
129 | DCD TIM5_IRQHandler ; TIM5 |
129 | DCD SPI3_IRQHandler ; SPI3 |
130 | DCD SPI3_IRQHandler ; SPI3 |
130 | DCD UART4_IRQHandler ; UART4 |
131 | DCD UART4_IRQHandler ; UART4 |
131 | DCD UART5_IRQHandler ; UART5 |
132 | DCD UART5_IRQHandler ; UART5 |
132 | DCD TIM6_IRQHandler ; TIM6 |
133 | DCD TIM6_IRQHandler ; TIM6 |
133 | DCD TIM7_IRQHandler ; TIM7 |
134 | DCD TIM7_IRQHandler ; TIM7 |
134 | DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 |
135 | DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 |
135 | DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 |
136 | DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 |
136 | DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 |
137 | DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 |
137 | DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4 |
138 | DCD DMA2_Channel4_IRQHandler ; DMA2 Channel4 |
138 | DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 |
139 | DCD DMA2_Channel5_IRQHandler ; DMA2 Channel5 |
139 | DCD ETH_IRQHandler ; Ethernet |
140 | DCD ETH_IRQHandler ; Ethernet |
140 | DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line |
141 | DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line |
141 | DCD CAN2_TX_IRQHandler ; CAN2 TX |
142 | DCD CAN2_TX_IRQHandler ; CAN2 TX |
142 | DCD CAN2_RX0_IRQHandler ; CAN2 RX0 |
143 | DCD CAN2_RX0_IRQHandler ; CAN2 RX0 |
143 | DCD CAN2_RX1_IRQHandler ; CAN2 RX1 |
144 | DCD CAN2_RX1_IRQHandler ; CAN2 RX1 |
144 | DCD CAN2_SCE_IRQHandler ; CAN2 SCE |
145 | DCD CAN2_SCE_IRQHandler ; CAN2 SCE |
145 | DCD OTG_FS_IRQHandler ; USB OTG FS |
146 | DCD OTG_FS_IRQHandler ; USB OTG FS |
146 | __Vectors_End |
147 | __Vectors_End |
147 | |
148 | 148 | __Vectors_Size EQU __Vectors_End - __Vectors |
|
149 | __Vectors_Size EQU __Vectors_End - __Vectors |
149 | |
150 | 150 | AREA |.text|, CODE, READONLY |
|
151 | AREA |.text|, CODE, READONLY |
151 | |
152 | 152 | ; Reset handler |
|
153 | ; Reset handler |
153 | Reset_Handler PROC |
154 | Reset_Handler PROC |
154 | EXPORT Reset_Handler [WEAK] |
155 | EXPORT Reset_Handler [WEAK] |
155 | IMPORT SystemInit |
156 | IMPORT SystemInit |
156 | IMPORT __main |
157 | IMPORT __main |
157 | LDR R0, =SystemInit |
158 | LDR R0, =SystemInit |
158 | BLX R0 |
159 | BLX R0 |
159 | LDR R0, =__main |
160 | LDR R0, =__main |
160 | BX R0 |
161 | BX R0 |
161 | ENDP |
162 | ENDP |
162 | |
163 | 163 | ; Dummy Exception Handlers (infinite loops which can be modified) |
|
164 | ; Dummy Exception Handlers (infinite loops which can be modified) |
164 | |
165 | 165 | NMI_Handler PROC |
|
166 | NMI_Handler PROC |
166 | EXPORT NMI_Handler [WEAK] |
167 | EXPORT NMI_Handler [WEAK] |
167 | B . |
168 | B . |
168 | ENDP |
169 | ENDP |
169 | HardFault_Handler\ |
170 | HardFault_Handler\ |
170 | PROC |
171 | PROC |
171 | EXPORT HardFault_Handler [WEAK] |
172 | EXPORT HardFault_Handler [WEAK] |
172 | B . |
173 | B . |
173 | ENDP |
174 | ENDP |
174 | MemManage_Handler\ |
175 | MemManage_Handler\ |
175 | PROC |
176 | PROC |
176 | EXPORT MemManage_Handler [WEAK] |
177 | EXPORT MemManage_Handler [WEAK] |
177 | B . |
178 | B . |
178 | ENDP |
179 | ENDP |
179 | BusFault_Handler\ |
180 | BusFault_Handler\ |
180 | PROC |
181 | PROC |
181 | EXPORT BusFault_Handler [WEAK] |
182 | EXPORT BusFault_Handler [WEAK] |
182 | B . |
183 | B . |
183 | ENDP |
184 | ENDP |
184 | UsageFault_Handler\ |
185 | UsageFault_Handler\ |
185 | PROC |
186 | PROC |
186 | EXPORT UsageFault_Handler [WEAK] |
187 | EXPORT UsageFault_Handler [WEAK] |
187 | B . |
188 | B . |
188 | ENDP |
189 | ENDP |
189 | SVC_Handler PROC |
190 | SVC_Handler PROC |
190 | EXPORT SVC_Handler [WEAK] |
191 | EXPORT SVC_Handler [WEAK] |
191 | B . |
192 | B . |
192 | ENDP |
193 | ENDP |
193 | DebugMon_Handler\ |
194 | DebugMon_Handler\ |
194 | PROC |
195 | PROC |
195 | EXPORT DebugMon_Handler [WEAK] |
196 | EXPORT DebugMon_Handler [WEAK] |
196 | B . |
197 | B . |
197 | ENDP |
198 | ENDP |
198 | PendSV_Handler PROC |
199 | PendSV_Handler PROC |
199 | EXPORT PendSV_Handler [WEAK] |
200 | EXPORT PendSV_Handler [WEAK] |
200 | B . |
201 | B . |
201 | ENDP |
202 | ENDP |
202 | SysTick_Handler PROC |
203 | SysTick_Handler PROC |
203 | EXPORT SysTick_Handler [WEAK] |
204 | EXPORT SysTick_Handler [WEAK] |
204 | B . |
205 | B . |
205 | ENDP |
206 | ENDP |
206 | |
207 | 207 | Default_Handler PROC |
|
208 | Default_Handler PROC |
208 | |
209 | 209 | EXPORT WWDG_IRQHandler [WEAK] |
|
210 | EXPORT WWDG_IRQHandler [WEAK] |
210 | EXPORT PVD_IRQHandler [WEAK] |
211 | EXPORT PVD_IRQHandler [WEAK] |
211 | EXPORT TAMPER_IRQHandler [WEAK] |
212 | EXPORT TAMPER_IRQHandler [WEAK] |
212 | EXPORT RTC_IRQHandler [WEAK] |
213 | EXPORT RTC_IRQHandler [WEAK] |
213 | EXPORT FLASH_IRQHandler [WEAK] |
214 | EXPORT FLASH_IRQHandler [WEAK] |
214 | EXPORT RCC_IRQHandler [WEAK] |
215 | EXPORT RCC_IRQHandler [WEAK] |
215 | EXPORT EXTI0_IRQHandler [WEAK] |
216 | EXPORT EXTI0_IRQHandler [WEAK] |
216 | EXPORT EXTI1_IRQHandler [WEAK] |
217 | EXPORT EXTI1_IRQHandler [WEAK] |
217 | EXPORT EXTI2_IRQHandler [WEAK] |
218 | EXPORT EXTI2_IRQHandler [WEAK] |
218 | EXPORT EXTI3_IRQHandler [WEAK] |
219 | EXPORT EXTI3_IRQHandler [WEAK] |
219 | EXPORT EXTI4_IRQHandler [WEAK] |
220 | EXPORT EXTI4_IRQHandler [WEAK] |
220 | EXPORT DMA1_Channel1_IRQHandler [WEAK] |
221 | EXPORT DMA1_Channel1_IRQHandler [WEAK] |
221 | EXPORT DMA1_Channel2_IRQHandler [WEAK] |
222 | EXPORT DMA1_Channel2_IRQHandler [WEAK] |
222 | EXPORT DMA1_Channel3_IRQHandler [WEAK] |
223 | EXPORT DMA1_Channel3_IRQHandler [WEAK] |
223 | EXPORT DMA1_Channel4_IRQHandler [WEAK] |
224 | EXPORT DMA1_Channel4_IRQHandler [WEAK] |
224 | EXPORT DMA1_Channel5_IRQHandler [WEAK] |
225 | EXPORT DMA1_Channel5_IRQHandler [WEAK] |
225 | EXPORT DMA1_Channel6_IRQHandler [WEAK] |
226 | EXPORT DMA1_Channel6_IRQHandler [WEAK] |
226 | EXPORT DMA1_Channel7_IRQHandler [WEAK] |
227 | EXPORT DMA1_Channel7_IRQHandler [WEAK] |
227 | EXPORT ADC1_2_IRQHandler [WEAK] |
228 | EXPORT ADC1_2_IRQHandler [WEAK] |
228 | EXPORT CAN1_TX_IRQHandler [WEAK] |
229 | EXPORT CAN1_TX_IRQHandler [WEAK] |
229 | EXPORT CAN1_RX0_IRQHandler [WEAK] |
230 | EXPORT CAN1_RX0_IRQHandler [WEAK] |
230 | EXPORT CAN1_RX1_IRQHandler [WEAK] |
231 | EXPORT CAN1_RX1_IRQHandler [WEAK] |
231 | EXPORT CAN1_SCE_IRQHandler [WEAK] |
232 | EXPORT CAN1_SCE_IRQHandler [WEAK] |
232 | EXPORT EXTI9_5_IRQHandler [WEAK] |
233 | EXPORT EXTI9_5_IRQHandler [WEAK] |
233 | EXPORT TIM1_BRK_IRQHandler [WEAK] |
234 | EXPORT TIM1_BRK_IRQHandler [WEAK] |
234 | EXPORT TIM1_UP_IRQHandler [WEAK] |
235 | EXPORT TIM1_UP_IRQHandler [WEAK] |
235 | EXPORT TIM1_TRG_COM_IRQHandler [WEAK] |
236 | EXPORT TIM1_TRG_COM_IRQHandler [WEAK] |
236 | EXPORT TIM1_CC_IRQHandler [WEAK] |
237 | EXPORT TIM1_CC_IRQHandler [WEAK] |
237 | EXPORT TIM2_IRQHandler [WEAK] |
238 | EXPORT TIM2_IRQHandler [WEAK] |
238 | EXPORT TIM3_IRQHandler [WEAK] |
239 | EXPORT TIM3_IRQHandler [WEAK] |
239 | EXPORT TIM4_IRQHandler [WEAK] |
240 | EXPORT TIM4_IRQHandler [WEAK] |
240 | EXPORT I2C1_EV_IRQHandler [WEAK] |
241 | EXPORT I2C1_EV_IRQHandler [WEAK] |
241 | EXPORT I2C1_ER_IRQHandler [WEAK] |
242 | EXPORT I2C1_ER_IRQHandler [WEAK] |
242 | EXPORT I2C2_EV_IRQHandler [WEAK] |
243 | EXPORT I2C2_EV_IRQHandler [WEAK] |
243 | EXPORT I2C2_ER_IRQHandler [WEAK] |
244 | EXPORT I2C2_ER_IRQHandler [WEAK] |
244 | EXPORT SPI1_IRQHandler [WEAK] |
245 | EXPORT SPI1_IRQHandler [WEAK] |
245 | EXPORT SPI2_IRQHandler [WEAK] |
246 | EXPORT SPI2_IRQHandler [WEAK] |
246 | EXPORT USART1_IRQHandler [WEAK] |
247 | EXPORT USART1_IRQHandler [WEAK] |
247 | EXPORT USART2_IRQHandler [WEAK] |
248 | EXPORT USART2_IRQHandler [WEAK] |
248 | EXPORT USART3_IRQHandler [WEAK] |
249 | EXPORT USART3_IRQHandler [WEAK] |
249 | EXPORT EXTI15_10_IRQHandler [WEAK] |
250 | EXPORT EXTI15_10_IRQHandler [WEAK] |
250 | EXPORT RTC_Alarm_IRQHandler [WEAK] |
251 | EXPORT RTC_Alarm_IRQHandler [WEAK] |
251 | EXPORT OTG_FS_WKUP_IRQHandler [WEAK] |
252 | EXPORT OTG_FS_WKUP_IRQHandler [WEAK] |
252 | EXPORT TIM5_IRQHandler [WEAK] |
253 | EXPORT TIM5_IRQHandler [WEAK] |
253 | EXPORT SPI3_IRQHandler [WEAK] |
254 | EXPORT SPI3_IRQHandler [WEAK] |
254 | EXPORT UART4_IRQHandler [WEAK] |
255 | EXPORT UART4_IRQHandler [WEAK] |
255 | EXPORT UART5_IRQHandler [WEAK] |
256 | EXPORT UART5_IRQHandler [WEAK] |
256 | EXPORT TIM6_IRQHandler [WEAK] |
257 | EXPORT TIM6_IRQHandler [WEAK] |
257 | EXPORT TIM7_IRQHandler [WEAK] |
258 | EXPORT TIM7_IRQHandler [WEAK] |
258 | EXPORT DMA2_Channel1_IRQHandler [WEAK] |
259 | EXPORT DMA2_Channel1_IRQHandler [WEAK] |
259 | EXPORT DMA2_Channel2_IRQHandler [WEAK] |
260 | EXPORT DMA2_Channel2_IRQHandler [WEAK] |
260 | EXPORT DMA2_Channel3_IRQHandler [WEAK] |
261 | EXPORT DMA2_Channel3_IRQHandler [WEAK] |
261 | EXPORT DMA2_Channel4_IRQHandler [WEAK] |
262 | EXPORT DMA2_Channel4_IRQHandler [WEAK] |
262 | EXPORT DMA2_Channel5_IRQHandler [WEAK] |
263 | EXPORT DMA2_Channel5_IRQHandler [WEAK] |
263 | EXPORT ETH_IRQHandler [WEAK] |
264 | EXPORT ETH_IRQHandler [WEAK] |
264 | EXPORT ETH_WKUP_IRQHandler [WEAK] |
265 | EXPORT ETH_WKUP_IRQHandler [WEAK] |
265 | EXPORT CAN2_TX_IRQHandler [WEAK] |
266 | EXPORT CAN2_TX_IRQHandler [WEAK] |
266 | EXPORT CAN2_RX0_IRQHandler [WEAK] |
267 | EXPORT CAN2_RX0_IRQHandler [WEAK] |
267 | EXPORT CAN2_RX1_IRQHandler [WEAK] |
268 | EXPORT CAN2_RX1_IRQHandler [WEAK] |
268 | EXPORT CAN2_SCE_IRQHandler [WEAK] |
269 | EXPORT CAN2_SCE_IRQHandler [WEAK] |
269 | EXPORT OTG_FS_IRQHandler [WEAK] |
270 | EXPORT OTG_FS_IRQHandler [WEAK] |
270 | |
271 | 271 | WWDG_IRQHandler |
|
272 | WWDG_IRQHandler |
272 | PVD_IRQHandler |
273 | PVD_IRQHandler |
273 | TAMPER_IRQHandler |
274 | TAMPER_IRQHandler |
274 | RTC_IRQHandler |
275 | RTC_IRQHandler |
275 | FLASH_IRQHandler |
276 | FLASH_IRQHandler |
276 | RCC_IRQHandler |
277 | RCC_IRQHandler |
277 | EXTI0_IRQHandler |
278 | EXTI0_IRQHandler |
278 | EXTI1_IRQHandler |
279 | EXTI1_IRQHandler |
279 | EXTI2_IRQHandler |
280 | EXTI2_IRQHandler |
280 | EXTI3_IRQHandler |
281 | EXTI3_IRQHandler |
281 | EXTI4_IRQHandler |
282 | EXTI4_IRQHandler |
282 | DMA1_Channel1_IRQHandler |
283 | DMA1_Channel1_IRQHandler |
283 | DMA1_Channel2_IRQHandler |
284 | DMA1_Channel2_IRQHandler |
284 | DMA1_Channel3_IRQHandler |
285 | DMA1_Channel3_IRQHandler |
285 | DMA1_Channel4_IRQHandler |
286 | DMA1_Channel4_IRQHandler |
286 | DMA1_Channel5_IRQHandler |
287 | DMA1_Channel5_IRQHandler |
287 | DMA1_Channel6_IRQHandler |
288 | DMA1_Channel6_IRQHandler |
288 | DMA1_Channel7_IRQHandler |
289 | DMA1_Channel7_IRQHandler |
289 | ADC1_2_IRQHandler |
290 | ADC1_2_IRQHandler |
290 | CAN1_TX_IRQHandler |
291 | CAN1_TX_IRQHandler |
291 | CAN1_RX0_IRQHandler |
292 | CAN1_RX0_IRQHandler |
292 | CAN1_RX1_IRQHandler |
293 | CAN1_RX1_IRQHandler |
293 | CAN1_SCE_IRQHandler |
294 | CAN1_SCE_IRQHandler |
294 | EXTI9_5_IRQHandler |
295 | EXTI9_5_IRQHandler |
295 | TIM1_BRK_IRQHandler |
296 | TIM1_BRK_IRQHandler |
296 | TIM1_UP_IRQHandler |
297 | TIM1_UP_IRQHandler |
297 | TIM1_TRG_COM_IRQHandler |
298 | TIM1_TRG_COM_IRQHandler |
298 | TIM1_CC_IRQHandler |
299 | TIM1_CC_IRQHandler |
299 | TIM2_IRQHandler |
300 | TIM2_IRQHandler |
300 | TIM3_IRQHandler |
301 | TIM3_IRQHandler |
301 | TIM4_IRQHandler |
302 | TIM4_IRQHandler |
302 | I2C1_EV_IRQHandler |
303 | I2C1_EV_IRQHandler |
303 | I2C1_ER_IRQHandler |
304 | I2C1_ER_IRQHandler |
304 | I2C2_EV_IRQHandler |
305 | I2C2_EV_IRQHandler |
305 | I2C2_ER_IRQHandler |
306 | I2C2_ER_IRQHandler |
306 | SPI1_IRQHandler |
307 | SPI1_IRQHandler |
307 | SPI2_IRQHandler |
308 | SPI2_IRQHandler |
308 | USART1_IRQHandler |
309 | USART1_IRQHandler |
309 | USART2_IRQHandler |
310 | USART2_IRQHandler |
310 | USART3_IRQHandler |
311 | USART3_IRQHandler |
311 | EXTI15_10_IRQHandler |
312 | EXTI15_10_IRQHandler |
312 | RTC_Alarm_IRQHandler |
313 | RTC_Alarm_IRQHandler |
313 | OTG_FS_WKUP_IRQHandler |
314 | OTG_FS_WKUP_IRQHandler |
314 | TIM5_IRQHandler |
315 | TIM5_IRQHandler |
315 | SPI3_IRQHandler |
316 | SPI3_IRQHandler |
316 | UART4_IRQHandler |
317 | UART4_IRQHandler |
317 | UART5_IRQHandler |
318 | UART5_IRQHandler |
318 | TIM6_IRQHandler |
319 | TIM6_IRQHandler |
319 | TIM7_IRQHandler |
320 | TIM7_IRQHandler |
320 | DMA2_Channel1_IRQHandler |
321 | DMA2_Channel1_IRQHandler |
321 | DMA2_Channel2_IRQHandler |
322 | DMA2_Channel2_IRQHandler |
322 | DMA2_Channel3_IRQHandler |
323 | DMA2_Channel3_IRQHandler |
323 | DMA2_Channel4_IRQHandler |
324 | DMA2_Channel4_IRQHandler |
324 | DMA2_Channel5_IRQHandler |
325 | DMA2_Channel5_IRQHandler |
325 | ETH_IRQHandler |
326 | ETH_IRQHandler |
326 | ETH_WKUP_IRQHandler |
327 | ETH_WKUP_IRQHandler |
327 | CAN2_TX_IRQHandler |
328 | CAN2_TX_IRQHandler |
328 | CAN2_RX0_IRQHandler |
329 | CAN2_RX0_IRQHandler |
329 | CAN2_RX1_IRQHandler |
330 | CAN2_RX1_IRQHandler |
330 | CAN2_SCE_IRQHandler |
331 | CAN2_SCE_IRQHandler |
331 | OTG_FS_IRQHandler |
332 | OTG_FS_IRQHandler |
332 | |
333 | 333 | B . |
|
334 | B . |
334 | |
335 | 335 | ENDP |
|
336 | ENDP |
336 | |
337 | 337 | ALIGN |
|
338 | ALIGN |
338 | |
339 | 339 | ;******************************************************************************* |
|
340 | ;******************************************************************************* |
340 | ; User Stack and Heap initialization |
341 | ; User Stack and Heap initialization |
341 | ;******************************************************************************* |
342 | ;******************************************************************************* |
342 | IF :DEF:__MICROLIB |
343 | IF :DEF:__MICROLIB |
343 | |
344 | 344 | EXPORT __initial_sp |
|
345 | EXPORT __initial_sp |
345 | EXPORT __heap_base |
346 | EXPORT __heap_base |
346 | EXPORT __heap_limit |
347 | EXPORT __heap_limit |
347 | |
348 | 348 | ELSE |
|
349 | ELSE |
349 | |
350 | 350 | IMPORT __use_two_region_memory |
|
351 | IMPORT __use_two_region_memory |
351 | EXPORT __user_initial_stackheap |
352 | EXPORT __user_initial_stackheap |
352 | |
353 | 353 | __user_initial_stackheap |
|
354 | __user_initial_stackheap |
354 | |
355 | 355 | LDR R0, = Heap_Mem |
|
356 | LDR R0, = Heap_Mem |
356 | LDR R1, =(Stack_Mem + Stack_Size) |
357 | LDR R1, =(Stack_Mem + Stack_Size) |
357 | LDR R2, = (Heap_Mem + Heap_Size) |
358 | LDR R2, = (Heap_Mem + Heap_Size) |
358 | LDR R3, = Stack_Mem |
359 | LDR R3, = Stack_Mem |
359 | BX LR |
360 | BX LR |
360 | |
361 | 361 | ALIGN |
|
362 | ALIGN |
362 | |
363 | 363 | ENDIF |
|
364 | ENDIF |
364 | |
365 | 365 | END |
|
366 | END |
366 | |
367 | - | ||
368 | ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
- |