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1 
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
1 
;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
2 
;* File Name          : startup_stm32f100xe.s
2 
;* File Name          : startup_stm32f100xe.s
3 
;* Author             : MCD Application Team
3 
;* Author             : MCD Application Team
4 
;* Description        : STM32F100xE Devices vector table for MDK-ARM toolchain.
4 
;* Description        : STM32F100xE Devices vector table for MDK-ARM toolchain.
5 
;*                      This module performs:
5 
;*                      This module performs:
6 
;*                      - Set the initial SP
6 
;*                      - Set the initial SP
7 
;*                      - Set the initial PC == Reset_Handler
7 
;*                      - Set the initial PC == Reset_Handler
8 
;*                      - Set the vector table entries with the exceptions ISR address
8 
;*                      - Set the vector table entries with the exceptions ISR address
9 
;*                      - Configure the clock system and also configure the external
9 
;*                      - Configure the clock system and also configure the external
10 
;*                        SRAM mounted on STM32100E-EVAL board to be used as data
10 
;*                        SRAM mounted on STM32100E-EVAL board to be used as data
11 
;*                        memory (optional, to be enabled by user)
11 
;*                        memory (optional, to be enabled by user)
12 
;*                      - Branches to __main in the C library (which eventually
12 
;*                      - Branches to __main in the C library (which eventually
13 
;*                        calls main()).
13 
;*                        calls main()).
14 
;*                      After Reset the Cortex-M3 processor is in Thread mode,
14 
;*                      After Reset the Cortex-M3 processor is in Thread mode,
15 
;*                      priority is Privileged, and the Stack is set to Main.
15 
;*                      priority is Privileged, and the Stack is set to Main.
16 
;******************************************************************************
16 
;******************************************************************************
17 
;* @attention
17 
;* @attention
18 
;*
18 
;*
19 
;* Copyright (c) 2017 STMicroelectronics.
19 
;* Copyright (c) 2017-2021 STMicroelectronics.
20 
;* All rights reserved.
20 
;* All rights reserved.
21 
;*
21 
;*
22 
;* This software component is licensed by ST under BSD 3-Clause license,
22 
;* This software is licensed under terms that can be found in the LICENSE file
23 
;* the "License"; You may not use this file except in compliance with the
23 
;* in the root directory of this software component.
24 
;* License. You may obtain a copy of the License at:
24 
;* If no LICENSE file comes with this software, it is provided AS-IS.
25 
;*                        opensource.org/licenses/BSD-3-Clause
25 
;*
26 
;*
26 
;******************************************************************************
27 
;******************************************************************************
27 
 
28
28 
; Amount of memory (in bytes) allocated for Stack
29 
; Amount of memory (in bytes) allocated for Stack
29 
; Tailor this value to your application needs
30 
; Tailor this value to your application needs
30 
; <h> Stack Configuration
31 
; <h> Stack Configuration
31 
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
32 
;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
32 
; </h>
33 
; </h>
33 
 
34
34 
Stack_Size      EQU     0x00000400
35 
Stack_Size      EQU     0x00000400
 35 
 
36 
 
 36 
                AREA    STACK, NOINIT, READWRITE, ALIGN=3
37 
                AREA    STACK, NOINIT, READWRITE, ALIGN=3
 37 
Stack_Mem       SPACE   Stack_Size
38 
Stack_Mem       SPACE   Stack_Size
 38 
__initial_sp
39 
__initial_sp
 39 
 
40 
 
 40 
 
41 
 
 41 
; <h> Heap Configuration
42 
; <h> Heap Configuration
42 
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 
;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
43 
; </h>
44 
; </h>
44 
 
45
45 
Heap_Size       EQU     0x00000200
46 
Heap_Size       EQU     0x00000200
 46 
 
47 
 
 47 
                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
48 
                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
 48 
__heap_base
49 
__heap_base
 49 
Heap_Mem        SPACE   Heap_Size
50 
Heap_Mem        SPACE   Heap_Size
 50 
__heap_limit
51 
__heap_limit
 51 
 
52 
 
 52 
                PRESERVE8
53 
                PRESERVE8
53 
                THUMB
54 
                THUMB
54 
 
55 
 
 55 
 
56 
 
 56 
; Vector Table Mapped to Address 0 at Reset
57 
; Vector Table Mapped to Address 0 at Reset
57 
                AREA    RESET, DATA, READONLY
58 
                AREA    RESET, DATA, READONLY
58 
                EXPORT  __Vectors
59 
                EXPORT  __Vectors
 59 
                EXPORT  __Vectors_End
60 
                EXPORT  __Vectors_End
 60 
                EXPORT  __Vectors_Size
61 
                EXPORT  __Vectors_Size
 61 
 
62 
 
 62 
__Vectors       DCD     __initial_sp                    ; Top of Stack
63 
__Vectors       DCD     __initial_sp                    ; Top of Stack
63 
                DCD     Reset_Handler                   ; Reset Handler
64 
                DCD     Reset_Handler                   ; Reset Handler
64 
                DCD     NMI_Handler                     ; NMI Handler
65 
                DCD     NMI_Handler                     ; NMI Handler
65 
                DCD     HardFault_Handler               ; Hard Fault Handler
66 
                DCD     HardFault_Handler               ; Hard Fault Handler
66 
                DCD     MemManage_Handler               ; MPU Fault Handler
67 
                DCD     MemManage_Handler               ; MPU Fault Handler
67 
                DCD     BusFault_Handler                ; Bus Fault Handler
68 
                DCD     BusFault_Handler                ; Bus Fault Handler
68 
                DCD     UsageFault_Handler              ; Usage Fault Handler
69 
                DCD     UsageFault_Handler              ; Usage Fault Handler
69 
                DCD     0                               ; Reserved
70 
                DCD     0                               ; Reserved
70 
                DCD     0                               ; Reserved
71 
                DCD     0                               ; Reserved
71 
                DCD     0                               ; Reserved
72 
                DCD     0                               ; Reserved
72 
                DCD     0                               ; Reserved
73 
                DCD     0                               ; Reserved
73 
                DCD     SVC_Handler                     ; SVCall Handler
74 
                DCD     SVC_Handler                     ; SVCall Handler
74 
                DCD     DebugMon_Handler                ; Debug Monitor Handler
75 
                DCD     DebugMon_Handler                ; Debug Monitor Handler
75 
                DCD     0                               ; Reserved
76 
                DCD     0                               ; Reserved
76 
                DCD     PendSV_Handler                  ; PendSV Handler
77 
                DCD     PendSV_Handler                  ; PendSV Handler
77 
                DCD     SysTick_Handler                 ; SysTick Handler
78 
                DCD     SysTick_Handler                 ; SysTick Handler
78 
 
79 
 
 79 
                ; External Interrupts
80 
                ; External Interrupts
80 
                DCD     WWDG_IRQHandler                 ; Window Watchdog
81 
                DCD     WWDG_IRQHandler                 ; Window Watchdog
81 
                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
82 
                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
82 
                DCD     TAMPER_IRQHandler               ; Tamper
83 
                DCD     TAMPER_IRQHandler               ; Tamper
83 
                DCD     RTC_IRQHandler                  ; RTC
84 
                DCD     RTC_IRQHandler                  ; RTC
84 
                DCD     FLASH_IRQHandler                ; Flash
85 
                DCD     FLASH_IRQHandler                ; Flash
85 
                DCD     RCC_IRQHandler                  ; RCC
86 
                DCD     RCC_IRQHandler                  ; RCC
86 
                DCD     EXTI0_IRQHandler                ; EXTI Line 0
87 
                DCD     EXTI0_IRQHandler                ; EXTI Line 0
87 
                DCD     EXTI1_IRQHandler                ; EXTI Line 1
88 
                DCD     EXTI1_IRQHandler                ; EXTI Line 1
88 
                DCD     EXTI2_IRQHandler                ; EXTI Line 2
89 
                DCD     EXTI2_IRQHandler                ; EXTI Line 2
89 
                DCD     EXTI3_IRQHandler                ; EXTI Line 3
90 
                DCD     EXTI3_IRQHandler                ; EXTI Line 3
90 
                DCD     EXTI4_IRQHandler                ; EXTI Line 4
91 
                DCD     EXTI4_IRQHandler                ; EXTI Line 4
91 
                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
92 
                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
92 
                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
93 
                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
93 
                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
94 
                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
94 
                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
95 
                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
95 
                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
96 
                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
96 
                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
97 
                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
97 
                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
98 
                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
98 
                DCD     ADC1_IRQHandler                 ; ADC1
99 
                DCD     ADC1_IRQHandler                 ; ADC1
99 
                DCD     0                               ; Reserved
100 
                DCD     0                               ; Reserved
100 
                DCD     0                               ; Reserved
101 
                DCD     0                               ; Reserved
101 
                DCD     0                               ; Reserved
102 
                DCD     0                               ; Reserved
102 
                DCD     0                               ; Reserved
103 
                DCD     0                               ; Reserved
103 
                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
104 
                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
104 
                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
105 
                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
105 
                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
106 
                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
106 
                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
107 
                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
107 
                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
108 
                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
108 
                DCD     TIM2_IRQHandler                 ; TIM2
109 
                DCD     TIM2_IRQHandler                 ; TIM2
109 
                DCD     TIM3_IRQHandler                 ; TIM3
110 
                DCD     TIM3_IRQHandler                 ; TIM3
110 
                DCD     TIM4_IRQHandler                 ; TIM4
111 
                DCD     TIM4_IRQHandler                 ; TIM4
111 
                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
112 
                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
112 
                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
113 
                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
113 
                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
114 
                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
114 
                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
115 
                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
115 
                DCD     SPI1_IRQHandler                 ; SPI1
116 
                DCD     SPI1_IRQHandler                 ; SPI1
116 
                DCD     SPI2_IRQHandler                 ; SPI2
117 
                DCD     SPI2_IRQHandler                 ; SPI2
117 
                DCD     USART1_IRQHandler               ; USART1
118 
                DCD     USART1_IRQHandler               ; USART1
118 
                DCD     USART2_IRQHandler               ; USART2
119 
                DCD     USART2_IRQHandler               ; USART2
119 
                DCD     USART3_IRQHandler               ; USART3
120 
                DCD     USART3_IRQHandler               ; USART3
120 
                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
121 
                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
121 
                DCD     RTC_Alarm_IRQHandler             ; RTC Alarm through EXTI Line
122 
                DCD     RTC_Alarm_IRQHandler             ; RTC Alarm through EXTI Line
122 
                DCD     CEC_IRQHandler                  ; HDMI CEC
123 
                DCD     CEC_IRQHandler                  ; HDMI CEC
123 
                DCD     TIM12_IRQHandler                ; TIM12
124 
                DCD     TIM12_IRQHandler                ; TIM12
124 
                DCD     TIM13_IRQHandler                ; TIM13
125 
                DCD     TIM13_IRQHandler                ; TIM13
125 
                DCD     TIM14_IRQHandler                ; TIM14
126 
                DCD     TIM14_IRQHandler                ; TIM14
126 
                DCD     0                               ; Reserved
127 
                DCD     0                               ; Reserved
127 
                DCD     0                               ; Reserved
128 
                DCD     0                               ; Reserved
128 
                DCD     0                               ; Reserved
129 
                DCD     0                               ; Reserved
129 
                DCD     0                               ; Reserved
130 
                DCD     0                               ; Reserved
130 
                DCD     TIM5_IRQHandler                 ; TIM5
131 
                DCD     TIM5_IRQHandler                 ; TIM5
131 
                DCD     SPI3_IRQHandler                 ; SPI3
132 
                DCD     SPI3_IRQHandler                 ; SPI3
132 
                DCD     UART4_IRQHandler                ; UART4
133 
                DCD     UART4_IRQHandler                ; UART4
133 
                DCD     UART5_IRQHandler                ; UART5
134 
                DCD     UART5_IRQHandler                ; UART5
134 
                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
135 
                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
135 
                DCD     TIM7_IRQHandler                 ; TIM7
136 
                DCD     TIM7_IRQHandler                 ; TIM7
136 
                DCD     DMA2_Channel1_IRQHandler        ; DMA2 Channel1
137 
                DCD     DMA2_Channel1_IRQHandler        ; DMA2 Channel1
137 
                DCD     DMA2_Channel2_IRQHandler        ; DMA2 Channel2
138 
                DCD     DMA2_Channel2_IRQHandler        ; DMA2 Channel2
138 
                DCD     DMA2_Channel3_IRQHandler        ; DMA2 Channel3
139 
                DCD     DMA2_Channel3_IRQHandler        ; DMA2 Channel3
139 
                DCD     DMA2_Channel4_5_IRQHandler      ; DMA2 Channel4 & Channel5
140 
                DCD     DMA2_Channel4_5_IRQHandler      ; DMA2 Channel4 & Channel5
140 
                DCD     DMA2_Channel5_IRQHandler        ; DMA2 Channel5
141 
                DCD     DMA2_Channel5_IRQHandler        ; DMA2 Channel5
141 
__Vectors_End
142 
__Vectors_End
 142 
 
143 
 
 143 
__Vectors_Size  EQU  __Vectors_End - __Vectors
144 
__Vectors_Size  EQU  __Vectors_End - __Vectors
 144 
 
145 
 
 145 
                AREA    |.text|, CODE, READONLY
146 
                AREA    |.text|, CODE, READONLY
 146 
 
147 
 
 147 
; Reset handler
148 
; Reset handler
148 
Reset_Handler    PROC
149 
Reset_Handler    PROC
149 
                 EXPORT  Reset_Handler             [WEAK]
150 
                 EXPORT  Reset_Handler             [WEAK]
 150 
     IMPORT  __main
151 
     IMPORT  __main
 151 
     IMPORT  SystemInit
152 
     IMPORT  SystemInit
 152 
                 LDR     R0, =SystemInit
153 
                 LDR     R0, =SystemInit
 153 
                 BLX     R0
154 
                 BLX     R0
 154 
                 LDR     R0, =__main
155 
                 LDR     R0, =__main
 155 
                 BX      R0
156 
                 BX      R0
 156 
                 ENDP
157 
                 ENDP
157 
 
158 
 
 158 
; Dummy Exception Handlers (infinite loops which can be modified)
159 
; Dummy Exception Handlers (infinite loops which can be modified)
159 
 
160
160 
NMI_Handler     PROC
161 
NMI_Handler     PROC
 161 
                EXPORT  NMI_Handler                      [WEAK]
162 
                EXPORT  NMI_Handler                      [WEAK]
 162 
                B       .
163 
                B       .
 163 
                ENDP
164 
                ENDP
164 
HardFault_Handler\
165 
HardFault_Handler\
 165 
                PROC
166 
                PROC
166 
                EXPORT  HardFault_Handler                [WEAK]
167 
                EXPORT  HardFault_Handler                [WEAK]
 167 
                B       .
168 
                B       .
 168 
                ENDP
169 
                ENDP
169 
MemManage_Handler\
170 
MemManage_Handler\
 170 
                PROC
171 
                PROC
171 
                EXPORT  MemManage_Handler                [WEAK]
172 
                EXPORT  MemManage_Handler                [WEAK]
 172 
                B       .
173 
                B       .
 173 
                ENDP
174 
                ENDP
174 
BusFault_Handler\
175 
BusFault_Handler\
 175 
                PROC
176 
                PROC
176 
                EXPORT  BusFault_Handler                 [WEAK]
177 
                EXPORT  BusFault_Handler                 [WEAK]
 177 
                B       .
178 
                B       .
 178 
                ENDP
179 
                ENDP
179 
UsageFault_Handler\
180 
UsageFault_Handler\
 180 
                PROC
181 
                PROC
181 
                EXPORT  UsageFault_Handler               [WEAK]
182 
                EXPORT  UsageFault_Handler               [WEAK]
 182 
                B       .
183 
                B       .
 183 
                ENDP
184 
                ENDP
184 
SVC_Handler     PROC
185 
SVC_Handler     PROC
 185 
                EXPORT  SVC_Handler                      [WEAK]
186 
                EXPORT  SVC_Handler                      [WEAK]
 186 
                B       .
187 
                B       .
 187 
                ENDP
188 
                ENDP
188 
DebugMon_Handler\
189 
DebugMon_Handler\
 189 
                PROC
190 
                PROC
190 
                EXPORT  DebugMon_Handler                 [WEAK]
191 
                EXPORT  DebugMon_Handler                 [WEAK]
 191 
                B       .
192 
                B       .
 192 
                ENDP
193 
                ENDP
193 
PendSV_Handler  PROC
194 
PendSV_Handler  PROC
 194 
                EXPORT  PendSV_Handler                   [WEAK]
195 
                EXPORT  PendSV_Handler                   [WEAK]
 195 
                B       .
196 
                B       .
 196 
                ENDP
197 
                ENDP
197 
SysTick_Handler PROC
198 
SysTick_Handler PROC
 198 
                EXPORT  SysTick_Handler                  [WEAK]
199 
                EXPORT  SysTick_Handler                  [WEAK]
 199 
                B       .
200 
                B       .
 200 
                ENDP
201 
                ENDP
201 
 
202 
 
 202 
Default_Handler PROC
203 
Default_Handler PROC
 203 
 
204 
 
 204 
                EXPORT  WWDG_IRQHandler                  [WEAK]
205 
                EXPORT  WWDG_IRQHandler                  [WEAK]
 205 
                EXPORT  PVD_IRQHandler                   [WEAK]
206 
                EXPORT  PVD_IRQHandler                   [WEAK]
 206 
                EXPORT  TAMPER_IRQHandler                [WEAK]
207 
                EXPORT  TAMPER_IRQHandler                [WEAK]
 207 
                EXPORT  RTC_IRQHandler                   [WEAK]
208 
                EXPORT  RTC_IRQHandler                   [WEAK]
 208 
                EXPORT  FLASH_IRQHandler                 [WEAK]
209 
                EXPORT  FLASH_IRQHandler                 [WEAK]
 209 
                EXPORT  RCC_IRQHandler                   [WEAK]
210 
                EXPORT  RCC_IRQHandler                   [WEAK]
 210 
                EXPORT  EXTI0_IRQHandler                 [WEAK]
211 
                EXPORT  EXTI0_IRQHandler                 [WEAK]
 211 
                EXPORT  EXTI1_IRQHandler                 [WEAK]
212 
                EXPORT  EXTI1_IRQHandler                 [WEAK]
 212 
                EXPORT  EXTI2_IRQHandler                 [WEAK]
213 
                EXPORT  EXTI2_IRQHandler                 [WEAK]
 213 
                EXPORT  EXTI3_IRQHandler                 [WEAK]
214 
                EXPORT  EXTI3_IRQHandler                 [WEAK]
 214 
                EXPORT  EXTI4_IRQHandler                 [WEAK]
215 
                EXPORT  EXTI4_IRQHandler                 [WEAK]
 215 
                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
216 
                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
 216 
                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
217 
                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
 217 
                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
218 
                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
 218 
                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
219 
                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
 219 
                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
220 
                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
 220 
                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
221 
                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
 221 
                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
222 
                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
 222 
                EXPORT  ADC1_IRQHandler                  [WEAK]
223 
                EXPORT  ADC1_IRQHandler                  [WEAK]
 223 
                EXPORT  EXTI9_5_IRQHandler               [WEAK]
224 
                EXPORT  EXTI9_5_IRQHandler               [WEAK]
 224 
                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
225 
                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
 225 
                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
226 
                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
 226 
                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
227 
                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
 227 
                EXPORT  TIM1_CC_IRQHandler               [WEAK]
228 
                EXPORT  TIM1_CC_IRQHandler               [WEAK]
 228 
                EXPORT  TIM2_IRQHandler                  [WEAK]
229 
                EXPORT  TIM2_IRQHandler                  [WEAK]
 229 
                EXPORT  TIM3_IRQHandler                  [WEAK]
230 
                EXPORT  TIM3_IRQHandler                  [WEAK]
 230 
                EXPORT  TIM4_IRQHandler                  [WEAK]
231 
                EXPORT  TIM4_IRQHandler                  [WEAK]
 231 
                EXPORT  I2C1_EV_IRQHandler               [WEAK]
232 
                EXPORT  I2C1_EV_IRQHandler               [WEAK]
 232 
                EXPORT  I2C1_ER_IRQHandler               [WEAK]
233 
                EXPORT  I2C1_ER_IRQHandler               [WEAK]
 233 
                EXPORT  I2C2_EV_IRQHandler               [WEAK]
234 
                EXPORT  I2C2_EV_IRQHandler               [WEAK]
 234 
                EXPORT  I2C2_ER_IRQHandler               [WEAK]
235 
                EXPORT  I2C2_ER_IRQHandler               [WEAK]
 235 
                EXPORT  SPI1_IRQHandler                  [WEAK]
236 
                EXPORT  SPI1_IRQHandler                  [WEAK]
 236 
                EXPORT  SPI2_IRQHandler                  [WEAK]
237 
                EXPORT  SPI2_IRQHandler                  [WEAK]
 237 
                EXPORT  USART1_IRQHandler                [WEAK]
238 
                EXPORT  USART1_IRQHandler                [WEAK]
 238 
                EXPORT  USART2_IRQHandler                [WEAK]
239 
                EXPORT  USART2_IRQHandler                [WEAK]
 239 
                EXPORT  USART3_IRQHandler                [WEAK]
240 
                EXPORT  USART3_IRQHandler                [WEAK]
 240 
                EXPORT  EXTI15_10_IRQHandler             [WEAK]
241 
                EXPORT  EXTI15_10_IRQHandler             [WEAK]
 241 
                EXPORT  RTC_Alarm_IRQHandler             [WEAK]
242 
                EXPORT  RTC_Alarm_IRQHandler             [WEAK]
 242 
                EXPORT  CEC_IRQHandler                   [WEAK]
243 
                EXPORT  CEC_IRQHandler                   [WEAK]
 243 
                EXPORT  TIM12_IRQHandler                 [WEAK]
244 
                EXPORT  TIM12_IRQHandler                 [WEAK]
 244 
                EXPORT  TIM13_IRQHandler                 [WEAK]
245 
                EXPORT  TIM13_IRQHandler                 [WEAK]
 245 
                EXPORT  TIM14_IRQHandler                 [WEAK]
246 
                EXPORT  TIM14_IRQHandler                 [WEAK]
 246 
                EXPORT  TIM5_IRQHandler                  [WEAK]
247 
                EXPORT  TIM5_IRQHandler                  [WEAK]
 247 
                EXPORT  SPI3_IRQHandler                  [WEAK]
248 
                EXPORT  SPI3_IRQHandler                  [WEAK]
 248 
                EXPORT  UART4_IRQHandler                 [WEAK]
249 
                EXPORT  UART4_IRQHandler                 [WEAK]
 249 
                EXPORT  UART5_IRQHandler                 [WEAK]
250 
                EXPORT  UART5_IRQHandler                 [WEAK]
 250 
                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
251 
                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
 251 
                EXPORT  TIM7_IRQHandler                  [WEAK]
252 
                EXPORT  TIM7_IRQHandler                  [WEAK]
 252 
                EXPORT  DMA2_Channel1_IRQHandler         [WEAK]
253 
                EXPORT  DMA2_Channel1_IRQHandler         [WEAK]
 253 
                EXPORT  DMA2_Channel2_IRQHandler         [WEAK]
254 
                EXPORT  DMA2_Channel2_IRQHandler         [WEAK]
 254 
                EXPORT  DMA2_Channel3_IRQHandler         [WEAK]
255 
                EXPORT  DMA2_Channel3_IRQHandler         [WEAK]
 255 
                EXPORT  DMA2_Channel4_5_IRQHandler       [WEAK]
256 
                EXPORT  DMA2_Channel4_5_IRQHandler       [WEAK]
 256 
                EXPORT  DMA2_Channel5_IRQHandler         [WEAK]
257 
                EXPORT  DMA2_Channel5_IRQHandler         [WEAK]
 257 
 
258 
 
 258 
WWDG_IRQHandler
259 
WWDG_IRQHandler
 259 
PVD_IRQHandler
260 
PVD_IRQHandler
 260 
TAMPER_IRQHandler
261 
TAMPER_IRQHandler
 261 
RTC_IRQHandler
262 
RTC_IRQHandler
 262 
FLASH_IRQHandler
263 
FLASH_IRQHandler
 263 
RCC_IRQHandler
264 
RCC_IRQHandler
 264 
EXTI0_IRQHandler
265 
EXTI0_IRQHandler
 265 
EXTI1_IRQHandler
266 
EXTI1_IRQHandler
 266 
EXTI2_IRQHandler
267 
EXTI2_IRQHandler
 267 
EXTI3_IRQHandler
268 
EXTI3_IRQHandler
 268 
EXTI4_IRQHandler
269 
EXTI4_IRQHandler
 269 
DMA1_Channel1_IRQHandler
270 
DMA1_Channel1_IRQHandler
 270 
DMA1_Channel2_IRQHandler
271 
DMA1_Channel2_IRQHandler
 271 
DMA1_Channel3_IRQHandler
272 
DMA1_Channel3_IRQHandler
 272 
DMA1_Channel4_IRQHandler
273 
DMA1_Channel4_IRQHandler
 273 
DMA1_Channel5_IRQHandler
274 
DMA1_Channel5_IRQHandler
 274 
DMA1_Channel6_IRQHandler
275 
DMA1_Channel6_IRQHandler
 275 
DMA1_Channel7_IRQHandler
276 
DMA1_Channel7_IRQHandler
 276 
ADC1_IRQHandler
277 
ADC1_IRQHandler
 277 
EXTI9_5_IRQHandler
278 
EXTI9_5_IRQHandler
 278 
TIM1_BRK_TIM15_IRQHandler
279 
TIM1_BRK_TIM15_IRQHandler
 279 
TIM1_UP_TIM16_IRQHandler
280 
TIM1_UP_TIM16_IRQHandler
 280 
TIM1_TRG_COM_TIM17_IRQHandler
281 
TIM1_TRG_COM_TIM17_IRQHandler
 281 
TIM1_CC_IRQHandler
282 
TIM1_CC_IRQHandler
 282 
TIM2_IRQHandler
283 
TIM2_IRQHandler
 283 
TIM3_IRQHandler
284 
TIM3_IRQHandler
 284 
TIM4_IRQHandler
285 
TIM4_IRQHandler
 285 
I2C1_EV_IRQHandler
286 
I2C1_EV_IRQHandler
 286 
I2C1_ER_IRQHandler
287 
I2C1_ER_IRQHandler
 287 
I2C2_EV_IRQHandler
288 
I2C2_EV_IRQHandler
 288 
I2C2_ER_IRQHandler
289 
I2C2_ER_IRQHandler
 289 
SPI1_IRQHandler
290 
SPI1_IRQHandler
 290 
SPI2_IRQHandler
291 
SPI2_IRQHandler
 291 
USART1_IRQHandler
292 
USART1_IRQHandler
 292 
USART2_IRQHandler
293 
USART2_IRQHandler
 293 
USART3_IRQHandler
294 
USART3_IRQHandler
 294 
EXTI15_10_IRQHandler
295 
EXTI15_10_IRQHandler
 295 
RTC_Alarm_IRQHandler
296 
RTC_Alarm_IRQHandler
 296 
CEC_IRQHandler
297 
CEC_IRQHandler
 297 
TIM12_IRQHandler
298 
TIM12_IRQHandler
 298 
TIM13_IRQHandler
299 
TIM13_IRQHandler
 299 
TIM14_IRQHandler
300 
TIM14_IRQHandler
 300 
TIM5_IRQHandler
301 
TIM5_IRQHandler
 301 
SPI3_IRQHandler
302 
SPI3_IRQHandler
 302 
UART4_IRQHandler
303 
UART4_IRQHandler
 303 
UART5_IRQHandler
304 
UART5_IRQHandler
 304 
TIM6_DAC_IRQHandler
305 
TIM6_DAC_IRQHandler
 305 
TIM7_IRQHandler
306 
TIM7_IRQHandler
 306 
DMA2_Channel1_IRQHandler
307 
DMA2_Channel1_IRQHandler
 307 
DMA2_Channel2_IRQHandler
308 
DMA2_Channel2_IRQHandler
 308 
DMA2_Channel3_IRQHandler
309 
DMA2_Channel3_IRQHandler
 309 
DMA2_Channel4_5_IRQHandler
310 
DMA2_Channel4_5_IRQHandler
 310 
DMA2_Channel5_IRQHandler
311 
DMA2_Channel5_IRQHandler
 311 
                B       .
312 
                B       .
 312 
 
313 
 
 313 
                ENDP
314 
                ENDP
314 
 
315 
 
 315 
                ALIGN
316 
                ALIGN
316 
 
317 
 
 317 
;*******************************************************************************
318 
;*******************************************************************************
318 
; User Stack and Heap initialization
319 
; User Stack and Heap initialization
319 
;*******************************************************************************
320 
;*******************************************************************************
320 
                 IF      :DEF:__MICROLIB
321 
                 IF      :DEF:__MICROLIB
321
322
322 
                 EXPORT  __initial_sp
323 
                 EXPORT  __initial_sp
 323 
                 EXPORT  __heap_base
324 
                 EXPORT  __heap_base
 324 
                 EXPORT  __heap_limit
325 
                 EXPORT  __heap_limit
 325
326
326 
                 ELSE
327 
                 ELSE
327
328
328 
                 IMPORT  __use_two_region_memory
329 
                 IMPORT  __use_two_region_memory
 329 
                 EXPORT  __user_initial_stackheap
330 
                 EXPORT  __user_initial_stackheap
 330
331
331 
__user_initial_stackheap
332 
__user_initial_stackheap
 332 
 
333 
 
 333 
                 LDR     R0, =  Heap_Mem
334 
                 LDR     R0, =  Heap_Mem
 334 
                 LDR     R1, =(Stack_Mem + Stack_Size)
335 
                 LDR     R1, =(Stack_Mem + Stack_Size)
 335 
                 LDR     R2, = (Heap_Mem +  Heap_Size)
336 
                 LDR     R2, = (Heap_Mem +  Heap_Size)
 336 
                 LDR     R3, = Stack_Mem
337 
                 LDR     R3, = Stack_Mem
 337 
                 BX      LR
338 
                 BX      LR
 338 
 
339 
 
 339 
                 ALIGN
340 
                 ALIGN
340 
 
341 
 
 341 
                 ENDIF
342 
                 ENDIF
342 
 
343 
 
 343 
                 END
344 
                 END
344 
 
345 
 
 - 
 
346 
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
-