WebSVN – EDIS_Ignition – Diff – /trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h

 /**
   ******************************************************************************
   * @file    stm32f1xx.h
   * @author  MCD Application Team
   * @brief   CMSIS STM32F1xx Device Peripheral Access Layer Header File.
   *
   *          The file is the unique include file that the application programmer
   *          is using in the C source code, usually in main.c. This file contains:
   *            - Configuration section that allows to select:
   *              - The STM32F1xx device used in the target application
-  *              - To use or not the peripherals drivers in application code(i.e.
+  *              - To use or not the peripheral's drivers in application code(i.e.
-  *                code will be based on direct access to peripherals registers
+  *                code will be based on direct access to peripheral's registers
   *                rather than drivers API), this option is controlled by
   *                "#define USE_HAL_DRIVER"
   *
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
+  * Copyright (c) 2017-2021 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
+  * This software is licensed under terms that can be found in the LICENSE file
-  * the "License"; You may not use this file except in compliance with the
+  * in the root directory of this software component.
-  * License. You may obtain a copy of the License at:
+  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *                        opensource.org/licenses/BSD-3-Clause
+  *
-  *
+  ******************************************************************************
-  ******************************************************************************
+  */
-  */
+/** @addtogroup CMSIS
-/** @addtogroup CMSIS
+  * @{
-  * @{
+  */
-  */
+/** @addtogroup stm32f1xx
-/** @addtogroup stm32f1xx
+  * @{
-  * @{
+  */
-  */
+#ifndef __STM32F1XX_H
-#ifndef __STM32F1XX_H
+#define __STM32F1XX_H
-#define __STM32F1XX_H
+#ifdef __cplusplus
-#ifdef __cplusplus
+ extern "C" {
- extern "C" {
+#endif /* __cplusplus */
-#endif /* __cplusplus */
+/** @addtogroup Library_configuration_section
-/** @addtogroup Library_configuration_section
+  * @{
-  * @{
+  */
-  */
+/**
-/**
+  * @brief STM32 Family
-  * @brief STM32 Family
+  */
-  */
+#if !defined (STM32F1)
-#if !defined (STM32F1)
+#define STM32F1
-#define STM32F1
+#endif /* STM32F1 */
-#endif /* STM32F1 */
+/* Uncomment the line below according to the target STM32L device used in your
-/* Uncomment the line below according to the target STM32L device used in your
+   application
-   application
+  */
-  */
+#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
-#if !defined (STM32F100xB) && !defined (STM32F100xE) && !defined (STM32F101x6) && \
+    !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
-    !defined (STM32F101xB) && !defined (STM32F101xE) && !defined (STM32F101xG) && !defined (STM32F102x6) && !defined (STM32F102xB) && !defined (STM32F103x6) && \
+    !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
-    !defined (STM32F103xB) && !defined (STM32F103xE) && !defined (STM32F103xG) && !defined (STM32F105xC) && !defined (STM32F107xC)
+  /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
-  /* #define STM32F100xB  */   /*!< STM32F100C4, STM32F100R4, STM32F100C6, STM32F100R6, STM32F100C8, STM32F100R8, STM32F100V8, STM32F100CB, STM32F100RB and STM32F100VB */
+  /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
-  /* #define STM32F100xE */    /*!< STM32F100RC, STM32F100VC, STM32F100ZC, STM32F100RD, STM32F100VD, STM32F100ZD, STM32F100RE, STM32F100VE and STM32F100ZE */
+  /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
-  /* #define STM32F101x6  */   /*!< STM32F101C4, STM32F101R4, STM32F101T4, STM32F101C6, STM32F101R6 and STM32F101T6 Devices */
+  /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
-  /* #define STM32F101xB  */   /*!< STM32F101C8, STM32F101R8, STM32F101T8, STM32F101V8, STM32F101CB, STM32F101RB, STM32F101TB and STM32F101VB */
+  /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */
-  /* #define STM32F101xE */    /*!< STM32F101RC, STM32F101VC, STM32F101ZC, STM32F101RD, STM32F101VD, STM32F101ZD, STM32F101RE, STM32F101VE and STM32F101ZE */
+  /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
-  /* #define STM32F101xG  */   /*!< STM32F101RF, STM32F101VF, STM32F101ZF, STM32F101RG, STM32F101VG and STM32F101ZG */
+  /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
-  /* #define STM32F102x6 */    /*!< STM32F102C4, STM32F102R4, STM32F102C6 and STM32F102R6 */
+  /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
-  /* #define STM32F102xB  */   /*!< STM32F102C8, STM32F102R8, STM32F102CB and STM32F102RB */
+  /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
-  /* #define STM32F103x6  */   /*!< STM32F103C4, STM32F103R4, STM32F103T4, STM32F103C6, STM32F103R6 and STM32F103T6 */
+  /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
-  /* #define STM32F103xB  */   /*!< STM32F103C8, STM32F103R8, STM32F103T8, STM32F103V8, STM32F103CB, STM32F103RB, STM32F103TB and STM32F103VB */
+  /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
-  /* #define STM32F103xE */    /*!< STM32F103RC, STM32F103VC, STM32F103ZC, STM32F103RD, STM32F103VD, STM32F103ZD, STM32F103RE, STM32F103VE and STM32F103ZE */
+  /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
-  /* #define STM32F103xG  */   /*!< STM32F103RF, STM32F103VF, STM32F103ZF, STM32F103RG, STM32F103VG and STM32F103ZG */
+  /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
-  /* #define STM32F105xC */    /*!< STM32F105R8, STM32F105V8, STM32F105RB, STM32F105VB, STM32F105RC and STM32F105VC */
+  /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */
-  /* #define STM32F107xC  */   /*!< STM32F107RB, STM32F107VB, STM32F107RC and STM32F107VC */
+#endif
-#endif
+/*  Tip: To avoid modifying this file each time you need to switch between these
-/*  Tip: To avoid modifying this file each time you need to switch between these
+        devices, you can define the device in your toolchain compiler preprocessor.
-        devices, you can define the device in your toolchain compiler preprocessor.
+  */
-  */
+#if !defined  (USE_HAL_DRIVER)
-#if !defined  (USE_HAL_DRIVER)
+/**
-/**
+ * @brief Comment the line below if you will not use the peripherals drivers.
- * @brief Comment the line below if you will not use the peripherals drivers.
+   In this case, these drivers will not be included and the application code will
-   In this case, these drivers will not be included and the application code will
+   be based on direct access to peripherals registers
-   be based on direct access to peripherals registers
+   */
-   */
+  /*#define USE_HAL_DRIVER */
-  /*#define USE_HAL_DRIVER */
+#endif /* USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
+/**
-/**
+  * @brief CMSIS Device version number
-  * @brief CMSIS Device version number V4.3.3
+  */
-  */
+#define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
-#define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
+#define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
+#define __STM32F1_CMSIS_VERSION_SUB2   (0x04) /*!< [15:8]  sub2 version */
-#define __STM32F1_CMSIS_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
+#define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
-#define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
+#define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
-#define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
+                                       |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
-                                       |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
+                                       |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
-                                       |(__STM32F1_CMSIS_VERSION_SUB2 << 8 )\
+                                       |(__STM32F1_CMSIS_VERSION_RC))
-                                       |(__STM32F1_CMSIS_VERSION_RC))
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/** @addtogroup Device_Included
-/** @addtogroup Device_Included
+  * @{
-  * @{
+  */
-  */
+#if defined(STM32F100xB)
-#if defined(STM32F100xB)
+  #include "stm32f100xb.h"
-  #include "stm32f100xb.h"
+#elif defined(STM32F100xE)
-#elif defined(STM32F100xE)
+  #include "stm32f100xe.h"
-  #include "stm32f100xe.h"
+#elif defined(STM32F101x6)
-#elif defined(STM32F101x6)
+  #include "stm32f101x6.h"
-  #include "stm32f101x6.h"
+#elif defined(STM32F101xB)
-#elif defined(STM32F101xB)
+  #include "stm32f101xb.h"
-  #include "stm32f101xb.h"
+#elif defined(STM32F101xE)
-#elif defined(STM32F101xE)
+  #include "stm32f101xe.h"
-  #include "stm32f101xe.h"
+#elif defined(STM32F101xG)
-#elif defined(STM32F101xG)
+  #include "stm32f101xg.h"
-  #include "stm32f101xg.h"
+#elif defined(STM32F102x6)
-#elif defined(STM32F102x6)
+  #include "stm32f102x6.h"
-  #include "stm32f102x6.h"
+#elif defined(STM32F102xB)
-#elif defined(STM32F102xB)
+  #include "stm32f102xb.h"
-  #include "stm32f102xb.h"
+#elif defined(STM32F103x6)
-#elif defined(STM32F103x6)
+  #include "stm32f103x6.h"
-  #include "stm32f103x6.h"
+#elif defined(STM32F103xB)
-#elif defined(STM32F103xB)
+  #include "stm32f103xb.h"
-  #include "stm32f103xb.h"
+#elif defined(STM32F103xE)
-#elif defined(STM32F103xE)
+  #include "stm32f103xe.h"
-  #include "stm32f103xe.h"
+#elif defined(STM32F103xG)
-#elif defined(STM32F103xG)
+  #include "stm32f103xg.h"
-  #include "stm32f103xg.h"
+#elif defined(STM32F105xC)
-#elif defined(STM32F105xC)
+  #include "stm32f105xc.h"
-  #include "stm32f105xc.h"
+#elif defined(STM32F107xC)
-#elif defined(STM32F107xC)
+  #include "stm32f107xc.h"
-  #include "stm32f107xc.h"
+#else
-#else
+ #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
- #error "Please select first the target STM32F1xx device used in your application (in stm32f1xx.h file)"
+#endif
-#endif
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/** @addtogroup Exported_types
-/** @addtogroup Exported_types
+  * @{
-  * @{
+  */
-  */
+typedef enum
-typedef enum
+{
-{
+  RESET = 0,
-  RESET = 0,
+  SET = !RESET
-  SET = !RESET
+} FlagStatus, ITStatus;
-} FlagStatus, ITStatus;
+typedef enum
-typedef enum
+{
-{
+  DISABLE = 0,
-  DISABLE = 0,
+  ENABLE = !DISABLE
-  ENABLE = !DISABLE
+} FunctionalState;
-} FunctionalState;
+#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
-#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
+typedef enum
-typedef enum
+{
-{
+  SUCCESS = 0U,
-  SUCCESS = 0U,
+  ERROR = !SUCCESS
-  ERROR = !SUCCESS
+} ErrorStatus;
-} ErrorStatus;
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/** @addtogroup Exported_macros
-/** @addtogroup Exported_macros
+  * @{
-  * @{
+  */
-  */
+#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
-#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
+#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
-#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
+#define READ_BIT(REG, BIT)    ((REG) & (BIT))
-#define READ_BIT(REG, BIT)    ((REG) & (BIT))
+#define CLEAR_REG(REG)        ((REG) = (0x0))
-#define CLEAR_REG(REG)        ((REG) = (0x0))
+#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
-#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
+#define READ_REG(REG)         ((REG))
-#define READ_REG(REG)         ((REG))
+#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
-#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
+#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
-#define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
+/* Use of CMSIS compiler intrinsics for register exclusive access */
-/* Use of CMSIS compiler intrinsics for register exclusive access */
+/* Atomic 32-bit register access macro to set one or several bits */
-/* Atomic 32-bit register access macro to set one or several bits */
+#define ATOMIC_SET_BIT(REG, BIT)                             \
-#define ATOMIC_SET_BIT(REG, BIT)                             \
+  do {                                                       \
-  do {                                                       \
+    uint32_t val;                                            \
-    uint32_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
-      val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
+    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
-    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+/* Atomic 32-bit register access macro to clear one or several bits */
-/* Atomic 32-bit register access macro to clear one or several bits */
+#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
-#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
+  do {                                                       \
-  do {                                                       \
+    uint32_t val;                                            \
-    uint32_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
-      val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
+    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
-    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+/* Atomic 32-bit register access macro to clear and set one or several bits */
-/* Atomic 32-bit register access macro to clear and set one or several bits */
+#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
-#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
+  do {                                                                     \
-  do {                                                                     \
+    uint32_t val;                                                          \
-    uint32_t val;                                                          \
+    do {                                                                   \
-    do {                                                                   \
+      val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
-      val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
+    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
-    } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
+  } while(0)
-  } while(0)
+/* Atomic 16-bit register access macro to set one or several bits */
-/* Atomic 16-bit register access macro to set one or several bits */
+#define ATOMIC_SETH_BIT(REG, BIT)                            \
-#define ATOMIC_SETH_BIT(REG, BIT)                            \
+  do {                                                       \
-  do {                                                       \
+    uint16_t val;                                            \
-    uint16_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
-      val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
+    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
-    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+/* Atomic 16-bit register access macro to clear one or several bits */
-/* Atomic 16-bit register access macro to clear one or several bits */
+#define ATOMIC_CLEARH_BIT(REG, BIT)                          \
-#define ATOMIC_CLEARH_BIT(REG, BIT)                          \
+  do {                                                       \
-  do {                                                       \
+    uint16_t val;                                            \
-    uint16_t val;                                            \
+    do {                                                     \
-    do {                                                     \
+      val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
-      val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
+    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
-    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+  } while(0)
-  } while(0)
+/* Atomic 16-bit register access macro to clear and set one or several bits */
-/* Atomic 16-bit register access macro to clear and set one or several bits */
+#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
-#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
+  do {                                                                     \
-  do {                                                                     \
+    uint16_t val;                                                          \
-    uint16_t val;                                                          \
+    do {                                                                   \
-    do {                                                                   \
+      val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
-      val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
+    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
-    } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
+  } while(0)
-  } while(0)
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+#if defined (USE_HAL_DRIVER)
-#if defined (USE_HAL_DRIVER)
+ #include "stm32f1xx_hal.h"
- #include "stm32f1xx_hal.h"
+#endif /* USE_HAL_DRIVER */
-#endif /* USE_HAL_DRIVER */
+#ifdef __cplusplus
-#ifdef __cplusplus
+}
-}
+#endif /* __cplusplus */
-#endif /* __cplusplus */
+#endif /* __STM32F1xx_H */
-#endif /* __STM32F1xx_H */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
+/**
-/**
+  * @}
-  * @}
+  */
-  */
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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(root)/trunk/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h – Rev 2 → 18