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  */
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  */
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#if !defined  (STM32F0)
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#if !defined  (STM32F0)
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#define STM32F0
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#define STM32F0
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#endif /* STM32F0 */
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#endif /* STM32F0 */
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/* Uncomment the line below according to the target STM32 device used in your
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/** Uncomment the line below according to the target STM32 device used in your application.
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  * stm32f0xxxx.h file contains:
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 58 
  * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
57 
   application
 59 
  * - IRQ channel definition
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 60 
  * - Peripheral memory mapping and physical registers address definition
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  * - Peripheral pointer declaration and driver header file inclusion
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 62 
  * - Product miscellaneous configuration: assert macros…
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  * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-family’s superset.
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  */
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  */
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#if !defined (STM32F030x6) && !defined (STM32F030x8) &&                           \
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#if !defined (STM32F030x6) && !defined (STM32F030x8) &&                           \
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    !defined (STM32F031x6) && !defined (STM32F038xx) &&                           \
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    !defined (STM32F031x6) && !defined (STM32F038xx) &&                           \
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    !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
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    !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
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  /* #define STM32F030x6 */  /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F030x6 */  /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F030x8 */  /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
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  /* #define STM32F030x8 */  /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
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  /* #define STM32F031x6 */  /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F031x6 */  /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F038xx */  /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
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  /* #define STM32F038xx */  /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
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  /* #define STM32F042x6 */  /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F042x6 */  /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F048x6 */  /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
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  /* #define STM32F048xx */  /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
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  /* #define STM32F051x8 */  /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
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  /* #define STM32F051x8 */  /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
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  /* #define STM32F058xx */  /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
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  /* #define STM32F058xx */  /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
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  /* #define STM32F070x6 */  /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)                           */
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  /* #define STM32F070x6 */  /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)                           */
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  /* #define STM32F070xB */  /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)                          */
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  /* #define STM32F070xB */  /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)                          */
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  /* #define STM32F071xB */  /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
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  /* #define STM32F071xB */  /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
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  /* #define STM32F078xx */  /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes)                                             */
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  /* #define STM32F078xx */  /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes)                                             */
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  /* #define STM32F030xC */  /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes)                                             */  
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  /* #define STM32F030xC */  /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes)                                             */  
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  /* #define STM32F091xC */  /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes)            */
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  /* #define STM32F091xC */  /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes)            */
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  /* #define STM32F098xx */  /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes)                                             */
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  /* #define STM32F098xx */  /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes)                                             */
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#endif
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#endif
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/* Legacy aliases */
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#if defined (STM32F048x6)
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 #define STM32F048xx
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#endif /* STM32F048x6 */
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/*  Tip: To avoid modifying this file each time you need to switch between these
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/*  Tip: To avoid modifying this file each time you need to switch between these
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        devices, you can define the device in your toolchain compiler preprocessor.
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        devices, you can define the device in your toolchain compiler preprocessor.
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  */
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  */
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#if !defined  (USE_HAL_DRIVER)
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#if !defined  (USE_HAL_DRIVER)
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/**
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/**
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   */
 102 
   */
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  /*#define USE_HAL_DRIVER */
 103 
  /*#define USE_HAL_DRIVER */
94 
#endif /* USE_HAL_DRIVER */
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#endif /* USE_HAL_DRIVER */
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/**
 106 
/**
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  * @brief CMSIS Device version number V2.3.4
 107 
  * @brief CMSIS Device version number V2.3.6
98 
  */
 108 
  */
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#define __STM32F0_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */
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#define __STM32F0_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */
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#define __STM32F0_DEVICE_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
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#define __STM32F0_DEVICE_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
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#define __STM32F0_DEVICE_VERSION_SUB2   (0x04) /*!< [15:8]  sub2 version */
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#define __STM32F0_DEVICE_VERSION_SUB2   (0x06) /*!< [15:8]  sub2 version */
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#define __STM32F0_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
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#define __STM32F0_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
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#define __STM32F0_DEVICE_VERSION        ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
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#define __STM32F0_DEVICE_VERSION        ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
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                                        |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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                                        |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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                                        |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
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                                        |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
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                                        |(__STM32F0_DEVICE_VERSION_RC))
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                                        |(__STM32F0_DEVICE_VERSION_RC))
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#define READ_REG(REG)         ((REG))
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#define READ_REG(REG)         ((REG))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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/* Use of interrupt control for register exclusive access */
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/* Atomic 32-bit register access macro to set one or several bits */
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#define ATOMIC_SET_BIT(REG, BIT)                             \
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  do {                                                       \
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    uint32_t primask;                                        \
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    primask = __get_PRIMASK();                               \
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    __set_PRIMASK(1);                                        \
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    SET_BIT((REG), (BIT));                                   \
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    __set_PRIMASK(primask);                                  \
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 219 
  } while(0)
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/* Atomic 32-bit register access macro to clear one or several bits */
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#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
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  do {                                                       \
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    uint32_t primask;                                        \
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    primask = __get_PRIMASK();                               \
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    __set_PRIMASK(1);                                        \
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    CLEAR_BIT((REG), (BIT));                                 \
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 228 
    __set_PRIMASK(primask);                                  \
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 229 
  } while(0)
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- 
 
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/* Atomic 32-bit register access macro to clear and set one or several bits */
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 232 
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)            \
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 233 
  do {                                                       \
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 234 
    uint32_t primask;                                        \
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 235 
    primask = __get_PRIMASK();                               \
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 236 
    __set_PRIMASK(1);                                        \
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 237 
    MODIFY_REG((REG), (CLEARMSK), (SETMASK));                \
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 238 
    __set_PRIMASK(primask);                                  \
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 239 
  } while(0)
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 240 
 
- 
 
 241 
/* Atomic 16-bit register access macro to set one or several bits */
- 
 
 242 
#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)                                   \
- 
 
 243 
 
- 
 
 244 
/* Atomic 16-bit register access macro to clear one or several bits */
- 
 
 245 
#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)                               \
- 
 
 246 
 
- 
 
 247 
/* Atomic 16-bit register access macro to clear and set one or several bits */
- 
 
 248 
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
200 
 
 249 
 
201 
/**
 250 
/**
202 
  * @}
 251 
  * @}
203 
  */
 252 
  */
204 
 
 253