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48 | * Converted wildcards to use proper regexp pattern match library |
48 | * Converted wildcards to use proper regexp pattern match library |
49 | * |
49 | * |
50 | * Revision 1.1 2001/09/21 14:19:52 mjames |
50 | * Revision 1.1 2001/09/21 14:19:52 mjames |
51 | * Implemented Write Pin command : fixed up HTML output |
51 | * Implemented Write Pin command : fixed up HTML output |
52 | * |
52 | * |
53 | */ |
53 | */ |
- | 54 | #include <stdio.h> |
|
- | 55 | #include <string.h> |
|
- | 56 | #include <stdlib.h> |
|
- | 57 | #include <ctype.h> |
|
- | 58 | #include <time.h> |
|
54 | #include "print_ports.h" |
59 | #include <sys/types.h> |
- | 60 | #include <regex.h> |
|
55 | 61 | ||
56 | #include "chck_names.h" |
62 | #include "vertcl_main.h" |
57 | #include "cmdlog.h" |
- | |
58 | #include "cmdparse.h" |
- | |
59 | #include "database.h" |
- | |
60 | #include "equivalent.h" |
- | |
61 | #include "expression.h" |
63 | #include "expression.h" |
62 | #include "generic.h" |
64 | #include "generic.h" |
- | 65 | #include "database.h" |
|
- | 66 | #include "printout.h" |
|
63 | #include "print_vhdl.h" |
67 | #include "print_vhdl.h" |
64 | #include "print_vlog.h" |
68 | #include "print_vlog.h" |
65 | #include "printout.h" |
69 | #include "print_ports.h" |
66 | #include "sorting.h" |
70 | #include "sorting.h" |
- | 71 | #include "cmdparse.h" |
|
- | 72 | #include "cmdlog.h" |
|
- | 73 | #include "equivalent.h" |
|
67 | #include "version.h" |
74 | #include "version.h" |
68 | #include "vertcl_main.h" |
75 | #include "chck_names.h" |
69 | 76 | ||
70 | #include <ctype.h> |
- | |
71 | #include <regex.h> |
- | |
72 | #include <stdio.h> |
- | |
73 | #include <stdlib.h> |
- | |
74 | #include <string.h> |
- | |
75 | #include <sys/types.h> |
77 | #ident "@(#)$Header: c:\\cygwin\\cvsroot/Vert03/vertlib/print_ports.c,v 1.1.1.1 2003/11/04 23:34:57 mjames Exp $" |
76 | #include <time.h> |
- | |
77 | 78 | ||
78 | #ident \ |
- | |
79 | "@(#)$Header: c:\\cygwin\\cvsroot/Vert03/vertlib/print_ports.c,v 1.1.1.1 2003/11/04 23:34:57 mjames Exp $" |
- | |
80 | 79 | ||
81 | /* for each pin on the connector, list out all of the information */ |
80 | /* for each pin on the connector, list out all of the information */ |
82 | int list_intersection (FILE *f, char *con_id, char *fpga_id) |
81 | int list_intersection(FILE * f,char * con_id, char * fpga_id) |
83 | { |
82 | { |
84 | socket_t *connector = socket_head; |
83 | socket_t * connector = socket_head; |
85 | int found = 0; |
84 | int found = 0; |
86 | 85 | ||
87 | int rc; |
86 | int rc; |
88 | 87 | ||
89 | socket_t *fpga; |
88 | socket_t * fpga; |
90 | noderef_t *bnode; |
89 | noderef_t * bnode; |
91 | node_t *node; |
90 | node_t * node; |
92 | unsigned int sockets = 0; |
91 | unsigned int sockets = 0; |
93 | unsigned int printed = 0; |
92 | unsigned int printed = 0; |
94 | /* compile regular expression */ |
93 | /* compile regular expression */ |
95 | vert_regex_t *preg; |
94 | vert_regex_t * preg; |
96 | 95 | ||
97 | fpga = find_socket (Ident, fpga_id, Search, &socket_head); |
96 | fpga = find_socket(Ident,fpga_id, Search,&socket_head); |
98 | 97 | ||
99 | if (!fpga) |
98 | if(!fpga) |
100 | { |
99 | { |
101 | Log (LOG_ERROR, "-- write pin cannot find fpga '%s'\n", fpga_id); |
100 | Log(LOG_ERROR,"-- write pin cannot find fpga '%s'\n", |
- | 101 | fpga_id); |
|
102 | return TCL_ERROR; |
102 | return TCL_ERROR; |
103 | } |
103 | } |
104 | 104 | ||
105 | rc = vert_regcomp (&preg, con_id); |
105 | rc = vert_regcomp(&preg,con_id); |
106 | 106 | ||
107 | if (rc != 0) |
107 | if (rc != 0 ) |
108 | { |
108 | { |
109 | char errbuff[100]; |
109 | char errbuff[100]; |
110 | regerror (rc, preg->preg, errbuff, 100); |
110 | regerror(rc,preg->preg,errbuff,100); |
111 | Log ( |
- | |
112 | LOG_ERROR, |
- | |
113 | "-- Problem (rc=%d) %s with '%s' as regular expression\n", |
111 | Log(LOG_ERROR,"-- Problem (rc=%d) %s with '%s' as regular expression\n",rc,errbuff,con_id); |
114 | rc, |
- | |
115 | errbuff, |
- | |
116 | con_id); |
- | |
117 | 112 | ||
118 | return TCL_ERROR; |
113 | return TCL_ERROR; |
119 | } |
114 | } |
120 | else |
115 | else |
121 | { |
116 | { |
122 | Log (LOG_GENERAL, "-- Using '%s' as match pattern\n", con_id); |
117 | Log(LOG_GENERAL,"-- Using '%s' as match pattern\n",con_id); |
123 | } |
118 | } |
124 | 119 | ||
125 | fprintf (f, "<html>\n"); |
120 | fprintf(f,"<html>\n"); |
126 | fprintf ( |
- | |
127 | f, |
- | |
128 | "<title>Cross ref for socket(s) '%s' and (FPGA) socket '%s'</title>\n", |
121 | fprintf(f,"<title>Cross ref for socket(s) '%s' and (FPGA) socket '%s'</title>\n", |
129 | con_id, |
- | |
130 | fpga_id); |
122 | con_id,fpga_id); |
131 | fprintf ( |
- | |
132 | f, |
- | |
133 | "<h2>Column names:</h2>\n" |
123 | fprintf(f,"<h2>Column names:</h2>\n" |
134 | "<dl>\n" |
124 | "<dl>\n" |
135 | "<dt><b>socket pin</b><dd>The pin of the relevant socket.\n" |
125 | "<dt><b>socket pin</b><dd>The pin of the relevant socket.\n" |
136 | "<dt><b>index</b><dd>The Certify pin bundle index(if assigned)\n" |
126 | "<dt><b>index</b><dd>The Certify pin bundle index(if assigned)\n" |
137 | "<dt><b>net ident.</b><dd>The PCB netlist name (or jumper name)\n" |
127 | "<dt><b>net ident.</b><dd>The PCB netlist name (or jumper name)\n" |
138 | "<dt><b>sig. name</b><dd>The name of any signal routed through this net\n" |
128 | "<dt><b>sig. name</b><dd>The name of any signal routed through this net\n" |
139 | "</dl>\n" |
129 | "</dl>\n" |
140 | "Please note only one fpga pin is given out of many if a multiple connection " |
130 | "Please note only one fpga pin is given out of many if a multiple connection exists\n"); |
141 | "exists\n"); |
- | |
142 | 131 | ||
143 | while (connector) |
132 | while(connector) |
- | 133 | { |
|
- | 134 | ||
- | 135 | found = regexec(preg->preg,connector->identifier,0,preg->regpatt,0); |
|
- | 136 | ||
- | 137 | if(!found) |
|
- | 138 | { |
|
- | 139 | int first_print = 1; /* suppress tables until needed */ |
|
- | 140 | sockets ++; |
|
- | 141 | sort_nodes(connector,NO_EXTRACT_XY); /* sort the pins on the connector */ |
|
- | 142 | node = connector->nodes; |
|
- | 143 | /* |
|
- | 144 | printf("completed sort\n"); |
|
- | 145 | */ |
|
- | 146 | while(node) |
|
144 | { |
147 | { |
- | 148 | if (node->net) |
|
- | 149 | { |
|
145 | found = regexec (preg->preg, connector->identifier, 0, preg->regpatt, 0); |
150 | int found_node = 0; |
146 | 151 | ||
- | 152 | bnode = node->net->nodes; |
|
- | 153 | while(bnode && !found_node) |
|
- | 154 | { |
|
- | 155 | char * msg; |
|
- | 156 | char bundle_msg[20]; |
|
- | 157 | if (bnode->node && bnode->node->socket==fpga) |
|
- | 158 | { |
|
147 | if (!found) |
159 | if(first_print) |
148 | { |
160 | { |
149 | int first_print = 1; /* suppress tables until needed */ |
- | |
150 | sockets++; |
161 | fprintf(f,"<h2>crossref</h2>\n" |
151 | sort_nodes (connector, NO_EXTRACT_XY); /* sort the pins on the |
162 | "<h3>connector id=%s name=%s and fpga id=%s name=%s</h3>\n", |
152 | connector */ |
163 | connector->identifier, |
153 | node = connector->nodes; |
164 | connector->name?connector->name:"", |
154 | /* |
165 | fpga->identifier, |
155 | printf("completed sort\n"); |
166 | fpga->name?fpga->name:""); |
156 | */ |
167 | fprintf(f,"<table border=1>\n"); |
- | 168 | fprintf(f,"<tr><td> socket pin</td> <td>index</td> <td>fpga pin</td> <td>net ident.</td><td>sig. name</td></tr>\n"); |
|
157 | while (node) |
169 | first_print = 0; |
158 | { |
170 | } |
159 | if (node->net) |
171 | if (node->bundle_index==0) |
160 | { |
172 | { |
161 | int found_node = 0; |
- | |
162 | - | ||
163 | bnode = node->net->nodes; |
- | |
164 | while (bnode && !found_node) |
- | |
165 | { |
173 | msg = "-"; |
166 | char *msg; |
- | |
167 | char bundle_msg[20]; |
- | |
168 | if (bnode->node && bnode->node->socket == fpga) |
- | |
169 | { |
174 | } |
170 | if (first_print) |
- | |
171 | { |
- | |
172 | fprintf ( |
- | |
173 | f, |
- | |
174 | "<h2>crossref</h2>\n" |
- | |
175 | "<h3>connector id=%s " |
- | |
176 | "name=%s and fpga id=%s " |
- | |
177 | "name=%s</h3>\n", |
- | |
178 | connector->identifier, |
- | |
179 | connector->name |
- | |
180 | ? connector->name |
- | |
181 | : "", |
- | |
182 | fpga->identifier, |
- | |
183 | fpga->name ? fpga->name |
- | |
184 | : ""); |
- | |
185 | fprintf ( |
- | |
186 | f, "<table border=1>\n"); |
- | |
187 | fprintf ( |
- | |
188 | f, |
- | |
189 | "<tr><td> socket pin</td> " |
- | |
190 | "<td>index</td> <td>fpga " |
- | |
191 | "pin</td> <td>net " |
- | |
192 | "ident.</td><td>sig. " |
- | |
193 | "name</td></tr>\n"); |
- | |
194 | first_print = 0; |
- | |
195 | } |
- | |
196 | if (node->bundle_index == 0) |
- | |
197 | { |
- | |
198 | msg = "-"; |
- | |
199 | } |
- | |
200 | else if (node->bundle_index < 0) |
175 | else if (node->bundle_index < 0) |
201 | { |
- | |
202 | msg = "NC"; |
- | |
203 | } |
- | |
204 | else |
- | |
205 | { |
- | |
206 | sprintf ( |
- | |
207 | bundle_msg, |
- | |
208 | "%d", |
- | |
209 | node->bundle_index); |
- | |
210 | msg = bundle_msg; |
- | |
211 | } |
- | |
212 | - | ||
213 | fprintf ( |
- | |
214 | f, |
- | |
215 | "<tr><td>%s(%s)</td><td>%s</td> " |
- | |
216 | "<td>%s(%s)</td> " |
- | |
217 | "<td>%s</td><td>%s</td></tr>\n", |
- | |
218 | connector->identifier, |
- | |
219 | node->identifier, |
- | |
220 | msg, |
- | |
221 | fpga->identifier, |
- | |
222 | bnode->node->identifier, |
- | |
223 | bnode->net->name |
- | |
224 | ? bnode->net->identifier |
- | |
225 | : "", |
- | |
226 | bnode->net->name ? bnode->net->name |
- | |
227 | : ""); |
- | |
228 | found_node = |
- | |
229 | 1; /* force loop termination */ |
- | |
230 | } |
- | |
231 | bnode = bnode->next; |
- | |
232 | } |
176 | { |
233 | } |
177 | msg = "NC"; |
234 | node = node->sktnext; |
- | |
235 | } |
178 | } |
236 | if (!first_print) |
179 | else |
237 | { |
180 | { |
238 | printed++; |
- | |
239 | fprintf (f, "</table>\n<hr>\n"); |
181 | sprintf(bundle_msg,"%d",node->bundle_index); |
240 | } |
182 | msg = bundle_msg; |
241 | } |
183 | } |
242 | connector = connector->next; |
- | |
243 | } |
- | |
244 | 184 | ||
- | 185 | fprintf(f,"<tr><td>%s(%s)</td><td>%s</td> <td>%s(%s)</td> <td>%s</td><td>%s</td></tr>\n", |
|
- | 186 | connector->identifier,node->identifier, |
|
245 | fprintf ( |
187 | msg, |
- | 188 | fpga->identifier,bnode->node->identifier, |
|
- | 189 | bnode->net->name?bnode->net->identifier:"", |
|
- | 190 | bnode->net->name?bnode->net->name:"" ); |
|
- | 191 | found_node = 1 ; /* force loop termination */ |
|
246 | f, |
192 | |
247 | "Tables generated by Vertical %s\n" |
193 | } |
248 | "<br>© Philips Semiconductors SLS. "__DATE__ |
194 | bnode = bnode->next; |
249 | "<a " |
195 | } |
- | 196 | } |
|
250 | "href=mailto:Mike.D.James@philips.com><address>mailto:Mike.D.James@philips.com</" |
197 | node = node->sktnext; |
- | 198 | ||
- | 199 | } |
|
251 | "address></a>\n" |
200 | if(!first_print) |
- | 201 | { |
|
252 | "</html>\n", |
202 | printed++; |
- | 203 | fprintf(f,"</table>\n<hr>\n"); |
|
- | 204 | } |
|
- | 205 | } |
|
- | 206 | connector= connector->next; |
|
- | 207 | } |
|
- | 208 | ||
- | 209 | ||
- | 210 | fprintf(f,"Tables generated by Vertical %s\n" |
|
- | 211 | "<br>© Philips Semiconductors SLS. "__DATE__ |
|
- | 212 | "<a href=mailto:Mike.D.James@philips.com><address>mailto:Mike.D.James@philips.com</address></a>\n" |
|
253 | Vertical_Version); |
213 | "</html>\n",Vertical_Version); |
- | 214 | ||
254 | 215 | ||
255 | vert_regfree (&preg); |
216 | vert_regfree(&preg); |
256 | Log (LOG_GENERAL, "-- located %d sockets matching pattern\n", sockets); |
217 | Log(LOG_GENERAL,"-- located %d sockets matching pattern\n",sockets); |
257 | Log (LOG_GENERAL, "-- of which %d actually connect to '%s'\n", printed, fpga_id); |
218 | Log(LOG_GENERAL,"-- of which %d actually connect to '%s'\n",printed,fpga_id); |
258 | return TCL_OK; |
219 | return TCL_OK; |
259 | } |
220 | } |