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Line 1... Line 1...
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ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 1
1
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 1
2
 
2
 
3
 
3
 
4
   1              		.cpu cortex-m3
4
   1              		.cpu cortex-m3
5
   2              		.eabi_attribute 20, 1
5
   2              		.eabi_attribute 20, 1
6
   3              		.eabi_attribute 21, 1
6
   3              		.eabi_attribute 21, 1
Line 56... Line 56...
56
  28:Core/Src/stm32f1xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
56
  28:Core/Src/stm32f1xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
57
  29:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN TD */
57
  29:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN TD */
58
  30:Core/Src/stm32f1xx_hal_msp.c **** 
58
  30:Core/Src/stm32f1xx_hal_msp.c **** 
59
  31:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END TD */
59
  31:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END TD */
60
  32:Core/Src/stm32f1xx_hal_msp.c **** 
60
  32:Core/Src/stm32f1xx_hal_msp.c **** 
61
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 2
61
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 2
62
 
62
 
63
 
63
 
64
  33:Core/Src/stm32f1xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
64
  33:Core/Src/stm32f1xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
65
  34:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN Define */
65
  34:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN Define */
66
  35:Core/Src/stm32f1xx_hal_msp.c **** 
66
  35:Core/Src/stm32f1xx_hal_msp.c **** 
Line 116... Line 116...
116
  41 0006 42F00102 		orr	r2, r2, #1
116
  41 0006 42F00102 		orr	r2, r2, #1
117
  42 000a 9A61     		str	r2, [r3, #24]
117
  42 000a 9A61     		str	r2, [r3, #24]
118
  43              		.loc 1 70 3 view .LVU4
118
  43              		.loc 1 70 3 view .LVU4
119
  44 000c 9A69     		ldr	r2, [r3, #24]
119
  44 000c 9A69     		ldr	r2, [r3, #24]
120
  45 000e 02F00102 		and	r2, r2, #1
120
  45 000e 02F00102 		and	r2, r2, #1
121
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 3
121
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 3
122
 
122
 
123
 
123
 
124
  46 0012 0092     		str	r2, [sp]
124
  46 0012 0092     		str	r2, [sp]
125
  47              		.loc 1 70 3 view .LVU5
125
  47              		.loc 1 70 3 view .LVU5
126
  48 0014 009A     		ldr	r2, [sp]
126
  48 0014 009A     		ldr	r2, [sp]
Line 176... Line 176...
176
  86 003a 00BF     		.align	2
176
  86 003a 00BF     		.align	2
177
  87              	.L3:
177
  87              	.L3:
178
  88 003c 00100240 		.word	1073876992
178
  88 003c 00100240 		.word	1073876992
179
  89 0040 00000140 		.word	1073807360
179
  89 0040 00000140 		.word	1073807360
180
  90              		.cfi_endproc
180
  90              		.cfi_endproc
181
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 4
181
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 4
182
 
182
 
183
 
183
 
184
  91              	.LFE65:
184
  91              	.LFE65:
185
  93              		.section	.text.HAL_I2C_MspInit,"ax",%progbits
185
  93              		.section	.text.HAL_I2C_MspInit,"ax",%progbits
186
  94              		.align	1
186
  94              		.align	1
Line 236... Line 236...
236
  95:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN I2C2_MspInit 0 */
236
  95:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN I2C2_MspInit 0 */
237
  96:Core/Src/stm32f1xx_hal_msp.c ****       __HAL_RCC_I2C2_CLK_ENABLE();
237
  96:Core/Src/stm32f1xx_hal_msp.c ****       __HAL_RCC_I2C2_CLK_ENABLE();
238
  97:Core/Src/stm32f1xx_hal_msp.c **** 
238
  97:Core/Src/stm32f1xx_hal_msp.c **** 
239
  98:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END I2C2_MspInit 0 */
239
  98:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END I2C2_MspInit 0 */
240
  99:Core/Src/stm32f1xx_hal_msp.c **** 
240
  99:Core/Src/stm32f1xx_hal_msp.c **** 
241
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 5
241
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 5
242
 
242
 
243
 
243
 
244
 100:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
244
 100:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
245
 101:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
245
 101:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
246
 102:Core/Src/stm32f1xx_hal_msp.c ****     PB10     ------> I2C2_SCL
246
 102:Core/Src/stm32f1xx_hal_msp.c ****     PB10     ------> I2C2_SCL
Line 296... Line 296...
296
 100:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
296
 100:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
297
 161              		.loc 1 100 5 view .LVU31
297
 161              		.loc 1 100 5 view .LVU31
298
 100:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
298
 100:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
299
 162              		.loc 1 100 5 view .LVU32
299
 162              		.loc 1 100 5 view .LVU32
300
 163 002e A369     		ldr	r3, [r4, #24]
300
 163 002e A369     		ldr	r3, [r4, #24]
301
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 6
301
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 6
302
 
302
 
303
 
303
 
304
 164 0030 43F00803 		orr	r3, r3, #8
304
 164 0030 43F00803 		orr	r3, r3, #8
305
 165 0034 A361     		str	r3, [r4, #24]
305
 165 0034 A361     		str	r3, [r4, #24]
306
 100:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
306
 100:Core/Src/stm32f1xx_hal_msp.c ****     /**I2C2 GPIO Configuration
Line 356... Line 356...
356
 202 0064 0393     		str	r3, [sp, #12]
356
 202 0064 0393     		str	r3, [sp, #12]
357
 111:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN I2C2_MspInit 1 */
357
 111:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN I2C2_MspInit 1 */
358
 203              		.loc 1 111 5 view .LVU47
358
 203              		.loc 1 111 5 view .LVU47
359
 204 0066 039B     		ldr	r3, [sp, #12]
359
 204 0066 039B     		ldr	r3, [sp, #12]
360
 205              	.LBE7:
360
 205              	.LBE7:
361
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 7
361
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 7
362
 
362
 
363
 
363
 
364
 206              		.loc 1 117 1 is_stmt 0 view .LVU48
364
 206              		.loc 1 117 1 is_stmt 0 view .LVU48
365
 207 0068 D5E7     		b	.L5
365
 207 0068 D5E7     		b	.L5
366
 208              	.L10:
366
 208              	.L10:
Line 416... Line 416...
416
 130:Core/Src/stm32f1xx_hal_msp.c **** 
416
 130:Core/Src/stm32f1xx_hal_msp.c **** 
417
 131:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END I2C2_MspDeInit 0 */
417
 131:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END I2C2_MspDeInit 0 */
418
 132:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock disable */
418
 132:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock disable */
419
 133:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_I2C2_CLK_DISABLE();
419
 133:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_I2C2_CLK_DISABLE();
420
 247              		.loc 1 133 5 is_stmt 1 view .LVU54
420
 247              		.loc 1 133 5 is_stmt 1 view .LVU54
421
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 8
421
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 8
422
 
422
 
423
 
423
 
424
 248 000c 094A     		ldr	r2, .L18+4
424
 248 000c 094A     		ldr	r2, .L18+4
425
 249 000e D369     		ldr	r3, [r2, #28]
425
 249 000e D369     		ldr	r3, [r2, #28]
426
 250 0010 23F48003 		bic	r3, r3, #4194304
426
 250 0010 23F48003 		bic	r3, r3, #4194304
Line 476... Line 476...
476
 149:Core/Src/stm32f1xx_hal_msp.c **** 
476
 149:Core/Src/stm32f1xx_hal_msp.c **** 
477
 150:Core/Src/stm32f1xx_hal_msp.c **** /**
477
 150:Core/Src/stm32f1xx_hal_msp.c **** /**
478
 151:Core/Src/stm32f1xx_hal_msp.c **** * @brief RTC MSP Initialization
478
 151:Core/Src/stm32f1xx_hal_msp.c **** * @brief RTC MSP Initialization
479
 152:Core/Src/stm32f1xx_hal_msp.c **** * This function configures the hardware resources used in this example
479
 152:Core/Src/stm32f1xx_hal_msp.c **** * This function configures the hardware resources used in this example
480
 153:Core/Src/stm32f1xx_hal_msp.c **** * @param hrtc: RTC handle pointer
480
 153:Core/Src/stm32f1xx_hal_msp.c **** * @param hrtc: RTC handle pointer
481
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 9
481
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 9
482
 
482
 
483
 
483
 
484
 154:Core/Src/stm32f1xx_hal_msp.c **** * @retval None
484
 154:Core/Src/stm32f1xx_hal_msp.c **** * @retval None
485
 155:Core/Src/stm32f1xx_hal_msp.c **** */
485
 155:Core/Src/stm32f1xx_hal_msp.c **** */
486
 156:Core/Src/stm32f1xx_hal_msp.c **** void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
486
 156:Core/Src/stm32f1xx_hal_msp.c **** void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
Line 536... Line 536...
536
 166:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock enable */
536
 166:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock enable */
537
 167:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_RTC_ENABLE();
537
 167:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_RTC_ENABLE();
538
 326              		.loc 1 167 5 view .LVU70
538
 326              		.loc 1 167 5 view .LVU70
539
 327 0026 054B     		ldr	r3, .L27+8
539
 327 0026 054B     		ldr	r3, .L27+8
540
 328 0028 0122     		movs	r2, #1
540
 328 0028 0122     		movs	r2, #1
541
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 10
541
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 10
542
 
542
 
543
 
543
 
544
 329 002a 1A60     		str	r2, [r3]
544
 329 002a 1A60     		str	r2, [r3]
545
 168:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN RTC_MspInit 1 */
545
 168:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN RTC_MspInit 1 */
546
 169:Core/Src/stm32f1xx_hal_msp.c **** 
546
 169:Core/Src/stm32f1xx_hal_msp.c **** 
Line 596... Line 596...
596
 367 0006 00D0     		beq	.L31
596
 367 0006 00D0     		beq	.L31
597
 368              	.L29:
597
 368              	.L29:
598
 184:Core/Src/stm32f1xx_hal_msp.c ****   {
598
 184:Core/Src/stm32f1xx_hal_msp.c ****   {
599
 185:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN RTC_MspDeInit 0 */
599
 185:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN RTC_MspDeInit 0 */
600
 186:Core/Src/stm32f1xx_hal_msp.c **** 
600
 186:Core/Src/stm32f1xx_hal_msp.c **** 
601
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 11
601
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 11
602
 
602
 
603
 
603
 
604
 187:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END RTC_MspDeInit 0 */
604
 187:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END RTC_MspDeInit 0 */
605
 188:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock disable */
605
 188:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock disable */
606
 189:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_RTC_DISABLE();
606
 189:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_RTC_DISABLE();
Line 656... Line 656...
656
 404              		.cfi_def_cfa_offset 4
656
 404              		.cfi_def_cfa_offset 4
657
 405              		.cfi_offset 14, -4
657
 405              		.cfi_offset 14, -4
658
 406 0002 87B0     		sub	sp, sp, #28
658
 406 0002 87B0     		sub	sp, sp, #28
659
 407              	.LCFI11:
659
 407              	.LCFI11:
660
 408              		.cfi_def_cfa_offset 32
660
 408              		.cfi_def_cfa_offset 32
661
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 12
661
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 12
662
 
662
 
663
 
663
 
664
 205:Core/Src/stm32f1xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
664
 205:Core/Src/stm32f1xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
665
 409              		.loc 1 205 3 is_stmt 1 view .LVU81
665
 409              		.loc 1 205 3 is_stmt 1 view .LVU81
666
 410              		.loc 1 205 20 is_stmt 0 view .LVU82
666
 410              		.loc 1 205 20 is_stmt 0 view .LVU82
Line 716... Line 716...
716
 212:Core/Src/stm32f1xx_hal_msp.c **** 
716
 212:Core/Src/stm32f1xx_hal_msp.c **** 
717
 436              		.loc 1 212 5 is_stmt 1 view .LVU87
717
 436              		.loc 1 212 5 is_stmt 1 view .LVU87
718
 437              	.LBB9:
718
 437              	.LBB9:
719
 212:Core/Src/stm32f1xx_hal_msp.c **** 
719
 212:Core/Src/stm32f1xx_hal_msp.c **** 
720
 438              		.loc 1 212 5 view .LVU88
720
 438              		.loc 1 212 5 view .LVU88
721
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 13
721
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 13
722
 
722
 
723
 
723
 
724
 212:Core/Src/stm32f1xx_hal_msp.c **** 
724
 212:Core/Src/stm32f1xx_hal_msp.c **** 
725
 439              		.loc 1 212 5 view .LVU89
725
 439              		.loc 1 212 5 view .LVU89
726
 440 001c 03F56043 		add	r3, r3, #57344
726
 440 001c 03F56043 		add	r3, r3, #57344
Line 776... Line 776...
776
 222:Core/Src/stm32f1xx_hal_msp.c **** 
776
 222:Core/Src/stm32f1xx_hal_msp.c **** 
777
 477              		.loc 1 222 5 is_stmt 1 view .LVU103
777
 477              		.loc 1 222 5 is_stmt 1 view .LVU103
778
 478 0050 02A9     		add	r1, sp, #8
778
 478 0050 02A9     		add	r1, sp, #8
779
 479 0052 0348     		ldr	r0, .L38+4
779
 479 0052 0348     		ldr	r0, .L38+4
780
 480              	.LVL18:
780
 480              	.LVL18:
781
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 14
781
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 14
782
 
782
 
783
 
783
 
784
 222:Core/Src/stm32f1xx_hal_msp.c **** 
784
 222:Core/Src/stm32f1xx_hal_msp.c **** 
785
 481              		.loc 1 222 5 is_stmt 0 view .LVU104
785
 481              		.loc 1 222 5 is_stmt 0 view .LVU104
786
 482 0054 FFF7FEFF 		bl	HAL_GPIO_Init
786
 482 0054 FFF7FEFF 		bl	HAL_GPIO_Init
Line 836... Line 836...
836
 240:Core/Src/stm32f1xx_hal_msp.c ****   {
836
 240:Core/Src/stm32f1xx_hal_msp.c ****   {
837
 241:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN SPI1_MspDeInit 0 */
837
 241:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN SPI1_MspDeInit 0 */
838
 242:Core/Src/stm32f1xx_hal_msp.c **** 
838
 242:Core/Src/stm32f1xx_hal_msp.c **** 
839
 243:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END SPI1_MspDeInit 0 */
839
 243:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END SPI1_MspDeInit 0 */
840
 244:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock disable */
840
 244:Core/Src/stm32f1xx_hal_msp.c ****     /* Peripheral clock disable */
841
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 15
841
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 15
842
 
842
 
843
 
843
 
844
 245:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_SPI1_CLK_DISABLE();
844
 245:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_SPI1_CLK_DISABLE();
845
 246:Core/Src/stm32f1xx_hal_msp.c **** 
845
 246:Core/Src/stm32f1xx_hal_msp.c **** 
846
 247:Core/Src/stm32f1xx_hal_msp.c ****     /**SPI1 GPIO Configuration
846
 247:Core/Src/stm32f1xx_hal_msp.c ****     /**SPI1 GPIO Configuration
Line 896... Line 896...
896
 561              	.LFB72:
896
 561              	.LFB72:
897
 259:Core/Src/stm32f1xx_hal_msp.c **** 
897
 259:Core/Src/stm32f1xx_hal_msp.c **** 
898
 260:Core/Src/stm32f1xx_hal_msp.c **** /**
898
 260:Core/Src/stm32f1xx_hal_msp.c **** /**
899
 261:Core/Src/stm32f1xx_hal_msp.c **** * @brief TIM_OC MSP Initialization
899
 261:Core/Src/stm32f1xx_hal_msp.c **** * @brief TIM_OC MSP Initialization
900
 262:Core/Src/stm32f1xx_hal_msp.c **** * This function configures the hardware resources used in this example
900
 262:Core/Src/stm32f1xx_hal_msp.c **** * This function configures the hardware resources used in this example
901
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 16
901
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 16
902
 
902
 
903
 
903
 
904
 263:Core/Src/stm32f1xx_hal_msp.c **** * @param htim_oc: TIM_OC handle pointer
904
 263:Core/Src/stm32f1xx_hal_msp.c **** * @param htim_oc: TIM_OC handle pointer
905
 264:Core/Src/stm32f1xx_hal_msp.c **** * @retval None
905
 264:Core/Src/stm32f1xx_hal_msp.c **** * @retval None
906
 265:Core/Src/stm32f1xx_hal_msp.c **** */
906
 265:Core/Src/stm32f1xx_hal_msp.c **** */
Line 956... Line 956...
956
 595              		.loc 1 280 1 is_stmt 0 view .LVU126
956
 595              		.loc 1 280 1 is_stmt 0 view .LVU126
957
 596 0022 02B0     		add	sp, sp, #8
957
 596 0022 02B0     		add	sp, sp, #8
958
 597              	.LCFI16:
958
 597              	.LCFI16:
959
 598              		.cfi_def_cfa_offset 0
959
 598              		.cfi_def_cfa_offset 0
960
 599              		@ sp needed
960
 599              		@ sp needed
961
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 17
961
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 17
962
 
962
 
963
 
963
 
964
 600 0024 7047     		bx	lr
964
 600 0024 7047     		bx	lr
965
 601              	.L54:
965
 601              	.L54:
966
 602 0026 00BF     		.align	2
966
 602 0026 00BF     		.align	2
Line 1016... Line 1016...
1016
 643 0012 9A42     		cmp	r2, r3
1016
 643 0012 9A42     		cmp	r2, r3
1017
 644 0014 02D0     		beq	.L58
1017
 644 0014 02D0     		beq	.L58
1018
 645              	.LVL27:
1018
 645              	.LVL27:
1019
 646              	.L55:
1019
 646              	.L55:
1020
 292:Core/Src/stm32f1xx_hal_msp.c ****   {
1020
 292:Core/Src/stm32f1xx_hal_msp.c ****   {
1021
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 18
1021
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 18
1022
 
1022
 
1023
 
1023
 
1024
 293:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 0 */
1024
 293:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 0 */
1025
 294:Core/Src/stm32f1xx_hal_msp.c **** 
1025
 294:Core/Src/stm32f1xx_hal_msp.c **** 
1026
 295:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END TIM4_MspInit 0 */
1026
 295:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END TIM4_MspInit 0 */
Line 1030... Line 1030...
1030
 299:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
1030
 299:Core/Src/stm32f1xx_hal_msp.c ****     __HAL_RCC_GPIOB_CLK_ENABLE();
1031
 300:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1031
 300:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1032
 301:Core/Src/stm32f1xx_hal_msp.c ****     PB6     ------> TIM4_CH1
1032
 301:Core/Src/stm32f1xx_hal_msp.c ****     PB6     ------> TIM4_CH1
1033
 302:Core/Src/stm32f1xx_hal_msp.c ****     PB7     ------> TIM4_CH2
1033
 302:Core/Src/stm32f1xx_hal_msp.c ****     PB7     ------> TIM4_CH2
1034
 303:Core/Src/stm32f1xx_hal_msp.c ****     */
1034
 303:Core/Src/stm32f1xx_hal_msp.c ****     */
1035
 304:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
1035
 304:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Pin = encoder_1_Pin|encoder_2_Pin;
1036
 305:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
1036
 305:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
1037
 306:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_PULLUP;
1037
 306:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_PULLUP;
1038
 307:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1038
 307:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
1039
 308:Core/Src/stm32f1xx_hal_msp.c **** 
1039
 308:Core/Src/stm32f1xx_hal_msp.c **** 
1040
 309:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 1 */
1040
 309:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspInit 1 */
Line 1076... Line 1076...
1076
 672              	.LBE12:
1076
 672              	.LBE12:
1077
 299:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1077
 299:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1078
 673              		.loc 1 299 5 view .LVU140
1078
 673              		.loc 1 299 5 view .LVU140
1079
 674              	.LBB13:
1079
 674              	.LBB13:
1080
 299:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1080
 299:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1081
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 19
1081
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 19
1082
 
1082
 
1083
 
1083
 
1084
 675              		.loc 1 299 5 view .LVU141
1084
 675              		.loc 1 299 5 view .LVU141
1085
 299:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1085
 299:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1086
 676              		.loc 1 299 5 view .LVU142
1086
 676              		.loc 1 299 5 view .LVU142
Line 1136... Line 1136...
1136
 718              		.thumb_func
1136
 718              		.thumb_func
1137
 719              		.fpu softvfp
1137
 719              		.fpu softvfp
1138
 721              	HAL_TIM_OC_MspDeInit:
1138
 721              	HAL_TIM_OC_MspDeInit:
1139
 722              	.LVL31:
1139
 722              	.LVL31:
1140
 723              	.LFB74:
1140
 723              	.LFB74:
1141
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 20
1141
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 20
1142
 
1142
 
1143
 
1143
 
1144
 315:Core/Src/stm32f1xx_hal_msp.c **** 
1144
 315:Core/Src/stm32f1xx_hal_msp.c **** 
1145
 316:Core/Src/stm32f1xx_hal_msp.c **** /**
1145
 316:Core/Src/stm32f1xx_hal_msp.c **** /**
1146
 317:Core/Src/stm32f1xx_hal_msp.c **** * @brief TIM_OC MSP De-Initialization
1146
 317:Core/Src/stm32f1xx_hal_msp.c **** * @brief TIM_OC MSP De-Initialization
Line 1196... Line 1196...
1196
 753              	.LFE74:
1196
 753              	.LFE74:
1197
 755              		.section	.text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits
1197
 755              		.section	.text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits
1198
 756              		.align	1
1198
 756              		.align	1
1199
 757              		.global	HAL_TIM_Encoder_MspDeInit
1199
 757              		.global	HAL_TIM_Encoder_MspDeInit
1200
 758              		.syntax unified
1200
 758              		.syntax unified
1201
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 21
1201
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 21
1202
 
1202
 
1203
 
1203
 
1204
 759              		.thumb
1204
 759              		.thumb
1205
 760              		.thumb_func
1205
 760              		.thumb_func
1206
 761              		.fpu softvfp
1206
 761              		.fpu softvfp
Line 1245... Line 1245...
1245
 353:Core/Src/stm32f1xx_hal_msp.c **** 
1245
 353:Core/Src/stm32f1xx_hal_msp.c **** 
1246
 354:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1246
 354:Core/Src/stm32f1xx_hal_msp.c ****     /**TIM4 GPIO Configuration
1247
 355:Core/Src/stm32f1xx_hal_msp.c ****     PB6     ------> TIM4_CH1
1247
 355:Core/Src/stm32f1xx_hal_msp.c ****     PB6     ------> TIM4_CH1
1248
 356:Core/Src/stm32f1xx_hal_msp.c ****     PB7     ------> TIM4_CH2
1248
 356:Core/Src/stm32f1xx_hal_msp.c ****     PB7     ------> TIM4_CH2
1249
 357:Core/Src/stm32f1xx_hal_msp.c ****     */
1249
 357:Core/Src/stm32f1xx_hal_msp.c ****     */
1250
 358:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
1250
 358:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOB, encoder_1_Pin|encoder_2_Pin);
1251
 359:Core/Src/stm32f1xx_hal_msp.c **** 
1251
 359:Core/Src/stm32f1xx_hal_msp.c **** 
1252
 360:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspDeInit 1 */
1252
 360:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN TIM4_MspDeInit 1 */
1253
 361:Core/Src/stm32f1xx_hal_msp.c **** 
1253
 361:Core/Src/stm32f1xx_hal_msp.c **** 
1254
 362:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END TIM4_MspDeInit 1 */
1254
 362:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END TIM4_MspDeInit 1 */
1255
 363:Core/Src/stm32f1xx_hal_msp.c ****   }
1255
 363:Core/Src/stm32f1xx_hal_msp.c ****   }
1256
 364:Core/Src/stm32f1xx_hal_msp.c **** 
1256
 364:Core/Src/stm32f1xx_hal_msp.c **** 
1257
 365:Core/Src/stm32f1xx_hal_msp.c **** }
1257
 365:Core/Src/stm32f1xx_hal_msp.c **** }
1258
 785              		.loc 1 365 1 view .LVU165
1258
 785              		.loc 1 365 1 view .LVU165
1259
 786 000a 08BD     		pop	{r3, pc}
1259
 786 000a 08BD     		pop	{r3, pc}
1260
 787              	.LVL34:
1260
 787              	.LVL34:
1261
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 22
1261
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 22
1262
 
1262
 
1263
 
1263
 
1264
 788              	.L69:
1264
 788              	.L69:
1265
 352:Core/Src/stm32f1xx_hal_msp.c **** 
1265
 352:Core/Src/stm32f1xx_hal_msp.c **** 
1266
 789              		.loc 1 352 5 is_stmt 1 view .LVU166
1266
 789              		.loc 1 352 5 is_stmt 1 view .LVU166
Line 1316... Line 1316...
1316
 830              		.cfi_def_cfa_offset 12
1316
 830              		.cfi_def_cfa_offset 12
1317
 831              		.cfi_offset 4, -12
1317
 831              		.cfi_offset 4, -12
1318
 832              		.cfi_offset 5, -8
1318
 832              		.cfi_offset 5, -8
1319
 833              		.cfi_offset 14, -4
1319
 833              		.cfi_offset 14, -4
1320
 834 0002 87B0     		sub	sp, sp, #28
1320
 834 0002 87B0     		sub	sp, sp, #28
1321
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 23
1321
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 23
1322
 
1322
 
1323
 
1323
 
1324
 835              	.LCFI23:
1324
 835              	.LCFI23:
1325
 836              		.cfi_def_cfa_offset 40
1325
 836              		.cfi_def_cfa_offset 40
1326
 375:Core/Src/stm32f1xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
1326
 375:Core/Src/stm32f1xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
Line 1376... Line 1376...
1376
 854 0016 07B0     		add	sp, sp, #28
1376
 854 0016 07B0     		add	sp, sp, #28
1377
 855              	.LCFI24:
1377
 855              	.LCFI24:
1378
 856              		.cfi_remember_state
1378
 856              		.cfi_remember_state
1379
 857              		.cfi_def_cfa_offset 12
1379
 857              		.cfi_def_cfa_offset 12
1380
 858              		@ sp needed
1380
 858              		@ sp needed
1381
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 24
1381
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 24
1382
 
1382
 
1383
 
1383
 
1384
 859 0018 30BD     		pop	{r4, r5, pc}
1384
 859 0018 30BD     		pop	{r4, r5, pc}
1385
 860              	.LVL39:
1385
 860              	.LVL39:
1386
 861              	.L75:
1386
 861              	.L75:
Line 1436... Line 1436...
1436
 390:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
1436
 390:Core/Src/stm32f1xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
1437
 898              		.loc 1 390 26 is_stmt 0 view .LVU191
1437
 898              		.loc 1 390 26 is_stmt 0 view .LVU191
1438
 899 0048 0223     		movs	r3, #2
1438
 899 0048 0223     		movs	r3, #2
1439
 900 004a 0393     		str	r3, [sp, #12]
1439
 900 004a 0393     		str	r3, [sp, #12]
1440
 391:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1440
 391:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1441
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 25
1441
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 25
1442
 
1442
 
1443
 
1443
 
1444
 901              		.loc 1 391 5 is_stmt 1 view .LVU192
1444
 901              		.loc 1 391 5 is_stmt 1 view .LVU192
1445
 391:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1445
 391:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1446
 902              		.loc 1 391 27 is_stmt 0 view .LVU193
1446
 902              		.loc 1 391 27 is_stmt 0 view .LVU193
Line 1496... Line 1496...
1496
 941              	.L77:
1496
 941              	.L77:
1497
 942              		.align	2
1497
 942              		.align	2
1498
 943              	.L76:
1498
 943              	.L76:
1499
 944 0080 00380140 		.word	1073821696
1499
 944 0080 00380140 		.word	1073821696
1500
 945 0084 00080140 		.word	1073809408
1500
 945 0084 00080140 		.word	1073809408
1501
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 26
1501
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 26
1502
 
1502
 
1503
 
1503
 
1504
 946              		.cfi_endproc
1504
 946              		.cfi_endproc
1505
 947              	.LFE76:
1505
 947              	.LFE76:
1506
 949              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
1506
 949              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
Line 1556... Line 1556...
1556
 429:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
1556
 429:Core/Src/stm32f1xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
1557
 430:Core/Src/stm32f1xx_hal_msp.c **** 
1557
 430:Core/Src/stm32f1xx_hal_msp.c **** 
1558
 431:Core/Src/stm32f1xx_hal_msp.c ****     /* USART1 interrupt DeInit */
1558
 431:Core/Src/stm32f1xx_hal_msp.c ****     /* USART1 interrupt DeInit */
1559
 432:Core/Src/stm32f1xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(USART1_IRQn);
1559
 432:Core/Src/stm32f1xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(USART1_IRQn);
1560
 433:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
1560
 433:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
1561
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 27
1561
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 27
1562
 
1562
 
1563
 
1563
 
1564
 434:Core/Src/stm32f1xx_hal_msp.c **** 
1564
 434:Core/Src/stm32f1xx_hal_msp.c **** 
1565
 435:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 1 */
1565
 435:Core/Src/stm32f1xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 1 */
1566
 436:Core/Src/stm32f1xx_hal_msp.c ****   }
1566
 436:Core/Src/stm32f1xx_hal_msp.c ****   }
Line 1616... Line 1616...
1616
 1023              		.file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
1616
 1023              		.file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
1617
 1024              		.file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
1617
 1024              		.file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
1618
 1025              		.file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
1618
 1025              		.file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
1619
 1026              		.file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
1619
 1026              		.file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
1620
 1027              		.file 17 "Core/Inc/main.h"
1620
 1027              		.file 17 "Core/Inc/main.h"
1621
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 28
1621
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 28
1622
 
1622
 
1623
 
1623
 
1624
 1028              		.file 18 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h"
1624
 1028              		.file 18 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h"
1625
 1029              		.file 19 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h"
1625
 1029              		.file 19 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h"
1626
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccpexaTP.s 			page 29
1626
ARM GAS  C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s 			page 29
1627
 
1627
 
1628
 
1628
 
1629
DEFINED SYMBOLS
1629
DEFINED SYMBOLS
1630
                            *ABS*:0000000000000000 stm32f1xx_hal_msp.c
1630
                            *ABS*:0000000000000000 stm32f1xx_hal_msp.c
1631
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:16     .text.HAL_MspInit:0000000000000000 $t
1631
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:16     .text.HAL_MspInit:0000000000000000 $t
1632
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:24     .text.HAL_MspInit:0000000000000000 HAL_MspInit
1632
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:24     .text.HAL_MspInit:0000000000000000 HAL_MspInit
1633
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:88     .text.HAL_MspInit:000000000000003c $d
1633
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:88     .text.HAL_MspInit:000000000000003c $d
1634
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:94     .text.HAL_I2C_MspInit:0000000000000000 $t
1634
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:94     .text.HAL_I2C_MspInit:0000000000000000 $t
1635
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:101    .text.HAL_I2C_MspInit:0000000000000000 HAL_I2C_MspInit
1635
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:101    .text.HAL_I2C_MspInit:0000000000000000 HAL_I2C_MspInit
1636
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:211    .text.HAL_I2C_MspInit:000000000000006c $d
1636
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:211    .text.HAL_I2C_MspInit:000000000000006c $d
1637
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:218    .text.HAL_I2C_MspDeInit:0000000000000000 $t
1637
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:218    .text.HAL_I2C_MspDeInit:0000000000000000 $t
1638
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:225    .text.HAL_I2C_MspDeInit:0000000000000000 HAL_I2C_MspDeInit
1638
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:225    .text.HAL_I2C_MspDeInit:0000000000000000 HAL_I2C_MspDeInit
1639
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:270    .text.HAL_I2C_MspDeInit:0000000000000030 $d
1639
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:270    .text.HAL_I2C_MspDeInit:0000000000000030 $d
1640
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:277    .text.HAL_RTC_MspInit:0000000000000000 $t
1640
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:277    .text.HAL_RTC_MspInit:0000000000000000 $t
1641
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:284    .text.HAL_RTC_MspInit:0000000000000000 HAL_RTC_MspInit
1641
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:284    .text.HAL_RTC_MspInit:0000000000000000 HAL_RTC_MspInit
1642
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:339    .text.HAL_RTC_MspInit:0000000000000034 $d
1642
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:339    .text.HAL_RTC_MspInit:0000000000000034 $d
1643
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:346    .text.HAL_RTC_MspDeInit:0000000000000000 $t
1643
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:346    .text.HAL_RTC_MspDeInit:0000000000000000 $t
1644
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:353    .text.HAL_RTC_MspDeInit:0000000000000000 HAL_RTC_MspDeInit
1644
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:353    .text.HAL_RTC_MspDeInit:0000000000000000 HAL_RTC_MspDeInit
1645
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:381    .text.HAL_RTC_MspDeInit:0000000000000014 $d
1645
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:381    .text.HAL_RTC_MspDeInit:0000000000000014 $d
1646
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:387    .text.HAL_SPI_MspInit:0000000000000000 $t
1646
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:387    .text.HAL_SPI_MspInit:0000000000000000 $t
1647
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:394    .text.HAL_SPI_MspInit:0000000000000000 HAL_SPI_MspInit
1647
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:394    .text.HAL_SPI_MspInit:0000000000000000 HAL_SPI_MspInit
1648
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:489    .text.HAL_SPI_MspInit:000000000000005c $d
1648
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:489    .text.HAL_SPI_MspInit:000000000000005c $d
1649
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:495    .text.HAL_SPI_MspDeInit:0000000000000000 $t
1649
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:495    .text.HAL_SPI_MspDeInit:0000000000000000 $t
1650
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:502    .text.HAL_SPI_MspDeInit:0000000000000000 HAL_SPI_MspDeInit
1650
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:502    .text.HAL_SPI_MspDeInit:0000000000000000 HAL_SPI_MspDeInit
1651
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:545    .text.HAL_SPI_MspDeInit:0000000000000020 $d
1651
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:545    .text.HAL_SPI_MspDeInit:0000000000000020 $d
1652
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:552    .text.HAL_TIM_OC_MspInit:0000000000000000 $t
1652
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:552    .text.HAL_TIM_OC_MspInit:0000000000000000 $t
1653
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:559    .text.HAL_TIM_OC_MspInit:0000000000000000 HAL_TIM_OC_MspInit
1653
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:559    .text.HAL_TIM_OC_MspInit:0000000000000000 HAL_TIM_OC_MspInit
1654
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:604    .text.HAL_TIM_OC_MspInit:0000000000000028 $d
1654
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:604    .text.HAL_TIM_OC_MspInit:0000000000000028 $d
1655
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:609    .text.HAL_TIM_Encoder_MspInit:0000000000000000 $t
1655
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:609    .text.HAL_TIM_Encoder_MspInit:0000000000000000 $t
1656
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:616    .text.HAL_TIM_Encoder_MspInit:0000000000000000 HAL_TIM_Encoder_MspInit
1656
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:616    .text.HAL_TIM_Encoder_MspInit:0000000000000000 HAL_TIM_Encoder_MspInit
1657
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:708    .text.HAL_TIM_Encoder_MspInit:0000000000000058 $d
1657
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:708    .text.HAL_TIM_Encoder_MspInit:0000000000000058 $d
1658
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:714    .text.HAL_TIM_OC_MspDeInit:0000000000000000 $t
1658
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:714    .text.HAL_TIM_OC_MspDeInit:0000000000000000 $t
1659
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:721    .text.HAL_TIM_OC_MspDeInit:0000000000000000 HAL_TIM_OC_MspDeInit
1659
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:721    .text.HAL_TIM_OC_MspDeInit:0000000000000000 HAL_TIM_OC_MspDeInit
1660
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:750    .text.HAL_TIM_OC_MspDeInit:0000000000000018 $d
1660
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:750    .text.HAL_TIM_OC_MspDeInit:0000000000000018 $d
1661
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:756    .text.HAL_TIM_Encoder_MspDeInit:0000000000000000 $t
1661
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:756    .text.HAL_TIM_Encoder_MspDeInit:0000000000000000 $t
1662
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:763    .text.HAL_TIM_Encoder_MspDeInit:0000000000000000 HAL_TIM_Encoder_MspDeInit
1662
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:763    .text.HAL_TIM_Encoder_MspDeInit:0000000000000000 HAL_TIM_Encoder_MspDeInit
1663
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:806    .text.HAL_TIM_Encoder_MspDeInit:0000000000000020 $d
1663
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:806    .text.HAL_TIM_Encoder_MspDeInit:0000000000000020 $d
1664
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:813    .text.HAL_UART_MspInit:0000000000000000 $t
1664
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:813    .text.HAL_UART_MspInit:0000000000000000 $t
1665
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:820    .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
1665
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:820    .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
1666
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:944    .text.HAL_UART_MspInit:0000000000000080 $d
1666
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:944    .text.HAL_UART_MspInit:0000000000000080 $d
1667
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:950    .text.HAL_UART_MspDeInit:0000000000000000 $t
1667
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:950    .text.HAL_UART_MspDeInit:0000000000000000 $t
1668
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:957    .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
1668
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:957    .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
1669
C:\Users\mike\AppData\Local\Temp\ccpexaTP.s:1004   .text.HAL_UART_MspDeInit:0000000000000028 $d
1669
C:\Users\mike\AppData\Local\Temp\ccnDDvIb.s:1004   .text.HAL_UART_MspDeInit:0000000000000028 $d
1670
 
1670
 
1671
UNDEFINED SYMBOLS
1671
UNDEFINED SYMBOLS
1672
HAL_GPIO_Init
1672
HAL_GPIO_Init
1673
HAL_GPIO_DeInit
1673
HAL_GPIO_DeInit
1674
HAL_PWR_EnableBkUpAccess
1674
HAL_PWR_EnableBkUpAccess